Setun Ternary Computer Simulator
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Updated
Dec 28, 2025 - JavaScript
Setun Ternary Computer Simulator
A translator to translate RV32I to REBEL-6. Includes custom assemblers to output RV32I (and hopefully soon REBEL-6) MRCS-readable object files, and assembly level simulators to simulate RV32I and REBEL-6 assembly code execution
This REPO exists to explore the idea of implementing ternary systems to software and hopefully hardware
Deterministic ternary-native computing stack featuring base-81 data types, TISC instruction set, T81VM, T81Lang, Axion safety/optimization engine, and recursive cognition tiers — built for bit-exact, auditable, reproducible execution in AI, cryptography, and scientific computing.
t81lib – Balanced-ternary quantization and arithmetic core for AI and quant workloads in modern C++ and Python.
[WIP] Hardware and software of DIY analog frontends for PCI-7200 DAQ card, meant to be useful with long-term distros on any PC with available 32-bit PCI slot(s)
Digital logic simulator that supports ternary circuit design. Simulator is event-driven with zero delay and iterates delta cycles until quiescence.
Ternary Fabric is a ternary-native memory and interconnect co-processor designed to accelerate AI and signal processing workloads.
A simple OS for the ternary processor 5500FP and the GargantuRAM development system
🌟 Develop DIY analog frontends for the PCI-7200 DAQ card, enhancing long-term data collection on PCs with 32-bit PCI slots.
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