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[SM6.10] LinAlg: Add Convert Signedness Test #8955

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Merged
Ashley Coleman (V-FEXrt) merged 1 commit into from
Sep 23, 2026
+13 −3
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[SM6.10] LinAlg: Add Convert Signedness Test #8955

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16 changes: 13 additions & 3 deletions tools/clang/test/CodeGenDXIL/hlsl/linalg/builtins/convert/nominal.hlsl
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Original file line number Diff line number Diff line change
Expand Up @@ -17,12 +17,22 @@ void main() {
__builtin_LinAlg_Convert(result1, vec1, 9, 4);

// CHECK: %{{.*}} = call <4 x i64> @dx.op.linAlgConvert.v4i64.v4f64
// CHECK-SAME: (i32 -2147483618, <4 x double> <double 9.000000e+00, double 8.000000e+00, double 7.000000e+00, double 6.000000e+00>, i32 10, i32 7)
// CHECK-SAME: (i32 -2147483618, <4 x double> <double 9.000000e+00, double 8.000000e+00, double 7.000000e+00, double 6.000000e+00>, i32 10, i32 6)
// CHECK-SAME: ; LinAlgConvert(inputVector,inputInterpretation,outputInterpretation)

// CHECK2: call void @"dx.hl.op..void (i32, <4 x i64>*, <4 x double>, i32, i32)"
// CHECK2-SAME: (i32 422, <4 x i64>* %result2, <4 x double> %{{.*}}, i32 10, i32 7)
// CHECK2-SAME: (i32 422, <4 x i64>* %result2, <4 x double> %{{.*}}, i32 10, i32 6)
double4 vec2 = {9.0, 8.0, 7.0, 6.0};
vector<int64_t, 4> result2;
__builtin_LinAlg_Convert(result2, vec2, 10, 7);
__builtin_LinAlg_Convert(result2, vec2, 10, 6);

// CHECK: %{{.*}} = call <4 x i64> @dx.op.linAlgConvert.v4i64.v4f64
// CHECK-SAME: (i32 -2147483618, <4 x double> <double 9.000000e+00, double 8.000000e+00, double 7.000000e+00, double 6.000000e+00>, i32 10, i32 7)
// CHECK-SAME: ; LinAlgConvert(inputVector,inputInterpretation,outputInterpretation)

// CHECK2: call void @"dx.hl.op..void (i32, <4 x i64>*, <4 x double>, i32, i32)"
// CHECK2-SAME: (i32 422, <4 x i64>* %result3, <4 x double> %{{.*}}, i32 10, i32 7)
double4 vec3 = {9.0, 8.0, 7.0, 6.0};
vector<uint64_t, 4> result3;
__builtin_LinAlg_Convert(result3, vec3, 10, 7);
}
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