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evidence: qualify historical ULX3S LSC-1 physical run#19

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Th0rgal wants to merge 9 commits into
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evidence: qualify historical ULX3S LSC-1 physical run#19
Th0rgal wants to merge 9 commits into
fpga/ulx3s-smoke-uart-mincorefrom
agent/add-ulx3s-lsc1-harness

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@Th0rgal

@Th0rgal Th0rgal commented Jul 26, 2026

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Summary

This draft is stacked on PR #16 and adds qualified historical physical-run evidence plus a restricted compiled-program runner. It now also integrates PR #16 head 91ec84a, rebuilds the maintained artifacts, and records a bounded physical run of the final 1 Mbaud UART path on one ULX3S-85F.

  • preserve and qualify the original 115200-baud candidate evidence without upgrading its provenance
  • reuse PR fpga: ULX3S v3.1.8 smoke + 1 Mbaud UART bridge to exact lean_silicon_lsc1 (MinCore) #16's MinCoreSerialDriver, 0x7f resynchronization, payload guards, and maintained RTL
  • run the frozen assert_set_xor_mul prefix through the maintained bitstream
  • correct stale published bitstream hashes and regenerate source/artifact manifests
  • authenticate the new physical-run record and check it in regression tests

Maintained build identity

The integrated source was rebuilt from commit 9d5741961a3851c584fc2882ae7eccd41a1ec404 with manifests reporting inputs-match-revision: yes.

  • smoke SHA-256: 96eb9eda7421bac902eacaeced21eee0db9a80b8f2f2effdb52b515d68e0b2e3
  • UART SHA-256: efa908bc6b4285d5461a4d6c2c65081ce7063efc7ede080a867ddbde81edde0e
  • smoke timing: 291.97 MHz maximum at requested 25 MHz
  • UART timing: 161.58 MHz maximum at requested 25 MHz
  • the UART rebuild was byte-identical across two local builds

The previously documented eb3d81... and 7272b0... values did not match the committed binaries; the archive and documentation now describe the exact rebuilt and tested bytes.

Physical run

All FPGA loads were volatile SRAM-only via openFPGALoader -b ulx3s; no command used -f.

  • JTAG detected IDCODE 0x41113043, Lattice ECP5 LFE5U-85
  • the smoke image hash was verified and the image was accepted for SRAM loading
  • a human observer confirmed the regular red D0 heartbeat
  • after a real power-cycle, D0–D2 showed a different steady state and STATUS returned surplus zero bytes instead of 01010f08, proving the UART SRAM image was no longer active
  • the UART image loaded to 100% and reported Disable configuration: DONE
  • STATUS at 1 Mbaud returned exactly 01010f08
  • SET 3, SET 5, XOR 3/5 → 6, and MUL 3/5 → 15 matched independent byte-for-byte oracles
  • the maintained runner completed 12 physical SET/XOR/MUL transitions with no missing address or mismatch, then stopped before the first unsupported JUMP
  • result: PREFIX_MATCH, explicitly not full-program PASS
  • partial-request timeout, resynchronizing STATUS, unknown-opcode drain, host reopen, FPGA SRAM reload, and post-reload STATUS were exercised

The authenticated record is in results/fpga-pr16-pr19-20260726/program-run.json. It records repo_dirty: true because regenerated build evidence existed before the transaction; this is not presented as clean-source transaction provenance.

Historical evidence and limits

The original candidate evidence remains in results/fpga-lsc1-20260726/. Its recorded physical digest and the later reconstructed candidate digest still differ, and its USB product text/PCB revision discrepancy remains documented. It is not reclassified as a run of PR #16.

Neither evidence set proves packet-v1, the unsupported JUMP suffix, complete leanVM-b execution, flash persistence, a second board, or clean source-to-bitstream identity beyond the exact manifests and tested digests.

Validation

  • make check: 242 tests passed
  • make sim: maintained stream-ALU and UART bridge simulations passed
  • focused adapter/evidence suite: 16 tests passed
  • root and artifact checksum verification passed
  • git diff --check passed for source/documentation changes

Incremental diff

PR #16 remains the owner of the maintained UART RTL, build flow, and driver. PR #19 owns the restricted host program runner, qualified historical evidence, maintained-bitstream physical follow-up, regression assertions, and accompanying documentation. After #16 merges, this PR can be retargeted to main without changing that ownership boundary.

@Th0rgal
Th0rgal changed the base branch from main to fpga/ulx3s-smoke-uart-mincore July 26, 2026 05:54
@Th0rgal

Th0rgal commented Jul 26, 2026

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@codex review

@Th0rgal Th0rgal changed the title Add ULX3S LSC-1 hardware harness evidence: qualify historical ULX3S LSC-1 physical run Jul 26, 2026
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Codex Review: Didn't find any major issues. Chef's kiss.

Reviewed commit: 8f66df7451

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