arch/arm64/imx95-a55: add GPIO and eMMC (USDHC) support with partition table parsing#18501
arch/arm64/imx95-a55: add GPIO and eMMC (USDHC) support with partition table parsing#18501jasonbu wants to merge 7 commits intoapache:masterfrom
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Hi @fdcavalcanti @tmedicci @eren-terzioglu We are receiving this error on all PRs. Can you check it? Boards https://github.com/apache/nuttx/actions/runs/22758561387/job/66009383296#logs |
simbit18
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acassis,
cederom,
fdcavalcanti,
jerpelea,
linguini1,
lupyuen,
raiden00pl and
tmedicci
There's a fix coming very soon. |
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Manual review done, some smaller items noted. Except maybe for the inclusion of imx9_gpiobase.c by imx9_gpio.c which is rather ugly (but which was already present).
To check for regressions on the iMX93, I tried building and running the A55 part of IMX93-EVK on an IMX93-QSB board for the current master (43f65ce ("build(deps): bump docker/build-push-action from 6 to 7", 2026-03-09)) first. Unfortunately without succes. So it doesn't make a lot of sense to try and test this PR on target..
u-boot=> fatload mmc 0:1 0x80000000 nuttx_a55.bin
585728 bytes read in 400 ms (1.4 MiB/s)
u-boot=> go 0x80000000
## Starting application at 0x80000000 ...
- Ready to Boot Primary CPU
- Boot from EL2
- Boot from EL1
- Boot to C runtime for OS Initialize
"Synchronous Abort" handler, esr 0x02000000
elr: 0000000080202580 lr : 00000000012f3700 (reloc)
elr: 00000000fef10580 lr : 0000000080001700
x0 : 000000008008ec10 x1 : 0000000080065d38
x2 : 0000000096000021 x3 : 0000000000000000
x4 : 00000000443c0180 x5 : 00000000800047d8
x6 : 0000000000003fc4 x7 : 0000000000000006
x8 : 0000000000000003 x9 : 0000000096000021
x10: 0000000000000025 x11: 0000000000000000
x12: 000000000000001c x13: 00000000fcf0dd86
x14: 0000000000000008 x15: 00000000fcefef5d
x16: 0000000080000000 x17: 0000000000000004
x18: 00000000fcf0dd70 x19: 000000008008ec10
x20: 0000000000000000 x21: 0000000000000002
x22: 00000000fcf1b390 x23: 0000000080000068
x24: 000000008008f000 x25: 0000000080000e38
x26: 0000000000000000 x27: 0000000000000000
x28: 00000000fcf33650 x29: 00000000fceff7f0
Code: f9403e41 1400a056 801ffe10 00000000 (feff7040)
Resetting CPU ...
resetting ...
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Thank you @mzanders !! I got my FRDM-IMX93 but need to find some time to play maybe this week :-) |
arm64_modifyreg8.c, arm64_modifyreg16.c, arm64_modifyreg32.c were present in Make.defs but missing from CMakeLists.txt, causing link errors when building with cmake. Signed-off-by: buxiasen <buxiasen@xiaomi.com>
…upport The MMC CMD6 bus width switch was gated on priv->buswidth which is derived from the SD SCR register. For MMC cards this field is never set (unless SDIO_CAPS_4BIT_ONLY), so the CMD6 was skipped while the host PROCTL DTW was still changed - causing a bus width mismatch and data transfer timeouts. Fix by checking priv->caps instead of priv->buswidth for MMC cards. Also select EXT_CSD_BUS_WIDTH_8 when host reports SDIO_CAPS_8BIT. Signed-off-by: buxiasen <buxiasen@xiaomi.com>
Rename IMX9_IRQ_uSDHC{1,2,3} to IMX9_IRQ_USDHC{1,2,3} in both arm
and arm64 imx95_irq.h to follow the all-caps naming convention used
by imx93_irq.h and the rest of the NuttX codebase. Remove the now
unnecessary USDHC IRQ alias block from arm64 imx95_irq.h.
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
Add imx95 GPIO register definitions (same IP block as imx93), fill g_gpio_base[] array for imx95, include imx95_gpio.h from the common header, and compile imx9_gpio.c/imx9_gpiobase.c for imx95 in cmake. Signed-off-by: buxiasen <buxiasen@xiaomi.com>
Port USDHC1 (eMMC) driver to the i.MX95 FRDM EVK board: - Create imx95_pinmux.h with SD1/USDHC1 pin definitions - Add USDHC1 pin macros to board.h - Create board-level imx9_usdhc.c glue code - Update imx9_bringup.c with DMA allocator and USDHC init - Add SCMI clock guards in imx9_usdhc.c (imx95 clock roots are owned by System Manager, direct CCM writes are no-ops) - Fix CCM_CR_USDHC2 copy-paste bug to CCM_CR_USDHC1 Signed-off-by: buxiasen <buxiasen@xiaomi.com>
imx9_dmapreflight() rejected unaligned buffers unconditionally, but dmarecvsetup() has a bounce path via priv->rxbuffer for small transfers. Add a buflen > sizeof(priv->rxbuffer) check so that small reads (e.g. ext_csd 512-byte stack buffer) can use the bounce buffer instead of failing with -EFAULT. Signed-off-by: buxiasen <buxiasen@xiaomi.com>
Parse the partition table on /dev/mmcsd0 during board bringup and register each partition as /dev/mmcsd0pN. MBR partitions have no name field so a custom handler is needed instead of the default register_partition which skips unnamed entries. Verify by i.mx95 FRDM 'mount -t vfat /dev/mmcsd0p0 /data' Signed-off-by: buxiasen <buxiasen@xiaomi.com>
guess crash with the CLOCK_SDIO_DISABLED place modify, but when I test with my board, the emmc break, and mount cause uboot erased, will do verify again after use uuu recover the image. my private fork worked before #18403 , if you have a plan add support for i.mx 95, please continue, as I did not have environment to double check if i.mx 93 work as expected. |
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@jasonbu nice work, kudos!!!
Please add a board config to exercise these peripherals and please update the board Documentation to include these configs and a Picture of the board: https://nuttx.apache.org/docs/latest/platforms/arm64/imx9/boards/imx95-a55-evk/index.html
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@jasonbu is that board? https://www.nxp.com/part/IMX95LPD5EVK-19 wow, U$ 1,200.00, I think this company didn't learn anything from ST! |
hi, @acassis searched the public website, did not found the board, maybe later. |
@mzanders recommended me that board too and it just arrived, at reasonable price ~80EUR, available at Mouser https://www.mouser.pl/ProductDetail/NXP-Semiconductors/FRDM-IMX93?qs=%252BXxaIXUDbq3oe%252BtsgKnJ3Q%3D%3D :-) I just asked NXP today if they have some EVK/EVB devkits available as free samples but they can only provide free samples for the bare chips.. so we may use that option at NuttX Base Board SOM :-) |
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@jasonbu is that one: https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-IMX95 |
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There are some other options out there, for instance: This SoC is targeting safety critical and 'high end' automotive/industrial applications. Pricing is accordingly. These chips are on a complexity level both for HW and SW that require serious investments for companies who are going to implement them. And that's after NXP has done most of the heavy lifting in terms of SW ecosystem. I'm very interested to hear about use cases for the A55 cores in NuttX on iMX9x. In my current opinion those should really be running Linux to take full advantage of the hardware features. But I'm happy to adjust said opinion. :-) If you're looking to host the iMX95 on a NuttX module, I would strongly advise to look at soldered SOM's. That avoids 12-16 layer boards, DDR routing, etc etc. |
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Yup these modules are what we may look for.. NXP did not have anything like this but today I asked only at chat ;-) https://www.compulab.com/products/system-on-modules/ $75 https://www.compulab.com/products/computer-on-modules/ucm-imx95-nxp-i-mx-95-som-system-on-module/
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ci internal failure, restarted failed jobs. |
8 participants
Summary
Add GPIO and eMMC (USDHC) support for the i.MX95 A55 EVK board, enabling 8-bit eMMC access with MBR/GPT partition table parsing.
Changes
1.
imx9: add GPIO support for imx95g_gpio_base[]array for imx95imx95_gpio.hfrom the common headerimx9_gpio.c/imx9_gpiobase.cfor imx95 in cmake2.
imx95-a55-evk: add USDHC eMMC driver supportimx95_pinmux.h/imx95_ccm.h/imx95_pll.hhardware definitions for imx95board.himx9_usdhc.cglue codeimx9_bringup.cwith DMA allocator and USDHC initCONFIG_IMX9_CLK_OVER_SCMIcompile-time guards inimx9_usdhc.cto isolate the IMX95 SCMI clock path from the existing IMX93 direct-CCM path — no functional change for IMX933.
imx9: usdhc fix dmapreflight rejecting small unaligned buffersimx9_dmapreflight()rejected unaligned buffers unconditionally, butdmarecvsetup()has a bounce path viapriv->rxbufferfor small transfersbuflen > sizeof(priv->rxbuffer)check so that small reads (e.g. ext_csd 512-byte stack buffer) can use the bounce buffer instead of failing with-EFAULT4.
imx95-a55-evk: add MBR/GPT partition table parsing on eMMC/dev/mmcsd0during board bringup and register each partition as/dev/mmcsd0pNImpact
#ifndef CONFIG_IMX9_CLK_OVER_SCMIguards — zero functional change for existing IMX93 boardsdmapreflightfix is a generic improvement that benefits all imx9 USDHC usersTesting
Verified on i.MX95 FRDM EVK:
mount -t vfat /dev/mmcsd0p0 /dataworksneed enable feature by menuconfig.
defconfig diff did not bring in these patch chain
ostest passed in i.MX95 FRDM EVK
[2026-03-06 17:57:11] user_main: Exiting [2026-03-06 17:57:11] ostest_main: Exiting with status 0 [2026-03-06 17:57:11] nsh>