Fix handshake for fast-booting devices with automated power cycling#25
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Fix handshake for fast-booting devices with automated power cycling#25
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On hi3516cv300 and hi3516ev300, the bootrom window is <100ms — the 0x20 pattern and "System startup" text arrive in the same serial read. The byte-by-byte handshake loop can't send 0xAA fast enough, so the device boots from SPI flash instead of entering download mode. Fix: continuous ACK mode sends 0xAA every 50ms while waiting for the bootrom pattern. When the device powers on, it sees 0xAA immediately and enters download mode. Enabled automatically when power controller is active. Verified on real hardware: - hi3516cv300 (IVGHP203Y-AF): full recovery via PoE power cycle - hi3516ev300 (IVG85HG50PYA-S): full recovery via PoE power cycle Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Document real hardware testing with hi3516cv300 and hi3516ev300 cameras on CRS112-8P-4S PoE switch. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Problem
On hi3516cv300 and hi3516ev300, the bootrom sends ~25x
0x20bytes followed immediately by "System startup" in the same serial burst (~0.5s after power-on). The Python handshake loop reads byte-by-byte, counts to 5, then sends0xAA— but by then the bootrom has already handed off to SPI flash boot. The handshake "succeeds" (it saw the0x20pattern) but the DDR step fails because the device is now in U-Boot, not download mode.Fix
Continuous ACK mode: when power cycling is active, the handshake sends
0xAAevery ~50ms while simultaneously reading for the0x20bootrom pattern. The bootrom sees0xAAimmediately on startup and enters download mode.HiSiliconStandard.set_continuous_ack(True)— interleaves0xAAwrites with reads using 50ms timeoutRecoverySessionenables it automatically when aPowerControlleris configuredVerified on real hardware
Test plan
0xAAbefore bootrom patterncontinuous_ack🤖 Generated with Claude Code