Grinding: batch nonce tests with SIMD and ordered parallel search

[wu-s-john]

Accelerate proof-of-work nonce search with SIMD batches and ordered parallel ranges while returning the same minimum valid nonce as the serial implementation. This issue owns the search kernel, not grinding difficulty or security-profile selection.

Sources

BitZ challenger nonce search is normative for the target contract. PoC deterministic SIMD/parallel search is implementation reference only; preserve target field, layout, transcript and security requirements unless this issue explicitly introduces a versioned protocol.

Current and proposed behavior

The target tests consecutive nonces through a serial hash loop. The reference batches single-block BLAKE3 compressions in NEON or AVX2 lanes, then uses monotonically allocated ranges with a global minimum hit. Reuse that structure only after matching the target's exact hash preimage and success predicate.

Required scope

• Preserve seed derivation, domain separation, nonce endianness, leading-zero convention, accepted nonce range and nonce absorption. Every prover challenge must occur at its existing position after its required grind.
• Gate instruction sets correctly and provide a scalar fallback for unavailable SIMD, unsupported prefix lengths, nonaligned prefixes and small workloads.
• In parallel search, complete or rule out every range preceding the selected hit before returning it. Bound range arithmetic near u64 exhaustion and avoid nested-pool oversubscription.
• Use public difficulty/size thresholds and compare kernel and full-proof boundaries. PR feat: add initial OOD sampling to BitZ commitments #76 owns initial OOD sampling/difficulty; this issue can accelerate its grind after integration without introducing a second OOD transcript.

Only grinding time improves. Eight SIMD lanes or additional workers do not guarantee equivalent wall-time speedups; actual gains depend on hashing throughput, synchronization and difficulty. No weaker target or reduced number of checks is permitted.

Done when

• Scalar and every SIMD lane match reference hash bytes for supported preimages.
• Serial, SIMD and parallel paths return identical minimum nonces across seeds, difficulty zero/high values, empty/ragged ranges and overflow boundaries.
• Invalid nonce and altered-seed proofs still reject; complete proof/transcript golden vectors remain identical across CPU and worker configurations.
• Benchmarks include dispatch overhead, low/high difficulty, one/many workers and unchanged full security settings; fallback covers regressions.

Dependencies and coordination

No prerequisite optimization port. Coordinate with #76.