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Pull request overview
Adds a portable HAL entry point to safely provide non-cacheable memory for non-coherent DMA on ZynqMP, addressing descriptor corruption when wolfBoot runs with MMU + D-cache enabled.
Changes:
- Introduces
hal_dma_set_noncached(start, end)with a weak default that fails (prevents silent no-op). - Implements ZynqMP runtime re-attribution of 2MB MMU L2 blocks to Normal-NonCacheable and adds a dedicated
.dma_buffersDDR carve-out in the linker script. - Adds a host-runnable unit test to validate ZynqMP 2MB-block index arithmetic.
Reviewed changes
Copilot reviewed 11 out of 11 changed files in this pull request and generated 3 comments.
Show a summary per file
| File | Description |
|---|---|
| tools/unit-tests/unit-zynq-dma-range.c | New unit test for ZynqMP L2 2MB block-range computation. |
| tools/unit-tests/Makefile | Registers/builds the new unit test binary. |
| src/libwolfboot.c | Adds weak default hal_dma_set_noncached() that returns error. |
| options.mk | Adds configurable DMA window base address for linker substitution. |
| include/hal.h | Exposes new HAL API and broadens timer API guard to include PREBOOT_NETCHECK. |
| hal/zynq.ld | Reserves a 2MB-aligned NOLOAD .dma_buffers DDR region and exports bounds symbols. |
| hal/zynq.h | Adds constants and a unit-testable helper for converting ranges to 2MB block indices. |
| hal/zynq.c | Implements hal_dma_set_noncached() via break-before-make + cache/TLB maintenance. |
| docs/Targets.md | Documents the ZynqMP non-cacheable DMA window. |
| docs/HAL.md | Documents new optional HAL hook and required semantics. |
| Makefile | Adds linker-script placeholder substitution for DMA buffer base address. |
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| uint64_t i; | ||
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|
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| __asm__ volatile("dsb ishst" : : : "memory"); | ||
| for (i = first; i <= last; i++) { | ||
| __asm__ volatile("dc civac, %0" | ||
| : : "r"((uintptr_t)&MMUTableL2[i]) : "memory"); |
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| if (end <= start || first == NULL || last == NULL) { | ||
| return -1; | ||
| } | ||
| *first = start >> ZYNQMP_L2_BLOCK_SHIFT; | ||
| *last = (end - 1) >> ZYNQMP_L2_BLOCK_SHIFT; | ||
| if (*last >= ZYNQMP_L2_ENTRIES) { | ||
| return -1; | ||
| } |
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| ck_assert_uint_eq(first, 65); | ||
| ck_assert_uint_eq(last, 65); |
dgarske
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wolfBoot runs with the MMU and D-cache enabled on ZynqMP and maps DDR write-back. A bus master that is not coherent with the CPU caches cannot share descriptors through that memory: descriptors are typically 8 bytes, so several land in one cache line and cleaning one writes stale neighbours back over the ownership bits the master just set. This adds a HAL primitive for handing such a master memory it can actually use.