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Fix Vector Table Alignement for Vorago va416x0 #885

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Fix Vector Table Alignement for Vorago va416x0 #885

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1d86107
Update vorago_va416x0.config
jgeorge1316 Sep 10, 2026
f01c9e4
Update Vorago VA416x0 in Targets.md
jgeorge1316 Sep 10, 2026
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2 changes: 1 addition & 1 deletion config/examples/vorago_va416x0.config
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Expand Up @@ -5,7 +5,7 @@ TARGET?=va416x0
# ECDSA P384 and SHA384
SIGN?=ECC384
HASH?=SHA384
IMAGE_HEADER_SIZE=512
IMAGE_HEADER_SIZE=1024

# ML-DSA Level 5 (87)
#SIGN=ML_DSA
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8 changes: 5 additions & 3 deletions docs/Targets.md
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Expand Up @@ -8691,11 +8691,13 @@ Default flash layout:

| Partition | Size | Address | Description |
|-------------|-------|---------|-------------|
| Bootloader | 38KB | 0x0 | Bootloader partition |
| Application | 108KB | 0x9800 | Boot partition |
| Update | 108KB | 0x24800 | Update partition |
| Bootloader | 46KB | 0x0 | Bootloader partition |
| Application | 104KB | 0xB800 | Boot partition |
| Update | 104KB | 0x25800 | Update partition |
| Swap | 2KB | 0x3F800 | Swap area |

**Note**: To address vector table alignment requirements, the default image header size (IMAGE_HEADER_SIZE) has been increased to 1024 bytes. Alternatively, the SWAP partition size (WOLFBOOT_SECTOR_SIZE) can be reduced and partition addresses can be adjusted to ensure that the application address is aligned to a 256-word (1024 byte) boundary.

SRAM: 64KB on-chip SRAM and 256KB on-chip instruction/program memory

Boot ROM loads at 20MHz from SPI bus to internal data SRAM.
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