docs: add topology2 README with structure and conventions#10623
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kv2019i wants to merge 1 commit intothesofproject:mainfrom
Open
docs: add topology2 README with structure and conventions#10623kv2019i wants to merge 1 commit intothesofproject:mainfrom
kv2019i wants to merge 1 commit intothesofproject:mainfrom
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kv2019i
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Mar 13, 2026
kv2019i
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- document directory structure, class-based object model, and build pipeline
- add PCM ID and pipeline ID convention tables for SoundWire and HDA
- describe cmake target registration, platform overrides, and route definitions
- document directory structure, class-based object model, and build pipeline - add PCM ID and pipeline ID convention tables for SoundWire and HDA - describe cmake target registration, platform overrides, and route definitions Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
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Pull request overview
This PR adds a comprehensive README for the SOF Topology2 system, documenting its directory structure, class-based object model, build pipeline, and conventions for PCM/pipeline IDs.
Changes:
- Added a new
README.mddocumenting directory structure, build process, and the class-based object model - Documented PCM ID and pipeline ID convention tables for SoundWire and HDA topology families
- Described CMake target registration, platform overrides, route definitions, and widget naming conventions
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ujfalusi
requested changes
Mar 13, 2026
| | HDMI 2 | 4 | `HDMI2_PCM_ID` | | ||
| | HDMI 3 | 5 | `HDMI3_PCM_ID` | | ||
| | DMIC0 | 6 | `DMIC0_PCM_ID` | | ||
| | Deep Buffer | 31 | `DEEP_BUFFER_PCM_ID` | |
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| Compress HDA Analog | 50 | COMPR_PCM_ID |
| | Deep Buffer (Jack) | 31 | `DEEP_BUFFER_PCM_ID` | | ||
| | Deep Buffer (Speaker) | 35 | `DEEP_BUFFER_PCM_ID_2` | | ||
| | DMIC Deep Buffer | 46 | `DMIC0_DEEP_BUFFER_PCM_ID` | | ||
| | Compressed Playback 1 | 50 | `COMPR_PCM_ID` | |
| | Deep Buffer (Speaker) | 35 | `DEEP_BUFFER_PCM_ID_2` | | ||
| | DMIC Deep Buffer | 46 | `DMIC0_DEEP_BUFFER_PCM_ID` | | ||
| | Compressed Playback 1 | 50 | `COMPR_PCM_ID` | | ||
| | Compressed Playback 2 | 52 | `COMPR_2_PCM_ID` | |
| | HDMI 3 Host / DAI | 70 / 71 | `HDMI3_HOST_PIPELINE_ID` / `HDMI3_DAI_PIPELINE_ID` | | ||
| | HDMI 4 Host / DAI | 80 / 81 | `HDMI4_HOST_PIPELINE_ID` / `HDMI4_DAI_PIPELINE_ID` | | ||
| | Compressed 1 / 2 | 90 / 92 | `COMPR_PIPELINE_ID` / `COMPR_2_PIPELINE_ID` | | ||
| | PCH DMIC0 Host / DAI | 100 / 101 | `DMIC0_HOST_PIPELINE_ID` / `DMIC0_DAI_PIPELINE_ID` | |
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why only these random pipeline IDs? There is pipeline with ID 22 for example and based on this readme, it is up for grab, when if you define a pipeline with 22, it will have really fun side effects as it is used by something else...
ujfalusi
requested changes
Mar 13, 2026
| | HDMI 2 Host / DAI | 60 / 61 | `HDMI2_HOST_PIPELINE_ID` / `HDMI2_DAI_PIPELINE_ID` | | ||
| | HDMI 3 Host / DAI | 70 / 71 | `HDMI3_HOST_PIPELINE_ID` / `HDMI3_DAI_PIPELINE_ID` | | ||
| | HDMI 4 Host / DAI | 80 / 81 | `HDMI4_HOST_PIPELINE_ID` / `HDMI4_DAI_PIPELINE_ID` | | ||
| | Compressed 1 / 2 | 90 / 92 | `COMPR_PIPELINE_ID` / `COMPR_2_PIPELINE_ID` | |
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Compress Jack and Speaker...
| | HDMI 1 Host / DAI | 50 / 51 | `HDMI1_HOST_PIPELINE_ID` / `HDMI1_DAI_PIPELINE_ID` | | ||
| | HDMI 2 Host / DAI | 60 / 61 | `HDMI2_HOST_PIPELINE_ID` / `HDMI2_DAI_PIPELINE_ID` | | ||
| | HDMI 3 Host / DAI | 70 / 71 | `HDMI3_HOST_PIPELINE_ID` / `HDMI3_DAI_PIPELINE_ID` | | ||
| | HDMI 4 Host / DAI | 80 / 81 | `HDMI4_HOST_PIPELINE_ID` / `HDMI4_DAI_PIPELINE_ID` | |
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Compress HDA Analog is 90 and who knows what pipeline IDs are in use in HDA topology, I would not dare to guess...
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