Add additional FMA tests

.circleci/config.yml

@@ -187,7 +187,7 @@ jobs:
       - run: pipx install meson==1.3.2
       - run: |
           export PATH=/usr/lib/ccache:${PATH}
-          CFLAGS="-Wno-unsafe-buffer-usage" CXXFLAGS="-Wno-unsafe-buffer-usage" CC="ccache clang" CXX="ccache clang++" /root/.local/bin/meson setup build
+          CFLAGS="-Wno-unsafe-buffer-usage -march=native" CXXFLAGS="-Wno-unsafe-buffer-usage -march=native" CC="ccache clang" CXX="ccache clang++" /root/.local/bin/meson setup build
           ninja -C build -v -j 5
       - run: /usr/bin/ccache -s
       - save_cache:
@@ -299,7 +299,7 @@ jobs:
             ccache -z
       - run: |
           export PATH=/usr/lib/ccache:${PATH}
-          meson setup build -Dc_args="-DSIMDE_NO_NATIVE -Wextra -Werror" -Dcpp_args="-DSIMDE_NO_NATIVE -Wextra -Werror"
+          meson setup build -Dc_args="-DSIMDE_NO_NATIVE -DSIMDE_MUSL -Wextra -Werror" -Dcpp_args="-DSIMDE_NO_NATIVE -DSIMDE_MUSL -Wextra -Werror"
           meson compile -C build --verbose -j 5
       - run: /usr/bin/ccache -s
       - save_cache:
@@ -317,6 +317,8 @@ jobs:
     environment:
       CC: clang-17
       CXX: clang++-17
+      CFLAGS: -march=native
+      CXXFLAGS: -march=native
     steps:
       - run: apt-get update && apt-get install -y ninja-build ninja-build pipx python3-setuptools python3-wheel gcovr clang-17 ccache
       - checkout

.github/workflows/ci.yml

@@ -160,6 +160,7 @@ jobs:
   emscripten:
     runs-on: ubuntu-26.04
     strategy:
+      fail-fast: false
       matrix:
         variant:
           - "32"
@@ -185,8 +186,8 @@ jobs:
       run: |
         git clone https://github.com/emscripten-core/emsdk.git /opt/emsdk
         cd /opt/emsdk
-        ./emsdk install latest  # FIXME, revert to tot
-        ./emsdk activate latest  # FIXME, revert to tot
+        ./emsdk install tot
+        ./emsdk activate tot
         source emsdk_env.sh
     - name: Install v8
       run: |

docker/cross-files/emscripten64-relaxed.cross

@@ -14,10 +14,10 @@ exe_wrapper = ['v8']
 skip_sanity_check = true
 
 [built-in options]
-c_args = ['-sMEMORY64', '-Weverything', '-Wno-experimental', '-Werror', '-fno-lax-vector-conversions', '-O2', '-msimd128', '-mrelaxed-simd', '-Wno-unsafe-buffer-usage', '-Wno-switch-default']
-cpp_args = ['-sMEMORY64', '-Weverything', '-Wno-experimental', '-Werror', '-fno-lax-vector-conversions', '-O2', '-msimd128', '-mrelaxed-simd', '-Wno-unsafe-buffer-usage', '-Wno-switch-default']
-c_link_args = ['-sMEMORY64', '-Wno-experimental', '-s', 'ENVIRONMENT=shell']
-cpp_link_args = ['-sMEMORY64', '-Wno-experimental', '-s', 'ENVIRONMENT=shell']
+c_args = ['--target=wasm64', '-Weverything', '-Wno-experimental', '-Werror', '-fno-lax-vector-conversions', '-O2', '-msimd128', '-mrelaxed-simd', '-Wno-unsafe-buffer-usage', '-Wno-switch-default']
+cpp_args = ['--target=wasm64', '-Weverything', '-Wno-experimental', '-Werror', '-fno-lax-vector-conversions', '-O2', '-msimd128', '-mrelaxed-simd', '-Wno-unsafe-buffer-usage', '-Wno-switch-default']
+c_link_args = ['--target=wasm64', '-Wno-experimental', '-s', 'ENVIRONMENT=shell']
+cpp_link_args = ['--target=wasm64', '-Wno-experimental', '-s', 'ENVIRONMENT=shell']
 
 [host_machine]
 system = 'emscripten'

docker/cross-files/i686-gcc-12-qemu-ccache.cross

@@ -8,8 +8,8 @@ ld = 'i686-linux-gnu-ld'
 exe_wrapper = ['qemu-i386-static', '-L', '/usr/i686-linux-gnu']
 
 [built-in options]
-c_args = ['-Wextra', '-Werror', '-O2']
-cpp_args = ['-Wextra', '-Werror', '-O2']
+c_args = ['-Wextra', '-Werror', '-O2', '-march=prescott']
+cpp_args = ['-Wextra', '-Werror', '-O2', '-march=prescott']
 
 [properties]
 needs_exe_wrapper = true

simde/x86/avx512/cvt.h

@@ -699,7 +699,7 @@ simde_mm512_cvtepu32_ps (simde__m512i a) {
     simde__m512_private r_;
     simde__m512i_private a_ = simde__m512i_to_private(a);
 
-    #if defined(SIMDE_X86_SSE2_NATIVE)
+    #if defined(SIMDE_X86_SSE2_NATIVE) && !(defined(__OPTIMIZE__) && !(defined(HEDLEY_GCC_VERSION) && HEDLEY_GCC_VERSION_CHECK(13,0,0)) && defined(__cplusplus))
       for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
         /* https://stackoverflow.com/a/34067907/501126 */
         const __m128 tmp = _mm_cvtepi32_ps(_mm_srli_epi32(a_.m128i[i], 1));

simde/x86/fma.h

@@ -65,6 +65,8 @@ simde_mm_fmadd_pd (simde__m128d a, simde__m128d b, simde__m128d c) {
       r_.altivec_f64 = vec_madd(a_.altivec_f64, b_.altivec_f64, c_.altivec_f64);
     #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
       r_.neon_f64 = vfmaq_f64(c_.neon_f64, b_.neon_f64, a_.neon_f64);
+    #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_relaxed_madd(a_.wasm_v128, b_.wasm_v128, c_.wasm_v128);
     #elif defined(simde_math_fma) && (defined(__FP_FAST_FMA) || defined(FP_FAST_FMA))
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
@@ -129,14 +131,17 @@ simde_mm_fmadd_ps (simde__m128 a, simde__m128 b, simde__m128 c) {
       r_.altivec_f32 = vec_madd(a_.altivec_f32, b_.altivec_f32, c_.altivec_f32);
     #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
       r_.neon_f32 = vfmaq_f32(c_.neon_f32, b_.neon_f32, a_.neon_f32);
-    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_FAST_MATH)
       r_.neon_f32 = vmlaq_f32(c_.neon_f32, b_.neon_f32, a_.neon_f32);
-    #elif defined(simde_math_fmaf) && (defined(__FP_FAST_FMAF) || defined(FP_FAST_FMAF))
+    #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE) && defined(SIMDE_FAST_MATH)
+      r_.wasm_v128 = wasm_f32x4_relaxed_madd(a_.wasm_v128, b_.wasm_v128, c_.wasm_v128);
+    #elif defined(simde_math_fmaf) && (!defined(SIMDE_FAST_MATH) || (defined(__FP_FAST_FMAF) || defined(FP_FAST_FMAF)))
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
         r_.f32[i] = simde_math_fmaf(a_.f32[i], b_.f32[i], c_.f32[i]);
       }
     #else
+      //todo if !defined(simde_fast_math), implement the correct algo to avoid intermediate rounding
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
         r_.f32[i] = (a_.f32[i] * b_.f32[i]) + c_.f32[i];
@@ -158,20 +163,19 @@ simde_mm256_fmadd_ps (simde__m256 a, simde__m256 b, simde__m256 c) {
     return _mm256_fmadd_ps(a, b, c);
   #elif defined(SIMDE_LOONGARCH_LASX_NATIVE)
     return __lasx_xvfmadd_s(a, b, c);
-  #elif SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+  #elif defined(SIMDE_FAST_MATH) && !SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+     return simde_mm256_add_ps(simde_mm256_mul_ps(a, b), c);
+  #else
     simde__m256_private
       a_ = simde__m256_to_private(a),
       b_ = simde__m256_to_private(b),
       c_ = simde__m256_to_private(c),
       r_;
-
     for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
       r_.m128[i] = simde_mm_fmadd_ps(a_.m128[i], b_.m128[i], c_.m128[i]);
     }
 
     return simde__m256_from_private(r_);
-  #else
-    return simde_mm256_add_ps(simde_mm256_mul_ps(a, b), c);
   #endif
 }
 #if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
@@ -186,6 +190,8 @@ simde_mm_fmadd_sd (simde__m128d a, simde__m128d b, simde__m128d c) {
     return _mm_fmadd_sd(a, b, c);
   #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
     return (simde__m128d)__lsx_vextrins_d(a, __lsx_vfmadd_d(a, b, c), 0x00);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    return wasm_i64x2_shuffle(a, wasm_f64x2_relaxed_madd(a, b, c), 2, 1);
   #else
     return simde_mm_add_sd(simde_mm_mul_sd(a, b), c);
   #endif
@@ -202,6 +208,8 @@ simde_mm_fmadd_ss (simde__m128 a, simde__m128 b, simde__m128 c) {
     return _mm_fmadd_ss(a, b, c);
   #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
     return (simde__m128)__lsx_vextrins_w(a, __lsx_vfmadd_s(a, b, c), 0x00);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    return wasm_i8x16_shuffle(wasm_f32x4_relaxed_madd(a, b, c), a, 0, 1, 2, 3, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31);
   #else
     return simde_mm_add_ss(simde_mm_mul_ss(a, b), c);
   #endif
@@ -216,6 +224,9 @@ simde__m128d
 simde_mm_fmaddsub_pd (simde__m128d a, simde__m128d b, simde__m128d c) {
   #if defined(SIMDE_X86_FMA_NATIVE)
     return _mm_fmaddsub_pd(a, b, c);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    v128_t neg_c = wasm_v128_xor(c, wasm_i64x2_make(HEDLEY_STATIC_CAST(int64_t, 0x8000000000000000LL), 0));
+    return wasm_f64x2_relaxed_madd(a, b, neg_c);
   #else
     return simde_mm_addsub_pd(simde_mm_mul_pd(a, b), c);
   #endif
@@ -244,6 +255,9 @@ simde__m128
 simde_mm_fmaddsub_ps (simde__m128 a, simde__m128 b, simde__m128 c) {
   #if defined(SIMDE_X86_FMA_NATIVE)
     return _mm_fmaddsub_ps(a, b, c);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    v128_t neg_c = wasm_v128_xor(c, wasm_i32x4_make(HEDLEY_STATIC_CAST(int32_t, 0x80000000), 0, HEDLEY_STATIC_CAST(int32_t, 0x80000000), 0));
+    return wasm_f32x4_relaxed_madd(a, b, neg_c);
   #else
     return simde_mm_addsub_ps(simde_mm_mul_ps(a, b), c);
   #endif
@@ -274,6 +288,8 @@ simde_mm_fmsub_pd (simde__m128d a, simde__m128d b, simde__m128d c) {
     return _mm_fmsub_pd(a, b, c);
   #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
     return __lsx_vfmsub_d(a, b, c);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    return wasm_f64x2_relaxed_madd(a, b, wasm_v128_xor(c, wasm_f64x2_splat(-0.0)));
   #else
     return simde_mm_sub_pd(simde_mm_mul_pd(a, b), c);
   #endif
@@ -306,6 +322,8 @@ simde_mm_fmsub_ps (simde__m128 a, simde__m128 b, simde__m128 c) {
     return _mm_fmsub_ps(a, b, c);
   #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
     return __lsx_vfmsub_s(a, b, c);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    return wasm_f32x4_relaxed_madd(a, b, wasm_v128_xor(c, wasm_f32x4_splat(-0.0f)));
   #else
     return simde_mm_sub_ps(simde_mm_mul_ps(a, b), c);
   #endif
@@ -336,6 +354,9 @@ simde__m128d
 simde_mm_fmsub_sd (simde__m128d a, simde__m128d b, simde__m128d c) {
   #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
     return _mm_fmsub_sd(a, b, c);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    v128_t neg_c = wasm_v128_xor(c, wasm_f32x4_splat(-0.0));
+    return wasm_i64x2_shuffle(a, wasm_f64x2_relaxed_madd(a, b, neg_c), 2, 1);
   #else
     return simde_mm_sub_sd(simde_mm_mul_sd(a, b), c);
   #endif
@@ -350,6 +371,9 @@ simde__m128
 simde_mm_fmsub_ss (simde__m128 a, simde__m128 b, simde__m128 c) {
   #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
     return _mm_fmsub_ss(a, b, c);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    v128_t neg_c = wasm_v128_xor(c, wasm_f32x4_splat(-0.0f));
+    return wasm_i8x16_shuffle(wasm_f32x4_relaxed_madd(a, b, neg_c), a, 0, 1, 2, 3, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31);
   #else
     return simde_mm_sub_ss(simde_mm_mul_ss(a, b), c);
   #endif
@@ -369,6 +393,9 @@ simde_mm_fmsubadd_pd (simde__m128d a, simde__m128d b, simde__m128d c) {
       b = __lsx_vfsub_d(a, c);
       c = __lsx_vfadd_d(a, c);
       return (simde__m128d)__lsx_vextrins_d(c, b, 0x11);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    v128_t neg_c = wasm_v128_xor(c, wasm_i64x2_make(0, HEDLEY_STATIC_CAST(int64_t, 0x8000000000000000LL)));
+    return wasm_f64x2_relaxed_madd(a, b, neg_c);
   #else
     simde__m128d_private
       r_,
@@ -426,6 +453,9 @@ simde__m128
 simde_mm_fmsubadd_ps (simde__m128 a, simde__m128 b, simde__m128 c) {
   #if defined(SIMDE_X86_FMA_NATIVE)
     return _mm_fmsubadd_ps(a, b, c);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    v128_t neg_c = wasm_v128_xor(c, wasm_i32x4_make(0, HEDLEY_STATIC_CAST(int32_t, 0x80000000), 0, HEDLEY_STATIC_CAST(int32_t, 0x80000000)));
+    return wasm_f32x4_relaxed_madd(a, b, neg_c);
   #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
     a = __lsx_vfmul_s(a, b);
     b = __lsx_vfsub_s(a, c);
@@ -499,6 +529,8 @@ simde_mm_fnmadd_pd (simde__m128d a, simde__m128d b, simde__m128d c) {
 
     #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
       r_.neon_f64 = vfmsq_f64(c_.neon_f64, a_.neon_f64, b_.neon_f64);
+    #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_relaxed_nmadd(a_.wasm_v128, b_.wasm_v128, c_.wasm_v128);
     #else
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
@@ -562,8 +594,10 @@ simde_mm_fnmadd_ps (simde__m128 a, simde__m128 b, simde__m128 c) {
 
     #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
       r_.neon_f32 = vfmsq_f32(c_.neon_f32, a_.neon_f32, b_.neon_f32);
-    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_FAST_MATH)
       r_.neon_f32 = vmlsq_f32(c_.neon_f32, a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_relaxed_nmadd(a_.wasm_v128, b_.wasm_v128, c_.wasm_v128);
     #else
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
@@ -611,6 +645,8 @@ simde__m128d
 simde_mm_fnmadd_sd (simde__m128d a, simde__m128d b, simde__m128d c) {
   #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
     return _mm_fnmadd_sd(a, b, c);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    return wasm_i64x2_shuffle(a, wasm_f64x2_relaxed_nmadd(a, b, c), 2, 1);
   #else
     simde__m128d_private
       r_,
@@ -634,6 +670,8 @@ simde__m128
 simde_mm_fnmadd_ss (simde__m128 a, simde__m128 b, simde__m128 c) {
   #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
     return _mm_fnmadd_ss(a, b, c);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    return wasm_i8x16_shuffle(wasm_f32x4_relaxed_nmadd(a, b, c), a, 0, 1, 2, 3, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31);
   #else
     simde__m128_private
       r_,
@@ -659,6 +697,8 @@ simde_mm_fnmsub_pd (simde__m128d a, simde__m128d b, simde__m128d c) {
     return _mm_fnmsub_pd(a, b, c);
   #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
     return __lsx_vfsub_d((__m128d)__lsx_vreplgr2vr_d(0), __lsx_vfmadd_d(a, b, c));
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    return wasm_f64x2_relaxed_nmadd(a, b, wasm_v128_xor(c, wasm_f64x2_splat(-0.0)));
   #else
     simde__m128d_private
       r_,
@@ -713,6 +753,8 @@ simde_mm_fnmsub_ps (simde__m128 a, simde__m128 b, simde__m128 c) {
     return _mm_fnmsub_ps(a, b, c);
   #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
     return __lsx_vfsub_s((__m128)__lsx_vreplgr2vr_w(0), __lsx_vfmadd_s(a, b, c));
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    return wasm_f32x4_relaxed_nmadd(a, b, wasm_v128_xor(c, wasm_f32x4_splat(-0.0f)));
   #else
     simde__m128_private
       r_,
@@ -765,6 +807,9 @@ simde__m128d
 simde_mm_fnmsub_sd (simde__m128d a, simde__m128d b, simde__m128d c) {
   #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
     return _mm_fnmsub_sd(a, b, c);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    v128_t neg_c = wasm_v128_xor(c, wasm_f64x2_splat(-0.0));
+    return wasm_i64x2_shuffle(a, wasm_f64x2_relaxed_nmadd(a, b, neg_c), 2, 1);
   #else
     simde__m128d_private
       r_,
@@ -788,6 +833,9 @@ simde__m128
 simde_mm_fnmsub_ss (simde__m128 a, simde__m128 b, simde__m128 c) {
   #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
     return _mm_fnmsub_ss(a, b, c);
+  #elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+    v128_t neg_c = wasm_v128_xor(c, wasm_f32x4_splat(-0.0f));
+    return wasm_i8x16_shuffle(wasm_f32x4_relaxed_nmadd(a, b, neg_c), a, 0, 1, 2, 3, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31);
   #else
     simde__m128_private
       r_,