Remove d32 feature from 32-bit Arm targets by adamgemmell · Pull Request #160911 · rust-lang/rust

adamgemmell · 2026-08-11T13:11:37Z

In #149512 I removed -d32 from some specs, but since LLVM enables neon by default for v7 targets d32 was left enabled while it should be optional on this target. For a similar reason -d32 was removed from some armv6 targets and has been readded.

This PR adds a test to ensure this specific instance does not happen again and has been tested locally on armv7-unknown-linux-gnueabihf, armv7a-none-eabihf and arm-unknown-linux-gnueabihf.

It might be a good idea in general to have a test that runs --print cfg and captures the set of rust target features enabled to show when PRs change them, but most of these targets are not run in Rust's CI so it's out of scope for this issue.

For reference, here is the manually-expanded LLVM features and their implications - necessary as these targets rely on a feature from LLVM that Rust doesn't yet expose:

vfp4 -> vfp3 + fp16 + vfp4d16 + vfp4sp
vfp4d16 -> vfp3d16 + fp16 + fp64 + vfp4d16sp
vfp4sp -> vfp3sp + fp16 + d32 + vfp4d16sp
vfp4d16sp -> vfp3d16sp + fp16
vfp3 -> vfp2 + vfp3d16 + vfp3sp
vfp3d16 -> vfp2 + fp64 + vfp3d16sp
vfp3sp -> vfp2 + d32 + vfp3d16sp
vfp3d16sp -> vfp2sp
vfp2 -> vfp2sp + fp64
vfp2sp -> fpregs

rustbot · 2026-08-11T13:11:40Z

These commits modify compiler targets.
(See the Target Tier Policy.)

rustbot · 2026-08-11T13:11:42Z

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thejpster · 2026-08-11T13:24:20Z

            cfg_abi: CfgAbi::EabiHf,
            llvm_floatabi: Some(FloatAbi::Hard),
-            features: "+vfp3d16,-neon,+strict-align".into(),
+            features: "-fpregs,+vfp3d16,+strict-align".into(),


Why are the T32 and A32 targets different? Could we leave a note here to explain that?

View changes since the review

RalfJung · 2026-08-11T14:17:44Z

but since LLVM enables neon by default for v7 targets d32 was left enabled while it should be optional on this target

What does neon have to do with d32? Is there some implication here? And does that mean disabling d32 also disables neon?

adamgemmell · 2026-08-11T16:29:33Z

but since LLVM enables neon by default for v7 targets d32 was left enabled while it should be optional on this target

What does neon have to do with d32? Is there some implication here? And does that mean disabling d32 also disables neon?

neon implies vfp3 implies d32. So yes -d32 disables neon, I've simplified the specs to account for that. What confused me is that LLVM does not do this behaviour on its own, so implications that rust doesn't model do not behave in this way. An example that I tried for this PR was starting with -fpregs to give make the FPU features a clean slate.

rustbot · 2026-08-11T16:29:38Z

Some changes occurred in src/doc/rustc/src/platform-support

cc @Noratrieb

RalfJung · 2026-08-11T20:41:18Z

We can have "neon" imply "fpregs" on the Rust side I think, if the target maintainers think that's a good idea. (Or I guess it would be vfp2 -> fpregs?)

thejpster · 2026-08-11T20:58:20Z

I built the branch, and the cfg changes check out:

$ diff <(RUSTUP_TOOLCHAIN=nightly rustc --print cfg --target armv7a-none-eabihf) <(RUSTUP_TOOLCHAIN=stage1 rustc --print cfg --target armv7a-none-eabihf)
11d10
< target_feature="d32"
23d21
< target_feature="vfp3"
$ diff <(RUSTUP_TOOLCHAIN=nightly rustc --print cfg --target thumbv7a-none-eabihf) <(RUSTUP_TOOLCHAIN=stage1 rustc --print cfg --target thumbv7a-none-eabihf)
11d10
< target_feature="d32"
24d22
< target_feature="vfp3"

LGTM.

adamgemmell · 2026-08-11T21:43:40Z

We can have "neon" imply "fpregs" on the Rust side I think, if the target maintainers think that's a good idea. (Or I guess it would be vfp2 -> fpregs?)

vfp2 -> fpregs is probably what I'll do yeah - we're currently planning to look at arm target features next quarter.

nnethercote · 2026-08-17T23:43:27Z

Amanieu, you reviewed #149512 so I think you're the best reviewer here. This is well outside my comfort zone.

r? @Amanieu

RalfJung · 2026-08-18T05:52:53Z

+> as they erroneously enabled the `d32` feature. Breakage introduced as a result of correcting this
+> can be fixed by passing `-Ctarget-feature=+d32` to Rust.


Isn't the Rust 1.100 release notes a better place for this than the target page?

View changes since the review

Works for me, sounds more likely to be seen sooner and doesn't need removing when no longer as relevant. @thejpster?

I can live with it in the release notes. I just wanted it written down somewhere.

chrisnc · 2026-08-19T05:26:48Z

In #123159 we removed -d32 from the R/M-profile targets because it prevents -Ctarget-cpu from successfully adding those features back when desired. The situation is a little different here due to +v7 implying more features, but did you test whether -Ctarget-cpu can add the features back with these changes?

adamgemmell · 2026-08-19T15:16:45Z

In #123159 we removed -d32 from the R/M-profile targets because it prevents -Ctarget-cpu from successfully adding those features back when desired. The situation is a little different here due to +v7 implying more features, but did you test whether -Ctarget-cpu can add the features back with these changes?

Hmm, no it can't, which is really surprising to me. The logic is documented here and I don't know how we can fix this problem without changing that hierarchy. It came from #83084, which says this came about from "how other -Ctarget-cpu values are handled" but I can't find the original reason.

To me a target's spec should be a baseline level that works on all CPUs that can run that target, and then -Ctarget-cpu should enable more features that are now known to be available (and indeed it only enables features, not disables, to my knowledge).

RalfJung · 2026-08-19T15:22:39Z

There's also a CPU value in the target spec, and currently the target features in the target spec can be used to add and remove from that CPU value. Not sure if any target relies on that.

LLVM enables neon by default for v7

So there's no CPU we could set for LLVM that avoids implicitly enabling neon? Seems like an odd choice by LLVM.

RalfJung · 2026-09-07T19:31:00Z

How can I get LLVM target features out of rustc?

If you ask the compiler to emit LLVM IR, it should be visible there.

attributes #0 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" "target-features"="+avx,+avx2,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+crc32,+ssse3" }

jonathanpallant · 2026-09-07T19:46:17Z

$ rustc +nightly --print cfg --target armv7a-none-eabihf | grep target_feature
target_feature="aclass"
target_feature="d32"
target_feature="dsp"
target_feature="fp64"
target_feature="fpregs"
target_feature="thumb2"
target_feature="v5te"
target_feature="v6"
target_feature="v6k"
target_feature="v6m"
target_feature="v6t2"
target_feature="v7"
target_feature="v8m"
target_feature="vfp2"
target_feature="vfp2sp"
target_feature="vfp3"
$ rustc +nightly --emit llvm-ir --target armv7a-none-eabihf --crate-type rlib sample.rs && cat sample.ll | grep target-features
attributes #0 = { nounwind "frame-pointer"="all" "target-cpu"="generic" "target-features"="+vfp3d16,-aes,-dotprod,-fullfp16,-i8mm,-neon,-sha2,+strict-align" }

That looks like the input to LLVM, rather than what LLVM has calculated after looking at the defaults for a target?

RalfJung · 2026-09-07T20:21:24Z

Yeah I thought that's what you were asking about.

I don't know if LLVM has a way to dump the target info. (Though --print cfg is computed from what LLVM tells rustc about target features. But there we handle -Ctarget-feature and their implications ourselves.)

adamgemmell · 2026-09-08T10:47:06Z

clang has semi-recently added this flag which might be workable:

 clang-22 --target=aarch64-linux-gnu -march=armv8-a+sve2 --print-enabled-extensions
Ubuntu clang version 22.1.8 (++20260714014902+ca7933e47d3a-1~exp1~20260714135019.80)
Target: aarch64-unknown-linux-gnu
Thread model: posix
InstalledDir: /usr/lib/llvm-22/bin
Extensions enabled for the given AArch64 target

    Architecture Feature(s)                                Description
    FEAT_AdvSIMD                                           Enable Advanced SIMD instructions
    FEAT_ETE                                               Enable Embedded Trace Extension
    FEAT_FP                                                Enable Armv8.0-A Floating Point Extensions
    FEAT_FP16                                              Enable half-precision floating-point data processing
    FEAT_SVE                                               Enable Scalable Vector Extension (SVE) instructions
    FEAT_SVE2                                              Enable Scalable Vector Extension 2 (SVE2) instructions
    FEAT_TRBE                                              Enable Trace Buffer Extension

I'm not sure of an llvm equivalent, but there must be machinery go to from the target-specific backends back up to clang.

jonathanpallant · 2026-09-08T11:42:20Z

I rebased your branch on main, and I see:

Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armebv7r-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "dsp, rclass, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armebv7r-none-eabihf"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "dsp, fp64, fpregs, rclass, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m, vfp2, vfp2sp"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armv4t-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "soft-float"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armv5te-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "soft-float, v5te"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armv6-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "dsp, soft-float, v5te, v6, v6k"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armv6-none-eabihf"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "dsp, fp64, fpregs, v5te, v6, v6k, vfp2, vfp2sp"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armv7a-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "aclass, d32, dsp, fp64, fpregs, soft-float, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m, vfp2, vfp2sp, vfp3"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armv7a-none-eabihf"
Compiler 2 adds : ""
Compiler 2 drops: "d32, vfp3"
Both have       : "aclass, dsp, fp64, fpregs, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m, vfp2, vfp2sp"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armv7r-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "dsp, rclass, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armv7r-none-eabihf"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "dsp, fp64, fpregs, rclass, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m, vfp2, vfp2sp"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armv8r-none-eabihf"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "acquire-release, crc, dsp, fpregs, rclass, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8, v8m, vfp2sp, virtualization"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv4t-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "soft-float, thumb-mode"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv5te-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "soft-float, thumb-mode, v5te"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv6-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "dsp, soft-float, thumb-mode, v5te, v6, v6k"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv6m-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "mclass, thumb-mode, v5te, v6, v6m"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv7a-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "aclass, d32, dsp, fp64, fpregs, soft-float, thumb-mode, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m, vfp2, vfp2sp, vfp3"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv7a-none-eabihf"
Compiler 2 adds : ""
Compiler 2 drops: "d32, vfp3"
Both have       : "aclass, dsp, fp64, fpregs, thumb-mode, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m, vfp2, vfp2sp"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv7em-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "dsp, mclass, thumb-mode, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv7em-none-eabihf"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "dsp, fpregs, mclass, thumb-mode, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m, vfp2sp"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv7m-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "mclass, thumb-mode, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv7r-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "dsp, rclass, thumb-mode, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv7r-none-eabihf"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "dsp, fp64, fpregs, rclass, thumb-mode, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m, vfp2, vfp2sp"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv8m.base-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "acquire-release, mclass, thumb-mode, v5te, v6, v6m, v8m"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv8m.main-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "acquire-release, mclass, thumb-mode, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m, v8m.main"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv8m.main-none-eabihf"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "acquire-release, fpregs, mclass, thumb-mode, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m, v8m.main, vfp2sp"
----
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "thumbv8r-none-eabihf"
Compiler 2 adds : ""
Compiler 2 drops: ""
Both have       : "acquire-release, crc, dsp, fpregs, rclass, thumb-mode, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8, v8m, vfp2sp, virtualization"
----

So that's only armv7a-none-eabihf and thumbv7a-none-eabihf dropping only d32 and vfp3. Which is exactly what we wanted.

Amanieu · 2026-09-15T01:35:45Z

LGTM. As a side note, we may want to add the full set of vfp{2,3,4}{d16}{sp} target features like LLVM has. But this can be done in a separate PR.

@bors r+

rust-bors · 2026-09-15T01:35:48Z

📌 Commit 55469d6 has been approved by Amanieu

It is now in the queue for this repository.

…2, r=Amanieu Remove d32 feature from 32-bit Arm targets Fixes rust-lang#159973 In rust-lang#149512 I removed `-d32` from some specs, but since LLVM enables `neon` by default for v7 targets `d32` was left enabled while it should be optional on this target. For a similar reason `-d32` was removed from some armv6 targets and has been readded. This PR adds a test to ensure this specific instance does not happen again and has been tested locally on armv7-unknown-linux-gnueabihf, armv7a-none-eabihf and arm-unknown-linux-gnueabihf. It might be a good idea in general to have a test that runs `--print cfg` and captures the set of rust target features enabled to show when PRs change them, but most of these targets are not run in Rust's CI so it's out of scope for this issue. For reference, here is the manually-expanded LLVM features and their implications - necessary as these targets rely on a feature from LLVM that Rust doesn't yet expose: ``` vfp4 -> vfp3 + fp16 + vfp4d16 + vfp4sp vfp4d16 -> vfp3d16 + fp16 + fp64 + vfp4d16sp vfp4sp -> vfp3sp + fp16 + d32 + vfp4d16sp vfp4d16sp -> vfp3d16sp + fp16 vfp3 -> vfp2 + vfp3d16 + vfp3sp vfp3d16 -> vfp2 + fp64 + vfp3d16sp vfp3sp -> vfp2 + d32 + vfp3d16sp vfp3d16sp -> vfp2sp vfp2 -> vfp2sp + fp64 vfp2sp -> fpregs ```

Rollup of 7 pull requests Successful merges: - #160911 (Remove d32 feature from 32-bit Arm targets) - #162771 (Filter do_not_recommend impls before handling a single candidate) - #162779 (rustdoc: Revert "fix bare urls split text") - #161612 (std: make a lot of items crate private) - #162372 (Clean up `test/rustdoc-html` folder by moving tests where appropriate) - #162643 (Fix `path_trailing_sep` methods for Windows verbatim paths) - #162784 (AGENTS.md: Permit local experimentation, per the online policy.)

…2, r=Amanieu Remove d32 feature from 32-bit Arm targets Fixes rust-lang#159973 In rust-lang#149512 I removed `-d32` from some specs, but since LLVM enables `neon` by default for v7 targets `d32` was left enabled while it should be optional on this target. For a similar reason `-d32` was removed from some armv6 targets and has been readded. This PR adds a test to ensure this specific instance does not happen again and has been tested locally on armv7-unknown-linux-gnueabihf, armv7a-none-eabihf and arm-unknown-linux-gnueabihf. It might be a good idea in general to have a test that runs `--print cfg` and captures the set of rust target features enabled to show when PRs change them, but most of these targets are not run in Rust's CI so it's out of scope for this issue. For reference, here is the manually-expanded LLVM features and their implications - necessary as these targets rely on a feature from LLVM that Rust doesn't yet expose: ``` vfp4 -> vfp3 + fp16 + vfp4d16 + vfp4sp vfp4d16 -> vfp3d16 + fp16 + fp64 + vfp4d16sp vfp4sp -> vfp3sp + fp16 + d32 + vfp4d16sp vfp4d16sp -> vfp3d16sp + fp16 vfp3 -> vfp2 + vfp3d16 + vfp3sp vfp3d16 -> vfp2 + fp64 + vfp3d16sp vfp3sp -> vfp2 + d32 + vfp3d16sp vfp3d16sp -> vfp2sp vfp2 -> vfp2sp + fp64 vfp2sp -> fpregs ```

Rollup of 10 pull requests Successful merges: - #160911 (Remove d32 feature from 32-bit Arm targets) - #162771 (Filter do_not_recommend impls before handling a single candidate) - #162779 (rustdoc: Revert "fix bare urls split text") - #161548 (hir_typeck: Don't ICE on closures without drop location in closure capture lint) - #161612 (std: make a lot of items crate private) - #162204 (Suggest keyword order for `extern "C" const unsafe fn`) - #162372 (Clean up `test/rustdoc-html` folder by moving tests where appropriate) - #162638 (dont suggest changing the mutability of a borrow that comes from a macro) - #162643 (Fix `path_trailing_sep` methods for Windows verbatim paths) - #162784 (AGENTS.md: Permit local experimentation, per the online policy.)

rust-bors · 2026-09-15T05:37:29Z

⌛ Testing commit 55469d6 with merge 207faeb...

Workflow: https://github.com/rust-lang/rust/actions/runs/34933497069

Remove d32 feature from 32-bit Arm targets Fixes #159973 In #149512 I removed `-d32` from some specs, but since LLVM enables `neon` by default for v7 targets `d32` was left enabled while it should be optional on this target. For a similar reason `-d32` was removed from some armv6 targets and has been readded. This PR adds a test to ensure this specific instance does not happen again and has been tested locally on armv7-unknown-linux-gnueabihf, armv7a-none-eabihf and arm-unknown-linux-gnueabihf. It might be a good idea in general to have a test that runs `--print cfg` and captures the set of rust target features enabled to show when PRs change them, but most of these targets are not run in Rust's CI so it's out of scope for this issue. For reference, here is the manually-expanded LLVM features and their implications - necessary as these targets rely on a feature from LLVM that Rust doesn't yet expose: ``` vfp4 -> vfp3 + fp16 + vfp4d16 + vfp4sp vfp4d16 -> vfp3d16 + fp16 + fp64 + vfp4d16sp vfp4sp -> vfp3sp + fp16 + d32 + vfp4d16sp vfp4d16sp -> vfp3d16sp + fp16 vfp3 -> vfp2 + vfp3d16 + vfp3sp vfp3d16 -> vfp2 + fp64 + vfp3d16sp vfp3sp -> vfp2 + d32 + vfp3d16sp vfp3d16sp -> vfp2sp vfp2 -> vfp2sp + fp64 vfp2sp -> fpregs ```

jhpratt · 2026-09-15T05:38:19Z

@bors yield (rollup)

rust-bors · 2026-09-15T05:38:22Z

Auto build was cancelled. Cancelled workflows:

https://github.com/rust-lang/rust/actions/runs/34933497069

The next pull request likely to be tested is #162792.

Rollup of 10 pull requests Successful merges: - #160911 (Remove d32 feature from 32-bit Arm targets) - #162771 (Filter do_not_recommend impls before handling a single candidate) - #162779 (rustdoc: Revert "fix bare urls split text") - #161548 (hir_typeck: Don't ICE on closures without drop location in closure capture lint) - #161612 (std: make a lot of items crate private) - #162204 (Suggest keyword order for `extern "C" const unsafe fn`) - #162372 (Clean up `test/rustdoc-html` folder by moving tests where appropriate) - #162638 (dont suggest changing the mutability of a borrow that comes from a macro) - #162643 (Fix `path_trailing_sep` methods for Windows verbatim paths) - #162784 (AGENTS.md: Permit local experimentation, per the online policy.)

rust-bors · 2026-09-15T07:27:09Z

⌛ Testing commit 55469d6 with merge 65e0975...

Workflow: https://github.com/rust-lang/rust/actions/runs/34941770776

Remove d32 feature from 32-bit Arm targets Fixes #159973 In #149512 I removed `-d32` from some specs, but since LLVM enables `neon` by default for v7 targets `d32` was left enabled while it should be optional on this target. For a similar reason `-d32` was removed from some armv6 targets and has been readded. This PR adds a test to ensure this specific instance does not happen again and has been tested locally on armv7-unknown-linux-gnueabihf, armv7a-none-eabihf and arm-unknown-linux-gnueabihf. It might be a good idea in general to have a test that runs `--print cfg` and captures the set of rust target features enabled to show when PRs change them, but most of these targets are not run in Rust's CI so it's out of scope for this issue. For reference, here is the manually-expanded LLVM features and their implications - necessary as these targets rely on a feature from LLVM that Rust doesn't yet expose: ``` vfp4 -> vfp3 + fp16 + vfp4d16 + vfp4sp vfp4d16 -> vfp3d16 + fp16 + fp64 + vfp4d16sp vfp4sp -> vfp3sp + fp16 + d32 + vfp4d16sp vfp4d16sp -> vfp3d16sp + fp16 vfp3 -> vfp2 + vfp3d16 + vfp3sp vfp3d16 -> vfp2 + fp64 + vfp3d16sp vfp3sp -> vfp2 + d32 + vfp3d16sp vfp3d16sp -> vfp2sp vfp2 -> vfp2sp + fp64 vfp2sp -> fpregs ```

JonathanBrouwer · 2026-09-15T07:33:20Z

@bors yield
Yielding to enclosing rollup

rust-bors · 2026-09-15T07:33:24Z

Auto build was cancelled. Cancelled workflows:

https://github.com/rust-lang/rust/actions/runs/34941770776

The next pull request likely to be tested is #162798.

…uwer Rollup of 12 pull requests Successful merges: - #160911 (Remove d32 feature from 32-bit Arm targets) - #161868 (libtest: never iterate over all tests in `--exact` mode) - #162771 (Filter do_not_recommend impls before handling a single candidate) - #162779 (rustdoc: Revert "fix bare urls split text") - #161548 (hir_typeck: Don't ICE on closures without drop location in closure capture lint) - #161612 (std: make a lot of items crate private) - #162204 (Suggest keyword order for `extern "C" const unsafe fn`) - #162372 (Clean up `test/rustdoc-html` folder by moving tests where appropriate) - #162638 (dont suggest changing the mutability of a borrow that comes from a macro) - #162643 (Fix `path_trailing_sep` methods for Windows verbatim paths) - #162654 (Improve Armv7-R documentation) - #162784 (AGENTS.md: Permit local experimentation, per the online policy.)

Rollup merge of #160911 - adamgemmell:dev/adagem01/remove-d32, r=Amanieu Remove d32 feature from 32-bit Arm targets Fixes #159973 In #149512 I removed `-d32` from some specs, but since LLVM enables `neon` by default for v7 targets `d32` was left enabled while it should be optional on this target. For a similar reason `-d32` was removed from some armv6 targets and has been readded. This PR adds a test to ensure this specific instance does not happen again and has been tested locally on armv7-unknown-linux-gnueabihf, armv7a-none-eabihf and arm-unknown-linux-gnueabihf. It might be a good idea in general to have a test that runs `--print cfg` and captures the set of rust target features enabled to show when PRs change them, but most of these targets are not run in Rust's CI so it's out of scope for this issue. For reference, here is the manually-expanded LLVM features and their implications - necessary as these targets rely on a feature from LLVM that Rust doesn't yet expose: ``` vfp4 -> vfp3 + fp16 + vfp4d16 + vfp4sp vfp4d16 -> vfp3d16 + fp16 + fp64 + vfp4d16sp vfp4sp -> vfp3sp + fp16 + d32 + vfp4d16sp vfp4d16sp -> vfp3d16sp + fp16 vfp3 -> vfp2 + vfp3d16 + vfp3sp vfp3d16 -> vfp2 + fp64 + vfp3d16sp vfp3sp -> vfp2 + d32 + vfp3d16sp vfp3d16sp -> vfp2sp vfp2 -> vfp2sp + fp64 vfp2sp -> fpregs ```

rustbot added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. labels Aug 11, 2026

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adamgemmell force-pushed the dev/adagem01/remove-d32 branch from 23bf4d0 to 0d0e526 Compare August 11, 2026 16:28

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thejpster mentioned this pull request Aug 11, 2026

Test Zynq example with a D32 FPU and add to .gitignore and VS Code rust-embedded/aarch32#206

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hgy59 mentioned this pull request Aug 14, 2026

Armadaxp toolchain incorrectly using vfpv3-d16 flag? SynoCommunity/spksrc#5283

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jonathanpallant mentioned this pull request Sep 8, 2026

armv7a-none-eabi sets both fpregs and soft-float features #162471

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jhpratt mentioned this pull request Sep 15, 2026

Rollup of 7 pull requests #162790

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Rollup of 10 pull requests #162792

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Rollup of 12 pull requests #162798

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rust-bors Bot merged commit 3821b74 into rust-lang:main Sep 15, 2026
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rustbot added this to the 1.100.0 milestone Sep 15, 2026

		> as they erroneously enabled the `d32` feature. Breakage introduced as a result of correcting this
		> can be fixed by passing `-Ctarget-feature=+d32` to Rust.

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