imx355 overclock - #7626
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6by9 wants to merge 30 commits into
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imx355 overclock#76266by9 wants to merge 30 commits into
6by9 wants to merge 30 commits into
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We applied versions of the patches prior to them being merged upstream, and further changes were required. Reset to upstream. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Commit cd9f956 upstream. A device tree compatible makes it possible for this driver to be used on Open Firmware devices. Initialization of power-managed resources such as the reset GPIO and voltage regulators can be specified in the device tree and handled by the driver. Add support for this so the Pixel 3a can use the driver. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Richard Acayan <mailingradian@gmail.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Commit d3ac621 usptream. The IMX355 sensor driver currently supports having 4 data lanes. There can't be more or less, so check if the firmware specifies 4 lanes. Suggested-by: Sakari Ailus <sakari.ailus@linux.intel.com> Link: https://lore.kernel.org/r/aW3uFcT1zmiF4GUP@kekkonen.localdomain Signed-off-by: Richard Acayan <mailingradian@gmail.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
Commit 64faa6a upstream. The IMX355 sensor supports multiple external clock frequencies, including 19.2 MHz and 24 MHz. The driver currently supports only fixed 19.2 MHz input clock. Refactor the clock handling to make the PLL configuration dependent on the external clock frequency and add support for 24 MHz. Introduce a table of clock parameter sets and program the corresponding EXTCLK frequency and PLL multipliers to maintain consistent internal VCO frequencies across supported inputs. The PLL settings are adjusted so that OP VCO remains at 720 MHz This preserves existing timing characteristics while allowing systems using a 24 MHz clock to operate correctly. No functional change for existing 19.2 MHz users. Assisted-by: Claude:claude-opus-4-6 Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit 5ac4c9b upstream. A large number of registers are identical within all the modes. Move those to imx355_global_regs. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit c8703ce upstream. Registers 0x0340 and 0x0341 (FRM_LENGTH_LINES) are already written from the set_ctrl(V4L2_CID_VBLANK) handler, so don't write them from the mode register list. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit f8ec1f0 upstream. Currently the cropping is set via register entries in the per mode register lists. Add the crop information to the mode structure as a v4l2_rect, and set the registers programmatically. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit 8722701 upstream. The driver already has the LLP value stored in the mode structure, but also had the same value set via register writes in the mode's register list. Remove this duplication. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit 70a99e0 upstream. Compute the binning registers based on the difference between the mode width/height vs the crop width/height. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit d8c0dd6 upstream. The link_freq_index value in imx355_mode is unused, so remove it. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit 2ed5e71 upstream. The pixel rate is always the same, so there is no need to try and recompute it in imx355_set_pad_format, and then no need to have the pointer to it stored. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit ac2d97c upstream. fll_min (Frame Length Lines) is set to the same value as fll_def for all modes, which makes it redundant. The actual value is also erroneous as the sensor works in all the defined modes with FLL set at the mode height + 20 lines, so set the vblank control minimum to 20 rather than varying it. This also improves the maximum frame rate achievable. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit 8a52937 upstream. Provide all the cropping information via get_selection. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit a21872a upstream. Avoid powering the sensor up and down unnecessarily by using pm_runtime's autosuspend_delay feature. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit 314a674 upstream. Use the new comon CCI register access helpers to replace the private register access helpers in the imx355 driver. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit ba533bb upstream. The colorspace fields were left set to 0 when they should be set appropriately for a raw image sensor. Add those values. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit f31cb77 upstream. The difference between frame length and max exposure time in lines is 10. That had been used as a bare value in calculations. Move it to a define, and use that define. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit 2ae189f upstream. This avoids the set_ctrl handler being called under any circumstances, as it will return an error for the unhandled ctrl. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit b8d87e9 upstream. In preparation for additional options in the PLL setup, compute the link frequency rather than using a hardcoded value. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit 7c3aad6 upstream. The sensor supports 2 or 4 lane readout, but the driver only allowed for 4 lanes. Add 2 lane support. The clock tree only supports single PLL mode to feed both IOP (MIPI) and IVT (Pixel array). 2 lane mode supports a MIPI link frequency of up to 445MHz (890Mbit/s) cf 360MHz (720Mbit/s) for 4lane. Update clock setup and pixel rates to match. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit 9f36cda upstream. The subdev state is now preferred rather than handling crop and format within the driver state, so switch the driver to using it. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Commit b7f17b9 upstream. All the information for the mode is now stored within the subdev state, so configure the sensor based on that. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
The driver may not be MIPI CCS compliant, but does use same address and often set same values as compliant drivers. Do not define for every Sony imx* driver registers we already know and are standard. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
The imx355 implements the lower byte of the standard MIPI CCS PLL divider registers VT_PIX_CLK_DIV, VT_SYS_CLK_DIV and OP_PRE_PLL_CLK_DIV. The high bytes default to zero and the mode register tables already program adjacent 16-bit registers (e.g. the PLL multiplier at 0x0306) in CCS big-endian byte order, so write the full 16-bit CCS registers instead of the odd-address 8-bit subregisters. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Replace the hand-tuned per-clock parameter tables (supported external clocks, OP PLL multipliers and pre-dividers) with the generic MIPI CCS PLL calculator. This generalises the driver to any external clock frequency within the documented limits instead of only 19.2 and 24 MHz. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Overclock slightly to meet performance requirements Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Achieves 209fps. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
V4L2_CID_HBLANK / LLP was a read-only control that set min/ max/default all to the same value. The datasheet does state "H-sync timing is fixed in order to avoid the sensor internal interference (FPN) in IMX355 by line_length". No interference has currently been observed, and the default is always to leave it at the minimum (and approved) value. Allowing it to be controllable therefore has no effect unless a frame period longer than can be achieved just through VBLANK is requested. Exposure times up to 14.9s/frame can be achieved when combined with the max FLL / VBLANK value. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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