FROMLIST: v1: Add deepest idle state for x1e80100 and Drop PDC workaround for Purwa#832
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smankad-oss wants to merge 3 commits intoqualcomm-linux:tech/all/dt/hamoafrom
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FROMLIST: v1: Add deepest idle state for x1e80100 and Drop PDC workaround for Purwa#832smankad-oss wants to merge 3 commits intoqualcomm-linux:tech/all/dt/hamoafrom
smankad-oss wants to merge 3 commits intoqualcomm-linux:tech/all/dt/hamoafrom
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…vice Interconnect from SCM device are optional and were added to get additional performance benefit. These nodes however delays the SCM firmware device probe due to dependency on interconnect and results in NULL pointer dereference for the users of SCM device driver APIs, such as PDC driver. Remove them from the scm device to unblock the user. Link: https://lore.kernel.org/r/20260312-hamoa_pdc-v1-1-760c8593ce50@oss.qualcomm.com Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Add deepest idle state along with pdc config reg to make GPIO IRQs work as wakeup capable interrupts in deepest idle state. Add QMP handle to allow PDC device to place a SoC level low power mode restriction. Link: https://lore.kernel.org/r/20260312-hamoa_pdc-v1-4-760c8593ce50@oss.qualcomm.com Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Purwa shares the Hamoa (X1E80100) PDC device, but the hardware register bug addressed in commit e9a48ea ("irqchip/qcom-pdc: Workaround hardware register bug on X1E80100") is already fixed in Purwa silicon. Hamoa compatible forces the software workaround. Use the Purwa specific compatible string for the PDC node to remove the workaround from Purwa. Fixes: f08edb5 ("arm64: dts: qcom: Add X1P42100 SoC and CRD") Link: https://lore.kernel.org/r/20251231-purwa_pdc-v1-2-2b4979dd88ad@oss.qualcomm.com Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
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Application subsystem PDC runs in secondary interrupt controller mode in x1e80100 (Hamoa). PDC driver did not support this mode until now. Hence, to not break wakeup capability expectation of certain GPIO pins, the deepest idle state was not programmed till now to prevent PDC assisted low power mode.
SCM calls are used by PDC driver to check what mode PDC interrupt controller is running. Enable the PDC to probe earlier by removing optional interconnect dependency on SCM driver.
Add the deepest idle state for Hamoa.
Also drop the Hamoa workaround which is not required for Purwa after changing it's PDC device's compatible property.
Link:
Hamoa v1: https://lore.kernel.org/all/20260312-hamoa_pdc-v1-0-760c8593ce50@oss.qualcomm.com/
Purwa v1: https://lore.kernel.org/all/20251231-purwa_pdc-v1-0-2b4979dd88ad@oss.qualcomm.com/
Signed-off-by: Maulik Shah maulik.shah@oss.qualcomm.com
Signed-off-by: Sneh Mankad sneh.mankad@oss.qualcomm.com