[ExecuTorch][WebGPU] Test coverage for the f16-multiply steel q4gsw GEMM#20753
[ExecuTorch][WebGPU] Test coverage for the f16-multiply steel q4gsw GEMM#20753JCNTH wants to merge 2 commits into
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🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/20753
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This PR needs a
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@claude throoughly review, check for overengineering, correctness, and areaas for modularization |
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Claude finished @JCNTH's task in 3m 26s —— View job Review: f16-multiply steel q4gsw test coverage
The mechanics are clean and consistent with the existing sweep: the native table self-discovers One substantive concern and a couple of smaller ones. 1. Correctness — does the pre-existing
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Pull Request resolved: #20753 **Adds numeric coverage for the f16-multiply steel q4gsw kernel** from the parent diff, which runs only in a `-DWGPU_BACKEND_STEEL_F16` build and had none. Its f16 multiply has a rounding floor (~2.3e-4) above the strict f32 golden (1e-4), so the new configs use a looser abs tolerance without touching the f32 golden. **Key changes:** - `test_quantized_linear.py` CONFIGS — add `steel_f16` (same shape as the `steel` config, exact-N tile) and `steel_f16_edge` (M=70, K=1024, N=136, partial M and N tiles). The exported `.pte` is dtype-independent, so each fixture drives whichever steel kernel the runtime build selected. - `test_webgpu_native.cpp` `kQ4gswConfigs` — matching `steel_f16`/`steel_f16_edge` entries at abs 2.3e-4 / rel 1e-3, both under `#ifdef WGPU_BACKEND_STEEL_F16`. The native sweep self-discovers each `.pte` by name and goldens against the same fp64 truth the f32 configs use. The looser abs gate reflects the f16 rounding floor (uniform in K, not an accumulate artifact); the accumulator stays f32. The default f32 build's config table and its strict 1e-4 golden are `#ifdef`-excluded and byte-unchanged. Co-authored-with: Claude Code. ghstack-source-id: 400359070 @exported-using-ghexport Differential Revision: [D110802559](https://our.internmc.facebook.com/intern/diff/D110802559/)
Stack from ghstack (oldest at bottom):
Adds numeric coverage for the f16-multiply steel q4gsw kernel from the parent diff, which runs only in a
-DWGPU_BACKEND_STEEL_F16build and had none. Its f16 multiply has a rounding floor (~2.3e-4) above the strict f32 golden (1e-4), so the new configs use a looser abs tolerance without touching the f32 golden.Key changes:
test_quantized_linear.pyCONFIGS — addsteel_f16(same shape as thesteelconfig, exact-N tile) andsteel_f16_edge(M=70, K=1024, N=136, partial M and N tiles). The exported.pteis dtype-independent, so each fixture drives whichever steel kernel the runtime build selected.test_webgpu_native.cppkQ4gswConfigs— matchingsteel_f16/steel_f16_edgeentries at abs 2.3e-4 / rel 1e-3, both under#ifdef WGPU_BACKEND_STEEL_F16. The native sweep self-discovers each.pteby name and goldens against the same fp64 truth the f32 configs use.The looser abs gate reflects the f16 rounding floor (uniform in K, not an accumulate artifact); the accumulator stays f32. The default f32 build's config table and its strict 1e-4 golden are
#ifdef-excluded and byte-unchanged.Co-authored-with: Claude Code.
@exported-using-ghexport
Differential Revision: D110802559
Differential Revision: D110802559