[ExecuTorch][WebGPU] Steel q4gsw prefill GEMM — test coverage

backends/webgpu/test/ops/test_quantized_linear.py

@@ -59,7 +59,10 @@ class Q4gswConfig:
     # requires N % 8 == 0 (torchao pads N for the scale layout), so odd-N / N=1 are
     # not exportable -- bicol's has1 odd-N guard is defensive (mirrors coop4's
     # general-N robustness) and unreachable through this op.
-    # Prefill shapes routing to the shmem GEMM (K>=4096 or N>=2048); M=128.
+    # M>1 prefill: prefer the steel GEMM (K%16==0) on a >=256-invocation device
+    # (e.g. lvp); else shmem (K>=4096 or N>=2048) or register-tiled (SwiftShader
+    # caps at 128). Same fp64 golden regardless of which kernel runs.
+    Q4gswConfig("steel", 96, 2048, 256),  # steel-isolating (K<4096, N<2048)
     Q4gswConfig("gate_proj_pf", 128, 2048, 8192),  # gate/up prefill (shmem via N)
     Q4gswConfig("down_proj_pf", 128, 8192, 2048),  # down prefill (shmem via K)
     Q4gswConfig("shmem_edge", 130, 4096, 2056),  # partial 32-tile bounds

backends/webgpu/test/test_webgpu_native.cpp

@@ -275,6 +275,8 @@ const Q4gswConfig kQ4gswConfigs[] = {
     // scale over 64-256 K-groups). q4gsw requires N % 8 == 0, so odd-N is not
     // exportable; bicol's has1 odd-N guard is defensive (mirrors coop4
     // general-N robustness).
+    // M>1: steel GEMM on a >=256-invocation device (K%16==0), else shmem/tiled.
+    {"steel", 96, 2048, 256, 1e-4f, 1e-3f, true, false}, // steel-isolating
     {"gate_proj_pf", 128, 2048, 8192, 1e-4f, 1e-3f, true, false}, // shmem via N
     {"down_proj_pf", 128, 8192, 2048, 1e-3f, 1e-2f, true, false}, // shmem via K
     {"shmem_edge", 130, 4096, 2056, 1e-4f, 1e-3f, true, false}, // partial tiles