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[dv] Enable DRAM backdoor for the UVM TB#615

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[dv] Enable DRAM backdoor for the UVM TB#615
martin-velay wants to merge 5 commits into
lowRISC:mainfrom
martin-velay:dv_dram_backdoor

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@martin-velay

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This PR addresses issue #514

@martin-velay martin-velay marked this pull request as ready for review June 17, 2026 15:01

@engdoreis engdoreis left a comment

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The SW and build system side LGTM, I also tested the UVM test.

          [   legend    ]: [S: scheduled, Q: queued, R: running, P: passed, F: failed, K: killed, T: total]
00:03:19  [    build    ]: [S:        00, Q:     00, R:      00, P:     01, F:     00, K:     00, T:    01] 100%
00:07:43  [     run     ]: [S:        00, Q:     00, R:      00, P:     28, F:     04, K:     00, T:    32] 100%

@martin-velay

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@engdoreis, good point, also the all regression results:
dvsim hw/top_chip/dv/top_chip_sim_cfg.hjson -i all

Gives:

|  Stage  |  Name  | Tests                               |  Max Job Runtime  |  Simulated Time  |  Passing  |  Total  |  Pass Rate  |
|:-------:|:------:|:------------------------------------|:-----------------:|:----------------:|:---------:|:-------:|:-----------:|
|         |        | uart_smoke                          |     111.000s      |    1560.286us    |     1     |    1    |  100.00 %   |
|         |        | uart_smoke_cheri                    |     121.000s      |    2049.174us    |     1     |    1    |  100.00 %   |
|         |        | rv_plic_smoke                       |      89.000s      |    974.392us     |     1     |    1    |  100.00 %   |
|         |        | rv_plic_smoke_cheri                 |     104.000s      |    1480.243us    |     1     |    1    |  100.00 %   |
|         |        | rv_timer_smoke                      |      87.000s      |    1097.432us    |     1     |    1    |  100.00 %   |
|         |        | rv_timer_smoke_cheri                |     117.000s      |    1509.981us    |     1     |    1    |  100.00 %   |
|         |        | rv_timer_irq                        |     131.000s      |    2432.055us    |     1     |    1    |  100.00 %   |
|         |        | rv_timer_irq_cheri                  |     128.000s      |    2886.863us    |     1     |    1    |  100.00 %   |
|         |        | test_framework_exception_test       |     116.000s      |    1495.814us    |     1     |    1    |  100.00 %   |
|         |        | test_framework_exception_test_cheri |     127.000s      |    1943.649us    |     1     |    1    |  100.00 %   |
|         |        | spi_device_smoke                    |     110.000s      |    1252.326us    |     1     |    1    |  100.00 %   |
|         |        | spi_device_smoke_cheri              |     118.000s      |    1818.740us    |     1     |    1    |  100.00 %   |
|         |        | spi_host_smoke                      |      0.804s       |     0.000us      |     0     |    1    |   0.00 %    |
|         |        | spi_host_smoke_cheri                |      0.792s       |     0.000us      |     0     |    1    |   0.00 %    |
|         |        | i2c_host_tx_rx                      |     137.000s      |    2663.166us    |     1     |    1    |  100.00 %   |
|         |        | i2c_host_tx_rx_cheri                |     138.000s      |    3074.382us    |     1     |    1    |  100.00 %   |
|         |        | i2c_device_tx_rx                    |      0.717s       |     0.000us      |     0     |    1    |   0.00 %    |
|         |        | gpio_smoke                          |     100.000s      |    915.349us     |     1     |    1    |  100.00 %   |
|         |        | gpio_smoke_cheri                    |     119.000s      |    1386.004us    |     1     |    1    |  100.00 %   |
|         |        | rom_ctrl_integrity_check            |      0.801s       |     0.000us      |     0     |    1    |   0.00 %    |
|         |        | rom_ctrl_smoke                      |      0.758s       |     0.000us      |     0     |    1    |   0.00 %    |
|         |        | rom_ctrl_smoke_cheri                |      0.765s       |     0.000us      |     0     |    1    |   0.00 %    |
|         |        | rstmgr_smoke                        |     123.000s      |    1705.081us    |     1     |    1    |  100.00 %   |
|         |        | rstmgr_smoke_cheri                  |     134.000s      |    2496.566us    |     1     |    1    |  100.00 %   |
|         |        | clkmgr_smoke                        |      85.000s      |    916.822us     |     1     |    1    |  100.00 %   |
|         |        | clkmgr_smoke_cheri                  |     110.000s      |    1324.920us    |     1     |    1    |  100.00 %   |
|         |        | pwrmgr_smoke                        |      70.000s      |    914.633us     |     1     |    1    |  100.00 %   |
|         |        | pwrmgr_smoke_cheri                  |     104.000s      |    1333.965us    |     1     |    1    |  100.00 %   |
|         |        | rv_dm_ndm_reset_req                 |      0.827s       |     0.000us      |     0     |    1    |   0.00 %    |
|         |        | rv_dm_ndm_reset_req_when_cpu_halted |      0.802s       |     0.000us      |     0     |    1    |   0.00 %    |
|         |        | rv_dm_access_after_wakeup           |      0.818s       |     0.000us      |     0     |    1    |   0.00 %    |
|         |        | rv_dm_access_after_escalation_reset |      0.811s       |     0.000us      |     0     |    1    |   0.00 %    |
|         |        | mailbox_smoke                       |      84.000s      |    912.136us     |     1     |    1    |  100.00 %   |
|         |        | mailbox_smoke_cheri                 |      98.000s      |    1397.196us    |     1     |    1    |  100.00 %   |
|         |        | axi_sram_smoke                      |      81.000s      |    899.337us     |     1     |    1    |  100.00 %   |
|         |        | axi_sram_smoke_cheri                |      99.000s      |    1297.471us    |     1     |    1    |  100.00 %   |
|         |        | axi_sram_tag_test                   |     102.000s      |    884.025us     |     1     |    1    |  100.00 %   |
|         |        | axi_sram_tag_test_cheri             |     117.000s      |    1392.431us    |     1     |    1    |  100.00 %   |
|         |        | entropy_src_smoke                   |     122.000s      |    1291.321us    |     1     |    1    |  100.00 %   |
|         |        | entropy_src_smoke_cheri             |     118.000s      |    1793.072us    |     1     |    1    |  100.00 %   |
|         |        | **TOTAL**                           |                   |                  |    30     |   40    |   75.00 %   |
|         |        | **TOTAL**                           |                   |                  |    30     |   40    |   75.00 %   |

@marnovandermaas marnovandermaas left a comment

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Initial review from my end.

Comment thread hw/top_chip/dv/env/top_chip_dv_env_pkg.sv Outdated
Comment thread hw/top_chip/dv/tb/tb.sv
Comment thread hw/top_chip/dv/tb/tb.sv
`MEM_BKDR_UTIL_FILE_OP(m_mem_bkdr_util[ChipMemROM], `ROM_MEM_HIER)

// Zero-init DRAM with a direct SV loop (not clear_mem) before loading the vmem: prim_ram_1p
// starts as X, and reads outside the binary range propagate into tag-controller FIFOs (DataKnown_A).

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Hmmm, this sounds like a bug in the tag controller to me.

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I am unsure about that one, I don't know the design enough. To whom can I ask to take a look?

Comment thread hw/top_chip/dv/env/seq_lib/top_chip_dv_i2c_host_tx_rx_vseq.sv Outdated
Comment thread hw/top_chip/REUSE.toml Outdated
Add hw/top_chip/dv/common/ as a shared home for simulation-only
modules used by both UVM and Verilator. Move sim_sram_axi/ there,
move and rename dram_wrapper_sim -> sim_dram_wrapper for naming
consistency, and add a FuseSoC core file for the DRAM wrapper. Update
top_chip_sim.core and top_chip_verilator.core to depend on the new
cores rather than referencing the files directly.

Signed-off-by: martin-velay <mvelay@lowrisc.org>
- Add ChipMemDRAM to chip_mem_e
- Instantiate the DRAM mem_bkdr_util in tb.sv
- Add zero-init DRAM with a direct SV loop before loading the vmem to
  prevent X values from uninitialised addresses propagating into the
  tag-controller FIFO (DataKnown_A).
- Extend mem_bkdr_write8/read8 in base_vseq to support ChipMemDRAM.

Signed-off-by: martin-velay <mvelay@lowrisc.org>
- Update all 33 tests in top_chip_sim_cfg.hjson to pass
ChipMemDRAM_image_file and use DRAM-linked vmem files instead of
the SRAM-linked _sram variants.
- Remove the cmake if(TRUE) block that built _sram binaries solely for
UVM. Remove stale _sram reference from dev_guide.

Signed-off-by: martin-velay <mvelay@lowrisc.org>
SW symbols are now in the DRAM-linked binary; pass ChipMemDRAM
explicitly instead of relying on the ChipMemSRAM default.

Signed-off-by: martin-velay <mvelay@lowrisc.org>
Signed-off-by: martin-velay <mvelay@lowrisc.org>
@martin-velay

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I have addressed your comments @marnovandermaas except the one related to the assertion. Please let me know if I should remove the initialization

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4 participants