Replace 8*PEXTRW with 1*MOVDQU in f32_to_s16 #123
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The existing code has a series of 8 sequential unrolled PEXTRW, which compilers generally cannot detect and optimize to a single MOVDQU instruction. As such manually placing the optimized unaligned store intrinsic in place is an enormous performance win for SSE with identical output.
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Some recent versions of clang can identify this construct, but older ones cannot and no version of GCC I was able to test could make this optimization. I chose the storeu as loadu is used elsewhere instead of juggling alignment issues, so the occasional extra cycle of latency to match existing code design seemed appropriate to also minimize the code change. |
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The existing code has a series of 8 sequential unrolled PEXTRW, which compilers generally cannot detect and optimize to a single MOVDQU instruction.
As such manually placing the optimized unaligned store intrinsic in place is an enormous performance win for SSE with identical output.