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External port/20260814 - #39

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khaiwenng merged 19 commits into
intel:mainfrom
khaiwenng:external-port/20260814
Aug 19, 2026
Merged

External port/20260814#39
khaiwenng merged 19 commits into
intel:mainfrom
khaiwenng:external-port/20260814

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  • Add AR0234 Support for IPU6EPMTL for ASL configuration
  • Fix Issue for 8x ISX031 + MAX96724 DPHY on IPU6EPMTL
  • Update ipu7-drivers submodule

@vunnyso

vunnyso commented Aug 19, 2026

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Changes #40 are needed to fix compilation error.

amirulazmy and others added 7 commits August 19, 2026 15:42
Add ar0234_acpi-1 and ar0234_acpi-2 sensor configs (media control
and static metadata for GMSL DES0 CH00/CH01)

Signed-off-by: Mohd Azmy, Muhammad Amirul <muhammad.amirul.mohd.azmy@intel.com>
Register the AR0234 sensor HID (INTC10C0) in SENSOR_MODEL and
SENSOR_PREFIX tables, define the 'raw' stream token with SGRBG10_1X10
media-bus format at 1280x960, add BA10 pixelformat to MBUS_TO_PIXFMT,
and combine the ar0234 serializer routing block with isx031 as both
sensors share the same single-stream pass-through routing logic.

Signed-off-by: Mohd Azmy, Muhammad Amirul <muhammad.amirul.mohd.azmy@intel.com>
Add ACPI/SSDT tables for the AR0234 image sensor on the D3 module,
connected via MAX9296A deserializer and MAX96717 serializers on the
IPU6 ARL platform.

- _cam_common_ar0234.asl: common camera device template for AR0234
- _des_ch_common_ar0234.asl: per-channel template for AR0234 under
  a deserializer link
- _des_common_max9296.asl: include AR0234 channel variant
- max9296_d3_ar0234.asl: top-level SSDT overlay for D3 AR0234 with
  MAX9296A deserializer carrying two AR0234 cameras on links 0 and 1

Signed-off-by: Mohd Azmy, Muhammad Amirul <muhammad.amirul.mohd.azmy@intel.com>
Add AR0234 image sensor configuration to the MAX96717 serializer
driver. Register the AR0234-specific pipe and link setup required
for GMSL operation with the MAX9296A deserializer.

Signed-off-by: Mohd Azmy, Muhammad Amirul <muhammad.amirul.mohd.azmy@intel.com>
- fix to enable camera in media-ctl.
- fix to enable camera to stream
- fix deskew value
- fix pink frame
- fix Data Lane for Des 1

Signed-off-by: syafiqnizam25 <muhammadsyafiqnizamuddinx.binshafie@intel.com>
Update submodule commit to
bed9b71d5be56d0e24c771c7a6ec83fd0a9db433

Signed-off-by: Khai Wen, Ng <khai.wen.ng@intel.com>
Patch 6.18/0006 failed to git apply cleanly in CI build.
CONFIG_VIDEO_INTEL_IPU7_ISYS_RESET turned on caused line
number to alter.

Signed-off-by: Khai Wen, Ng <khai.wen.ng@intel.com>
@khaiwenng
khaiwenng force-pushed the external-port/20260814 branch from 0550bcd to 6d79d9d Compare August 19, 2026 07:45
syafiqnizam25 and others added 12 commits August 19, 2026 16:32
- fix to enable camera in media-ctl.
- fix to enable camera to stream
- fix deskew value
- fix pink frame
- fix Data Lane for Des 1

Signed-off-by: syafiqnizam25 <muhammadsyafiqnizamuddinx.binshafie@intel.com>
Add fallback support for cameras connected directly to CSI2 without
a GMSL deserializer/serializer chain.

Changes:
- Add MIPI_SENSOR_HID table for direct MIPI sensor HIDs
- Add discover_mipi_cameras() to enumerate ACPI devices
- Add detect_mipi_csi2() to find CSI2 entities from media topology
- Add setup_mipi_cameras() to configure formats and enable links
- Move mbus_to_pixfmt() earlier for reuse by MIPI setup
- Modify discover() to fall back to MIPI when no deserializers found

The script now auto-detects the camera topology and configures the
appropriate pipeline for either GMSL or direct MIPI cameras.

Signed-off-by: Sodhi, Vunny <vunny.sodhi@intel.com>
Enable ISYS_RESET config for IPU7

Signed-off-by: Khai Wen, Ng <khai.wen.ng@intel.com>
Add IPU75XA sensor configs for dual AR0234 MIPI cameras (ar0234-a,
ar0234-b), including MediaCtl routing, AIQ tuning (.aiqb) and graph
settings (gcss .bin/.xml) files, libcamhal_configs.json enabling
ar0234-a-0 and ar0234-b-2, pipe_scheduler_profiles.json and
pnp_profiles.json on the IPU7 platform.

Signed-off-by: Goh, Wei Khang1 <wei.khang1.goh@intel.com>
Document the IPU75XA MIPI dual-sensor setup alongside the existing
IPU6EPMTL instructions: BIOS MIPI camera configuration table, config
file deployment steps for x2 sensors, and a tuning file placeholder
(N/A, no external tuning file needed). Also add a README.md reference
note for system setup prerequisites.

Add a collapsible table of contents linking to each section
to ease navigation of the growing userspace-mipi.md doc.

Append a '↑ Back to Top' link after the final note so readers can
quickly jump back to the table of contents from the end of the doc.

Signed-off-by: Goh, Wei Khang1 <wei.khang1.goh@intel.com>
Update the sensor support matrix to reflect that AR0234 over MIPI CSI-2
now supports IPU75XA in addition to IPU6EPMTL, and add the missing
24.04.4 / 6.18 Intel BKC row for IPU75XA in the kernel support table.

Bump the pinned ipu7-camera-bins/hal commit references for IPU7
to the software dependency table.

Document the workaround for pinning the ipu7-drivers submodule to a
specific commit for IPU75XA, since it tracks the tip of mainby default
and RAW sensor support depends on a specific tuning-compatible commit.

Signed-off-by: Goh, Wei Khang1 <wei.khang1.goh@intel.com>
Add IPU8 platform support for AR0234 MIPI cameras, including AIQ
tuning (.aiqb) and graph settings (gcss .bin/.xml) files,
libcamhal_configs.json, pipe scheduler and plug-and-play profiles, and
sensor configs.

Signed-off-by: Goh, Wei Khang1 <wei.khang1.goh@intel.com>
Document the IPU8 MIPI dual-sensor setup alongside the existing
IPU6EPMTL and IPU75XA instructions: BIOS MIPI camera configuration
table, config file deployment steps for x2 sensors, and a tuning file
placeholder (N/A, no external tuning file needed). Update the table of
contents with the new IPU8 entries.

Signed-off-by: Goh, Wei Khang1 <wei.khang1.goh@intel.com>
Update the sensor support matrix to reflect that AR0234 over MIPI CSI-2
now supports IPU8 in addition to IPU6EPMTL and IPU75XA.

Bump the pinned ipu7-camera-bins/hal commit references for IPU8
to the software dependency table.

Document the workaround for pinning the ipu7-drivers submodule to a
specific commit for IPU8, since it tracks the tip of mainby default
and RAW sensor support depends on a specific tuning-compatible commit.

Signed-off-by: Goh, Wei Khang1 <wei.khang1.goh@intel.com>
Add SSDT overlay for direct MIPI CSI-2 connected ISX031 cameras on PTL
platform, using a reusable _mipi_cam_common_isx031.asl include file for
the camera device body. This mirrors the _des_ch_common_isx031.asl
pattern used for GMSL cameras, enabling mix-and-match of MIPI and GMSL
camera configurations.

Per-camera defines: CAM_I2C_BUS, CAM_I2C_ADDR, CAM_TO_MIPI_PORT,
CAM_LANES, CAM_GPIO_CTLR, CAM_RESET_PIN, CAM_IPU_PATH, CAM_IPU_REF,
CAM_GPIO_REF.

Default configuration:
  CAM0: I2C1, MIPI port 0, 4 lanes, GPP_E_1 (pin 27)
  CAM1: I2C2, MIPI port 2, 2 lanes, GPP_E_10 (pin 36)

Signed-off-by: Sodhi, Vunny <vunny.sodhi@intel.com>
Add SSDT overlay for direct MIPI CSI-2 connected ISX031 cameras on MTL
platform, using a reusable _mipi_cam_common_isx031.asl include file for
the camera device body. This mirrors the _des_ch_common_isx031.asl
pattern used for GMSL cameras, enabling mix-and-match of MIPI and GMSL
camera configurations.

Per-camera defines: CAM_I2C_BUS, CAM_I2C_ADDR, CAM_TO_MIPI_PORT,
CAM_LANES, CAM_GPIO_CTLR, CAM_RESET_PIN, CAM_IPU_PATH, CAM_IPU_REF,
CAM_GPIO_REF.

Default configuration:
  CAM0: I2C1, MIPI port 0, 4 lanes, GPIO COM0 GPP_D_23 (pin 48)
  CAM1: I2C0, MIPI port 4, 4 lanes, GPIO COM3 GPP_H_0 (pin 0)

Signed-off-by: Sodhi, Vunny <vunny.sodhi@intel.com>
Add SSDT overlay for direct MIPI CSI-2 connected ISX031 cameras on NVL
platform, using a reusable _mipi_cam_common_isx031.asl include file for
the camera device body. This mirrors the _des_ch_common_isx031.asl
pattern used for GMSL cameras, enabling mix-and-match of MIPI and GMSL
camera configurations.

Consolidate IPU port configuration into the shared _ipu.asl by fixing
PRT2 to 2 DPHY data lanes, matching the x2 sensor on MIPI port 2. The
previous 4-lane PRT2 setting was incorrect for all existing SSDTs and
caused the CSI2 receiver to hang waiting for lanes 3+4 to synchronize.
Remove the now-redundant _ipu_mipi.asl.

Per-camera defines: CAM_I2C_BUS, CAM_I2C_ADDR, CAM_TO_MIPI_PORT,
CAM_LANES, CAM_GPIO_CTLR, CAM_RESET_PIN, CAM_IPU_PATH, CAM_IPU_REF,
CAM_GPIO_REF.

Default configuration:
  CAM0: I2C1, MIPI port 0, 4 lanes, GPP_E_1 (pin 27)
  CAM1: I2C0, MIPI port 2, 2 lanes, GPP_E_10 (pin 36)

Signed-off-by: Sodhi, Vunny <vunny.sodhi@intel.com>
@khaiwenng
khaiwenng merged commit 779143a into intel:main Aug 19, 2026
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@khaiwenng
khaiwenng deleted the external-port/20260814 branch August 19, 2026 08:39
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5 participants