Replaced the GNU-only dsb 0xF and isb 0xF barrier operands with the UAL sy form, so tx_port.h now assembles under IAR as well as GCC and armclang

[fdesbiens]

Fixes #551.

Problem

The inline _tx_thread_system_return_inline() implementation in the Cortex-M tx_port.h headers issues its data and instruction barriers as dsb 0xF and isb 0xF. A bare hexadecimal barrier operand is a GNU assembler extension. IAR's inline assembler accepts only the architectural option names, so it rejects the line with operand syntax error and the header cannot be included at all.

The block is guarded for GCC, armclang and IAR together, so every IAR user of an affected port hits this as soon as inlining is left enabled. Four people have reported it independently on Cortex-M33 and Cortex-M7 with IAR EWARM 9.50 and 9.70.

Fix

Both operands become sy, the Arm UAL name for the full system domain and the exact value that 0xF encodes. The generated instruction is unchanged; only the spelling of the operand differs. sy is the canonical form in the Arm Architecture Reference Manual and is accepted by GNU as, armclang and IAR alike, which is why every reporter converged on it independently as a local workaround.

Scope

The change is applied to the two ports_arch master headers and to all thirty-two generated or hand-maintained copies under ports, covering the Cortex-M0, M23, M3, M33, M4, M52, M55, M7 and M85 families across the ac5, ac6, gnu, iar and keil toolchains.

scripts/check_ports.sh probed for the literal strings "dsb 0xF" and "isb 0xF" when reporting toolchain divergence within the hand-maintained M0 and M23 families. Its probes are updated to the new spelling so the check keeps working.

Validation

• scripts/check_ports.sh passes, and the copy scripts reproduce every generated port byte for byte from its ports_arch master.
• arm-none-eabi-gcc -O2 compiles a translation unit that includes tx_api.h and calls _tx_thread_system_return_inline() for every patched port and target. The three headers that do not compile here (cortex_m0/iar, cortex_m23/ac6, cortex_m23/iar) fail identically on dev because they include toolchain intrinsic headers that GCC does not ship.
• The generated assembly confirms the barriers are still emitted, now as dsb sy and isb sy.