Remove the stale system stack switch pseudo-code comments from the ARMv7-A ports

[fdesbiens]

Summary

Several ARMv7-A source files carry pseudo-code comments that describe a stack switch to _tx_thread_system_stack_ptr which the code does not perform, and never has. The comments are leftovers from an older generic port template. They are actively misleading: they have prompted at least one user to try to "restore" the missing code (#240), and they suggest a variable that is not even referenced by these ports.

Background

On ARMv7-A every processor mode has its own banked stack pointer. IRQ_Handler branches to _tx_thread_context_save while still in IRQ mode, so the ISR already runs on the per-core banked IRQ stack, and _tx_thread_context_restore switches to SVC mode only when preemption is required. No software stack switch is needed or wanted.

By contrast, the AArch64 (ARMv8-A) SMP ports do not bank a stack pointer per mode, so they keep _tx_thread_system_stack_ptr[] as a real array and reload it explicitly. In those ports the comments are accurate and must be left alone.

Scope

Comment-only changes. No functional change, no behavioural risk.

Tree	Files	Offending text
ports_smp/cortex_a5_smp, cortex_a7_smp, cortex_a9_smp, cortex_r8_smp	21	sp = _tx_thread_system_stack_ptr; / sp = _tx_thread_system_stack_ptr[core]; in tx_thread_context_save, tx_thread_vectored_context_save and tx_thread_system_return
ports/ and ports_arch/ARMv7-A/threadx (non-SMP ARMv7-A and Cortex-R)	89	/* Save current stack and switch to system stack. */ in tx_thread_system_return, where no switch occurs

Explicitly out of scope: every ports_smp/cortex_a3x_smp through cortex_a78_smp, cortex_a5x_smp, arc_hs_smp and mips32_interaptiv_smp file, plus ports_arch/ARMv8-A. Those comments match the code.

Proposed change

Replace the misleading lines with a short statement of what actually happens, for example:

• in the context save routines, note that the routine runs in IRQ mode on the per-core banked IRQ stack, which serves as the system stack on this architecture;
• in tx_thread_system_return, replace "Save current stack and switch to system stack" with "Save the current stack pointer in the thread control block", which is all the following instruction does.

Notes for the implementer

• ports_arch/ARMv7-A/threadx is the source of truth for the non-SMP ARMv7-A ports. Edit it first, then propagate with ports_arch/ARMv7-A/update.sh, and confirm the generated trees match.
• There is no ports_arch source tree for the ARMv7-A SMP ports; those 21 files must be edited directly, and the ac5 and gnu variants of each port must stay in sync.
• Run scripts/check_ports.sh afterwards. It requires a clean working tree and contains hard-coded literal strings in its divergence probe, so check whether any of them cover the text being changed.
• Keep the surrounding comment box formatting and column alignment intact.

Acceptance criteria

• No ARMv7-A file mentions _tx_thread_system_stack_ptr in pseudo-code unless the adjacent instructions actually reference it.
• The ARMv8-A, ARC and MIPS SMP ports are untouched.
• scripts/check_ports.sh reports no new divergence.
• The full tx and smp regression suites still pass.

Follows up on #240.

[fdesbiens]

Done in #735, now merged into dev.

All 38 affected files were updated: the ports_arch/ARMv7-A template plus the 14 files it regenerates under ports/cortex_a{5,7,8,9,12,15,17}/{ac6,gnu}, the 2 Cortex-A7 module manager copies, and the 21 ARMv7-A SMP files under ports_smp/cortex_a{5,7,9}_smp and ports_smp/cortex_r8_smp, which have no generator and were edited directly.

Every changed line is a comment, so there is no behavioural change. All 25 GNU variants still assemble for their target core, and scripts/check_ports.sh passes, including the check that the generated ports are reproducible from ports_arch.

The ARMv8-A, ARC, MIPS, RISC-V, Xtensa, ARM9 and ARM11 ports were deliberately left alone, because those ports really do reload _tx_thread_system_stack_ptr and their comments are accurate.