Skip to content

Improve runtime of ARM/AArch64 register name patching. - #3048

Draft
Rot127 wants to merge 4 commits into
capstone-engine:nextfrom
Rot127:alias-patching
Draft

Improve runtime of ARM/AArch64 register name patching.#3048
Rot127 wants to merge 4 commits into
capstone-engine:nextfrom
Rot127:alias-patching

Conversation

@Rot127

@Rot127 Rot127 commented Aug 28, 2026

Copy link
Copy Markdown
Collaborator

Your checklist for this pull request

  • I've documented or updated the documentation of every API function and struct this PR changes.
  • I've added tests that prove my fix is effective or that my feature works (if possible)

Detailed description

The old patching was atrocious. That makes it do the same thing in two passes over the string, not 10 or something.

Test plan

Added

Closing issues

...

@github-actions github-actions Bot added the ARM Arch label Aug 28, 2026

Copilot AI left a comment

Copy link
Copy Markdown

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Pull request overview

This PR optimizes ARM and AArch64 “Capstone register alias” patching by replacing repeated strstr/memmove loops with a single-pass in-place rewrite over the rendered assembly string, and adds a targeted YAML regression suite to validate aliasing behavior and avoid false positives in hex immediates.

Changes:

  • Reworked ARM alias patching (r9r15sb/sl/fp/ip/sp/lr/pc) into a single-pass copier.
  • Reworked AArch64 alias patching (x29/x30fp/lr) into a single-pass copier with a guard to avoid 0x29/0x30 literals.
  • Added a new YAML issue test suite covering alias replacements and false-positive cases.

Reviewed changes

Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.

File Description
tests/issues/arm_aarch64_reg_alias_patching.yaml Adds regression test cases for ARM/AArch64 alias patching behavior.
arch/ARM/ARMMapping.c Replaces multi-pass alias patching with a single-pass in-place rewrite for ARM.
arch/AArch64/AArch64Mapping.c Replaces multi-pass alias patching with a single-pass in-place rewrite for AArch64, including hex-literal guard.

💡 Add a code-review agent skill or configure MCP servers for context-aware, tailored reviews. Learn more in the docs.

Comment thread arch/ARM/ARMMapping.c
Comment thread tests/issues/arm_aarch64_reg_alias_patching.yaml

Copilot AI left a comment

Copy link
Copy Markdown

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 3 comments.

Suppressed comments (1)

tests/issues/arm_aarch64_reg_alias_patching.yaml:246

  • This test case name says "arm r13 at start of string", but in the expected asm "mov lr, sp" the alias for r13 (sp) appears at the end. Consider renaming to reflect what boundary you’re exercising.
      name: "arm r13 at start of string"

asm_text: "mov r0, pc"
-
input:
name: "arm r9 at end of string"
Comment thread arch/ARM/ARMMapping.c
Comment on lines +106 to +108
// No r0-r9 register.
*dst++ = *src++;
src_len--;
@@ -881,32 +881,53 @@ bool AArch64_getInstruction(csh handle, const uint8_t *code, size_t code_len,
/// which are not set in LLVM.
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants