Cranelift: remove the iadd_imm instruction

cranelift/codegen/meta/src/shared/instructions.rs

@@ -1782,7 +1782,8 @@ pub(crate) fn define(
             &formats.binary,
         )
         .operands_in(vec![Operand::new("x", Int), Operand::new("y", Int)])
-        .operands_out(vec![Operand::new("a", Int)]),
+        .operands_out(vec![Operand::new("a", Int)])
+        .inst_builder_imm_method(true),
     );
 
     ig.push(
@@ -1979,23 +1980,6 @@ pub(crate) fn define(
         .side_effects_idempotent(),
     );
 
-    ig.push(
-        Inst::new(
-            "iadd_imm",
-            r#"
-        Add immediate integer.
-
-        Same as `iadd`, but one operand is a sign extended 64 bit immediate constant.
-
-        Polymorphic over all scalar integer types, but does not support vector
-        types.
-        "#,
-            &formats.binary_imm64,
-        )
-        .operands_in(vec![Operand::new("x", iB), Operand::new("Y", &imm.imm64)])
-        .operands_out(vec![Operand::new("a", iB)]),
-    );
-
     ig.push(
         Inst::new(
             "imul_imm",

cranelift/codegen/src/ir/instructions.rs

@@ -1184,12 +1184,12 @@ mod tests {
         assert_eq!(x, y);
         assert_eq!(x.format(), InstructionFormat::Binary);
 
-        assert_eq!(format!("{:?}", Opcode::IaddImm), "IaddImm");
-        assert_eq!(Opcode::IaddImm.to_string(), "iadd_imm");
+        assert_eq!(format!("{:?}", Opcode::BandNot), "BandNot");
+        assert_eq!(Opcode::BandNot.to_string(), "band_not");
 
         // Check the matcher.
         assert_eq!("iadd".parse::<Opcode>(), Ok(Opcode::Iadd));
-        assert_eq!("iadd_imm".parse::<Opcode>(), Ok(Opcode::IaddImm));
+        assert_eq!("band_not".parse::<Opcode>(), Ok(Opcode::BandNot));
         assert_eq!("iadd\0".parse::<Opcode>(), Err("Unknown opcode"));
         assert_eq!("".parse::<Opcode>(), Err("Unknown opcode"));
         assert_eq!("\0".parse::<Opcode>(), Err("Unknown opcode"));

cranelift/codegen/src/legalizer/mod.rs

@@ -204,11 +204,9 @@ fn expand_binary_imm64(
     pos.goto_inst(inst);
 
     let is_signed = match opcode {
-        ir::Opcode::IaddImm
-        | ir::Opcode::IrsubImm
-        | ir::Opcode::ImulImm
-        | ir::Opcode::SdivImm
-        | ir::Opcode::SremImm => true,
+        ir::Opcode::IrsubImm | ir::Opcode::ImulImm | ir::Opcode::SdivImm | ir::Opcode::SremImm => {
+            true
+        }
         _ => false,
     };
 
@@ -243,9 +241,6 @@ fn expand_binary_imm64(
             replace.ushr(arg, imm);
         }
         // math
-        ir::Opcode::IaddImm => {
-            replace.iadd(arg, imm);
-        }
         ir::Opcode::IrsubImm => {
             // note: arg order reversed
             replace.isub(imm, arg);

cranelift/codegen/src/souper_harvest.rs

@@ -95,7 +95,6 @@ fn harvest_candidate_lhs(
     let should_trace = |val| match func.dfg.value_def(val) {
         ir::ValueDef::Result(inst, 0) => match func.dfg.insts[inst].opcode() {
                 ir::Opcode::Iadd
-                | ir::Opcode::IaddImm
                 | ir::Opcode::IrsubImm
                 | ir::Opcode::Imul
                 | ir::Opcode::ImulImm
@@ -185,17 +184,6 @@ fn harvest_candidate_lhs(
                         let b = arg(allocs, 1);
                         ast::Instruction::Add { a, b }.into()
                     }
-                    (ir::Opcode::IaddImm, ir::InstructionData::BinaryImm64 { imm, .. }) => {
-                        let a = arg(allocs, 0);
-                        let value: i64 = (*imm).into();
-                        let value: i128 = value.into();
-                        let b = ast::Constant {
-                            value,
-                            r#type: souper_type_of(&func.dfg, val),
-                        }
-                        .into();
-                        ast::Instruction::Add { a, b }.into()
-                    }
                     (ir::Opcode::IrsubImm, ir::InstructionData::BinaryImm64 { imm, .. }) => {
                         let b = arg(allocs, 0);
                         let value: i64 = (*imm).into();

cranelift/filetests/filetests/cfg/loop.clif

@@ -36,7 +36,8 @@ block1(v5: i32):
     v9 = f32const 0.0
     v10 = f32const 0.0
     v11 = fadd v9, v10
-    v12 = iadd_imm v5, 1
+    v101 = iconst.i32 1
+    v12 = iadd v5, v101
     v13 = icmp ult v12, v2
     brif v13, block1(v12), block4 ; unordered: block1:$BRIF1 -> block1
                                   ; unordered: block1:$BRIF1 -> block4

cranelift/filetests/filetests/egraph/licm.clif

@@ -125,7 +125,8 @@ block2(v11: i64):
     store.f64 v10, v15
 
     ;; loop breakout condition
-    v17 = iadd_imm v11, 1
+    v21 = iconst.i64 1
+    v17 = iadd v11, v21
     v20 = iconst.i64 100
     v19 = icmp ne v17, v20
     brif v19, block2(v17), block1

cranelift/filetests/filetests/isa/aarch64/amodes.clif

@@ -451,7 +451,8 @@ block0(v0: i64):
 
 function %i128_add_offset(i64) -> i128 {
 block0(v0: i64):
-  v1 = iadd_imm v0, 32
+  v3 = iconst.i64 32
+  v1 = iadd v0, v3
   v2 = load.i128 v1
   store.i128 v2, v1
   return v2
@@ -497,7 +498,8 @@ function %i128_32bit_sextend(i64, i32) -> i128 {
 block0(v0: i64, v1: i32):
   v2 = sextend.i64 v1
   v3 = iadd.i64 v0, v2
-  v4 = iadd_imm.i64 v3, 24
+  v6 = iconst.i64 24
+  v4 = iadd v3, v6
   v5 = load.i128 v4
   store.i128 v5, v4
   return v5

cranelift/filetests/filetests/isa/aarch64/big-endian.clif

@@ -201,7 +201,8 @@ function %f(i64) -> i64 {
 function %f(i64) {
     block0(v0: i64):
         v1 = load.i32 big v0+8
-        v2 = iadd_imm v0, 1
+        v3 = iconst.i64 1
+        v2 = iadd v0, v3
         store v2, v0
         return
 }

cranelift/filetests/filetests/isa/aarch64/exceptions.clif

@@ -15,7 +15,8 @@ function %f0(i32) -> i32, f32, f64 {
 
     block2(v6: i64):
         v7 = ireduce.i32 v6
-        v8 = iadd_imm.i32 v7, 1
+        v10 = iconst.i32 1
+        v8 = iadd v7, v10
         v9 = f32const 0x0.0        
         return v8, v9, v2
 }
@@ -136,7 +137,8 @@ function %f2(i32) -> i32, f32, f64 {
 
     block2(v6: i64):
         v7 = ireduce.i32 v6
-        v8 = iadd_imm.i32 v7, 1
+        v11 = iconst.i32 1
+        v8 = iadd v7, v11
         v9 = f32const 0x0.0        
         return v8, v9, v2
 }
@@ -261,7 +263,8 @@ function %f4(i64, i32) -> i32, f32, f64 {
 
     block2(v6: i64):
         v7 = ireduce.i32 v6
-        v8 = iadd_imm.i32 v7, 1
+        v10 = iconst.i32 1
+        v8 = iadd v7, v10
         v9 = f32const 0x0.0        
         return v8, v9, v2
 

cranelift/filetests/filetests/isa/aarch64/pinned-reg.clif

@@ -5,7 +5,8 @@ target aarch64
 function %f0() {
 block0:
     v1 = get_pinned_reg.i64
-    v2 = iadd_imm v1, 1
+    v3 = iconst.i64 1
+    v2 = iadd v1, v3
     set_pinned_reg v2
     return
 }

cranelift/filetests/filetests/isa/aarch64/return-call-indirect.clif

@@ -6,7 +6,8 @@ target aarch64
 
 function %callee_i64(i64) -> i64 tail {
 block0(v0: i64):
-    v1 = iadd_imm.i64 v0, 10
+    v2 = iconst.i64 10
+    v1 = iadd v0, v2
     return v1
 }
 

cranelift/filetests/filetests/isa/aarch64/return-call.clif

@@ -6,7 +6,8 @@ target aarch64
 
 function %callee_i64(i64) -> i64 tail {
 block0(v0: i64):
-    v1 = iadd_imm.i64 v0, 10
+    v2 = iconst.i64 10
+    v1 = iadd v0, v2
     return v1
 }
 

cranelift/filetests/filetests/isa/pulley32/exceptions.clif

@@ -14,7 +14,8 @@ function %f0(i32) -> i32, f32, f64 {
         return v5, v3, v4
 
     block2(v6: i32):
-        v8 = iadd_imm.i32 v6, 1
+        v10 = iconst.i32 1
+        v8 = iadd v6, v10
         v9 = f32const 0x0.0
         return v8, v9, v2
 }
@@ -65,7 +66,8 @@ function %f2(i32, i32) -> i32, f32, f64 {
         return v5, v3, v4
 
     block2(v7: i32):
-        v8 = iadd_imm.i32 v7, 1
+        v11 = iconst.i32 1
+        v8 = iadd v7, v11
         v9 = f32const 0x0.0
         return v8, v9, v2
 }
@@ -116,7 +118,8 @@ function %f4(i32, i32) -> i32, f32, f64 {
         return v5, v3, v4
 
     block2(v6: i32):
-        v8 = iadd_imm.i32 v6, 1
+        v10 = iconst.i32 1
+        v8 = iadd v6, v10
         v9 = f32const 0x0.0
         return v8, v9, v2
 

cranelift/filetests/filetests/isa/pulley32/iadd.clif

@@ -63,7 +63,8 @@ block0(v0: i64, v1: i64):
 
 function %i8_imm(i8) -> i8 {
 block0(v0: i8):
-    v2 = iadd_imm v0, 10
+    v3 = iconst.i8 10
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -78,7 +79,8 @@ block0(v0: i8):
 
 function %i16_imm(i16) -> i16 {
 block0(v0: i16):
-    v2 = iadd_imm v0, 10
+    v3 = iconst.i16 10
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -93,7 +95,8 @@ block0(v0: i16):
 
 function %i32_imm(i32) -> i32 {
 block0(v0: i32):
-    v2 = iadd_imm v0, 10
+    v3 = iconst.i32 10
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -108,7 +111,8 @@ block0(v0: i32):
 
 function %i64_imm(i64) -> i64 {
 block0(v0: i64):
-    v2 = iadd_imm v0, 10
+    v3 = iconst.i64 10
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -123,7 +127,8 @@ block0(v0: i64):
 
 function %i32_imm_big(i32) -> i32 {
 block0(v0: i32):
-    v2 = iadd_imm v0, 65536
+    v3 = iconst.i32 65536
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -138,7 +143,8 @@ block0(v0: i32):
 
 function %i64_imm_big(i64) -> i64 {
 block0(v0: i64):
-    v2 = iadd_imm v0, 65536
+    v3 = iconst.i64 65536
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -153,7 +159,8 @@ block0(v0: i64):
 
 function %i64_imm_super_big(i64) -> i64 {
 block0(v0: i64):
-    v2 = iadd_imm v0, 0x1_1111_1111
+    v3 = iconst.i64 0x1_1111_1111
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -170,7 +177,8 @@ block0(v0: i64):
 
 function %i8_negative_imm(i8) -> i8 {
 block0(v0: i8):
-    v2 = iadd_imm v0, -10
+    v3 = iconst.i8 -10
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -185,7 +193,8 @@ block0(v0: i8):
 
 function %i16_negative_imm(i16) -> i16 {
 block0(v0: i16):
-    v2 = iadd_imm v0, -10
+    v3 = iconst.i16 -10
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -200,7 +209,8 @@ block0(v0: i16):
 
 function %i32_negative_imm(i32) -> i32 {
 block0(v0: i32):
-    v2 = iadd_imm v0, -10
+    v3 = iconst.i32 -10
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -215,7 +225,8 @@ block0(v0: i32):
 
 function %i64_negative_imm(i64) -> i64 {
 block0(v0: i64):
-    v2 = iadd_imm v0, -10
+    v3 = iconst.i64 -10
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -230,7 +241,8 @@ block0(v0: i64):
 
 function %i32_negative_imm_big(i32) -> i32 {
 block0(v0: i32):
-    v2 = iadd_imm v0, -65536
+    v3 = iconst.i32 -65536
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -245,7 +257,8 @@ block0(v0: i32):
 
 function %i64_negative_imm_big(i64) -> i64 {
 block0(v0: i64):
-    v2 = iadd_imm v0, -65536
+    v3 = iconst.i64 -65536
+    v2 = iadd v0, v3
     return v2
 }
 
@@ -260,7 +273,8 @@ block0(v0: i64):
 
 function %i32_negative_i32_min(i32) -> i32 {
 block0(v0: i32):
-    v2 = iadd_imm v0, 0x8000_0000
+    v3 = iconst.i32 -2147483648
+    v2 = iadd v0, v3
     return v2
 }