[DRSDavidSoft]

Problem and change

RF protocol decoding ran inside INT0, delaying UART receive servicing during 115200-baud strip streaming. Capture the completed pulse buffer in the interrupt and decode it in the main loop while UART interrupts remain enabled. The buffer stays owned until decoding completes; receive rearming discards obsolete work.

Based on #697, which includes the LED register-allocation fix from #693. Related: #696.

Validation

• Native RF fixture passes: decoding outside ISR, immutable pending buffer, waveform identity, resynchronization and rearming.
• AVR compile, SRAM/flash guards and WS2811 waveform checks passed.
• Guarded board upload verified flash and restored EEPROM.
• Before: one framing error after 498 acknowledged 38-pixel frames.
• After: 2,442 acknowledged frames over 180 seconds, zero framing/CRC errors and no reset. One of 2,443 HTTP requests exceeded the five-second client deadline; outcome unknown, so host latency investigation remains open.

Remaining gates

Trace-free firmware 5B86029E was independently read back, EEPROM restored/verified and recovery latch cleared. The later byte-index size optimization passes both default and EEPROM-menu-label builds, RF boundary tests and waveform checks but is not deployed while the coordinated playback investigation owns the board. Complete final-image long streaming, host scheduling, physical RF reception, Pealayer playback/effects and user visual acceptance. Private logs, machine settings and firmware backups remain local.