Investigate rising UART framing errors during acknowledged strip streaming #696

With the AVR register-allocation fix in #693, the user physically confirmed the full 100-pixel rainbow works on PD6. Both the original host and updated pacing host can stream and receive ACKs, but the firmware framing-error counter continues rising. CRC errors stay zero and reset count stays stable in the observed stream. This prevents claiming long-run transport reliability or precise concurrent media/effect timing.

Configuration: ATmega328P, 16 MHz, 115200 serial, 100 WS2811 pixels. Each frame uses seven acknowledged staging chunks and one show. Complete frame commands measured 66–76 ms on the observed transport; #693 removes additional idle time after a late transfer.

Next: compare counter growth with strip stopped/running and media-clock activity disabled/enabled, capture bounded sanitized request/ACK evidence, distinguish malformed input from receive-ring overflow/interrupt blackout, and add the focused regression before changing UART pacing. Pealayer-to-host strip RPC and board connectivity were verified; no physical relay/motion or synchronized playback acceptance is claimed.