est: add set_bump_rc command - #11017
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Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
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This pull request introduces the set_bump_rc command to set lumped resistance and capacitance for chip bumps in 3D designs. It updates the parasitics estimation logic to identify chip bump pins and apply these custom RC values to pad nets terminating on chip bumps, along with adding corresponding tests and Tcl interfaces. The feedback points out an issue in makePadParasitic where using std::max(bump.res, res) with a default of 0.001 ohms would silently override any user-specified bump resistance smaller than 0.001 ohms, and suggests checking bump.res > 0.0 instead.
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Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
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| return pin1 && pin2 | ||
| && ((network_->isTopLevelPort(pin1) && isPadPin(pin2)) | ||
| || (network_->isTopLevelPort(pin2) && isPadPin(pin1))); | ||
| && ((network_->isTopLevelPort(pin1) | ||
| && (isPadPin(pin2) || isChipBumpPin(pin2))) | ||
| || (network_->isTopLevelPort(pin2) | ||
| && (isPadPin(pin1) || isChipBumpPin(pin1)))); |
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When a recorded bump net contains a top-level port, the bump ITerm, and an additional load, net2Pins() only returns the first two iterator entries and never verifies that the net ends there. If those entries match this new condition, makePadParasitic() replaces the net with a network containing only those two pins, silently omitting the remaining loads from parasitic connectivity and producing incorrect timing. Require exactly two connected pins before selecting this model.
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An example FP is #11017 Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
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Summary
Adds
set_bump_rc, the bump half of the 3D parasitics-estimation series: lumpedper-corner resistance/capacitance for chip bumps (
dbChipBump). Duringplacement estimation, a two-pin net connecting a top-level port to a chip bump
is treated as a pad net and gets the lumped bump RC (pi model: C/2 on each
node, R between) instead of length-based wire RC. Bump nets are detected by the
ODB bump association itself — the pin on the bump's recorded net
(
dbChipBump::getNet()), with no pad-class LEF master required — so multi-pinbump cells only classify their actual bump net. Without
set_bump_rc, bumpnets keep the legacy small connectivity resistor; at least one of
-resistance/-capacitanceis required (EST-0033). 2D designs are unaffected:with no bump values set the pad path is unchanged.
Type of Change
Impact
New
set_bump_rc [-corner corner] [-resistance res] [-capacitance cap]command (values are absolute per bump, not per unit length). In 3D designs,
estimate_parasitics -placementannotates port-to-bump nets with the lumpedbump RC per corner. No behavior change for designs without chip bumps or when
set_bump_rcis not called.Verification
./etc/Build.sh).New tests:
set_bump_rc1(argument validation),set_bump_rc2(end-to-end:port-to-bump net takes the bump RC, non-bump net keeps wire RC), and the
BumpRcOnPadNetunit test (unset -> connectivity resistor, set -> lumped RC),registered in both CMake and Bazel. Full est suite passes (14 tcl + 4 gtest).
Related Issues
Follow-up to #10931 (est chip binding) and #10941 (per-technology wire RC).
Part of the minimal 3D parasitics-estimation series; the 3D estimation flow
that consumes these values per chip follows in a separate PR.