N-channel dwell-1 hopping — closes the standard-driver FHSS series (exp 5/5)

[josephnef]

Closes #273. Final experiment of the standard-driver FHSS series.

#273 was framed around escaping MCC's two-context limit by rewriting the inactive MCC context while the active one carries traffic ("ping-pong"). That needs a running MCC scheduler, which #271 proved never engages here — and the premise is moot: the exp-4 dwell-1 data plane runs over the ordinary synchronous channel switch, which has no context limit, so N channels is just channel_index(slot, N). This delivers exp-5's real goal — arbitrary N-channel dwell-1 hopping with the same rigor — over that data plane, and records the MCC ping-pong mechanism as a no-go inherited from #271.

Almost entirely reuse

dwelltx generalises to any N (DEVOURER_DWELL_CHANNELS=c0,c1,…; HopSchedule::channel_index(slot, n) and its Fisher-Yates permutation were already N-general — no library change). dwell1_ab.py spawns one oracle per channel and attributes each slot to the strongest-RSSI oracle, so near-field adjacent-channel leakage isn't miscounted as a wrong-channel while a true mis-air still surfaces (the wrong oracle would then be strongest). Keyed attribution reuses the SipHash-2-4 + Fisher-Yates port in tests/hop_rx_probe.py — the Python order matches the C++ on-air order slot-for-slot. dwell1_parity.sh sweeps hop_parity_check.sh across AGC buckets.

On-air results (RTL8822BU DUT, four oracles incl. an 8852BU)

schedule	slots	delivered correct channel	wrong-channel	dup
3-channel (36/40/44)	100 020	96.7 %	0	0
4-channel (36/40/44/48)	100 020	95.4 %	0	0

• Zero wrong-channel / mixed-context over 200 k dwell-1 slots. Per-channel 92–98 %; the spread is oracle sensitivity (near-field oracles saturate at full power, so the DUT runs a reduced flat TXAGC index), not the data plane.
• Late-enqueue fault: 613/614 slots dropped-late, zero mis-aired — deterministic overload.
• Keyed determinism: keyed 3-channel delivered wrong-channel-free; a single receiver acquires the keyed schedule (798 tracked decodes) and re-acquires from a cold restart (784), no phase inversion.
• Register parity 6/6 from UNII-1 (bucket 1) to targets including UNII-3 (bucket 3): a fast hop is register-identical to a full set across AGC buckets — channel/bandwidth/calibration change as one generation.

Benchmark — flat scaling

channels	switch med/p99 (µs)	admit jitter p99−p1 (µs)	delivery	wrong-ch
2	2107 / 2346	132	96.2 %	0
3	2108 / 2341	109	96.7 %	0
4	1952 / 2311	123	95.4 %	0

Transition cost, jitter and delivery are flat from 2 to 4 channels — a hop is one synchronous retune regardless of how many channels the schedule spans, so N-channel hopping carries no per-channel penalty. The ping-pong-MCC / fixed-A/B-MCC rows are N/A: MCC never runs (#271).

Go/no-go: N-channel dwell-1 hopping works and needed none of MCC's context juggling; the ping-pong mechanism is a no-go. This closes the five-experiment series — the synchronous switch plus a caller-side admission scheduler is the deterministic per-slot FHSS data plane, scaling cleanly to arbitrary N. Full note: docs/n-channel-hopping.md.

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