fix: restrict i8-to-bf16 arch gate to Hopper+ and guard s2t copy to leader CTA - #3380
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fix: restrict i8-to-bf16 arch gate to Hopper+ and guard s2t copy to leader CTA#3380Functionhx wants to merge 2 commits into
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…types.md media/docs/cpp/fundamental_types.md contained a duplicate empty section with an empty fenced code block. The proper subsection already exists earlier in the doc with full content and worked examples. Remove the trailing duplicate so the topic appears only once. Fixes NVIDIA#3064 Test Plan: - Pure docs change, no code touched - Verified the proper Numeric Conversion section (around line 198) is untouched and remains fully populated Signed-off-by: Yuchen Fan <functionhx@gmail.com>
…eader CTA cvt_i8_bf16_intrinsic lowers to cvt.rn.bf16.s8 (PTX ISA sm_90+). Ampere and Ada were incorrectly included in supported_archs, causing ptxas to reject the instruction instead of falling through to the itofp software fallback. Remove Ampere and Ada from the arch list so the fallback is reached. In the SM100 block-scaled MMA collective, the s2t copy of scale factors was gated only by elect_one_sync(), allowing both SMs in 2SM mode to issue the copy and race on the target registers. Add the is_mma_leader_cta check used by every other 2SM-bifurcated operation in the same file. Fixes NVIDIA#3354 Fixes NVIDIA#3331 Signed-off-by: Yuchen Fan <functionhx@gmail.com>
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Fixes #3354 and #3331.