m68k: report 68040 write faults in writeback slot 3#156
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The 68040 access-error frame builder pushed a faulted write into writeback slot 2 (WB2S/WB2A/WB2D) and the RTE handler read the pending writeback status back from that slot. Real 68040 silicon and the WinUAE/ Amiberry MMU core put a normal write fault in slot 3: see Amiberry src/cpummu.cpp:434, "wb3_status = write ? 0x80|(ssw&0x7f) : 0; wb3_data = val; wb2_status = 0" (WB2 is reserved for MOVE16 cacheline writes). Frame layout confirmed at src/newcpu_common.cpp:1442-1455. With the data in the wrong slot, a monitor that completes an allowed store by copying WB3D to WB3A (MuGuardianAngel) reads a zero WB3D and clobbers the target with 0. Move the write into slot 3 in the frame builder and read WB3S/WB3A from +$0E/+$18 in the RTE absorb path. No functional repro isolates this from the separate access-fault continuation bug; covered by the frame unit tests instead. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Pull request overview
This PR corrects the 68040 access-error (format 7) stack frame writeback layout so faulted writes are reported in writeback slot 3 (WB3S/WB3A/WB3D) rather than slot 2, aligning Copperline’s frame contract and RTE continuation logic with real 68040 behavior and the WinUAE/Amiberry reference.
Changes:
- Update 68040 access-error frame construction to populate WB3S/WB3A/WB3D for write faults and clear WB2.
- Update the 68040 RTE “absorb write” path to read WB3S/WB3A at the correct offsets (+$0E / +$18).
- Update access-error frame tests to assert the slot-3 writeback layout and absorb semantics.
Reviewed changes
Copilot reviewed 3 out of 3 changed files in this pull request and generated no comments.
| File | Description |
|---|---|
| crates/m68k/src/core/exceptions.rs | Builds 68040 format-7 frames with faulted writes placed into WB3* (slot 3) and WB2 cleared. |
| crates/m68k/src/core/decode.rs | Adjusts RTE continuation logic to consult WB3S/WB3A at the correct frame offsets for write suppression. |
| crates/m68k/tests/access_fault_frame_tests.rs | Updates assertions and handler behavior to validate the corrected slot-3 layout and RTE absorb behavior. |
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What
The 68040 access-error stack frame builder pushed a faulted write into
writeback slot 2 (WB2S/WB2A/WB2D), and the RTE handler read the pending
writeback status back from that slot.
Real 68040 silicon and the WinUAE/Amiberry MMU core put a normal write
fault in slot 3. See Amiberry
src/cpummu.cpp:434:WB2 is reserved for MOVE16 cacheline writes. Frame push order confirmed
at
src/newcpu_common.cpp:1442-1455(WB3D at +$1C, WB3A at +$18, WB3Sat +$0E).
With the data in the wrong slot, a monitor that completes an allowed
store by copying WB3D to WB3A (MuGuardianAngel) reads a zero WB3D and
clobbers the target with 0.
Change
exceptions.rs: build the write into slot 3 (WB3S/WB3A/WB3D), clear WB2.decode.rs: the RTE absorb path reads WB3S/WB3A from +$0E/+$18.access_fault_frame_tests.rs: updated to assert the slot-3 layout (8 tests pass).Scope
This corrects the writeback slot to match the reference; it is not a
fix for the separate access-fault continuation issue tracked in #155, and
no functional repro isolates this change from that bug. It stands on the
frame unit tests.
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