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Add SK32F077xB (SK32F0xx) HAL port with GENERIC_SK32_F077 board, testhal and demos - #452

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ChibiOS:chibios-21.11.xfrom
dadato:sk32f0xx-support
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dadato wants to merge 13 commits into
ChibiOS:chibios-21.11.xfrom
dadato:sk32f0xx-support

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@dadato

@dadato dadato commented Sep 9, 2026

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Summary

Add support for the SK32F077xB (SK32F0xx family, ARM Cortex-M0, 128KB
flash / 10KB SRAM) to ChibiOS-Contrib.

The port is fully native: it does not reuse any shared STM32 low level
driver. Although register-compatible with the STM32F072 for most of the core
(except the USB IP), the SK32 units use the legacy SR/DR register set for
USART/SPI/I2C and carry 3Think-specific peripherals (KBCU, SLED), so every
driver ships its own RCC/clock, DMA and NVIC handling tuned to the vendor
register layout.

What is included

  • os/hal/ports/SK32/SK32F0xx: full HAL port with native LLDs for
    ADC, EFL (embedded-flash EEPROM emulation), GPT, I2C, PAL, SERIAL, SPI,
    ST, USB
    , plus the SK32-only peripherals:
    • KBCU (Keyboard Control Unit): keyboard matrix scan (independent
      mode) and RGB LED column output over DMA1 ch4
    • SLED (on-die WS2812-style serial LED controller): two groups,
      8/16/32-bit data widths, DMA-driven
    • shared native DMA helper sk32_dma.c and ISR aggregation sk32_isr.c
  • os/common/ext/CMSIS/SK32: vendor CMSIS device headers + system init
  • os/common/startup/ARMCMx: devices/SK32F0xx, startup_SK32F0xx.mk,
    SK32F077xB.ld (2KB flash pages)
  • os/hal/boards/GENERIC_SK32_F077: generic board with the SK32 pin/clock
    definitions
  • testhal/SK32: ADC, EEPROM, GPIO, IIC, KBCU, SERIAL, SLED, SPI, TIM
    bring-up projects (all STM32-independent, SK32_* mcuconf naming only)
  • demos/SK32: GENERIC_SK32_F077 LED blinker demo

Testing

  • Every testhal/SK32 project and the demo build cleanly with their bundled
    Makefiles (arm-none-eabi-gcc, no warnings).
  • Validated on real SK32F077xB silicon through QMK firmware: KBCU matrix
    scanning, USB HID + DFU, VIA dynamic keymaps persisted via the EFL driver,
    and SLED-driven RGB output all run on this port.

Notes

  • SK32 flash is erased/written in 2KB pages (unlike the 1KB pages of the
    register-compatible STM32F072); the EFL LLD and linker script account for
    this.
  • Only 10KB SRAM is available; the port and demos keep RAM usage
    conservative.

Checklist

  • All testhal/demos compile cleanly (no warnings/errors)
  • No dependency on shared STM32 LLDs or STM32 mcuconf naming remains
  • Code layout follows ChibiOS-Contrib conventions

da_das and others added 13 commits September 9, 2026 23:29
Add support for the SK (SK32F077xB) MCU to ChibiOS-Contrib:

* os/common/ext/CMSIS/SK32: CMSIS device headers and system files
* os/common/startup/ARMCMx/devices/SK32F0xx + GCC ld/mk: startup support
* os/hal/ports/SK32: HAL port with PAL, GPT, I2C, SPI, ST, USB, EFL,
  serial and native KBCU/SLED/DMA drivers (STM32-free implementation)
* os/hal/boards/GENERIC_SK32_F077: generic board for SK32F077xB
* testhal/SK32 and demos/SK32: bring-up test projects
add build logs for multiple SK32 demo and test programs, as well as Eclipse project configuration files and firmware binary files
…conf and drop the redundant PROBE/SERIAL demo copies
- hal_rtc_lld.c/h: native RTC driver (alarm A, TAFCR, SSR sub-seconds)
- hal_wdg_lld.c/h: unified IWDG (WDGD1) / WWDG (WDGD2) driver, wdgStart()
  returns msg_t and the WDGConfig fields are validated by the LLD
- hal_low_power_lld.c/h: Cortex-M0 STOP entry/exit with PLL/HSI rebuild
- hal_spi_lld.c/h: optional DMA1-backed SPI transfer engine
- sk32_dma.c/h: DMA channel selection (CSELR) helpers
- sk32_rcc.h: LSE/LSI, RTC and backup-domain clock macros
- sk32_registry.h: register SK32_HAS_IWDG/WWDG/RTC
- platform.mk: smart build rules for the RTC/WDG/low-power LLDs
- testhal/SK32: add RTC and WDG demo projects; refresh the mcuconf.h
  comments (shared STM32 stubs -> native LLDs)
Two LLD fixes required for reliable host<->device wakeup out of Stop:

- hal_low_power_lld.c: arm the USB resume EXTI line (line 18) on BOTH edges,
  exactly like USBUSER_Init() in the vendor reference.  The wakeup pulse the
  controller emits on host resume has no documented polarity on this part, so
  a single edge silently drops the wakeup.

- hal_usb_lld.c: stop clearing POWER.SUSMOD in the RESUME interrupt handler.
  SUSMOD is set by the controller, not by software; touching it here broke
  host<->device resume (it is already removed from the suspend path).  Update
  the register + low-power doc comments accordingly.
Expose the factory-programmed F_SIZE register (0x1FFFF7CC, value in KB) so
firmware can adapt to the different SK32 flash capacities (64 KB, 128 KB, ...)
with a single binary instead of a build-time constant.
All 3Think SK32 parts belong to the SK32F077X family (SK32F077R8Q6/RBQ6
64/128 KB QFN64, SK32F077C8Q6/CBQ6 64/128 KB QFN48); there is no SK32F072.
The capacity-flavoured -DSK32F077xB macro is replaced by the family macro so
a single configuration covers every part: capacity is selected by the linker
script and read at runtime from the F_SIZE register.

Also remove committed build logs and dry-run dumps from the SK32 testhal and
demo projects.
Make efl_lld_descriptor a run-time RAM descriptor; efl_lld_init() sets sectors_count/size from the F_SIZE register so it reports the real capacity (64K/128K/...). Mask F_SIZE with SK32_FLASH_SIZE_MASK (low byte only; upper bits are not silicon-driven and read back as ones). Update EEPROM testhal comment.
Move the driver-state restore and WAKEUP event notify into the
usb_lld_wakeup_host macro so it runs synchronously at the LLD layer.
Guard the macro params with parentheses so callers passing &USBD1 work.

In sk32_lowpower_stop_enter use uint32_t masks on PWR->CR (a 32-bit
register) and save/restore the full value, so the high bits that select
the USB PHY low-dropout 3.3V supply are preserved instead of being
cleared to the 5V VDD rail on stop/wake.
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