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Merged
jasonrandrews merged 1 commit into from
Jun 2, 2026
+38 −72
Merged

update content in zephyr_cs320_mps4 #3348

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104 changes: 35 additions & 69 deletions content/learning-paths/embedded-and-microcontrollers/zephyr_cs320_mps4/how-to-2.md
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Original file line number Diff line number Diff line change
Expand Up @@ -49,12 +49,12 @@ The files you modify or create are:

```
boards/arm/mps4/
├── board.yml # Board metadata (modify)
├── Kconfig # Board Kconfig entry (modify)
├── Kconfig.defconfig # Default Kconfig settings (modify)
├── mps4_corstone320_fpga_defconfig # Board defconfig fragment (new)
├── mps4_corstone320_fpga.dts # Device tree source (new)
└── mps4_common_soc_peripheral_fpga.dtsi # SoC peripheral definitions (new)
├── board.yml # Board metadata (modify)
├── Kconfig.mps4 # Board Kconfig entry (modify)
├── Kconfig.defconfig # Default Kconfig settings (modify)
├── mps4_corstone320_fpga_defconfig # Board defconfig fragment (new)
├── mps4_corstone320_fpga.dts # Device tree source (new)
└── mps4_common_soc_peripheral_fpga.dtsi # SoC peripheral definitions (new)
```

## Add the board files
Expand Down Expand Up @@ -192,64 +192,31 @@ Create `boards/arm/mps4/mps4_corstone320_fpga.dts` with the following content:

This file defines the SoC peripherals for the MPS4 FPGA build and is included by `mps4_corstone320_fpga.dts`. It is not a standalone file — the `.dts` file pulls it in during compilation with `#include`.

Create `boards/arm/mps4/mps4_common_soc_peripheral_fpga.dtsi` with the following content. This configures the 25 MHz peripheral clock, GPIO controllers, and two UART instances using the MPS4 peripheral addresses from the [SSE-320 FPGA Image for MPS4 Application Note](https://developer.arm.com/documentation/109762/0100/?lang=en):
Create `boards/arm/mps4/mps4_common_soc_peripheral_fpga.dtsi` with the following content. This configures the 50 MHz peripheral clock and two UART instances using the MPS4 peripheral addresses from the [SSE-320 FPGA Image for MPS4 Application Note](https://developer.arm.com/documentation/109762/0100/?lang=en):

```dts
sysclk: system-clock {
compatible = "fixed-clock";
clock-frequency = <25000000>;
clock-frequency = <50000000>;
#clock-cells = <0>;
};

gpio0: gpio@100000 {
compatible = "arm,cmsdk-gpio";
reg = <0x100000 0x1000>;
interrupts = <69 3>;
gpio-controller;
#gpio-cells = <2>;
uart0: uart@9303000 {
compatible = "arm,cmsdk-uart";
reg = <0x9303000 0x1000>;
interrupts = <34 3 49 3>;
interrupt-names = "tx", "rx";
clocks = <&sysclk>;
current-speed = <115200>;
};

gpio1: gpio@101000 {
compatible = "arm,cmsdk-gpio";
reg = <0x101000 0x1000>;
interrupts = <70 3>;
gpio-controller;
#gpio-cells = <2>;
};

uart0: uart@8203000 {
compatible = "arm,cmsdk-uart";
reg = <0x8203000 0x1000>;
interrupts = <34 3 33 3>;
interrupt-names = "tx", "rx";
clocks = <&sysclk>;
current-speed = <115200>;
};

uart1: uart@8204000 {
compatible = "arm,cmsdk-uart";
reg = <0x8204000 0x1000>;
interrupts = <36 3 35 3>;
interrupt-names = "tx", "rx";
clocks = <&sysclk>;
current-speed = <115200>;
};

gpio_led0: mps4_fpgaio@8202000 {
compatible = "arm,mmio32-gpio";
reg = <0x8202000 0x4>;
gpio-controller;
#gpio-cells = <1>;
ngpios = <8>;
};

gpio_button: mps4_fpgaio@8202008 {
compatible = "arm,mmio32-gpio";
reg = <0x8202008 0x4>;
gpio-controller;
#gpio-cells = <1>;
ngpios = <2>;
direction-input;
uart1: uart@9304000 {
compatible = "arm,cmsdk-uart";
reg = <0x9304000 0x1000>;
interrupts = <36 3 35 3>;
interrupt-names = "tx", "rx";
clocks = <&sysclk>;
current-speed = <115200>;
};

pinctrl: pinctrl {
Expand All @@ -258,19 +225,6 @@ pinctrl: pinctrl {
};
```

### Kconfig

`Kconfig` is the board-level Kconfig entry. It selects the SoC variant and configures board-level options based on the board target you pass to `west build`.

The existing `boards/arm/mps4/Kconfig` already handles the FVP variants. Add the FPGA variant by appending the `select SOC_CORSTONE320` line so the file looks like this:

```kconfig
config BOARD_MPS4
select BUILD_WITH_TFM if BOARD_MPS4_CORSTONE315_FVP_NS || BOARD_MPS4_CORSTONE320_FVP_NS
select TRUSTED_EXECUTION_NONSECURE if BOARD_MPS4_CORSTONE315_FVP_NS || BOARD_MPS4_CORSTONE320_FVP_NS
select USE_DT_CODE_PARTITION if BOARD_MPS4_CORSTONE315_FVP_NS || BOARD_MPS4_CORSTONE320_FVP_NS
select SOC_CORSTONE320 if BOARD_MPS4_CORSTONE320_FPGA
```

### Kconfig.defconfig

Expand Down Expand Up @@ -311,6 +265,18 @@ endif
endif
```

### Kconfig.mps4

`Kconfig.mps4` is the base software configuration for selecting SoC and other board and SoC related settings. Add the FPGA support in the file.

```
config BOARD_MPS4
select SOC_SERIES_MPS4
select SOC_MPS4_CORSTONE315 if BOARD_MPS4_CORSTONE315_FVP || BOARD_MPS4_CORSTONE315_FVP_NS
select SOC_MPS4_CORSTONE320 if BOARD_MPS4_CORSTONE320_FVP || BOARD_MPS4_CORSTONE320_FVP_NS || BOARD_MPS4_CORSTONE320_FPGA
```


### mps4_corstone320_fpga_defconfig

`mps4_corstone320_fpga_defconfig` is a Kconfig fragment that Zephyr merges into the final `.config` when building for this board target. It enables TrustZone, MPU support, GPIO, and console over UART, and configures the build as a Secure image with ROM-region relocation.
Expand All @@ -336,4 +302,4 @@ CONFIG_TRUSTED_EXECUTION_SECURE=y
CONFIG_ROMSTART_RELOCATION_ROM=y
```

After creating all these files, you're ready to build the `hello_world` sample for your new board target.
After creating all these files, you're ready to build the `hello_world` sample for your new board target.
6 changes: 3 additions & 3 deletions content/learning-paths/embedded-and-microcontrollers/zephyr_cs320_mps4/how-to-3.md
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Expand Up @@ -28,7 +28,7 @@ Replace the path with your actual toolchain directory. On x86_64, the directory
From the `~/zephyrproject/zephyr` directory, build the `hello_world` example for the Corstone-320 FPGA variant:

```bash
west build -p always -b mps4/corstone320/fpga samples/hello_world
west build -p always -b mps4/corstone320/fpga zephyr/samples/hello_world -- -DCONFIG_ROMSTART_RELOCATION_ROM=y
```

A successful build ends with output similar to:
Expand Down Expand Up @@ -62,8 +62,8 @@ The ELF image contains the application and the Zephyr kernel libraries. You can
For the hello_world application, place the vector table in the FPGA boot ROM at address `0x11000000`, and place the remaining code and data in SRAM at address `0x31000000`. Use `arm-none-eabi-objcopy` to extract these two regions from `zephyr.elf`:

```bash
arm-none-eabi-objcopy -O binary --only-section=.vectors build/zephyr/zephyr.elf vector.bin
arm-none-eabi-objcopy -O binary --remove-section=.vectors build/zephyr/zephyr.elf app.bin
arm-none-eabi-objcopy -O binary --only-section=rom_start zephyr.elf vector.bin
arm-none-eabi-objcopy -O binary --remove-section=rom_start zephyr.elf app.bin
```

Update `images.txt` under `/MB/HBI0376B/FI101` to load the two images. The paths use the `\SOFTWARE\` folder on the MPS4 SD card, which is where you will copy the binary files:
Expand Down
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