GPUTracking: place the remaining cluster-finder constants in the constant address space

Common/Constants/CMakeLists.txt

@@ -9,4 +9,5 @@
 # granted to it by virtue of its status as an Intergovernmental Organization
 # or submit itself to any jurisdiction.
 
-o2_add_header_only_library(CommonConstants)
+o2_add_header_only_library(CommonConstants
+                           INTERFACE_LINK_LIBRARIES O2::GPUCommon)

Common/Constants/include/CommonConstants/LHCConstants.h

@@ -16,6 +16,8 @@
 #ifndef ALICEO2_LHCCONSTANTS_H_
 #define ALICEO2_LHCCONSTANTS_H_
 
+#include "GPUCommonDef.h"
+
 namespace o2
 {
 namespace constants
@@ -28,17 +30,17 @@ enum BeamDirection : int { BeamA, // beamA = beam 0,
                            NBeamDirections,
                            InteractingBC = -1 // as used in the BunchFilling class
 };
-constexpr int LHCMaxBunches = 3564;                              // max N bunches
+GPUglobalconstexpr() int LHCMaxBunches = 3564;                   // max N bunches
 constexpr double LHCRFFreq = 400.789e6;                          // LHC RF frequency in Hz
 constexpr double LHCBunchSpacingNS = 10 * 1.e9 / LHCRFFreq;      // bunch spacing in ns (10 RFbuckets)
 constexpr double LHCOrbitNS = LHCMaxBunches * LHCBunchSpacingNS; // orbit duration in ns
 constexpr double LHCRevFreq = 1.e9 / LHCOrbitNS;                 // revolution frequency
 constexpr double LHCBunchSpacingMUS = LHCBunchSpacingNS * 1e-3;  // bunch spacing in \mus (10 RFbuckets)
 constexpr double LHCOrbitMUS = LHCOrbitNS * 1e-3;                // orbit duration in \mus
-constexpr unsigned int MaxNOrbits = 0xffffffff;
+GPUglobalconstexpr() unsigned int MaxNOrbits = 0xffffffff;
 
 // Offsets of A, C beam bunches at P2
-constexpr int BunchOffsetsP2[2] = {344, 3017};
+GPUglobalconstexpr() int BunchOffsetsP2[2] = {344, 3017};
 
 // convert LHC bunch ID to BC for 2 beam directions
 constexpr int LHCBunch2P2BC(int bunch, BeamDirection dir)

Common/Constants/include/CommonConstants/MathConstants.h

@@ -16,31 +16,33 @@
 #ifndef ALICEO2_COMMON_MATH_CONSTANTS_
 #define ALICEO2_COMMON_MATH_CONSTANTS_
 
+#include "GPUCommonDef.h"
+
 namespace o2
 {
 namespace constants
 {
 namespace math
 {
-constexpr float Almost0 = 0x1.0p-126f;   // smallest non-denormal float
-constexpr float Epsilon = 0x0.000002p0f; // smallest float such that 1 != 1 + Epsilon
-constexpr float Almost1 = 1.f - 1.0e-6f;
-constexpr float VeryBig = 1.f / Almost0;
+GPUglobalconstexpr() float Almost0 = 0x1.0p-126f;   // smallest non-denormal float
+GPUglobalconstexpr() float Epsilon = 0x0.000002p0f; // smallest float such that 1 != 1 + Epsilon
+GPUglobalconstexpr() float Almost1 = 1.f - 1.0e-6f;
+GPUglobalconstexpr() float VeryBig = 1.f / Almost0;
 
-constexpr float PI = 3.14159274101257324e+00f;
-constexpr float TwoPI = 2.f * PI;
-constexpr float PIHalf = 0.5f * PI;
-constexpr float PIThird = PI / 3.0f;
-constexpr float PIQuarter = 0.25f * PI;
-constexpr float Rad2Deg = 180.f / PI;
-constexpr float Deg2Rad = PI / 180.f;
+GPUglobalconstexpr() float PI = 3.14159274101257324e+00f;
+GPUglobalconstexpr() float TwoPI = 2.f * PI;
+GPUglobalconstexpr() float PIHalf = 0.5f * PI;
+GPUglobalconstexpr() float PIThird = PI / 3.0f;
+GPUglobalconstexpr() float PIQuarter = 0.25f * PI;
+GPUglobalconstexpr() float Rad2Deg = 180.f / PI;
+GPUglobalconstexpr() float Deg2Rad = PI / 180.f;
 
-constexpr int NSectors = 18;
-constexpr float SectorSpanDeg = 360. / NSectors;
-constexpr float SectorSpanRad = SectorSpanDeg * Deg2Rad;
+GPUglobalconstexpr() int NSectors = 18;
+GPUglobalconstexpr() float SectorSpanDeg = 360. / NSectors;
+GPUglobalconstexpr() float SectorSpanRad = SectorSpanDeg * Deg2Rad;
 
 // conversion from B(kGaus) to curvature for 1GeV pt
-constexpr float B2C = -0.299792458e-3;
+GPUglobalconstexpr() float B2C = -0.299792458e-3;
 } // namespace math
 } // namespace constants
 } // namespace o2

Common/MathUtils/include/MathUtils/Cartesian.h

@@ -52,10 +52,10 @@ namespace math_utils
 /// The IDs must be < 32
 
 struct TransformType {
-  static constexpr int L2G = 0;
-  static constexpr int T2L = 1;
-  static constexpr int T2G = 2;
-  static constexpr int T2GRot = 3;
+  static GPUglobalconstexpr() int L2G = 0;
+  static GPUglobalconstexpr() int T2L = 1;
+  static GPUglobalconstexpr() int T2G = 2;
+  static GPUglobalconstexpr() int T2GRot = 3;
 }; /// transformation types
 
 template <typename value_T>

DataFormats/Detectors/Common/include/DetectorsCommonDataFormats/DetID.h

@@ -28,6 +28,8 @@
 #ifndef O2_BASE_DETID_
 #define O2_BASE_DETID_
 
+#include "GPUCommonDef.h"
+
 #include "GPUCommonRtypes.h"
 #include "GPUCommonBitSet.h"
 #include "MathUtils/Utils.h"
@@ -60,45 +62,45 @@ class DetID
   /// Detector identifiers: continuous, starting from 0
   typedef int ID;
 
-  static constexpr ID ITS = 0;
-  static constexpr ID TPC = 1;
-  static constexpr ID TRD = 2;
-  static constexpr ID TOF = 3;
-  static constexpr ID PHS = 4;
-  static constexpr ID CPV = 5;
-  static constexpr ID EMC = 6;
-  static constexpr ID HMP = 7;
-  static constexpr ID MFT = 8;
-  static constexpr ID MCH = 9;
-  static constexpr ID MID = 10;
-  static constexpr ID ZDC = 11;
-  static constexpr ID FT0 = 12;
-  static constexpr ID FV0 = 13;
-  static constexpr ID FDD = 14;
-  static constexpr ID TST = 15;
-  static constexpr ID CTP = 16;
-  static constexpr ID FOC = 17;
+  static GPUglobalconstexpr() ID ITS = 0;
+  static GPUglobalconstexpr() ID TPC = 1;
+  static GPUglobalconstexpr() ID TRD = 2;
+  static GPUglobalconstexpr() ID TOF = 3;
+  static GPUglobalconstexpr() ID PHS = 4;
+  static GPUglobalconstexpr() ID CPV = 5;
+  static GPUglobalconstexpr() ID EMC = 6;
+  static GPUglobalconstexpr() ID HMP = 7;
+  static GPUglobalconstexpr() ID MFT = 8;
+  static GPUglobalconstexpr() ID MCH = 9;
+  static GPUglobalconstexpr() ID MID = 10;
+  static GPUglobalconstexpr() ID ZDC = 11;
+  static GPUglobalconstexpr() ID FT0 = 12;
+  static GPUglobalconstexpr() ID FV0 = 13;
+  static GPUglobalconstexpr() ID FDD = 14;
+  static GPUglobalconstexpr() ID TST = 15;
+  static GPUglobalconstexpr() ID CTP = 16;
+  static GPUglobalconstexpr() ID FOC = 17;
 #ifdef ENABLE_UPGRADES
-  static constexpr ID IT3 = 18;
-  static constexpr ID TRK = 19;
-  static constexpr ID FT3 = 20;
-  static constexpr ID FCT = 21;
-  static constexpr ID TF3 = 22;
-  static constexpr ID RCH = 23;
-  static constexpr ID MI3 = 24;
-  static constexpr ID ECL = 25;
-  static constexpr ID FD3 = 26;
-  static constexpr ID Last = FD3;
+  static GPUglobalconstexpr() ID IT3 = 18;
+  static GPUglobalconstexpr() ID TRK = 19;
+  static GPUglobalconstexpr() ID FT3 = 20;
+  static GPUglobalconstexpr() ID FCT = 21;
+  static GPUglobalconstexpr() ID TF3 = 22;
+  static GPUglobalconstexpr() ID RCH = 23;
+  static GPUglobalconstexpr() ID MI3 = 24;
+  static GPUglobalconstexpr() ID ECL = 25;
+  static GPUglobalconstexpr() ID FD3 = 26;
+  static GPUglobalconstexpr() ID Last = FD3;
 #else
   static constexpr ID Last = FOC; ///< if extra detectors added, update this !!!
 #endif
-  static constexpr ID First = ITS;
+  static GPUglobalconstexpr() ID First = ITS;
 
-  static constexpr int nDetectors = Last + 1; ///< number of defined detectors
+  static GPUglobalconstexpr() int nDetectors = Last + 1; ///< number of defined detectors
   typedef o2::gpu::gpustd::bitset<32> mask_t;
   static_assert(nDetectors <= 32, "bitset<32> insufficient");
 
-  static constexpr mask_t FullMask = (0x1u << nDetectors) - 1;
+  static GPUglobalconstexpr() mask_t FullMask = (0x1u << nDetectors) - 1;
 
 #ifndef GPUCA_GPUCODE_DEVICE
   static constexpr std::string_view NONE{"none"}; ///< keywork for no-detector

DataFormats/Detectors/TPC/include/DataFormatsTPC/CalibdEdxCorrection.h

@@ -39,8 +39,8 @@ GPUconstexpr() float TglScale[4] = {1.9, 1.5, 1.22, 1.02}; ///< Max Tgl values f
 class CalibdEdxCorrection
 {
  public:
-  static constexpr int FitSize = 288; ///< Number of fitted corrections
-  static constexpr int ParamSize = 8; ///< Number of params per fit
+  static GPUglobalconstexpr() int FitSize = 288; ///< Number of fitted corrections
+  static GPUglobalconstexpr() int ParamSize = 8; ///< Number of params per fit
 
 #if !defined(GPUCA_GPUCODE)
   CalibdEdxCorrection()

DataFormats/Detectors/TPC/include/DataFormatsTPC/ClusterNative.h

@@ -59,13 +59,13 @@ struct ClusterNative {
                       flagEdge = 0x4,      // At edge of TPC sector
                       flagSingle = 0x8 };  // Single pad or single time-bin cluster
 
-  static constexpr int scaleTimePacked = 64;      //< ~50 is needed for 0.1mm precision, but leads to float rounding artifacts around 20ms
-  static constexpr int scalePadPacked = 64;       //< ~60 is needed for 0.1mm precision, but power of two avoids rounding
-  static constexpr int scaleSigmaTimePacked = 32; // 1/32nd of pad/timebin precision for cluster size
-  static constexpr int scaleSigmaPadPacked = 32;
-  static constexpr int scaleSaturatedQtot = 8;
-  static constexpr int maxRegularQtot = 25 * 1024;
-  static constexpr int maxSaturatedQtot = (USHRT_MAX - maxRegularQtot) * scaleSaturatedQtot;
+  static GPUglobalconstexpr() int scaleTimePacked = 64;      //< ~50 is needed for 0.1mm precision, but leads to float rounding artifacts around 20ms
+  static GPUglobalconstexpr() int scalePadPacked = 64;       //< ~60 is needed for 0.1mm precision, but power of two avoids rounding
+  static GPUglobalconstexpr() int scaleSigmaTimePacked = 32; // 1/32nd of pad/timebin precision for cluster size
+  static GPUglobalconstexpr() int scaleSigmaPadPacked = 32;
+  static GPUglobalconstexpr() int scaleSaturatedQtot = 8;
+  static GPUglobalconstexpr() int maxRegularQtot = 25 * 1024;
+  static GPUglobalconstexpr() int maxSaturatedQtot = (USHRT_MAX - maxRegularQtot) * scaleSaturatedQtot;
 
   uint32_t timeFlagsPacked; //< Contains the time in the lower 24 bits in a packed format, contains the flags in the
                             // upper 8 bits

DataFormats/Detectors/TPC/include/DataFormatsTPC/Defs.h

@@ -19,6 +19,8 @@
 #ifndef AliceO2_TPC_Defs_H
 #define AliceO2_TPC_Defs_H
 
+#include "GPUCommonDef.h"
+
 #ifndef GPUCA_GPUCODE_DEVICE
 #include <cmath>
 #endif
@@ -37,8 +39,8 @@ enum Side { A = 0,
             UNDEFINED = 2 };
 //   enum class Side {A=0, C=1};
 //  Problem with root cint. does not seem to support enum class ...
-constexpr unsigned char SECTORSPERSIDE = 18;
-constexpr unsigned char SIDES = 2;
+GPUglobalconstexpr() unsigned char SECTORSPERSIDE = 18;
+GPUglobalconstexpr() unsigned char SIDES = 2;
 
 constexpr double PI = 3.14159265358979323846;
 constexpr double TWOPI = 2. * PI;
@@ -54,10 +56,10 @@ enum GEMstack { IROCgem = 0,
                 OROC1gem = 1,
                 OROC2gem = 2,
                 OROC3gem = 3 };
-constexpr unsigned short GEMSTACKSPERSECTOR = 4;
-constexpr unsigned short GEMSPERSTACK = 4;
-constexpr unsigned short GEMSTACKSPERSIDE = GEMSTACKSPERSECTOR * SECTORSPERSIDE;
-constexpr unsigned short GEMSTACKS = GEMSTACKSPERSECTOR * SECTORSPERSIDE * SIDES;
+GPUglobalconstexpr() unsigned short GEMSTACKSPERSECTOR = 4;
+GPUglobalconstexpr() unsigned short GEMSPERSTACK = 4;
+GPUglobalconstexpr() unsigned short GEMSTACKSPERSIDE = GEMSTACKSPERSECTOR * SECTORSPERSIDE;
+GPUglobalconstexpr() unsigned short GEMSTACKS = GEMSTACKSPERSECTOR * SECTORSPERSIDE * SIDES;
 
 /// Definition of the different pad subsets
 enum class PadSubset : char {
@@ -71,7 +73,7 @@ enum ChargeType {
   Max = 0,
   Tot = 1
 };
-constexpr unsigned short CHARGETYPES = 2;
+GPUglobalconstexpr() unsigned short CHARGETYPES = 2;
 
 /// GEM stack identification
 struct StackID {

DataFormats/Detectors/TPC/include/DataFormatsTPC/ZeroSuppression.h

@@ -35,12 +35,12 @@ enum ZSVersion : unsigned char {
 };
 
 struct TPCZSHDR {
-  static constexpr size_t TPC_ZS_PAGE_SIZE = 8192;
-  static constexpr size_t TPC_MAX_SEQ_LEN = 138;
-  static constexpr size_t TPC_MAX_ZS_ROW_IN_ENDPOINT = 9;
-  static constexpr unsigned int MAX_DIGITS_IN_PAGE = (TPC_ZS_PAGE_SIZE - 64 - 6 - 4 - 3) * 8 / 10;
-  static constexpr unsigned int TPC_ZS_NBITS_V1 = 10;
-  static constexpr unsigned int TPC_ZS_NBITS_V2 = 12;
+  static GPUglobalconstexpr() size_t TPC_ZS_PAGE_SIZE = 8192;
+  static GPUglobalconstexpr() size_t TPC_MAX_SEQ_LEN = 138;
+  static GPUglobalconstexpr() size_t TPC_MAX_ZS_ROW_IN_ENDPOINT = 9;
+  static GPUglobalconstexpr() unsigned int MAX_DIGITS_IN_PAGE = (TPC_ZS_PAGE_SIZE - 64 - 6 - 4 - 3) * 8 / 10;
+  static GPUglobalconstexpr() unsigned int TPC_ZS_NBITS_V1 = 10;
+  static GPUglobalconstexpr() unsigned int TPC_ZS_NBITS_V2 = 12;
 
   unsigned char version;      // ZS format version:
                               // 1: original row-based format with 10-bit ADC values
@@ -53,10 +53,10 @@ struct TPCZSHDR {
   unsigned short nADCsamples; // Total number of ADC samples in this raw page
 };
 struct TPCZSHDRV2 : public TPCZSHDR {
-  static constexpr unsigned int TPC_ZS_NBITS_V34 = 12;
-  static constexpr bool TIGHTLY_PACKED_V3 = false;
-  static constexpr unsigned int SAMPLESPER64BIT = 64 / TPC_ZS_NBITS_V34; // 5 12-bit samples with 4 bit padding per 64 bit word for non-TIGHTLY_PACKED data
-  static constexpr unsigned int TRIGGER_WORD_SIZE = 16;                  // trigger word size in bytes
+  static GPUglobalconstexpr() unsigned int TPC_ZS_NBITS_V34 = 12;
+  static GPUglobalconstexpr() bool TIGHTLY_PACKED_V3 = false;
+  static GPUglobalconstexpr() unsigned int SAMPLESPER64BIT = 64 / TPC_ZS_NBITS_V34; // 5 12-bit samples with 4 bit padding per 64 bit word for non-TIGHTLY_PACKED data
+  static GPUglobalconstexpr() unsigned int TRIGGER_WORD_SIZE = 16;                  // trigger word size in bytes
   enum ZSFlags : unsigned char {
     TriggerWordPresent = 1,
     nTimeBinSpanBit8 = 2,
@@ -89,7 +89,7 @@ struct ZeroSuppressedContainer { // Struct for the TPC zero suppressed data form
 ///
 /// Trigger word is always 128bit and occurs always in the last page of a HBF before the meta header
 struct TriggerWordDLBZS {
-  static constexpr uint16_t MaxTriggerEntries = 8; ///< Maximum number of trigger information
+  static GPUglobalconstexpr() uint16_t MaxTriggerEntries = 8; ///< Maximum number of trigger information
 
   /// trigger types as in the ttype bits
   enum TriggerType : uint8_t {

DataFormats/Detectors/TPC/include/DataFormatsTPC/ZeroSuppressionLinkBased.h

@@ -30,16 +30,16 @@ namespace tpc
 namespace zerosupp_link_based
 {
 
-static constexpr uint32_t DataWordSizeBits = 128;                   ///< size of header word and data words in bits
-static constexpr uint32_t DataWordSizeBytes = DataWordSizeBits / 8; ///< size of header word and data words in bytes
-static constexpr uint32_t ChannelPerTBHeader = 80;
+static GPUglobalconstexpr() uint32_t DataWordSizeBits = 128;                   ///< size of header word and data words in bits
+static GPUglobalconstexpr() uint32_t DataWordSizeBytes = DataWordSizeBits / 8; ///< size of header word and data words in bytes
+static GPUglobalconstexpr() uint32_t ChannelPerTBHeader = 80;
 
 /// common header definition of the zero suppressed link based data
 struct CommonHeader {
-  static constexpr uint32_t MagicWordLinkZS = 0xFC;
-  static constexpr uint32_t MagicWordLinkZSMetaHeader = 0xFD;
-  static constexpr uint32_t MagicWordTrigger = 0xAA;
-  static constexpr uint32_t MagicWordTriggerV2 = 0xAB;
+  static GPUglobalconstexpr() uint32_t MagicWordLinkZS = 0xFC;
+  static GPUglobalconstexpr() uint32_t MagicWordLinkZSMetaHeader = 0xFD;
+  static GPUglobalconstexpr() uint32_t MagicWordTrigger = 0xAA;
+  static GPUglobalconstexpr() uint32_t MagicWordTriggerV2 = 0xAB;
 
   union {
     uint64_t word0 = 0;             ///< lower 64 bits