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Description
Hi,
In our project we're using an i.MX RT1061 and a W25Q128JVSIQ flash (which has the QE-bit [quad enable] locked to 1). However, we're looking at being able to support W25Q128JVSIM which has the QE-bit set to 0 by default, and supports changing it to 1.
When testing with the W25Q128JVSIM flash chip the BootROM on the MCU doesn't boot wolfBoot (which it does fine on the W25Q128JVSIQ). After investigating I found it to be due to the read entry in the LUT that's hardcoded into the FCB being a QSPI read:
const flexspi_nor_config_t FLASH_CONFIG_SECTION qspiflash_config = {
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = CONFIG_SERIAL_CLK_FREQ,
.sflashA1Size = CONFIG_FLASH_SIZE,
.lookupTable = {
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
},
},
.pageSize = CONFIG_FLASH_PAGE_SIZE,
.sectorSize = CONFIG_FLASH_SECTOR_SIZE,
.blockSize = CONFIG_FLASH_BLOCK_SIZE,
.isUniformBlockSize = CONFIG_FLASH_UNIFORM_BLOCKSIZE,
};
If I change the read command to be a non-quad read command it works (and the BootROM will also enable the QE-bit automagically later on when the g_bootloaderTree->flexSpiNorDriver->get_config function is called, and quad reads are used from that point on).
It seems to be that an assumption has been made that the connected SPI flash already has the QE-bit enabled, which might not always be the case. The way I see it there are two main ways of fixing it:
- Have a config option that allows the user to pick which LUT entry to have for reads (the default could be QSPI to avoid it potentially creating issue for people updating their wolfBoot version and suddenly having the LUT containt a single read)
- Switch to always having a single read command in the LUT (should always work, but someone might want to stay with having a QSPI read)
I'm happy to supply the PR to address this, but I thought it best to first agree on which solution you'd accept before I spend time on implementing and testing it :)
Thanks,
Daniel