diff --git a/CI/build/conf/cores_config.json b/CI/build/conf/cores_config.json index 2894a094f9..54c13687b6 100644 --- a/CI/build/conf/cores_config.json +++ b/CI/build/conf/cores_config.json @@ -48,6 +48,9 @@ "GENERIC_C031C4UX", "GENERIC_C031C6TX", "GENERIC_C031F4PX", + "GENERIC_C051C6TX", + "GENERIC_C051C6UX", + "GENERIC_C051C8TX", "GENERIC_C071G8UX", "GENERIC_C071R8TX", "GENERIC_C092CBTX", @@ -569,14 +572,24 @@ "GENERIC_G4A1RETX", "GENERIC_H503CBTX", "GENERIC_H562RGTX", + "GENERIC_H562RGVX", "GENERIC_H563IIKXQ", "GENERIC_H563RGTX", + "GENERIC_H563RGVX", "GENERIC_H563RITX", + "GENERIC_H563RIVX", "GENERIC_H563ZGTX", "GENERIC_H563ZITX", + "GENERIC_H723VEHX", + "GENERIC_H723VETX", + "GENERIC_H723VGHX", + "GENERIC_H723VGTX", "GENERIC_H723ZETX", "GENERIC_H723ZGTX", + "GENERIC_H730VBHX", + "GENERIC_H730VBTX", "GENERIC_H730ZBTX", + "GENERIC_H733VGHX", "GENERIC_H742IGKX", "GENERIC_H742IGTX", "GENERIC_H742IIKX", @@ -603,6 +616,8 @@ "GENERIC_H743ZITX", "GENERIC_H745XGHX", "GENERIC_H745XIHX", + "GENERIC_H745ZGTX", + "GENERIC_H745ZITX", "GENERIC_H747AGIX", "GENERIC_H747AIIX", "GENERIC_H747IGTX", diff --git a/CI/build/conf/cores_config_ci.json b/CI/build/conf/cores_config_ci.json index 02d9a341d4..f0524b49bf 100644 --- a/CI/build/conf/cores_config_ci.json +++ b/CI/build/conf/cores_config_ci.json @@ -48,6 +48,9 @@ "GENERIC_C031C4UX", "GENERIC_C031C6TX", "GENERIC_C031F4PX", + "GENERIC_C051C6TX", + "GENERIC_C051C6UX", + "GENERIC_C051C8TX", "GENERIC_C071G8UX", "GENERIC_C071R8TX", "GENERIC_C092CBTX", @@ -569,14 +572,24 @@ "GENERIC_G4A1RETX", "GENERIC_H503CBTX", "GENERIC_H562RGTX", + "GENERIC_H562RGVX", "GENERIC_H563IIKXQ", "GENERIC_H563RGTX", + "GENERIC_H563RGVX", "GENERIC_H563RITX", + "GENERIC_H563RIVX", "GENERIC_H563ZGTX", "GENERIC_H563ZITX", + "GENERIC_H723VEHX", + "GENERIC_H723VETX", + "GENERIC_H723VGHX", + "GENERIC_H723VGTX", "GENERIC_H723ZETX", "GENERIC_H723ZGTX", + "GENERIC_H730VBHX", + "GENERIC_H730VBTX", "GENERIC_H730ZBTX", + "GENERIC_H733VGHX", "GENERIC_H742IGKX", "GENERIC_H742IGTX", "GENERIC_H742IIKX", @@ -603,6 +616,8 @@ "GENERIC_H743ZITX", "GENERIC_H745XGHX", "GENERIC_H745XIHX", + "GENERIC_H745ZGTX", + "GENERIC_H745ZITX", "GENERIC_H747AGIX", "GENERIC_H747AIIX", "GENERIC_H747IGTX", diff --git a/CI/update/stm32variant.py b/CI/update/stm32variant.py index de3f79dd8f..38c937b0d8 100644 --- a/CI/update/stm32variant.py +++ b/CI/update/stm32variant.py @@ -92,6 +92,35 @@ "CAN": ["F0", "F1", "F2", "F3", "F4", "F7", "L4"], "ETH": ["F4", "F7", "H7"], } + +# Flash size encoding in not always present in the mcu file but it is generally +# encoded as a single character (number or letter) which can be mapped to the +# actual flash size in bytes. +flash_size_dict = { + "0": 1024, # 1Kb + "1": 2048, # 2Kb + "2": 4096, # 4Kb + "3": 8192, # 8Kb + "4": 16384, # 16Kb + "5": 24576, # 24Kb + "6": 32768, # 32Kb + "7": 49152, # 48Kb + "8": 65536, # 64Kb + "9": 73728, # 72Kb + "A": 98304, # 96Kb + "B": 131072, # 128Kb + "Z": 196608, # 192Kb + "C": 262144, # 256Kb + "D": 393216, # 384Kb + "E": 524288, # 512Kb + "F": 786432, # 768Kb + "G": 1048576, # 1Mb + "H": 1572864, # 1.5Mb + "I": 2097152, # 2Mb + "K": 3145728, # 3Mb + "J": 4194304, # 4Mb +} + # Cube information product_line_dict = {} svd_dict = {} # 'name':'svd file' @@ -193,8 +222,12 @@ def parse_mcu_file(): ignored_stm32_list.append(mcu_family) xml_mcu.unlink() return False - mcu_refname = mcu_node.attributes["RefName"].value + # Skip STM32H5E/F series + if mcu_refname.startswith("STM32H5E") or mcu_refname.startswith("STM32H5F"): + print(f"Warning: {mcu_refname} series is not supported yet. Skipping.") + xml_mcu.unlink() + return False core_node = mcu_node.getElementsByTagName("Core") for f in core_node: # Strip last non digit characters and extract the number @@ -206,9 +239,24 @@ def parse_mcu_file(): ram_node = mcu_node.getElementsByTagName("Ram") for f in ram_node: mcu_ram.append(int(f.firstChild.nodeValue) * 1024) - flash_node = mcu_node.getElementsByTagName("Flash") - for f in flash_node: - mcu_flash.append(int(f.firstChild.nodeValue) * 1024) + # Test if Flash size is present in the mcu file, if not get it from flash_size array + if not mcu_node.getElementsByTagName("Flash"): + # flash id is the character after the series name and the two next characters + # (e.g. STM32F103xB -> flash id is 'B') + flash_id = mcu_refname[len(mcu_family) + 3] + # flash_id = mcu_refname.split("x")[-1] + if flash_id in flash_size_dict: + mcu_flash.append(flash_size_dict[flash_id]) + else: + print( + f"Warning: Flash size '{flash_id}' not found in dict for MCU {mcu_refname}." + ) + print("Flash size set to 0.") + mcu_flash.append(0) + else: + flash_node = mcu_node.getElementsByTagName("Flash") + for f in flash_node: + mcu_flash.append(int(f.firstChild.nodeValue) * 1024) itemlist = xml_mcu.getElementsByTagName("IP") for s in itemlist: @@ -221,7 +269,10 @@ def parse_mcu_file(): if inst: if "OTG" in inst.group(1): if "FS" in inst.group(1): - usb_inst["otg_fs"] = inst.group(1) + if inst.group(1).endswith("FS1"): + usb_inst["otg_fs"] = inst.group(1)[:-1] + else: + usb_inst["otg_fs"] = inst.group(1) else: if inst.group(1).endswith("HS1"): usb_inst["otg_hs"] = inst.group(1)[:-1] @@ -2793,8 +2844,8 @@ def manage_repo(): # Clean temporary dir deleteFolder(tmp_dir) -pl_regex = re.compile(r"([AQ])$") -package_regex = re.compile(r"[\w][\w]([ANPQSXZ])?$") +pl_regex = re.compile(r"([AGNPQSXZ])$") +package_regex = re.compile(r"[\w][\w]([AGNPQSXZ])?$") flash_group_regex = re.compile(r"(.*)\((.*)\)(.*)") for mcu_file in mcu_list: diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake index 6751d52f7a..4979325abc 100644 --- a/cmake/boards_db.cmake +++ b/cmake/boards_db.cmake @@ -4261,7 +4261,7 @@ target_compile_options(DAISY_PATCH_SM INTERFACE "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${DAISY_PATCH_SM_MCU} ) target_compile_definitions(DAISY_PATCH_SM INTERFACE @@ -4285,7 +4285,7 @@ target_link_options(DAISY_PATCH_SM INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${DAISY_PATCH_SM_MCU} ) @@ -4343,7 +4343,7 @@ target_compile_options(DAISY_PETAL_SM INTERFACE "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${DAISY_PETAL_SM_MCU} ) target_compile_definitions(DAISY_PETAL_SM INTERFACE @@ -4367,7 +4367,7 @@ target_link_options(DAISY_PETAL_SM INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${DAISY_PETAL_SM_MCU} ) @@ -4425,7 +4425,7 @@ target_compile_options(DAISY_SEED INTERFACE "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${DAISY_SEED_MCU} ) target_compile_definitions(DAISY_SEED INTERFACE @@ -4449,7 +4449,7 @@ target_link_options(DAISY_SEED INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${DAISY_SEED_MCU} ) @@ -4925,7 +4925,7 @@ target_compile_options(DevEBoxH743VITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${DevEBoxH743VITX_MCU} ) target_compile_definitions(DevEBoxH743VITX INTERFACE @@ -4949,7 +4949,7 @@ target_link_options(DevEBoxH743VITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${DevEBoxH743VITX_MCU} ) @@ -5007,7 +5007,7 @@ target_compile_options(DevEBoxH750VBTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${DevEBoxH750VBTX_MCU} ) target_compile_definitions(DevEBoxH750VBTX INTERFACE @@ -5031,7 +5031,7 @@ target_link_options(DevEBoxH750VBTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${DevEBoxH750VBTX_MCU} ) @@ -5793,13 +5793,13 @@ set(DISCO_F746NG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F set(DISCO_F746NG_MAXSIZE 1048576) set(DISCO_F746NG_MAXDATASIZE 327680) set(DISCO_F746NG_MCU cortex-m7) -set(DISCO_F746NG_FPCONF "fpv4-sp-d16-hard") +set(DISCO_F746NG_FPCONF "fpv5-sp-d16-hard") add_library(DISCO_F746NG INTERFACE) target_compile_options(DISCO_F746NG INTERFACE "SHELL:-DSTM32F746xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${DISCO_F746NG_MCU} ) target_compile_definitions(DISCO_F746NG INTERFACE @@ -5823,7 +5823,7 @@ target_link_options(DISCO_F746NG INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${DISCO_F746NG_MCU} ) @@ -6399,13 +6399,13 @@ set(ETHERCAT_DUINO_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx set(ETHERCAT_DUINO_MAXSIZE 524288) set(ETHERCAT_DUINO_MAXDATASIZE 327680) set(ETHERCAT_DUINO_MCU cortex-m7) -set(ETHERCAT_DUINO_FPCONF "fpv4-sp-d16-hard") +set(ETHERCAT_DUINO_FPCONF "fpv5-sp-d16-hard") add_library(ETHERCAT_DUINO INTERFACE) target_compile_options(ETHERCAT_DUINO INTERFACE "SHELL:-DSTM32F746xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${ETHERCAT_DUINO_MCU} ) target_compile_definitions(ETHERCAT_DUINO INTERFACE @@ -6429,7 +6429,7 @@ target_link_options(ETHERCAT_DUINO INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${ETHERCAT_DUINO_MCU} ) @@ -50539,7 +50539,7 @@ target_compile_options(GENERIC_F722RCTX INTERFACE "SHELL:-DSTM32F722xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F722RCTX_MCU} ) target_compile_definitions(GENERIC_F722RCTX INTERFACE @@ -50563,7 +50563,7 @@ target_link_options(GENERIC_F722RCTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=262144" "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F722RCTX_MCU} ) @@ -50621,7 +50621,7 @@ target_compile_options(GENERIC_F722RETX INTERFACE "SHELL:-DSTM32F722xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F722RETX_MCU} ) target_compile_definitions(GENERIC_F722RETX INTERFACE @@ -50645,7 +50645,7 @@ target_link_options(GENERIC_F722RETX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F722RETX_MCU} ) @@ -50703,7 +50703,7 @@ target_compile_options(GENERIC_F722ZCTX INTERFACE "SHELL:-DSTM32F722xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F722ZCTX_MCU} ) target_compile_definitions(GENERIC_F722ZCTX INTERFACE @@ -50727,7 +50727,7 @@ target_link_options(GENERIC_F722ZCTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=262144" "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F722ZCTX_MCU} ) @@ -50785,7 +50785,7 @@ target_compile_options(GENERIC_F722ZETX INTERFACE "SHELL:-DSTM32F722xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F722ZETX_MCU} ) target_compile_definitions(GENERIC_F722ZETX INTERFACE @@ -50809,7 +50809,7 @@ target_link_options(GENERIC_F722ZETX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F722ZETX_MCU} ) @@ -50867,7 +50867,7 @@ target_compile_options(GENERIC_F723ICKX INTERFACE "SHELL:-DSTM32F723xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F723ICKX_MCU} ) target_compile_definitions(GENERIC_F723ICKX INTERFACE @@ -50891,7 +50891,7 @@ target_link_options(GENERIC_F723ICKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=262144" "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F723ICKX_MCU} ) @@ -50949,7 +50949,7 @@ target_compile_options(GENERIC_F723ICTX INTERFACE "SHELL:-DSTM32F723xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F723ICTX_MCU} ) target_compile_definitions(GENERIC_F723ICTX INTERFACE @@ -50973,7 +50973,7 @@ target_link_options(GENERIC_F723ICTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=262144" "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F723ICTX_MCU} ) @@ -51031,7 +51031,7 @@ target_compile_options(GENERIC_F723IEKX INTERFACE "SHELL:-DSTM32F723xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F723IEKX_MCU} ) target_compile_definitions(GENERIC_F723IEKX INTERFACE @@ -51055,7 +51055,7 @@ target_link_options(GENERIC_F723IEKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F723IEKX_MCU} ) @@ -51113,7 +51113,7 @@ target_compile_options(GENERIC_F723IETX INTERFACE "SHELL:-DSTM32F723xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F723IETX_MCU} ) target_compile_definitions(GENERIC_F723IETX INTERFACE @@ -51137,7 +51137,7 @@ target_link_options(GENERIC_F723IETX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F723IETX_MCU} ) @@ -51195,7 +51195,7 @@ target_compile_options(GENERIC_F730I8KX INTERFACE "SHELL:-DSTM32F730xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F730I8KX_MCU} ) target_compile_definitions(GENERIC_F730I8KX INTERFACE @@ -51219,7 +51219,7 @@ target_link_options(GENERIC_F730I8KX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=65536" "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F730I8KX_MCU} ) @@ -51277,7 +51277,7 @@ target_compile_options(GENERIC_F730R8TX INTERFACE "SHELL:-DSTM32F730xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F730R8TX_MCU} ) target_compile_definitions(GENERIC_F730R8TX INTERFACE @@ -51301,7 +51301,7 @@ target_link_options(GENERIC_F730R8TX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=65536" "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F730R8TX_MCU} ) @@ -51359,7 +51359,7 @@ target_compile_options(GENERIC_F732RETX INTERFACE "SHELL:-DSTM32F732xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F732RETX_MCU} ) target_compile_definitions(GENERIC_F732RETX INTERFACE @@ -51383,7 +51383,7 @@ target_link_options(GENERIC_F732RETX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F732RETX_MCU} ) @@ -51441,7 +51441,7 @@ target_compile_options(GENERIC_F732ZETX INTERFACE "SHELL:-DSTM32F732xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F732ZETX_MCU} ) target_compile_definitions(GENERIC_F732ZETX INTERFACE @@ -51465,7 +51465,7 @@ target_link_options(GENERIC_F732ZETX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F732ZETX_MCU} ) @@ -51523,7 +51523,7 @@ target_compile_options(GENERIC_F733IEKX INTERFACE "SHELL:-DSTM32F733xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F733IEKX_MCU} ) target_compile_definitions(GENERIC_F733IEKX INTERFACE @@ -51547,7 +51547,7 @@ target_link_options(GENERIC_F733IEKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F733IEKX_MCU} ) @@ -51605,7 +51605,7 @@ target_compile_options(GENERIC_F733IETX INTERFACE "SHELL:-DSTM32F733xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F733IETX_MCU} ) target_compile_definitions(GENERIC_F733IETX INTERFACE @@ -51629,7 +51629,7 @@ target_link_options(GENERIC_F733IETX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F733IETX_MCU} ) @@ -51687,7 +51687,7 @@ target_compile_options(GENERIC_F745ZETX INTERFACE "SHELL:-DSTM32F745xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F745ZETX_MCU} ) target_compile_definitions(GENERIC_F745ZETX INTERFACE @@ -51711,7 +51711,7 @@ target_link_options(GENERIC_F745ZETX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F745ZETX_MCU} ) @@ -51769,7 +51769,7 @@ target_compile_options(GENERIC_F745ZGTX INTERFACE "SHELL:-DSTM32F745xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F745ZGTX_MCU} ) target_compile_definitions(GENERIC_F745ZGTX INTERFACE @@ -51793,7 +51793,7 @@ target_link_options(GENERIC_F745ZGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F745ZGTX_MCU} ) @@ -51851,7 +51851,7 @@ target_compile_options(GENERIC_F746BETX INTERFACE "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746BETX_MCU} ) target_compile_definitions(GENERIC_F746BETX INTERFACE @@ -51875,7 +51875,7 @@ target_link_options(GENERIC_F746BETX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746BETX_MCU} ) @@ -51933,7 +51933,7 @@ target_compile_options(GENERIC_F746BGTX INTERFACE "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746BGTX_MCU} ) target_compile_definitions(GENERIC_F746BGTX INTERFACE @@ -51957,7 +51957,7 @@ target_link_options(GENERIC_F746BGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746BGTX_MCU} ) @@ -52015,7 +52015,7 @@ target_compile_options(GENERIC_F746NEHX INTERFACE "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746NEHX_MCU} ) target_compile_definitions(GENERIC_F746NEHX INTERFACE @@ -52039,7 +52039,7 @@ target_link_options(GENERIC_F746NEHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746NEHX_MCU} ) @@ -52097,7 +52097,7 @@ target_compile_options(GENERIC_F746NGHX INTERFACE "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746NGHX_MCU} ) target_compile_definitions(GENERIC_F746NGHX INTERFACE @@ -52121,7 +52121,7 @@ target_link_options(GENERIC_F746NGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746NGHX_MCU} ) @@ -52179,7 +52179,7 @@ target_compile_options(GENERIC_F746ZETX INTERFACE "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746ZETX_MCU} ) target_compile_definitions(GENERIC_F746ZETX INTERFACE @@ -52203,7 +52203,7 @@ target_link_options(GENERIC_F746ZETX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746ZETX_MCU} ) @@ -52261,7 +52261,7 @@ target_compile_options(GENERIC_F746ZEYX INTERFACE "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746ZEYX_MCU} ) target_compile_definitions(GENERIC_F746ZEYX INTERFACE @@ -52285,7 +52285,7 @@ target_link_options(GENERIC_F746ZEYX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746ZEYX_MCU} ) @@ -52343,7 +52343,7 @@ target_compile_options(GENERIC_F746ZGTX INTERFACE "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746ZGTX_MCU} ) target_compile_definitions(GENERIC_F746ZGTX INTERFACE @@ -52367,7 +52367,7 @@ target_link_options(GENERIC_F746ZGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746ZGTX_MCU} ) @@ -52425,7 +52425,7 @@ target_compile_options(GENERIC_F746ZGYX INTERFACE "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746ZGYX_MCU} ) target_compile_definitions(GENERIC_F746ZGYX INTERFACE @@ -52449,7 +52449,7 @@ target_link_options(GENERIC_F746ZGYX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F746ZGYX_MCU} ) @@ -52507,7 +52507,7 @@ target_compile_options(GENERIC_F750N8HX INTERFACE "SHELL:-DSTM32F750xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F750N8HX_MCU} ) target_compile_definitions(GENERIC_F750N8HX INTERFACE @@ -52531,7 +52531,7 @@ target_link_options(GENERIC_F750N8HX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=65536" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F750N8HX_MCU} ) @@ -52589,7 +52589,7 @@ target_compile_options(GENERIC_F750Z8TX INTERFACE "SHELL:-DSTM32F750xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F750Z8TX_MCU} ) target_compile_definitions(GENERIC_F750Z8TX INTERFACE @@ -52613,7 +52613,7 @@ target_link_options(GENERIC_F750Z8TX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=65536" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F750Z8TX_MCU} ) @@ -52671,7 +52671,7 @@ target_compile_options(GENERIC_F756BGTX INTERFACE "SHELL:-DSTM32F756xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F756BGTX_MCU} ) target_compile_definitions(GENERIC_F756BGTX INTERFACE @@ -52695,7 +52695,7 @@ target_link_options(GENERIC_F756BGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F756BGTX_MCU} ) @@ -52753,7 +52753,7 @@ target_compile_options(GENERIC_F756NGHX INTERFACE "SHELL:-DSTM32F756xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F756NGHX_MCU} ) target_compile_definitions(GENERIC_F756NGHX INTERFACE @@ -52777,7 +52777,7 @@ target_link_options(GENERIC_F756NGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F756NGHX_MCU} ) @@ -52835,7 +52835,7 @@ target_compile_options(GENERIC_F756ZGTX INTERFACE "SHELL:-DSTM32F756xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F756ZGTX_MCU} ) target_compile_definitions(GENERIC_F756ZGTX INTERFACE @@ -52859,7 +52859,7 @@ target_link_options(GENERIC_F756ZGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F756ZGTX_MCU} ) @@ -52917,7 +52917,7 @@ target_compile_options(GENERIC_F756ZGYX INTERFACE "SHELL:-DSTM32F756xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F756ZGYX_MCU} ) target_compile_definitions(GENERIC_F756ZGYX INTERFACE @@ -52941,7 +52941,7 @@ target_link_options(GENERIC_F756ZGYX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F756ZGYX_MCU} ) @@ -52999,7 +52999,7 @@ target_compile_options(GENERIC_F765IGKX INTERFACE "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765IGKX_MCU} ) target_compile_definitions(GENERIC_F765IGKX INTERFACE @@ -53023,7 +53023,7 @@ target_link_options(GENERIC_F765IGKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765IGKX_MCU} ) @@ -53081,7 +53081,7 @@ target_compile_options(GENERIC_F765IGTX INTERFACE "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765IGTX_MCU} ) target_compile_definitions(GENERIC_F765IGTX INTERFACE @@ -53105,7 +53105,7 @@ target_link_options(GENERIC_F765IGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765IGTX_MCU} ) @@ -53163,7 +53163,7 @@ target_compile_options(GENERIC_F765IIKX INTERFACE "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765IIKX_MCU} ) target_compile_definitions(GENERIC_F765IIKX INTERFACE @@ -53187,7 +53187,7 @@ target_link_options(GENERIC_F765IIKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765IIKX_MCU} ) @@ -53245,7 +53245,7 @@ target_compile_options(GENERIC_F765IITX INTERFACE "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765IITX_MCU} ) target_compile_definitions(GENERIC_F765IITX INTERFACE @@ -53269,7 +53269,7 @@ target_link_options(GENERIC_F765IITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765IITX_MCU} ) @@ -53327,7 +53327,7 @@ target_compile_options(GENERIC_F765VGHX INTERFACE "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765VGHX_MCU} ) target_compile_definitions(GENERIC_F765VGHX INTERFACE @@ -53351,7 +53351,7 @@ target_link_options(GENERIC_F765VGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765VGHX_MCU} ) @@ -53409,7 +53409,7 @@ target_compile_options(GENERIC_F765VGTX INTERFACE "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765VGTX_MCU} ) target_compile_definitions(GENERIC_F765VGTX INTERFACE @@ -53433,7 +53433,7 @@ target_link_options(GENERIC_F765VGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765VGTX_MCU} ) @@ -53491,7 +53491,7 @@ target_compile_options(GENERIC_F765VIHX INTERFACE "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765VIHX_MCU} ) target_compile_definitions(GENERIC_F765VIHX INTERFACE @@ -53515,7 +53515,7 @@ target_link_options(GENERIC_F765VIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765VIHX_MCU} ) @@ -53573,7 +53573,7 @@ target_compile_options(GENERIC_F765VITX INTERFACE "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765VITX_MCU} ) target_compile_definitions(GENERIC_F765VITX INTERFACE @@ -53597,7 +53597,7 @@ target_link_options(GENERIC_F765VITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765VITX_MCU} ) @@ -53655,7 +53655,7 @@ target_compile_options(GENERIC_F765ZGTX INTERFACE "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765ZGTX_MCU} ) target_compile_definitions(GENERIC_F765ZGTX INTERFACE @@ -53679,7 +53679,7 @@ target_link_options(GENERIC_F765ZGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765ZGTX_MCU} ) @@ -53737,7 +53737,7 @@ target_compile_options(GENERIC_F765ZITX INTERFACE "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765ZITX_MCU} ) target_compile_definitions(GENERIC_F765ZITX INTERFACE @@ -53761,7 +53761,7 @@ target_link_options(GENERIC_F765ZITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F765ZITX_MCU} ) @@ -53819,7 +53819,7 @@ target_compile_options(GENERIC_F767IGKX INTERFACE "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767IGKX_MCU} ) target_compile_definitions(GENERIC_F767IGKX INTERFACE @@ -53843,7 +53843,7 @@ target_link_options(GENERIC_F767IGKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767IGKX_MCU} ) @@ -53901,7 +53901,7 @@ target_compile_options(GENERIC_F767IGTX INTERFACE "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767IGTX_MCU} ) target_compile_definitions(GENERIC_F767IGTX INTERFACE @@ -53925,7 +53925,7 @@ target_link_options(GENERIC_F767IGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767IGTX_MCU} ) @@ -53983,7 +53983,7 @@ target_compile_options(GENERIC_F767IIKX INTERFACE "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767IIKX_MCU} ) target_compile_definitions(GENERIC_F767IIKX INTERFACE @@ -54007,7 +54007,7 @@ target_link_options(GENERIC_F767IIKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767IIKX_MCU} ) @@ -54065,7 +54065,7 @@ target_compile_options(GENERIC_F767IITX INTERFACE "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767IITX_MCU} ) target_compile_definitions(GENERIC_F767IITX INTERFACE @@ -54089,7 +54089,7 @@ target_link_options(GENERIC_F767IITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767IITX_MCU} ) @@ -54147,7 +54147,7 @@ target_compile_options(GENERIC_F767VGHX INTERFACE "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767VGHX_MCU} ) target_compile_definitions(GENERIC_F767VGHX INTERFACE @@ -54171,7 +54171,7 @@ target_link_options(GENERIC_F767VGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767VGHX_MCU} ) @@ -54229,7 +54229,7 @@ target_compile_options(GENERIC_F767VGTX INTERFACE "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767VGTX_MCU} ) target_compile_definitions(GENERIC_F767VGTX INTERFACE @@ -54253,7 +54253,7 @@ target_link_options(GENERIC_F767VGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767VGTX_MCU} ) @@ -54311,7 +54311,7 @@ target_compile_options(GENERIC_F767VIHX INTERFACE "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767VIHX_MCU} ) target_compile_definitions(GENERIC_F767VIHX INTERFACE @@ -54335,7 +54335,7 @@ target_link_options(GENERIC_F767VIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767VIHX_MCU} ) @@ -54393,7 +54393,7 @@ target_compile_options(GENERIC_F767VITX INTERFACE "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767VITX_MCU} ) target_compile_definitions(GENERIC_F767VITX INTERFACE @@ -54417,7 +54417,7 @@ target_link_options(GENERIC_F767VITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767VITX_MCU} ) @@ -54475,7 +54475,7 @@ target_compile_options(GENERIC_F767ZGTX INTERFACE "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767ZGTX_MCU} ) target_compile_definitions(GENERIC_F767ZGTX INTERFACE @@ -54499,7 +54499,7 @@ target_link_options(GENERIC_F767ZGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767ZGTX_MCU} ) @@ -54557,7 +54557,7 @@ target_compile_options(GENERIC_F767ZITX INTERFACE "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767ZITX_MCU} ) target_compile_definitions(GENERIC_F767ZITX INTERFACE @@ -54581,7 +54581,7 @@ target_link_options(GENERIC_F767ZITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F767ZITX_MCU} ) @@ -54639,7 +54639,7 @@ target_compile_options(GENERIC_F777IIKX INTERFACE "SHELL:-DSTM32F777xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F777IIKX_MCU} ) target_compile_definitions(GENERIC_F777IIKX INTERFACE @@ -54663,7 +54663,7 @@ target_link_options(GENERIC_F777IIKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F777IIKX_MCU} ) @@ -54721,7 +54721,7 @@ target_compile_options(GENERIC_F777IITX INTERFACE "SHELL:-DSTM32F777xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F777IITX_MCU} ) target_compile_definitions(GENERIC_F777IITX INTERFACE @@ -54745,7 +54745,7 @@ target_link_options(GENERIC_F777IITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F777IITX_MCU} ) @@ -54803,7 +54803,7 @@ target_compile_options(GENERIC_F777VIHX INTERFACE "SHELL:-DSTM32F777xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F777VIHX_MCU} ) target_compile_definitions(GENERIC_F777VIHX INTERFACE @@ -54827,7 +54827,7 @@ target_link_options(GENERIC_F777VIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F777VIHX_MCU} ) @@ -54885,7 +54885,7 @@ target_compile_options(GENERIC_F777VITX INTERFACE "SHELL:-DSTM32F777xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F777VITX_MCU} ) target_compile_definitions(GENERIC_F777VITX INTERFACE @@ -54909,7 +54909,7 @@ target_link_options(GENERIC_F777VITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F777VITX_MCU} ) @@ -54967,7 +54967,7 @@ target_compile_options(GENERIC_F777ZITX INTERFACE "SHELL:-DSTM32F777xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F777ZITX_MCU} ) target_compile_definitions(GENERIC_F777ZITX INTERFACE @@ -54991,7 +54991,7 @@ target_link_options(GENERIC_F777ZITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_F777ZITX_MCU} ) @@ -77250,6 +77250,88 @@ target_compile_options(GENERIC_H562RGTX_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_H562RGVX +# ----------------------------------------------------------------------------- + +set(GENERIC_H562RGVX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H5xx/H562R(G-I)V") +set(GENERIC_H562RGVX_MAXSIZE 1048576) +set(GENERIC_H562RGVX_MAXDATASIZE 655360) +set(GENERIC_H562RGVX_MCU cortex-m33) +set(GENERIC_H562RGVX_FPCONF "-") +add_library(GENERIC_H562RGVX INTERFACE) +target_compile_options(GENERIC_H562RGVX INTERFACE + "SHELL:-DSTM32H562xx" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H562RGVX_MCU} +) +target_compile_definitions(GENERIC_H562RGVX INTERFACE + "STM32H5xx" + "ARDUINO_GENERIC_H562RGVX" + "BOARD_NAME=\"GENERIC_H562RGVX\"" + "BOARD_ID=GENERIC_H562RGVX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H562RGVX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Source/Templates/gcc/ + ${GENERIC_H562RGVX_VARIANT_PATH} +) + +target_link_options(GENERIC_H562RGVX INTERFACE + "LINKER:--default-script=${GENERIC_H562RGVX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H562RGVX_MCU} +) + +add_library(GENERIC_H562RGVX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H562RGVX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H562RGVX_serial_generic INTERFACE) +target_compile_options(GENERIC_H562RGVX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H562RGVX_serial_none INTERFACE) +target_compile_options(GENERIC_H562RGVX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H562RGVX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H562RGVX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H562RGVX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H562RGVX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H562RGVX_usb_HID INTERFACE) +target_compile_options(GENERIC_H562RGVX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H562RGVX_usb_none INTERFACE) +target_compile_options(GENERIC_H562RGVX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H562RGVX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H562RGVX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H562RGVX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H562RGVX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H562RGVX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H562RGVX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_H562RITX # ----------------------------------------------------------------------------- @@ -77332,6 +77414,88 @@ target_compile_options(GENERIC_H562RITX_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_H562RIVX +# ----------------------------------------------------------------------------- + +set(GENERIC_H562RIVX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H5xx/H562R(G-I)V") +set(GENERIC_H562RIVX_MAXSIZE 2097152) +set(GENERIC_H562RIVX_MAXDATASIZE 655360) +set(GENERIC_H562RIVX_MCU cortex-m33) +set(GENERIC_H562RIVX_FPCONF "-") +add_library(GENERIC_H562RIVX INTERFACE) +target_compile_options(GENERIC_H562RIVX INTERFACE + "SHELL:-DSTM32H562xx" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H562RIVX_MCU} +) +target_compile_definitions(GENERIC_H562RIVX INTERFACE + "STM32H5xx" + "ARDUINO_GENERIC_H562RIVX" + "BOARD_NAME=\"GENERIC_H562RIVX\"" + "BOARD_ID=GENERIC_H562RIVX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H562RIVX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Source/Templates/gcc/ + ${GENERIC_H562RIVX_VARIANT_PATH} +) + +target_link_options(GENERIC_H562RIVX INTERFACE + "LINKER:--default-script=${GENERIC_H562RIVX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H562RIVX_MCU} +) + +add_library(GENERIC_H562RIVX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H562RIVX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H562RIVX_serial_generic INTERFACE) +target_compile_options(GENERIC_H562RIVX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H562RIVX_serial_none INTERFACE) +target_compile_options(GENERIC_H562RIVX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H562RIVX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H562RIVX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H562RIVX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H562RIVX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H562RIVX_usb_HID INTERFACE) +target_compile_options(GENERIC_H562RIVX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H562RIVX_usb_none INTERFACE) +target_compile_options(GENERIC_H562RIVX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H562RIVX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H562RIVX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H562RIVX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H562RIVX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H562RIVX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H562RIVX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_H563IIKXQ # ----------------------------------------------------------------------------- @@ -77496,6 +77660,88 @@ target_compile_options(GENERIC_H563RGTX_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_H563RGVX +# ----------------------------------------------------------------------------- + +set(GENERIC_H563RGVX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H5xx/H563R(G-I)V_H573RIV") +set(GENERIC_H563RGVX_MAXSIZE 1048576) +set(GENERIC_H563RGVX_MAXDATASIZE 655360) +set(GENERIC_H563RGVX_MCU cortex-m33) +set(GENERIC_H563RGVX_FPCONF "-") +add_library(GENERIC_H563RGVX INTERFACE) +target_compile_options(GENERIC_H563RGVX INTERFACE + "SHELL:-DSTM32H563xx" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H563RGVX_MCU} +) +target_compile_definitions(GENERIC_H563RGVX INTERFACE + "STM32H5xx" + "ARDUINO_GENERIC_H563RGVX" + "BOARD_NAME=\"GENERIC_H563RGVX\"" + "BOARD_ID=GENERIC_H563RGVX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H563RGVX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Source/Templates/gcc/ + ${GENERIC_H563RGVX_VARIANT_PATH} +) + +target_link_options(GENERIC_H563RGVX INTERFACE + "LINKER:--default-script=${GENERIC_H563RGVX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H563RGVX_MCU} +) + +add_library(GENERIC_H563RGVX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H563RGVX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H563RGVX_serial_generic INTERFACE) +target_compile_options(GENERIC_H563RGVX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H563RGVX_serial_none INTERFACE) +target_compile_options(GENERIC_H563RGVX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H563RGVX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H563RGVX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H563RGVX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H563RGVX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H563RGVX_usb_HID INTERFACE) +target_compile_options(GENERIC_H563RGVX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H563RGVX_usb_none INTERFACE) +target_compile_options(GENERIC_H563RGVX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H563RGVX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H563RGVX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H563RGVX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H563RGVX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H563RGVX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H563RGVX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_H563RITX # ----------------------------------------------------------------------------- @@ -77578,6 +77824,88 @@ target_compile_options(GENERIC_H563RITX_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_H563RIVX +# ----------------------------------------------------------------------------- + +set(GENERIC_H563RIVX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H5xx/H563R(G-I)V_H573RIV") +set(GENERIC_H563RIVX_MAXSIZE 2097152) +set(GENERIC_H563RIVX_MAXDATASIZE 655360) +set(GENERIC_H563RIVX_MCU cortex-m33) +set(GENERIC_H563RIVX_FPCONF "-") +add_library(GENERIC_H563RIVX INTERFACE) +target_compile_options(GENERIC_H563RIVX INTERFACE + "SHELL:-DSTM32H563xx" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H563RIVX_MCU} +) +target_compile_definitions(GENERIC_H563RIVX INTERFACE + "STM32H5xx" + "ARDUINO_GENERIC_H563RIVX" + "BOARD_NAME=\"GENERIC_H563RIVX\"" + "BOARD_ID=GENERIC_H563RIVX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H563RIVX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Source/Templates/gcc/ + ${GENERIC_H563RIVX_VARIANT_PATH} +) + +target_link_options(GENERIC_H563RIVX INTERFACE + "LINKER:--default-script=${GENERIC_H563RIVX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H563RIVX_MCU} +) + +add_library(GENERIC_H563RIVX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H563RIVX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H563RIVX_serial_generic INTERFACE) +target_compile_options(GENERIC_H563RIVX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H563RIVX_serial_none INTERFACE) +target_compile_options(GENERIC_H563RIVX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H563RIVX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H563RIVX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H563RIVX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H563RIVX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H563RIVX_usb_HID INTERFACE) +target_compile_options(GENERIC_H563RIVX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H563RIVX_usb_none INTERFACE) +target_compile_options(GENERIC_H563RIVX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H563RIVX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H563RIVX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H563RIVX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H563RIVX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H563RIVX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H563RIVX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_H563ZGTX # ----------------------------------------------------------------------------- @@ -77906,6 +78234,88 @@ target_compile_options(GENERIC_H573RITX_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_H573RIVX +# ----------------------------------------------------------------------------- + +set(GENERIC_H573RIVX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H5xx/H563R(G-I)V_H573RIV") +set(GENERIC_H573RIVX_MAXSIZE 2097152) +set(GENERIC_H573RIVX_MAXDATASIZE 655360) +set(GENERIC_H573RIVX_MCU cortex-m33) +set(GENERIC_H573RIVX_FPCONF "-") +add_library(GENERIC_H573RIVX INTERFACE) +target_compile_options(GENERIC_H573RIVX INTERFACE + "SHELL:-DSTM32H573xx" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H573RIVX_MCU} +) +target_compile_definitions(GENERIC_H573RIVX INTERFACE + "STM32H5xx" + "ARDUINO_GENERIC_H573RIVX" + "BOARD_NAME=\"GENERIC_H573RIVX\"" + "BOARD_ID=GENERIC_H573RIVX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H573RIVX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Source/Templates/gcc/ + ${GENERIC_H573RIVX_VARIANT_PATH} +) + +target_link_options(GENERIC_H573RIVX INTERFACE + "LINKER:--default-script=${GENERIC_H573RIVX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H573RIVX_MCU} +) + +add_library(GENERIC_H573RIVX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H573RIVX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H573RIVX_serial_generic INTERFACE) +target_compile_options(GENERIC_H573RIVX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H573RIVX_serial_none INTERFACE) +target_compile_options(GENERIC_H573RIVX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H573RIVX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H573RIVX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H573RIVX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H573RIVX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H573RIVX_usb_HID INTERFACE) +target_compile_options(GENERIC_H573RIVX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H573RIVX_usb_none INTERFACE) +target_compile_options(GENERIC_H573RIVX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H573RIVX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H573RIVX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H573RIVX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H573RIVX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H573RIVX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H573RIVX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_H573ZITX # ----------------------------------------------------------------------------- @@ -78001,7 +78411,7 @@ target_compile_options(GENERIC_H723VEHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H723xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H723VEHX_MCU} ) target_compile_definitions(GENERIC_H723VEHX INTERFACE @@ -78025,7 +78435,7 @@ target_link_options(GENERIC_H723VEHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=528384" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H723VEHX_MCU} ) @@ -78083,7 +78493,7 @@ target_compile_options(GENERIC_H723VETX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H723xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H723VETX_MCU} ) target_compile_definitions(GENERIC_H723VETX INTERFACE @@ -78107,7 +78517,7 @@ target_link_options(GENERIC_H723VETX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=528384" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H723VETX_MCU} ) @@ -78165,7 +78575,7 @@ target_compile_options(GENERIC_H723VGHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H723xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H723VGHX_MCU} ) target_compile_definitions(GENERIC_H723VGHX INTERFACE @@ -78189,7 +78599,7 @@ target_link_options(GENERIC_H723VGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=528384" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H723VGHX_MCU} ) @@ -78247,7 +78657,7 @@ target_compile_options(GENERIC_H723VGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H723xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H723VGTX_MCU} ) target_compile_definitions(GENERIC_H723VGTX INTERFACE @@ -78271,7 +78681,7 @@ target_link_options(GENERIC_H723VGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=528384" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H723VGTX_MCU} ) @@ -78329,7 +78739,7 @@ target_compile_options(GENERIC_H723ZETX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H723xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H723ZETX_MCU} ) target_compile_definitions(GENERIC_H723ZETX INTERFACE @@ -78353,7 +78763,7 @@ target_link_options(GENERIC_H723ZETX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=524288" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H723ZETX_MCU} ) @@ -78411,7 +78821,7 @@ target_compile_options(GENERIC_H723ZGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H723xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H723ZGTX_MCU} ) target_compile_definitions(GENERIC_H723ZGTX INTERFACE @@ -78435,7 +78845,7 @@ target_link_options(GENERIC_H723ZGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H723ZGTX_MCU} ) @@ -78493,7 +78903,7 @@ target_compile_options(GENERIC_H730VBHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H730xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H730VBHX_MCU} ) target_compile_definitions(GENERIC_H730VBHX INTERFACE @@ -78517,7 +78927,7 @@ target_link_options(GENERIC_H730VBHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=528384" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H730VBHX_MCU} ) @@ -78575,7 +78985,7 @@ target_compile_options(GENERIC_H730VBTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H730xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H730VBTX_MCU} ) target_compile_definitions(GENERIC_H730VBTX INTERFACE @@ -78599,7 +79009,7 @@ target_link_options(GENERIC_H730VBTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=528384" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H730VBTX_MCU} ) @@ -78657,7 +79067,7 @@ target_compile_options(GENERIC_H730ZBTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H730xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H730ZBTX_MCU} ) target_compile_definitions(GENERIC_H730ZBTX INTERFACE @@ -78681,7 +79091,7 @@ target_link_options(GENERIC_H730ZBTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H730ZBTX_MCU} ) @@ -78739,7 +79149,7 @@ target_compile_options(GENERIC_H733VGHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H733xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H733VGHX_MCU} ) target_compile_definitions(GENERIC_H733VGHX INTERFACE @@ -78763,7 +79173,7 @@ target_link_options(GENERIC_H733VGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=528384" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H733VGHX_MCU} ) @@ -78821,7 +79231,7 @@ target_compile_options(GENERIC_H733VGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H733xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H733VGTX_MCU} ) target_compile_definitions(GENERIC_H733VGTX INTERFACE @@ -78845,7 +79255,7 @@ target_link_options(GENERIC_H733VGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=528384" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H733VGTX_MCU} ) @@ -78903,7 +79313,7 @@ target_compile_options(GENERIC_H733ZGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H733xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H733ZGTX_MCU} ) target_compile_definitions(GENERIC_H733ZGTX INTERFACE @@ -78927,7 +79337,7 @@ target_link_options(GENERIC_H733ZGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H733ZGTX_MCU} ) @@ -78985,7 +79395,7 @@ target_compile_options(GENERIC_H742IGKX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742IGKX_MCU} ) target_compile_definitions(GENERIC_H742IGKX INTERFACE @@ -79009,7 +79419,7 @@ target_link_options(GENERIC_H742IGKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742IGKX_MCU} ) @@ -79067,7 +79477,7 @@ target_compile_options(GENERIC_H742IGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742IGTX_MCU} ) target_compile_definitions(GENERIC_H742IGTX INTERFACE @@ -79091,7 +79501,7 @@ target_link_options(GENERIC_H742IGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742IGTX_MCU} ) @@ -79149,7 +79559,7 @@ target_compile_options(GENERIC_H742IIKX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742IIKX_MCU} ) target_compile_definitions(GENERIC_H742IIKX INTERFACE @@ -79173,7 +79583,7 @@ target_link_options(GENERIC_H742IIKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742IIKX_MCU} ) @@ -79231,7 +79641,7 @@ target_compile_options(GENERIC_H742IITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742IITX_MCU} ) target_compile_definitions(GENERIC_H742IITX INTERFACE @@ -79255,7 +79665,7 @@ target_link_options(GENERIC_H742IITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742IITX_MCU} ) @@ -79313,7 +79723,7 @@ target_compile_options(GENERIC_H742VGHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742VGHX_MCU} ) target_compile_definitions(GENERIC_H742VGHX INTERFACE @@ -79337,7 +79747,7 @@ target_link_options(GENERIC_H742VGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742VGHX_MCU} ) @@ -79395,7 +79805,7 @@ target_compile_options(GENERIC_H742VGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742VGTX_MCU} ) target_compile_definitions(GENERIC_H742VGTX INTERFACE @@ -79419,7 +79829,7 @@ target_link_options(GENERIC_H742VGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742VGTX_MCU} ) @@ -79477,7 +79887,7 @@ target_compile_options(GENERIC_H742VIHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742VIHX_MCU} ) target_compile_definitions(GENERIC_H742VIHX INTERFACE @@ -79501,7 +79911,7 @@ target_link_options(GENERIC_H742VIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742VIHX_MCU} ) @@ -79559,7 +79969,7 @@ target_compile_options(GENERIC_H742VITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742VITX_MCU} ) target_compile_definitions(GENERIC_H742VITX INTERFACE @@ -79583,7 +79993,7 @@ target_link_options(GENERIC_H742VITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742VITX_MCU} ) @@ -79641,7 +80051,7 @@ target_compile_options(GENERIC_H742XGHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742XGHX_MCU} ) target_compile_definitions(GENERIC_H742XGHX INTERFACE @@ -79665,7 +80075,7 @@ target_link_options(GENERIC_H742XGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742XGHX_MCU} ) @@ -79723,7 +80133,7 @@ target_compile_options(GENERIC_H742XIHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742XIHX_MCU} ) target_compile_definitions(GENERIC_H742XIHX INTERFACE @@ -79747,7 +80157,7 @@ target_link_options(GENERIC_H742XIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742XIHX_MCU} ) @@ -79805,7 +80215,7 @@ target_compile_options(GENERIC_H742ZGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742ZGTX_MCU} ) target_compile_definitions(GENERIC_H742ZGTX INTERFACE @@ -79829,7 +80239,7 @@ target_link_options(GENERIC_H742ZGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742ZGTX_MCU} ) @@ -79887,7 +80297,7 @@ target_compile_options(GENERIC_H742ZITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742ZITX_MCU} ) target_compile_definitions(GENERIC_H742ZITX INTERFACE @@ -79911,7 +80321,7 @@ target_link_options(GENERIC_H742ZITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H742ZITX_MCU} ) @@ -79969,7 +80379,7 @@ target_compile_options(GENERIC_H743IGKX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743IGKX_MCU} ) target_compile_definitions(GENERIC_H743IGKX INTERFACE @@ -79993,7 +80403,7 @@ target_link_options(GENERIC_H743IGKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743IGKX_MCU} ) @@ -80051,7 +80461,7 @@ target_compile_options(GENERIC_H743IGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743IGTX_MCU} ) target_compile_definitions(GENERIC_H743IGTX INTERFACE @@ -80075,7 +80485,7 @@ target_link_options(GENERIC_H743IGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743IGTX_MCU} ) @@ -80133,7 +80543,7 @@ target_compile_options(GENERIC_H743IIKX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743IIKX_MCU} ) target_compile_definitions(GENERIC_H743IIKX INTERFACE @@ -80157,7 +80567,7 @@ target_link_options(GENERIC_H743IIKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743IIKX_MCU} ) @@ -80215,7 +80625,7 @@ target_compile_options(GENERIC_H743IITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743IITX_MCU} ) target_compile_definitions(GENERIC_H743IITX INTERFACE @@ -80239,7 +80649,7 @@ target_link_options(GENERIC_H743IITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743IITX_MCU} ) @@ -80297,7 +80707,7 @@ target_compile_options(GENERIC_H743VGHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743VGHX_MCU} ) target_compile_definitions(GENERIC_H743VGHX INTERFACE @@ -80321,7 +80731,7 @@ target_link_options(GENERIC_H743VGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743VGHX_MCU} ) @@ -80379,7 +80789,7 @@ target_compile_options(GENERIC_H743VGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743VGTX_MCU} ) target_compile_definitions(GENERIC_H743VGTX INTERFACE @@ -80403,7 +80813,7 @@ target_link_options(GENERIC_H743VGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743VGTX_MCU} ) @@ -80461,7 +80871,7 @@ target_compile_options(GENERIC_H743VIHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743VIHX_MCU} ) target_compile_definitions(GENERIC_H743VIHX INTERFACE @@ -80485,7 +80895,7 @@ target_link_options(GENERIC_H743VIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743VIHX_MCU} ) @@ -80543,7 +80953,7 @@ target_compile_options(GENERIC_H743VITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743VITX_MCU} ) target_compile_definitions(GENERIC_H743VITX INTERFACE @@ -80567,7 +80977,7 @@ target_link_options(GENERIC_H743VITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743VITX_MCU} ) @@ -80625,7 +81035,7 @@ target_compile_options(GENERIC_H743XGHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743XGHX_MCU} ) target_compile_definitions(GENERIC_H743XGHX INTERFACE @@ -80649,7 +81059,7 @@ target_link_options(GENERIC_H743XGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743XGHX_MCU} ) @@ -80707,7 +81117,7 @@ target_compile_options(GENERIC_H743XIHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743XIHX_MCU} ) target_compile_definitions(GENERIC_H743XIHX INTERFACE @@ -80731,7 +81141,7 @@ target_link_options(GENERIC_H743XIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743XIHX_MCU} ) @@ -80789,7 +81199,7 @@ target_compile_options(GENERIC_H743ZGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743ZGTX_MCU} ) target_compile_definitions(GENERIC_H743ZGTX INTERFACE @@ -80813,7 +81223,7 @@ target_link_options(GENERIC_H743ZGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743ZGTX_MCU} ) @@ -80871,7 +81281,7 @@ target_compile_options(GENERIC_H743ZITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743ZITX_MCU} ) target_compile_definitions(GENERIC_H743ZITX INTERFACE @@ -80895,7 +81305,7 @@ target_link_options(GENERIC_H743ZITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H743ZITX_MCU} ) @@ -80953,7 +81363,7 @@ target_compile_options(GENERIC_H745XGHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H745xG" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H745XGHX_MCU} ) target_compile_definitions(GENERIC_H745XGHX INTERFACE @@ -80977,7 +81387,7 @@ target_link_options(GENERIC_H745XGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H745XGHX_MCU} ) @@ -81035,7 +81445,7 @@ target_compile_options(GENERIC_H745XIHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H745xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H745XIHX_MCU} ) target_compile_definitions(GENERIC_H745XIHX INTERFACE @@ -81059,7 +81469,7 @@ target_link_options(GENERIC_H745XIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H745XIHX_MCU} ) @@ -81117,7 +81527,7 @@ target_compile_options(GENERIC_H745ZGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H745xG" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H745ZGTX_MCU} ) target_compile_definitions(GENERIC_H745ZGTX INTERFACE @@ -81141,7 +81551,7 @@ target_link_options(GENERIC_H745ZGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=884736" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H745ZGTX_MCU} ) @@ -81199,7 +81609,7 @@ target_compile_options(GENERIC_H745ZITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H745xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H745ZITX_MCU} ) target_compile_definitions(GENERIC_H745ZITX INTERFACE @@ -81223,7 +81633,7 @@ target_link_options(GENERIC_H745ZITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=884736" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H745ZITX_MCU} ) @@ -81281,7 +81691,7 @@ target_compile_options(GENERIC_H747AGIX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H747xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H747AGIX_MCU} ) target_compile_definitions(GENERIC_H747AGIX INTERFACE @@ -81305,7 +81715,7 @@ target_link_options(GENERIC_H747AGIX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H747AGIX_MCU} ) @@ -81363,7 +81773,7 @@ target_compile_options(GENERIC_H747AIIX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H747xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H747AIIX_MCU} ) target_compile_definitions(GENERIC_H747AIIX INTERFACE @@ -81387,7 +81797,7 @@ target_link_options(GENERIC_H747AIIX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H747AIIX_MCU} ) @@ -81445,7 +81855,7 @@ target_compile_options(GENERIC_H747IGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H747xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H747IGTX_MCU} ) target_compile_definitions(GENERIC_H747IGTX INTERFACE @@ -81469,7 +81879,7 @@ target_link_options(GENERIC_H747IGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H747IGTX_MCU} ) @@ -81527,7 +81937,7 @@ target_compile_options(GENERIC_H747IITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H747xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H747IITX_MCU} ) target_compile_definitions(GENERIC_H747IITX INTERFACE @@ -81551,7 +81961,7 @@ target_link_options(GENERIC_H747IITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H747IITX_MCU} ) @@ -81609,7 +82019,7 @@ target_compile_options(GENERIC_H747XGHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H747xG" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H747XGHX_MCU} ) target_compile_definitions(GENERIC_H747XGHX INTERFACE @@ -81633,7 +82043,7 @@ target_link_options(GENERIC_H747XGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H747XGHX_MCU} ) @@ -81691,7 +82101,7 @@ target_compile_options(GENERIC_H747XIHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H747xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H747XIHX_MCU} ) target_compile_definitions(GENERIC_H747XIHX INTERFACE @@ -81715,7 +82125,7 @@ target_link_options(GENERIC_H747XIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H747XIHX_MCU} ) @@ -81773,7 +82183,7 @@ target_compile_options(GENERIC_H750IBKX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H750IBKX_MCU} ) target_compile_definitions(GENERIC_H750IBKX INTERFACE @@ -81797,7 +82207,7 @@ target_link_options(GENERIC_H750IBKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H750IBKX_MCU} ) @@ -81855,7 +82265,7 @@ target_compile_options(GENERIC_H750IBTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H750IBTX_MCU} ) target_compile_definitions(GENERIC_H750IBTX INTERFACE @@ -81879,7 +82289,7 @@ target_link_options(GENERIC_H750IBTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H750IBTX_MCU} ) @@ -81937,7 +82347,7 @@ target_compile_options(GENERIC_H750VBTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H750VBTX_MCU} ) target_compile_definitions(GENERIC_H750VBTX INTERFACE @@ -81961,7 +82371,7 @@ target_link_options(GENERIC_H750VBTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H750VBTX_MCU} ) @@ -82019,7 +82429,7 @@ target_compile_options(GENERIC_H750XBHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H750XBHX_MCU} ) target_compile_definitions(GENERIC_H750XBHX INTERFACE @@ -82043,7 +82453,7 @@ target_link_options(GENERIC_H750XBHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H750XBHX_MCU} ) @@ -82101,7 +82511,7 @@ target_compile_options(GENERIC_H750ZBTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H750ZBTX_MCU} ) target_compile_definitions(GENERIC_H750ZBTX INTERFACE @@ -82125,7 +82535,7 @@ target_link_options(GENERIC_H750ZBTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H750ZBTX_MCU} ) @@ -82183,7 +82593,7 @@ target_compile_options(GENERIC_H753IIKX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H753xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H753IIKX_MCU} ) target_compile_definitions(GENERIC_H753IIKX INTERFACE @@ -82207,7 +82617,7 @@ target_link_options(GENERIC_H753IIKX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H753IIKX_MCU} ) @@ -82265,7 +82675,7 @@ target_compile_options(GENERIC_H753IITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H753xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H753IITX_MCU} ) target_compile_definitions(GENERIC_H753IITX INTERFACE @@ -82289,7 +82699,7 @@ target_link_options(GENERIC_H753IITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H753IITX_MCU} ) @@ -82347,7 +82757,7 @@ target_compile_options(GENERIC_H753VIHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H753xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H753VIHX_MCU} ) target_compile_definitions(GENERIC_H753VIHX INTERFACE @@ -82371,7 +82781,7 @@ target_link_options(GENERIC_H753VIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H753VIHX_MCU} ) @@ -82429,7 +82839,7 @@ target_compile_options(GENERIC_H753VITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H753xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H753VITX_MCU} ) target_compile_definitions(GENERIC_H753VITX INTERFACE @@ -82453,7 +82863,7 @@ target_link_options(GENERIC_H753VITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H753VITX_MCU} ) @@ -82511,7 +82921,7 @@ target_compile_options(GENERIC_H753XIHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H753xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H753XIHX_MCU} ) target_compile_definitions(GENERIC_H753XIHX INTERFACE @@ -82535,7 +82945,7 @@ target_link_options(GENERIC_H753XIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H753XIHX_MCU} ) @@ -82593,7 +83003,7 @@ target_compile_options(GENERIC_H753ZITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H753xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H753ZITX_MCU} ) target_compile_definitions(GENERIC_H753ZITX INTERFACE @@ -82617,7 +83027,7 @@ target_link_options(GENERIC_H753ZITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H753ZITX_MCU} ) @@ -82675,7 +83085,7 @@ target_compile_options(GENERIC_H755XIHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H755xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H755XIHX_MCU} ) target_compile_definitions(GENERIC_H755XIHX INTERFACE @@ -82699,7 +83109,7 @@ target_link_options(GENERIC_H755XIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H755XIHX_MCU} ) @@ -82757,7 +83167,7 @@ target_compile_options(GENERIC_H755ZITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H755xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H755ZITX_MCU} ) target_compile_definitions(GENERIC_H755ZITX INTERFACE @@ -82781,7 +83191,7 @@ target_link_options(GENERIC_H755ZITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=884736" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H755ZITX_MCU} ) @@ -82839,7 +83249,7 @@ target_compile_options(GENERIC_H757AIIX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H757xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H757AIIX_MCU} ) target_compile_definitions(GENERIC_H757AIIX INTERFACE @@ -82863,7 +83273,7 @@ target_link_options(GENERIC_H757AIIX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H757AIIX_MCU} ) @@ -82921,7 +83331,7 @@ target_compile_options(GENERIC_H757IITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H757xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H757IITX_MCU} ) target_compile_definitions(GENERIC_H757IITX INTERFACE @@ -82945,7 +83355,7 @@ target_link_options(GENERIC_H757IITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H757IITX_MCU} ) @@ -83003,7 +83413,7 @@ target_compile_options(GENERIC_H757XIHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H757xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H757XIHX_MCU} ) target_compile_definitions(GENERIC_H757XIHX INTERFACE @@ -83027,7 +83437,7 @@ target_link_options(GENERIC_H757XIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H757XIHX_MCU} ) @@ -83085,7 +83495,7 @@ target_compile_options(GENERIC_H7A3VGHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H7A3xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7A3VGHX_MCU} ) target_compile_definitions(GENERIC_H7A3VGHX INTERFACE @@ -83109,7 +83519,7 @@ target_link_options(GENERIC_H7A3VGHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=1048576" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7A3VGHX_MCU} ) @@ -83167,7 +83577,7 @@ target_compile_options(GENERIC_H7A3VGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H7A3xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7A3VGTX_MCU} ) target_compile_definitions(GENERIC_H7A3VGTX INTERFACE @@ -83191,7 +83601,7 @@ target_link_options(GENERIC_H7A3VGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=1048576" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7A3VGTX_MCU} ) @@ -83249,7 +83659,7 @@ target_compile_options(GENERIC_H7A3VIHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H7A3xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7A3VIHX_MCU} ) target_compile_definitions(GENERIC_H7A3VIHX INTERFACE @@ -83273,7 +83683,7 @@ target_link_options(GENERIC_H7A3VIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=1048576" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7A3VIHX_MCU} ) @@ -83331,7 +83741,7 @@ target_compile_options(GENERIC_H7A3VITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H7A3xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7A3VITX_MCU} ) target_compile_definitions(GENERIC_H7A3VITX INTERFACE @@ -83355,7 +83765,7 @@ target_link_options(GENERIC_H7A3VITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=1048576" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7A3VITX_MCU} ) @@ -83413,7 +83823,7 @@ target_compile_options(GENERIC_H7A3ZGTXQ INTERFACE "SHELL:-DCORE_CM7 -DSTM32H7A3xxQ" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7A3ZGTXQ_MCU} ) target_compile_definitions(GENERIC_H7A3ZGTXQ INTERFACE @@ -83437,7 +83847,7 @@ target_link_options(GENERIC_H7A3ZGTXQ INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=1048576" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7A3ZGTXQ_MCU} ) @@ -83495,7 +83905,7 @@ target_compile_options(GENERIC_H7A3ZITXQ INTERFACE "SHELL:-DCORE_CM7 -DSTM32H7A3xxQ" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7A3ZITXQ_MCU} ) target_compile_definitions(GENERIC_H7A3ZITXQ INTERFACE @@ -83519,7 +83929,7 @@ target_link_options(GENERIC_H7A3ZITXQ INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=1048576" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7A3ZITXQ_MCU} ) @@ -83577,7 +83987,7 @@ target_compile_options(GENERIC_H7B0VBTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H7B0xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7B0VBTX_MCU} ) target_compile_definitions(GENERIC_H7B0VBTX INTERFACE @@ -83601,7 +84011,7 @@ target_link_options(GENERIC_H7B0VBTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=1048576" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7B0VBTX_MCU} ) @@ -83659,7 +84069,7 @@ target_compile_options(GENERIC_H7B3VIHX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H7B3xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7B3VIHX_MCU} ) target_compile_definitions(GENERIC_H7B3VIHX INTERFACE @@ -83683,7 +84093,7 @@ target_link_options(GENERIC_H7B3VIHX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=1048576" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7B3VIHX_MCU} ) @@ -83741,7 +84151,7 @@ target_compile_options(GENERIC_H7B3VITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H7B3xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7B3VITX_MCU} ) target_compile_definitions(GENERIC_H7B3VITX INTERFACE @@ -83765,7 +84175,7 @@ target_link_options(GENERIC_H7B3VITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=1048576" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7B3VITX_MCU} ) @@ -83823,7 +84233,7 @@ target_compile_options(GENERIC_H7B3ZITXQ INTERFACE "SHELL:-DCORE_CM7 -DSTM32H7B3xxQ" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7B3ZITXQ_MCU} ) target_compile_definitions(GENERIC_H7B3ZITXQ INTERFACE @@ -83847,7 +84257,7 @@ target_link_options(GENERIC_H7B3ZITXQ INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=1048576" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${GENERIC_H7B3ZITXQ_MCU} ) @@ -112061,13 +112471,13 @@ set(NUCLEO_F746ZG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/ set(NUCLEO_F746ZG_MAXSIZE 1048576) set(NUCLEO_F746ZG_MAXDATASIZE 327680) set(NUCLEO_F746ZG_MCU cortex-m7) -set(NUCLEO_F746ZG_FPCONF "fpv4-sp-d16-hard") +set(NUCLEO_F746ZG_FPCONF "fpv5-sp-d16-hard") add_library(NUCLEO_F746ZG INTERFACE) target_compile_options(NUCLEO_F746ZG INTERFACE "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_F746ZG_MCU} ) target_compile_definitions(NUCLEO_F746ZG INTERFACE @@ -112091,7 +112501,7 @@ target_link_options(NUCLEO_F746ZG INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_F746ZG_MCU} ) @@ -112143,13 +112553,13 @@ set(NUCLEO_F756ZG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/ set(NUCLEO_F756ZG_MAXSIZE 1048576) set(NUCLEO_F756ZG_MAXDATASIZE 327680) set(NUCLEO_F756ZG_MCU cortex-m7) -set(NUCLEO_F756ZG_FPCONF "fpv4-sp-d16-hard") +set(NUCLEO_F756ZG_FPCONF "fpv5-sp-d16-hard") add_library(NUCLEO_F756ZG INTERFACE) target_compile_options(NUCLEO_F756ZG INTERFACE "SHELL:-DSTM32F756xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_F756ZG_MCU} ) target_compile_definitions(NUCLEO_F756ZG INTERFACE @@ -112173,7 +112583,7 @@ target_link_options(NUCLEO_F756ZG INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_F756ZG_MCU} ) @@ -112225,13 +112635,13 @@ set(NUCLEO_F767ZI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/ set(NUCLEO_F767ZI_MAXSIZE 2097152) set(NUCLEO_F767ZI_MAXDATASIZE 524288) set(NUCLEO_F767ZI_MCU cortex-m7) -set(NUCLEO_F767ZI_FPCONF "fpv4-sp-d16-hard") +set(NUCLEO_F767ZI_FPCONF "fpv5-sp-d16-hard") add_library(NUCLEO_F767ZI INTERFACE) target_compile_options(NUCLEO_F767ZI INTERFACE "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_F767ZI_MCU} ) target_compile_definitions(NUCLEO_F767ZI INTERFACE @@ -112255,7 +112665,7 @@ target_link_options(NUCLEO_F767ZI INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_F767ZI_MCU} ) @@ -113045,13 +113455,13 @@ set(NUCLEO_H723ZG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/ set(NUCLEO_H723ZG_MAXSIZE 1048576) set(NUCLEO_H723ZG_MAXDATASIZE 327680) set(NUCLEO_H723ZG_MCU cortex-m7) -set(NUCLEO_H723ZG_FPCONF "fpv4-sp-d16-hard") +set(NUCLEO_H723ZG_FPCONF "fpv5-sp-d16-hard") add_library(NUCLEO_H723ZG INTERFACE) target_compile_options(NUCLEO_H723ZG INTERFACE "SHELL:-DSTM32H723xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_H723ZG_MCU} ) target_compile_definitions(NUCLEO_H723ZG INTERFACE @@ -113075,7 +113485,7 @@ target_link_options(NUCLEO_H723ZG INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_H723ZG_MCU} ) @@ -113127,13 +113537,13 @@ set(NUCLEO_H743ZI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/ set(NUCLEO_H743ZI_MAXSIZE 2097152) set(NUCLEO_H743ZI_MAXDATASIZE 524288) set(NUCLEO_H743ZI_MCU cortex-m7) -set(NUCLEO_H743ZI_FPCONF "fpv4-sp-d16-hard") +set(NUCLEO_H743ZI_FPCONF "fpv5-sp-d16-hard") add_library(NUCLEO_H743ZI INTERFACE) target_compile_options(NUCLEO_H743ZI INTERFACE "SHELL:-DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_H743ZI_MCU} ) target_compile_definitions(NUCLEO_H743ZI INTERFACE @@ -113157,7 +113567,7 @@ target_link_options(NUCLEO_H743ZI INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_H743ZI_MCU} ) @@ -113209,13 +113619,13 @@ set(NUCLEO_H743ZI2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx set(NUCLEO_H743ZI2_MAXSIZE 2097152) set(NUCLEO_H743ZI2_MAXDATASIZE 524288) set(NUCLEO_H743ZI2_MCU cortex-m7) -set(NUCLEO_H743ZI2_FPCONF "fpv4-sp-d16-hard") +set(NUCLEO_H743ZI2_FPCONF "fpv5-sp-d16-hard") add_library(NUCLEO_H743ZI2 INTERFACE) target_compile_options(NUCLEO_H743ZI2 INTERFACE "SHELL:-DSTM32H743xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_H743ZI2_MCU} ) target_compile_definitions(NUCLEO_H743ZI2 INTERFACE @@ -113239,7 +113649,7 @@ target_link_options(NUCLEO_H743ZI2 INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_H743ZI2_MCU} ) @@ -113291,13 +113701,13 @@ set(NUCLEO_H745ZI_Q_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7x set(NUCLEO_H745ZI_Q_MAXSIZE 2097152) set(NUCLEO_H745ZI_Q_MAXDATASIZE 884736) set(NUCLEO_H745ZI_Q_MCU cortex-m7) -set(NUCLEO_H745ZI_Q_FPCONF "fpv4-sp-d16-hard") +set(NUCLEO_H745ZI_Q_FPCONF "fpv5-sp-d16-hard") add_library(NUCLEO_H745ZI_Q INTERFACE) target_compile_options(NUCLEO_H745ZI_Q INTERFACE "SHELL:-DSTM32H745xx -DCORE_CM7" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_H745ZI_Q_MCU} ) target_compile_definitions(NUCLEO_H745ZI_Q INTERFACE @@ -113321,7 +113731,7 @@ target_link_options(NUCLEO_H745ZI_Q INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=884736" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_H745ZI_Q_MCU} ) @@ -113373,13 +113783,13 @@ set(NUCLEO_H753ZI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/ set(NUCLEO_H753ZI_MAXSIZE 2097152) set(NUCLEO_H753ZI_MAXDATASIZE 524288) set(NUCLEO_H753ZI_MCU cortex-m7) -set(NUCLEO_H753ZI_FPCONF "fpv4-sp-d16-hard") +set(NUCLEO_H753ZI_FPCONF "fpv5-sp-d16-hard") add_library(NUCLEO_H753ZI INTERFACE) target_compile_options(NUCLEO_H753ZI INTERFACE "SHELL:-DSTM32H753xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_H753ZI_MCU} ) target_compile_definitions(NUCLEO_H753ZI INTERFACE @@ -113403,7 +113813,7 @@ target_link_options(NUCLEO_H753ZI INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_H753ZI_MCU} ) @@ -113455,13 +113865,13 @@ set(NUCLEO_H7A3ZI_Q_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7x set(NUCLEO_H7A3ZI_Q_MAXSIZE 2097152) set(NUCLEO_H7A3ZI_Q_MAXDATASIZE 1048576) set(NUCLEO_H7A3ZI_Q_MCU cortex-m7) -set(NUCLEO_H7A3ZI_Q_FPCONF "fpv4-sp-d16-hard") +set(NUCLEO_H7A3ZI_Q_FPCONF "fpv5-sp-d16-hard") add_library(NUCLEO_H7A3ZI_Q INTERFACE) target_compile_options(NUCLEO_H7A3ZI_Q INTERFACE "SHELL:-DSTM32H7A3xxQ" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_H7A3ZI_Q_MCU} ) target_compile_definitions(NUCLEO_H7A3ZI_Q INTERFACE @@ -113485,7 +113895,7 @@ target_link_options(NUCLEO_H7A3ZI_Q INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=1048576" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${NUCLEO_H7A3ZI_Q_MCU} ) @@ -116719,13 +117129,13 @@ set(REMRAM_V1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765 set(REMRAM_V1_MAXSIZE 2097152) set(REMRAM_V1_MAXDATASIZE 524288) set(REMRAM_V1_MCU cortex-m7) -set(REMRAM_V1_FPCONF "fpv4-sp-d16-hard") +set(REMRAM_V1_FPCONF "fpv5-sp-d16-hard") add_library(REMRAM_V1 INTERFACE) target_compile_options(REMRAM_V1 INTERFACE "SHELL:-DSTM32F765xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${REMRAM_V1_MCU} ) target_compile_definitions(REMRAM_V1 INTERFACE @@ -116749,7 +117159,7 @@ target_link_options(REMRAM_V1 INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${REMRAM_V1_MCU} ) @@ -117843,13 +118253,13 @@ set(STM32H747I_DISCO_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7 set(STM32H747I_DISCO_MAXSIZE 2097152) set(STM32H747I_DISCO_MAXDATASIZE 524288) set(STM32H747I_DISCO_MCU cortex-m7) -set(STM32H747I_DISCO_FPCONF "fpv4-sp-d16-hard") +set(STM32H747I_DISCO_FPCONF "fpv5-sp-d16-hard") add_library(STM32H747I_DISCO INTERFACE) target_compile_options(STM32H747I_DISCO INTERFACE "SHELL:-DSTM32H747xx -DCORE_CM7" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${STM32H747I_DISCO_MCU} ) target_compile_definitions(STM32H747I_DISCO INTERFACE @@ -117873,7 +118283,7 @@ target_link_options(STM32H747I_DISCO INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${STM32H747I_DISCO_MCU} ) @@ -119471,7 +119881,7 @@ target_compile_options(WeActMiniH723VGTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H723xx" "SHELL:" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${WeActMiniH723VGTX_MCU} ) target_compile_definitions(WeActMiniH723VGTX INTERFACE @@ -119479,7 +119889,7 @@ target_compile_definitions(WeActMiniH723VGTX INTERFACE "ARDUINO_WeActMiniH723VGTX" "BOARD_NAME=\"WeActMiniH723VGTX\"" "BOARD_ID=WeActMiniH723VGTX" - "VARIANT_H=\"variant_generic.h\"" + "VARIANT_H=\"variant_WeActMiniH723VGTX.h\"" ) target_include_directories(WeActMiniH723VGTX INTERFACE ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx @@ -119495,7 +119905,7 @@ target_link_options(WeActMiniH723VGTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=1048576" "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${WeActMiniH723VGTX_MCU} ) @@ -119553,7 +119963,7 @@ target_compile_options(WeActMiniH743VITX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${WeActMiniH743VITX_MCU} ) target_compile_definitions(WeActMiniH743VITX INTERFACE @@ -119577,7 +119987,7 @@ target_link_options(WeActMiniH743VITX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=2097152" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${WeActMiniH743VITX_MCU} ) @@ -119635,7 +120045,7 @@ target_compile_options(WeActMiniH750VBTX INTERFACE "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${WeActMiniH750VBTX_MCU} ) target_compile_definitions(WeActMiniH750VBTX INTERFACE @@ -119659,7 +120069,7 @@ target_link_options(WeActMiniH750VBTX INTERFACE "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=131072" "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" -mcpu=${WeActMiniH750VBTX_MCU} ) diff --git a/libraries/SrcWrapper/CMakeLists.txt b/libraries/SrcWrapper/CMakeLists.txt index ea4dacda44..76c357dd50 100644 --- a/libraries/SrcWrapper/CMakeLists.txt +++ b/libraries/SrcWrapper/CMakeLists.txt @@ -69,6 +69,7 @@ add_library(SrcWrapper_bin OBJECT EXCLUDE_FROM_ALL src/HAL/stm32yyxx_hal_hcd.c src/HAL/stm32yyxx_hal_hrtim.c src/HAL/stm32yyxx_hal_hsem.c + src/HAL/stm32yyxx_hal_hsp.c src/HAL/stm32yyxx_hal_i2c.c src/HAL/stm32yyxx_hal_i2c_ex.c src/HAL/stm32yyxx_hal_i2s.c @@ -101,6 +102,7 @@ add_library(SrcWrapper_bin OBJECT EXCLUDE_FROM_ALL src/HAL/stm32yyxx_hal_pcd.c src/HAL/stm32yyxx_hal_pcd_ex.c src/HAL/stm32yyxx_hal_pka.c + src/HAL/stm32yyxx_hal_play.c src/HAL/stm32yyxx_hal_pssi.c src/HAL/stm32yyxx_hal_pwr.c src/HAL/stm32yyxx_hal_pwr_ex.c @@ -141,6 +143,7 @@ add_library(SrcWrapper_bin OBJECT EXCLUDE_FROM_ALL src/HAL/stm32yyxx_hal_usart_ex.c src/HAL/stm32yyxx_hal_wwdg.c src/HAL/stm32yyxx_hal_xspi.c + src/HAL/stm32yyxx_util_i3c.c src/HardwareTimer.cpp src/LL/stm32yyxx_ll_adc.c src/LL/stm32yyxx_ll_bdma.c @@ -170,6 +173,7 @@ add_library(SrcWrapper_bin OBJECT EXCLUDE_FROM_ALL src/LL/stm32yyxx_ll_mdma.c src/LL/stm32yyxx_ll_opamp.c src/LL/stm32yyxx_ll_pka.c + src/LL/stm32yyxx_ll_play.c src/LL/stm32yyxx_ll_pwr.c src/LL/stm32yyxx_ll_rcc.c src/LL/stm32yyxx_ll_rng.c diff --git a/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)/PeripheralPins.c b/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)/PeripheralPins.c index 1ddb673d8a..9d91741939 100644 --- a/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)/PeripheralPins.c +++ b/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C011D6Yx.xml, STM32C011F(4-6)Px.xml * STM32C011F(4-6)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C011J(4-6)M/PeripheralPins.c b/variants/STM32C0xx/C011J(4-6)M/PeripheralPins.c index f5d33d9fe1..2338513550 100644 --- a/variants/STM32C0xx/C011J(4-6)M/PeripheralPins.c +++ b/variants/STM32C0xx/C011J(4-6)M/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32C011J(4-6)Mx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C031C(4-6)(T-U)/PeripheralPins.c b/variants/STM32C0xx/C031C(4-6)(T-U)/PeripheralPins.c index b32ecb4d85..70834058b6 100644 --- a/variants/STM32C0xx/C031C(4-6)(T-U)/PeripheralPins.c +++ b/variants/STM32C0xx/C031C(4-6)(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32C031C(4-6)Tx.xml, STM32C031C(4-6)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C031F(4-6)P/PeripheralPins.c b/variants/STM32C0xx/C031F(4-6)P/PeripheralPins.c index 78cbb3eea4..bf4ff4776f 100644 --- a/variants/STM32C0xx/C031F(4-6)P/PeripheralPins.c +++ b/variants/STM32C0xx/C031F(4-6)P/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32C031F(4-6)Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C031G(4-6)U/PeripheralPins.c b/variants/STM32C0xx/C031G(4-6)U/PeripheralPins.c index 3c7cd8cca7..7c111189bf 100644 --- a/variants/STM32C0xx/C031G(4-6)U/PeripheralPins.c +++ b/variants/STM32C0xx/C031G(4-6)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32C031G(4-6)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C031K(4-6)(T-U)/PeripheralPins.c b/variants/STM32C0xx/C031K(4-6)(T-U)/PeripheralPins.c index 3ca4adc669..31f6fa4803 100644 --- a/variants/STM32C0xx/C031K(4-6)(T-U)/PeripheralPins.c +++ b/variants/STM32C0xx/C031K(4-6)(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32C031K(4-6)Tx.xml, STM32C031K(4-6)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C051C(6-8)(T-U)/PeripheralPins.c b/variants/STM32C0xx/C051C(6-8)(T-U)/PeripheralPins.c index ac8518b7f3..6ad077e90a 100644 --- a/variants/STM32C0xx/C051C(6-8)(T-U)/PeripheralPins.c +++ b/variants/STM32C0xx/C051C(6-8)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C051C6Tx.xml, STM32C051C6Ux.xml * STM32C051C8Tx.xml, STM32C051C8Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C051D8Y_C051F(6-8)P/PeripheralPins.c b/variants/STM32C0xx/C051D8Y_C051F(6-8)P/PeripheralPins.c index 36b508c6ac..b8e50ff276 100644 --- a/variants/STM32C0xx/C051D8Y_C051F(6-8)P/PeripheralPins.c +++ b/variants/STM32C0xx/C051D8Y_C051F(6-8)P/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C051D8Yx.xml, STM32C051F6Px.xml * STM32C051F8Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C051G(6-8)U/PeripheralPins.c b/variants/STM32C0xx/C051G(6-8)U/PeripheralPins.c index 3b7525062b..052d01e69f 100644 --- a/variants/STM32C0xx/C051G(6-8)U/PeripheralPins.c +++ b/variants/STM32C0xx/C051G(6-8)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32C051G6Ux.xml, STM32C051G8Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C051K6(T-U)_C051K8T/PeripheralPins.c b/variants/STM32C0xx/C051K6(T-U)_C051K8T/PeripheralPins.c index 0257f16199..61524cd1db 100644 --- a/variants/STM32C0xx/C051K6(T-U)_C051K8T/PeripheralPins.c +++ b/variants/STM32C0xx/C051K6(T-U)_C051K8T/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C051K6Tx.xml, STM32C051K6Ux.xml * STM32C051K8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C071C(8-B)(T-U)/PeripheralPins.c b/variants/STM32C0xx/C071C(8-B)(T-U)/PeripheralPins.c index 2f220c82ef..c5b1225da9 100644 --- a/variants/STM32C0xx/C071C(8-B)(T-U)/PeripheralPins.c +++ b/variants/STM32C0xx/C071C(8-B)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C071C8Tx.xml, STM32C071C8Ux.xml * STM32C071CBTx.xml, STM32C071CBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C071C(8-B)(T-U)xN/PeripheralPins.c b/variants/STM32C0xx/C071C(8-B)(T-U)xN/PeripheralPins.c index 8468805fae..37e424140e 100644 --- a/variants/STM32C0xx/C071C(8-B)(T-U)xN/PeripheralPins.c +++ b/variants/STM32C0xx/C071C(8-B)(T-U)xN/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C071C8TxN.xml, STM32C071C8UxN.xml * STM32C071CBTxN.xml, STM32C071CBUxN.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C071F(8-B)PxN/PeripheralPins.c b/variants/STM32C0xx/C071F(8-B)PxN/PeripheralPins.c index 2539851cce..3bceae9307 100644 --- a/variants/STM32C0xx/C071F(8-B)PxN/PeripheralPins.c +++ b/variants/STM32C0xx/C071F(8-B)PxN/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32C071F8PxN.xml, STM32C071FBPxN.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C071F8P_C071FB(P-Y)/PeripheralPins.c b/variants/STM32C0xx/C071F8P_C071FB(P-Y)/PeripheralPins.c index 977af763d4..5b0e453a04 100644 --- a/variants/STM32C0xx/C071F8P_C071FB(P-Y)/PeripheralPins.c +++ b/variants/STM32C0xx/C071F8P_C071FB(P-Y)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C071F8Px.xml, STM32C071FBPx.xml * STM32C071FBYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C071G(8-B)U/PeripheralPins.c b/variants/STM32C0xx/C071G(8-B)U/PeripheralPins.c index ec55098934..bf679b0009 100644 --- a/variants/STM32C0xx/C071G(8-B)U/PeripheralPins.c +++ b/variants/STM32C0xx/C071G(8-B)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32C071G8Ux.xml, STM32C071GBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C071G(8-B)UxN/PeripheralPins.c b/variants/STM32C0xx/C071G(8-B)UxN/PeripheralPins.c index 9154df070e..6bc6c9d353 100644 --- a/variants/STM32C0xx/C071G(8-B)UxN/PeripheralPins.c +++ b/variants/STM32C0xx/C071G(8-B)UxN/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32C071G8UxN.xml, STM32C071GBUxN.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C071K(8-B)(T-U)/PeripheralPins.c b/variants/STM32C0xx/C071K(8-B)(T-U)/PeripheralPins.c index babf8be387..5ae2992ce1 100644 --- a/variants/STM32C0xx/C071K(8-B)(T-U)/PeripheralPins.c +++ b/variants/STM32C0xx/C071K(8-B)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C071K8Tx.xml, STM32C071K8Ux.xml * STM32C071KBTx.xml, STM32C071KBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C071K(8-B)(T-U)xN/PeripheralPins.c b/variants/STM32C0xx/C071K(8-B)(T-U)xN/PeripheralPins.c index 2e3daa820a..9c0c71a2d2 100644 --- a/variants/STM32C0xx/C071K(8-B)(T-U)xN/PeripheralPins.c +++ b/variants/STM32C0xx/C071K(8-B)(T-U)xN/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C071K8TxN.xml, STM32C071K8UxN.xml * STM32C071KBTxN.xml, STM32C071KBUxN.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C071R(8-B)T/PeripheralPins.c b/variants/STM32C0xx/C071R(8-B)T/PeripheralPins.c index 382b072569..1b56bd7af2 100644 --- a/variants/STM32C0xx/C071R(8-B)T/PeripheralPins.c +++ b/variants/STM32C0xx/C071R(8-B)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32C071R8Tx.xml, STM32C071RBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C071R8TxN_C071RB(I-T)xN/PeripheralPins.c b/variants/STM32C0xx/C071R8TxN_C071RB(I-T)xN/PeripheralPins.c index 937e2c5d22..2ba617113c 100644 --- a/variants/STM32C0xx/C071R8TxN_C071RB(I-T)xN/PeripheralPins.c +++ b/variants/STM32C0xx/C071R8TxN_C071RB(I-T)xN/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C071R8TxN.xml, STM32C071RBIxN.xml * STM32C071RBTxN.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C091C(B-C)(T-U)/PeripheralPins.c b/variants/STM32C0xx/C091C(B-C)(T-U)/PeripheralPins.c index 2d04d35fea..67addb31b3 100644 --- a/variants/STM32C0xx/C091C(B-C)(T-U)/PeripheralPins.c +++ b/variants/STM32C0xx/C091C(B-C)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C091CBTx.xml, STM32C091CBUx.xml * STM32C091CCTx.xml, STM32C091CCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C091ECY_C091F(B-C)P/PeripheralPins.c b/variants/STM32C0xx/C091ECY_C091F(B-C)P/PeripheralPins.c index 824dfa7df5..b8d719108f 100644 --- a/variants/STM32C0xx/C091ECY_C091F(B-C)P/PeripheralPins.c +++ b/variants/STM32C0xx/C091ECY_C091F(B-C)P/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C091ECYx.xml, STM32C091FBPx.xml * STM32C091FCPx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C091G(B-C)U/PeripheralPins.c b/variants/STM32C0xx/C091G(B-C)U/PeripheralPins.c index f2f6eed26c..22b3781079 100644 --- a/variants/STM32C0xx/C091G(B-C)U/PeripheralPins.c +++ b/variants/STM32C0xx/C091G(B-C)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32C091GBUx.xml, STM32C091GCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C091K(B-C)(T-U)/PeripheralPins.c b/variants/STM32C0xx/C091K(B-C)(T-U)/PeripheralPins.c index afbe047e61..64b3458667 100644 --- a/variants/STM32C0xx/C091K(B-C)(T-U)/PeripheralPins.c +++ b/variants/STM32C0xx/C091K(B-C)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C091KBTx.xml, STM32C091KBUx.xml * STM32C091KCTx.xml, STM32C091KCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C091RBT_C091RC(I-T)/PeripheralPins.c b/variants/STM32C0xx/C091RBT_C091RC(I-T)/PeripheralPins.c index a15027015d..4172350559 100644 --- a/variants/STM32C0xx/C091RBT_C091RC(I-T)/PeripheralPins.c +++ b/variants/STM32C0xx/C091RBT_C091RC(I-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C091RBTx.xml, STM32C091RCIx.xml * STM32C091RCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C092C(B-C)(T-U)/PeripheralPins.c b/variants/STM32C0xx/C092C(B-C)(T-U)/PeripheralPins.c index c136e3d2ac..8c5d62f16d 100644 --- a/variants/STM32C0xx/C092C(B-C)(T-U)/PeripheralPins.c +++ b/variants/STM32C0xx/C092C(B-C)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C092CBTx.xml, STM32C092CBUx.xml * STM32C092CCTx.xml, STM32C092CCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C092ECY_C092F(B-C)P/PeripheralPins.c b/variants/STM32C0xx/C092ECY_C092F(B-C)P/PeripheralPins.c index 54e0a20ac8..c5b5751445 100644 --- a/variants/STM32C0xx/C092ECY_C092F(B-C)P/PeripheralPins.c +++ b/variants/STM32C0xx/C092ECY_C092F(B-C)P/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C092ECYx.xml, STM32C092FBPx.xml * STM32C092FCPx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C092G(B-C)U/PeripheralPins.c b/variants/STM32C0xx/C092G(B-C)U/PeripheralPins.c index ad98dd8b31..50991fc8d7 100644 --- a/variants/STM32C0xx/C092G(B-C)U/PeripheralPins.c +++ b/variants/STM32C0xx/C092G(B-C)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32C092GBUx.xml, STM32C092GCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C092K(B-C)(T-U)/PeripheralPins.c b/variants/STM32C0xx/C092K(B-C)(T-U)/PeripheralPins.c index bf65ce309f..afd55e8698 100644 --- a/variants/STM32C0xx/C092K(B-C)(T-U)/PeripheralPins.c +++ b/variants/STM32C0xx/C092K(B-C)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C092KBTx.xml, STM32C092KBUx.xml * STM32C092KCTx.xml, STM32C092KCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32C0xx/C092RBT_C092RC(I-T)/PeripheralPins.c b/variants/STM32C0xx/C092RBT_C092RC(I-T)/PeripheralPins.c index c1f879840e..1ba46a14ce 100644 --- a/variants/STM32C0xx/C092RBT_C092RC(I-T)/PeripheralPins.c +++ b/variants/STM32C0xx/C092RBT_C092RC(I-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32C092RBTx.xml, STM32C092RCIx.xml * STM32C092RCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F030C6T/PeripheralPins.c b/variants/STM32F0xx/F030C6T/PeripheralPins.c index 8ea8585c51..8af22cf7a7 100644 --- a/variants/STM32F0xx/F030C6T/PeripheralPins.c +++ b/variants/STM32F0xx/F030C6T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F030C6Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F030C8T/PeripheralPins.c b/variants/STM32F0xx/F030C8T/PeripheralPins.c index f1fe13a238..12a0fa0360 100644 --- a/variants/STM32F0xx/F030C8T/PeripheralPins.c +++ b/variants/STM32F0xx/F030C8T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F030C8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F030CCT/PeripheralPins.c b/variants/STM32F0xx/F030CCT/PeripheralPins.c index 311eca5e51..7847bcc83a 100644 --- a/variants/STM32F0xx/F030CCT/PeripheralPins.c +++ b/variants/STM32F0xx/F030CCT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F030CCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F030F4P/PeripheralPins.c b/variants/STM32F0xx/F030F4P/PeripheralPins.c index bf215621ba..43e5105873 100644 --- a/variants/STM32F0xx/F030F4P/PeripheralPins.c +++ b/variants/STM32F0xx/F030F4P/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F030F4Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F030K6T/PeripheralPins.c b/variants/STM32F0xx/F030K6T/PeripheralPins.c index d4756cbf22..d659685d8b 100644 --- a/variants/STM32F0xx/F030K6T/PeripheralPins.c +++ b/variants/STM32F0xx/F030K6T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F030K6Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F030R8T/PeripheralPins.c b/variants/STM32F0xx/F030R8T/PeripheralPins.c index 5d32883c18..4cc9704b0a 100644 --- a/variants/STM32F0xx/F030R8T/PeripheralPins.c +++ b/variants/STM32F0xx/F030R8T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F030R8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F030RCT/PeripheralPins.c b/variants/STM32F0xx/F030RCT/PeripheralPins.c index a7e4bc4afc..5535c6e7b5 100644 --- a/variants/STM32F0xx/F030RCT/PeripheralPins.c +++ b/variants/STM32F0xx/F030RCT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F030RCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F031C(4-6)T/PeripheralPins.c b/variants/STM32F0xx/F031C(4-6)T/PeripheralPins.c index 102dad499e..c0e8076681 100644 --- a/variants/STM32F0xx/F031C(4-6)T/PeripheralPins.c +++ b/variants/STM32F0xx/F031C(4-6)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F031C(4-6)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F031E6Y_F038E6Y/PeripheralPins.c b/variants/STM32F0xx/F031E6Y_F038E6Y/PeripheralPins.c index 5e56b8c197..dd28caf1d9 100644 --- a/variants/STM32F0xx/F031E6Y_F038E6Y/PeripheralPins.c +++ b/variants/STM32F0xx/F031E6Y_F038E6Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F031E6Yx.xml, STM32F038E6Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F031F(4-6)P/PeripheralPins.c b/variants/STM32F0xx/F031F(4-6)P/PeripheralPins.c index 36bd0bb2b8..cb85ccdae6 100644 --- a/variants/STM32F0xx/F031F(4-6)P/PeripheralPins.c +++ b/variants/STM32F0xx/F031F(4-6)P/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F031F(4-6)Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F031G(4-6)U/PeripheralPins.c b/variants/STM32F0xx/F031G(4-6)U/PeripheralPins.c index a667c9fe55..6ca225b6a0 100644 --- a/variants/STM32F0xx/F031G(4-6)U/PeripheralPins.c +++ b/variants/STM32F0xx/F031G(4-6)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F031G(4-6)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F031K(4-6)U/PeripheralPins.c b/variants/STM32F0xx/F031K(4-6)U/PeripheralPins.c index 1462559bca..3720e61a58 100644 --- a/variants/STM32F0xx/F031K(4-6)U/PeripheralPins.c +++ b/variants/STM32F0xx/F031K(4-6)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F031K(4-6)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F031K6T/PeripheralPins.c b/variants/STM32F0xx/F031K6T/PeripheralPins.c index 0b6e1da861..11a6011db9 100644 --- a/variants/STM32F0xx/F031K6T/PeripheralPins.c +++ b/variants/STM32F0xx/F031K6T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F031K6Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F038C6T/PeripheralPins.c b/variants/STM32F0xx/F038C6T/PeripheralPins.c index 9a54a9f29e..97c14240aa 100644 --- a/variants/STM32F0xx/F038C6T/PeripheralPins.c +++ b/variants/STM32F0xx/F038C6T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F038C6Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F038F6P/PeripheralPins.c b/variants/STM32F0xx/F038F6P/PeripheralPins.c index af8a5f1fb6..88309fc7ac 100644 --- a/variants/STM32F0xx/F038F6P/PeripheralPins.c +++ b/variants/STM32F0xx/F038F6P/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F038F6Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F038G6U/PeripheralPins.c b/variants/STM32F0xx/F038G6U/PeripheralPins.c index 1189fd14b0..c4fea66180 100644 --- a/variants/STM32F0xx/F038G6U/PeripheralPins.c +++ b/variants/STM32F0xx/F038G6U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F038G6Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F038K6U/PeripheralPins.c b/variants/STM32F0xx/F038K6U/PeripheralPins.c index f63193d0f6..370683a854 100644 --- a/variants/STM32F0xx/F038K6U/PeripheralPins.c +++ b/variants/STM32F0xx/F038K6U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F038K6Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F042C(4-6)(T-U)/PeripheralPins.c b/variants/STM32F0xx/F042C(4-6)(T-U)/PeripheralPins.c index 99cd29675e..aa01425a59 100644 --- a/variants/STM32F0xx/F042C(4-6)(T-U)/PeripheralPins.c +++ b/variants/STM32F0xx/F042C(4-6)(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F042C(4-6)Tx.xml, STM32F042C(4-6)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F042F(4-6)P/PeripheralPins.c b/variants/STM32F0xx/F042F(4-6)P/PeripheralPins.c index 57a5ade2c6..b64bb8caec 100644 --- a/variants/STM32F0xx/F042F(4-6)P/PeripheralPins.c +++ b/variants/STM32F0xx/F042F(4-6)P/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F042F4Px.xml, STM32F042F6Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F042G(4-6)U/PeripheralPins.c b/variants/STM32F0xx/F042G(4-6)U/PeripheralPins.c index cb829cf1cc..fd7219a5d0 100644 --- a/variants/STM32F0xx/F042G(4-6)U/PeripheralPins.c +++ b/variants/STM32F0xx/F042G(4-6)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F042G(4-6)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F042K(4-6)T/PeripheralPins.c b/variants/STM32F0xx/F042K(4-6)T/PeripheralPins.c index 0d672f5f3d..8f9acfaaab 100644 --- a/variants/STM32F0xx/F042K(4-6)T/PeripheralPins.c +++ b/variants/STM32F0xx/F042K(4-6)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F042K(4-6)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F042K(4-6)U/PeripheralPins.c b/variants/STM32F0xx/F042K(4-6)U/PeripheralPins.c index 99a2093b8a..bad63f62ae 100644 --- a/variants/STM32F0xx/F042K(4-6)U/PeripheralPins.c +++ b/variants/STM32F0xx/F042K(4-6)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F042K(4-6)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F042T6Y/PeripheralPins.c b/variants/STM32F0xx/F042T6Y/PeripheralPins.c index b8200816cc..6a73203268 100644 --- a/variants/STM32F0xx/F042T6Y/PeripheralPins.c +++ b/variants/STM32F0xx/F042T6Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F042T6Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F048C6U/PeripheralPins.c b/variants/STM32F0xx/F048C6U/PeripheralPins.c index f58893015f..81263ec10a 100644 --- a/variants/STM32F0xx/F048C6U/PeripheralPins.c +++ b/variants/STM32F0xx/F048C6U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F048C6Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F048G6U/PeripheralPins.c b/variants/STM32F0xx/F048G6U/PeripheralPins.c index 9375a60c45..ac7c8082c8 100644 --- a/variants/STM32F0xx/F048G6U/PeripheralPins.c +++ b/variants/STM32F0xx/F048G6U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F048G6Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F048T6Y/PeripheralPins.c b/variants/STM32F0xx/F048T6Y/PeripheralPins.c index 0343b9531d..1e36ab377d 100644 --- a/variants/STM32F0xx/F048T6Y/PeripheralPins.c +++ b/variants/STM32F0xx/F048T6Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F048T6Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F051C4(T-U)/PeripheralPins.c b/variants/STM32F0xx/F051C4(T-U)/PeripheralPins.c index 508bddb600..0fae358851 100644 --- a/variants/STM32F0xx/F051C4(T-U)/PeripheralPins.c +++ b/variants/STM32F0xx/F051C4(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F051C4Tx.xml, STM32F051C4Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F051C6(T-U)/PeripheralPins.c b/variants/STM32F0xx/F051C6(T-U)/PeripheralPins.c index 5b130eca70..12723da38b 100644 --- a/variants/STM32F0xx/F051C6(T-U)/PeripheralPins.c +++ b/variants/STM32F0xx/F051C6(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F051C6Tx.xml, STM32F051C6Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F051C8(T-U)/PeripheralPins.c b/variants/STM32F0xx/F051C8(T-U)/PeripheralPins.c index e58abd90da..2a7676b376 100644 --- a/variants/STM32F0xx/F051C8(T-U)/PeripheralPins.c +++ b/variants/STM32F0xx/F051C8(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F051C8Tx.xml, STM32F051C8Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F051K(6-8)T/PeripheralPins.c b/variants/STM32F0xx/F051K(6-8)T/PeripheralPins.c index 9a75cdaef1..246bfe7302 100644 --- a/variants/STM32F0xx/F051K(6-8)T/PeripheralPins.c +++ b/variants/STM32F0xx/F051K(6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F051K6Tx.xml, STM32F051K8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F051K(6-8)U/PeripheralPins.c b/variants/STM32F0xx/F051K(6-8)U/PeripheralPins.c index 9fa61f5ffb..d8501425f1 100644 --- a/variants/STM32F0xx/F051K(6-8)U/PeripheralPins.c +++ b/variants/STM32F0xx/F051K(6-8)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F051K6Ux.xml, STM32F051K8Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F051K4T/PeripheralPins.c b/variants/STM32F0xx/F051K4T/PeripheralPins.c index 43a46f2159..060f0db452 100644 --- a/variants/STM32F0xx/F051K4T/PeripheralPins.c +++ b/variants/STM32F0xx/F051K4T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F051K4Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F051K4U/PeripheralPins.c b/variants/STM32F0xx/F051K4U/PeripheralPins.c index 152f816f25..70633e9ce6 100644 --- a/variants/STM32F0xx/F051K4U/PeripheralPins.c +++ b/variants/STM32F0xx/F051K4U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F051K4Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F051R4T/PeripheralPins.c b/variants/STM32F0xx/F051R4T/PeripheralPins.c index 26b11fa2f4..dde004ac06 100644 --- a/variants/STM32F0xx/F051R4T/PeripheralPins.c +++ b/variants/STM32F0xx/F051R4T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F051R4Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F051R6T/PeripheralPins.c b/variants/STM32F0xx/F051R6T/PeripheralPins.c index 19f9f820f9..2a4cf0ef67 100644 --- a/variants/STM32F0xx/F051R6T/PeripheralPins.c +++ b/variants/STM32F0xx/F051R6T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F051R6Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F051R8(H-T)/PeripheralPins.c b/variants/STM32F0xx/F051R8(H-T)/PeripheralPins.c index 480e107625..5efdc4f97c 100644 --- a/variants/STM32F0xx/F051R8(H-T)/PeripheralPins.c +++ b/variants/STM32F0xx/F051R8(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F051R8Hx.xml, STM32F051R8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F051T8Y/PeripheralPins.c b/variants/STM32F0xx/F051T8Y/PeripheralPins.c index 07f20b4e0d..a506b7d092 100644 --- a/variants/STM32F0xx/F051T8Y/PeripheralPins.c +++ b/variants/STM32F0xx/F051T8Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F051T8Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F058C8U/PeripheralPins.c b/variants/STM32F0xx/F058C8U/PeripheralPins.c index 9e8fa57ab6..24874317bc 100644 --- a/variants/STM32F0xx/F058C8U/PeripheralPins.c +++ b/variants/STM32F0xx/F058C8U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F058C8Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F058R8(H-T)/PeripheralPins.c b/variants/STM32F0xx/F058R8(H-T)/PeripheralPins.c index fc4173582c..295bacb27c 100644 --- a/variants/STM32F0xx/F058R8(H-T)/PeripheralPins.c +++ b/variants/STM32F0xx/F058R8(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F058R8Hx.xml, STM32F058R8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F058T8Y/PeripheralPins.c b/variants/STM32F0xx/F058T8Y/PeripheralPins.c index 7361f3eec8..ba04ae82b6 100644 --- a/variants/STM32F0xx/F058T8Y/PeripheralPins.c +++ b/variants/STM32F0xx/F058T8Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F058T8Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F070C6T/PeripheralPins.c b/variants/STM32F0xx/F070C6T/PeripheralPins.c index 9502937494..620790e63f 100644 --- a/variants/STM32F0xx/F070C6T/PeripheralPins.c +++ b/variants/STM32F0xx/F070C6T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F070C6Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F070CBT/PeripheralPins.c b/variants/STM32F0xx/F070CBT/PeripheralPins.c index a92bb5d1c9..1d1784c9ed 100644 --- a/variants/STM32F0xx/F070CBT/PeripheralPins.c +++ b/variants/STM32F0xx/F070CBT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F070CBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F070F6P/PeripheralPins.c b/variants/STM32F0xx/F070F6P/PeripheralPins.c index cb1eefb0d9..10989f0b70 100644 --- a/variants/STM32F0xx/F070F6P/PeripheralPins.c +++ b/variants/STM32F0xx/F070F6P/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F070F6Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F070RBT/PeripheralPins.c b/variants/STM32F0xx/F070RBT/PeripheralPins.c index 60177478d9..4096a3cf4e 100644 --- a/variants/STM32F0xx/F070RBT/PeripheralPins.c +++ b/variants/STM32F0xx/F070RBT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F070RBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F071C8(T-U)_F071CB(T-U-Y)/PeripheralPins.c b/variants/STM32F0xx/F071C8(T-U)_F071CB(T-U-Y)/PeripheralPins.c index e0d8b40164..30f2bedf5e 100644 --- a/variants/STM32F0xx/F071C8(T-U)_F071CB(T-U-Y)/PeripheralPins.c +++ b/variants/STM32F0xx/F071C8(T-U)_F071CB(T-U-Y)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F071C(8-B)Tx.xml, STM32F071C(8-B)Ux.xml * STM32F071CBYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F071RBT/PeripheralPins.c b/variants/STM32F0xx/F071RBT/PeripheralPins.c index 529050837c..e320614306 100644 --- a/variants/STM32F0xx/F071RBT/PeripheralPins.c +++ b/variants/STM32F0xx/F071RBT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F071RBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F071V(8-B)(H-T)/PeripheralPins.c b/variants/STM32F0xx/F071V(8-B)(H-T)/PeripheralPins.c index af3782b116..81f119a7af 100644 --- a/variants/STM32F0xx/F071V(8-B)(H-T)/PeripheralPins.c +++ b/variants/STM32F0xx/F071V(8-B)(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F071V(8-B)Hx.xml, STM32F071V(8-B)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)/PeripheralPins.c b/variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)/PeripheralPins.c index 2aff3312e1..d99101e5db 100644 --- a/variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)/PeripheralPins.c +++ b/variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F072C(8-B)Tx.xml, STM32F072C(8-B)Ux.xml * STM32F072CBYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F072R8T_F072RB(H-I-T)/PeripheralPins.c b/variants/STM32F0xx/F072R8T_F072RB(H-I-T)/PeripheralPins.c index 5b9cad2ed7..65b3748744 100644 --- a/variants/STM32F0xx/F072R8T_F072RB(H-I-T)/PeripheralPins.c +++ b/variants/STM32F0xx/F072R8T_F072RB(H-I-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F072R(8-B)Tx.xml, STM32F072RBHx.xml * STM32F072RBIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F072V(8-B)(H-T)/PeripheralPins.c b/variants/STM32F0xx/F072V(8-B)(H-T)/PeripheralPins.c index 2d6cbeb332..2bac784c42 100644 --- a/variants/STM32F0xx/F072V(8-B)(H-T)/PeripheralPins.c +++ b/variants/STM32F0xx/F072V(8-B)(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F072V(8-B)Hx.xml, STM32F072V(8-B)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F078CB(T-U-Y)/PeripheralPins.c b/variants/STM32F0xx/F078CB(T-U-Y)/PeripheralPins.c index e2ef84476a..1ede5be1c9 100644 --- a/variants/STM32F0xx/F078CB(T-U-Y)/PeripheralPins.c +++ b/variants/STM32F0xx/F078CB(T-U-Y)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F078CBTx.xml, STM32F078CBUx.xml * STM32F078CBYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F078RB(H-T)/PeripheralPins.c b/variants/STM32F0xx/F078RB(H-T)/PeripheralPins.c index 246630c84d..af19e0149b 100644 --- a/variants/STM32F0xx/F078RB(H-T)/PeripheralPins.c +++ b/variants/STM32F0xx/F078RB(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F078RBHx.xml, STM32F078RBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F078VB(H-T)/PeripheralPins.c b/variants/STM32F0xx/F078VB(H-T)/PeripheralPins.c index ecc1a38486..c7ed669080 100644 --- a/variants/STM32F0xx/F078VB(H-T)/PeripheralPins.c +++ b/variants/STM32F0xx/F078VB(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F078VBHx.xml, STM32F078VBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F091C(B-C)(T-U)/PeripheralPins.c b/variants/STM32F0xx/F091C(B-C)(T-U)/PeripheralPins.c index 2b537d9dfb..c03f8c36fd 100644 --- a/variants/STM32F0xx/F091C(B-C)(T-U)/PeripheralPins.c +++ b/variants/STM32F0xx/F091C(B-C)(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F091C(B-C)Tx.xml, STM32F091C(B-C)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F091RBT_F091RC(H-T-Y)/PeripheralPins.c b/variants/STM32F0xx/F091RBT_F091RC(H-T-Y)/PeripheralPins.c index b21bb61cc6..4f0748166a 100644 --- a/variants/STM32F0xx/F091RBT_F091RC(H-T-Y)/PeripheralPins.c +++ b/variants/STM32F0xx/F091RBT_F091RC(H-T-Y)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F091R(B-C)Tx.xml, STM32F091RCHx.xml * STM32F091RCYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F091VBT_F091VC(H-T)/PeripheralPins.c b/variants/STM32F0xx/F091VBT_F091VC(H-T)/PeripheralPins.c index cbe0362a94..fd3108b5e9 100644 --- a/variants/STM32F0xx/F091VBT_F091VC(H-T)/PeripheralPins.c +++ b/variants/STM32F0xx/F091VBT_F091VC(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F091V(B-C)Tx.xml, STM32F091VCHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F098CC(T-U)/PeripheralPins.c b/variants/STM32F0xx/F098CC(T-U)/PeripheralPins.c index d5ae75cfee..b6537ccf9d 100644 --- a/variants/STM32F0xx/F098CC(T-U)/PeripheralPins.c +++ b/variants/STM32F0xx/F098CC(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F098CCTx.xml, STM32F098CCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F098RC(H-T-Y)/PeripheralPins.c b/variants/STM32F0xx/F098RC(H-T-Y)/PeripheralPins.c index a3dc070a6a..4dfc656d34 100644 --- a/variants/STM32F0xx/F098RC(H-T-Y)/PeripheralPins.c +++ b/variants/STM32F0xx/F098RC(H-T-Y)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F098RCHx.xml, STM32F098RCTx.xml * STM32F098RCYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F0xx/F098VC(H-T)/PeripheralPins.c b/variants/STM32F0xx/F098VC(H-T)/PeripheralPins.c index cc55ef9372..f4d6e2b546 100644 --- a/variants/STM32F0xx/F098VC(H-T)/PeripheralPins.c +++ b/variants/STM32F0xx/F098VC(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F098VCHx.xml, STM32F098VCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F100C(4-6)T/PeripheralPins.c b/variants/STM32F1xx/F100C(4-6)T/PeripheralPins.c index 916657dcc5..c714950eee 100644 --- a/variants/STM32F1xx/F100C(4-6)T/PeripheralPins.c +++ b/variants/STM32F1xx/F100C(4-6)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F100C(4-6)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F100C(8-B)T/PeripheralPins.c b/variants/STM32F1xx/F100C(8-B)T/PeripheralPins.c index 794819d075..cce94a31e6 100644 --- a/variants/STM32F1xx/F100C(8-B)T/PeripheralPins.c +++ b/variants/STM32F1xx/F100C(8-B)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F100C(8-B)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F100R(4-6)H/PeripheralPins.c b/variants/STM32F1xx/F100R(4-6)H/PeripheralPins.c index ddd1b346bc..81fcb2d58f 100644 --- a/variants/STM32F1xx/F100R(4-6)H/PeripheralPins.c +++ b/variants/STM32F1xx/F100R(4-6)H/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F100R(4-6)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F100R(4-6)T/PeripheralPins.c b/variants/STM32F1xx/F100R(4-6)T/PeripheralPins.c index 21819418ac..30bc240fd5 100644 --- a/variants/STM32F1xx/F100R(4-6)T/PeripheralPins.c +++ b/variants/STM32F1xx/F100R(4-6)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F100R(4-6)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F100R(8-B)H/PeripheralPins.c b/variants/STM32F1xx/F100R(8-B)H/PeripheralPins.c index d48465f326..1415858dd9 100644 --- a/variants/STM32F1xx/F100R(8-B)H/PeripheralPins.c +++ b/variants/STM32F1xx/F100R(8-B)H/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F100R(8-B)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F100R(8-B)T/PeripheralPins.c b/variants/STM32F1xx/F100R(8-B)T/PeripheralPins.c index 0cdfd9545d..e26d2bd3d8 100644 --- a/variants/STM32F1xx/F100R(8-B)T/PeripheralPins.c +++ b/variants/STM32F1xx/F100R(8-B)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F100R(8-B)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F100R(C-D-E)T/PeripheralPins.c b/variants/STM32F1xx/F100R(C-D-E)T/PeripheralPins.c index 66bb35aa69..24b5cae1f7 100644 --- a/variants/STM32F1xx/F100R(C-D-E)T/PeripheralPins.c +++ b/variants/STM32F1xx/F100R(C-D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F100R(C-D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F100V(8-B)T/PeripheralPins.c b/variants/STM32F1xx/F100V(8-B)T/PeripheralPins.c index 9a7a54dd75..722b671f1d 100644 --- a/variants/STM32F1xx/F100V(8-B)T/PeripheralPins.c +++ b/variants/STM32F1xx/F100V(8-B)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F100V(8-B)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F100V(C-D-E)T/PeripheralPins.c b/variants/STM32F1xx/F100V(C-D-E)T/PeripheralPins.c index 18ef59c87f..b974efda7a 100644 --- a/variants/STM32F1xx/F100V(C-D-E)T/PeripheralPins.c +++ b/variants/STM32F1xx/F100V(C-D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F100V(C-D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F100Z(C-D-E)T/PeripheralPins.c b/variants/STM32F1xx/F100Z(C-D-E)T/PeripheralPins.c index e7c73c865f..e42bc60048 100644 --- a/variants/STM32F1xx/F100Z(C-D-E)T/PeripheralPins.c +++ b/variants/STM32F1xx/F100Z(C-D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F100Z(C-D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101C(4-6)T/PeripheralPins.c b/variants/STM32F1xx/F101C(4-6)T/PeripheralPins.c index 10fe70b872..6a6b09ad7d 100644 --- a/variants/STM32F1xx/F101C(4-6)T/PeripheralPins.c +++ b/variants/STM32F1xx/F101C(4-6)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101C(4-6)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101C(8-B)(T-U)/PeripheralPins.c b/variants/STM32F1xx/F101C(8-B)(T-U)/PeripheralPins.c index 898bf476d1..3c4fd67b67 100644 --- a/variants/STM32F1xx/F101C(8-B)(T-U)/PeripheralPins.c +++ b/variants/STM32F1xx/F101C(8-B)(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101C(8-B)Tx.xml, STM32F101C(8-B)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101R(4-6)T/PeripheralPins.c b/variants/STM32F1xx/F101R(4-6)T/PeripheralPins.c index a0502cbe66..02097de115 100644 --- a/variants/STM32F1xx/F101R(4-6)T/PeripheralPins.c +++ b/variants/STM32F1xx/F101R(4-6)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101R(4-6)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101R(8-B)T/PeripheralPins.c b/variants/STM32F1xx/F101R(8-B)T/PeripheralPins.c index 4e961b29b6..db48b044e9 100644 --- a/variants/STM32F1xx/F101R(8-B)T/PeripheralPins.c +++ b/variants/STM32F1xx/F101R(8-B)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101R(8-B)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101R(C-D-E)T/PeripheralPins.c b/variants/STM32F1xx/F101R(C-D-E)T/PeripheralPins.c index 5191af6c90..91f92fc198 100644 --- a/variants/STM32F1xx/F101R(C-D-E)T/PeripheralPins.c +++ b/variants/STM32F1xx/F101R(C-D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101R(C-D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101R(F-G)T/PeripheralPins.c b/variants/STM32F1xx/F101R(F-G)T/PeripheralPins.c index b538d58992..1b55db26bd 100644 --- a/variants/STM32F1xx/F101R(F-G)T/PeripheralPins.c +++ b/variants/STM32F1xx/F101R(F-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101R(F-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101RBH/PeripheralPins.c b/variants/STM32F1xx/F101RBH/PeripheralPins.c index 57844356b8..a2c31debef 100644 --- a/variants/STM32F1xx/F101RBH/PeripheralPins.c +++ b/variants/STM32F1xx/F101RBH/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101RBHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101T(4-6)U/PeripheralPins.c b/variants/STM32F1xx/F101T(4-6)U/PeripheralPins.c index 34fa2a896b..a94eb3d47e 100644 --- a/variants/STM32F1xx/F101T(4-6)U/PeripheralPins.c +++ b/variants/STM32F1xx/F101T(4-6)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101T(4-6)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101T(8-B)U/PeripheralPins.c b/variants/STM32F1xx/F101T(8-B)U/PeripheralPins.c index 655f875d3f..db950a48e4 100644 --- a/variants/STM32F1xx/F101T(8-B)U/PeripheralPins.c +++ b/variants/STM32F1xx/F101T(8-B)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101T(8-B)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101V(8-B)T/PeripheralPins.c b/variants/STM32F1xx/F101V(8-B)T/PeripheralPins.c index d422805668..a3a7180626 100644 --- a/variants/STM32F1xx/F101V(8-B)T/PeripheralPins.c +++ b/variants/STM32F1xx/F101V(8-B)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101V(8-B)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101V(C-D-E)T/PeripheralPins.c b/variants/STM32F1xx/F101V(C-D-E)T/PeripheralPins.c index 109a2b4818..2b53b40a17 100644 --- a/variants/STM32F1xx/F101V(C-D-E)T/PeripheralPins.c +++ b/variants/STM32F1xx/F101V(C-D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101V(C-D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101V(F-G)T/PeripheralPins.c b/variants/STM32F1xx/F101V(F-G)T/PeripheralPins.c index f5e3f495c0..1b831effc9 100644 --- a/variants/STM32F1xx/F101V(F-G)T/PeripheralPins.c +++ b/variants/STM32F1xx/F101V(F-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101V(F-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101Z(C-D-E)T/PeripheralPins.c b/variants/STM32F1xx/F101Z(C-D-E)T/PeripheralPins.c index 5af020314c..a345593b93 100644 --- a/variants/STM32F1xx/F101Z(C-D-E)T/PeripheralPins.c +++ b/variants/STM32F1xx/F101Z(C-D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101Z(C-D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F101Z(F-G)T/PeripheralPins.c b/variants/STM32F1xx/F101Z(F-G)T/PeripheralPins.c index 536d2a9319..6a6b29e0be 100644 --- a/variants/STM32F1xx/F101Z(F-G)T/PeripheralPins.c +++ b/variants/STM32F1xx/F101Z(F-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F101Z(F-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F102C(4-6)T/PeripheralPins.c b/variants/STM32F1xx/F102C(4-6)T/PeripheralPins.c index 706516ab1c..6e7ef05730 100644 --- a/variants/STM32F1xx/F102C(4-6)T/PeripheralPins.c +++ b/variants/STM32F1xx/F102C(4-6)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F102C(4-6)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F102C(8-B)T/PeripheralPins.c b/variants/STM32F1xx/F102C(8-B)T/PeripheralPins.c index 95269f651b..6f64c794e2 100644 --- a/variants/STM32F1xx/F102C(8-B)T/PeripheralPins.c +++ b/variants/STM32F1xx/F102C(8-B)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F102C(8-B)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F102R(4-6)T/PeripheralPins.c b/variants/STM32F1xx/F102R(4-6)T/PeripheralPins.c index dda51481bb..6ac9059df2 100644 --- a/variants/STM32F1xx/F102R(4-6)T/PeripheralPins.c +++ b/variants/STM32F1xx/F102R(4-6)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F102R(4-6)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F102R(8-B)T/PeripheralPins.c b/variants/STM32F1xx/F102R(8-B)T/PeripheralPins.c index dcb4f00294..5d08a6531f 100644 --- a/variants/STM32F1xx/F102R(8-B)T/PeripheralPins.c +++ b/variants/STM32F1xx/F102R(8-B)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F102R(8-B)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103C4T_F103C6(T-U)/PeripheralPins.c b/variants/STM32F1xx/F103C4T_F103C6(T-U)/PeripheralPins.c index dfcb9f67ed..75aef85524 100644 --- a/variants/STM32F1xx/F103C4T_F103C6(T-U)/PeripheralPins.c +++ b/variants/STM32F1xx/F103C4T_F103C6(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103C(4-6)Tx.xml, STM32F103C6Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103C8T_F103CB(T-U)/PeripheralPins.c b/variants/STM32F1xx/F103C8T_F103CB(T-U)/PeripheralPins.c index 3a24d3ef1e..7afa4da502 100644 --- a/variants/STM32F1xx/F103C8T_F103CB(T-U)/PeripheralPins.c +++ b/variants/STM32F1xx/F103C8T_F103CB(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103C(8-B)Tx.xml, STM32F103CBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103R(4-6)H/PeripheralPins.c b/variants/STM32F1xx/F103R(4-6)H/PeripheralPins.c index 0faad78acb..3bfee79573 100644 --- a/variants/STM32F1xx/F103R(4-6)H/PeripheralPins.c +++ b/variants/STM32F1xx/F103R(4-6)H/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103R(4-6)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103R(4-6)T/PeripheralPins.c b/variants/STM32F1xx/F103R(4-6)T/PeripheralPins.c index 2f8a9380df..de6815850a 100644 --- a/variants/STM32F1xx/F103R(4-6)T/PeripheralPins.c +++ b/variants/STM32F1xx/F103R(4-6)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103R(4-6)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103R(8-B)H/PeripheralPins.c b/variants/STM32F1xx/F103R(8-B)H/PeripheralPins.c index 570ee6bd1e..d32ba8880f 100644 --- a/variants/STM32F1xx/F103R(8-B)H/PeripheralPins.c +++ b/variants/STM32F1xx/F103R(8-B)H/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103R(8-B)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103R(8-B)T/PeripheralPins.c b/variants/STM32F1xx/F103R(8-B)T/PeripheralPins.c index 5b3451ef1b..c8ef25ce16 100644 --- a/variants/STM32F1xx/F103R(8-B)T/PeripheralPins.c +++ b/variants/STM32F1xx/F103R(8-B)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103R(8-B)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103R(C-D-E)T/PeripheralPins.c b/variants/STM32F1xx/F103R(C-D-E)T/PeripheralPins.c index fec7a2dd8f..47eb27ea1e 100644 --- a/variants/STM32F1xx/F103R(C-D-E)T/PeripheralPins.c +++ b/variants/STM32F1xx/F103R(C-D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103R(C-D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103R(C-D-E)Y/PeripheralPins.c b/variants/STM32F1xx/F103R(C-D-E)Y/PeripheralPins.c index d2d4f557bd..762fee1c2d 100644 --- a/variants/STM32F1xx/F103R(C-D-E)Y/PeripheralPins.c +++ b/variants/STM32F1xx/F103R(C-D-E)Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103R(C-D-E)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103R(F-G)T/PeripheralPins.c b/variants/STM32F1xx/F103R(F-G)T/PeripheralPins.c index d38cc8303e..6e74f59dc4 100644 --- a/variants/STM32F1xx/F103R(F-G)T/PeripheralPins.c +++ b/variants/STM32F1xx/F103R(F-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103R(F-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103T(4-6)U/PeripheralPins.c b/variants/STM32F1xx/F103T(4-6)U/PeripheralPins.c index 25e93a3d8c..1d21b07591 100644 --- a/variants/STM32F1xx/F103T(4-6)U/PeripheralPins.c +++ b/variants/STM32F1xx/F103T(4-6)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103T(4-6)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103T(8-B)U/PeripheralPins.c b/variants/STM32F1xx/F103T(8-B)U/PeripheralPins.c index 8327edd0bd..9d343b4f82 100644 --- a/variants/STM32F1xx/F103T(8-B)U/PeripheralPins.c +++ b/variants/STM32F1xx/F103T(8-B)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103T(8-B)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103V(C-D-E)(H-T)/PeripheralPins.c b/variants/STM32F1xx/F103V(C-D-E)(H-T)/PeripheralPins.c index afe53ee452..527fea9cdf 100644 --- a/variants/STM32F1xx/F103V(C-D-E)(H-T)/PeripheralPins.c +++ b/variants/STM32F1xx/F103V(C-D-E)(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103V(C-D-E)Hx.xml, STM32F103V(C-D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103V(F-G)T/PeripheralPins.c b/variants/STM32F1xx/F103V(F-G)T/PeripheralPins.c index 989a013edb..4c8575e3bd 100644 --- a/variants/STM32F1xx/F103V(F-G)T/PeripheralPins.c +++ b/variants/STM32F1xx/F103V(F-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103V(F-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)/PeripheralPins.c b/variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)/PeripheralPins.c index 394b5a8aab..e2eee7ef18 100644 --- a/variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)/PeripheralPins.c +++ b/variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F103V(8-B)Hx.xml, STM32F103V(8-B)Tx.xml * STM32F103VBIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103Z(C-D-E)(H-T)/PeripheralPins.c b/variants/STM32F1xx/F103Z(C-D-E)(H-T)/PeripheralPins.c index 2bc881480d..2a6345c819 100644 --- a/variants/STM32F1xx/F103Z(C-D-E)(H-T)/PeripheralPins.c +++ b/variants/STM32F1xx/F103Z(C-D-E)(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103Z(C-D-E)Hx.xml, STM32F103Z(C-D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F103Z(F-G)(H-T)/PeripheralPins.c b/variants/STM32F1xx/F103Z(F-G)(H-T)/PeripheralPins.c index ffc5973356..f7ed74e491 100644 --- a/variants/STM32F1xx/F103Z(F-G)(H-T)/PeripheralPins.c +++ b/variants/STM32F1xx/F103Z(F-G)(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F103Z(F-G)Hx.xml, STM32F103Z(F-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F105R(8-B-C)T/PeripheralPins.c b/variants/STM32F1xx/F105R(8-B-C)T/PeripheralPins.c index d70b9e11ec..e9a98a9369 100644 --- a/variants/STM32F1xx/F105R(8-B-C)T/PeripheralPins.c +++ b/variants/STM32F1xx/F105R(8-B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F105R(8-B-C)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F105V(8-B)(H-T)_F105VCT/PeripheralPins.c b/variants/STM32F1xx/F105V(8-B)(H-T)_F105VCT/PeripheralPins.c index 15c27e9c41..5cf002b13a 100644 --- a/variants/STM32F1xx/F105V(8-B)(H-T)_F105VCT/PeripheralPins.c +++ b/variants/STM32F1xx/F105V(8-B)(H-T)_F105VCT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F105V(8-B)Hx.xml, STM32F105V(8-B-C)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F107R(B-C)T/PeripheralPins.c b/variants/STM32F1xx/F107R(B-C)T/PeripheralPins.c index c70391299a..cc6747f0dd 100644 --- a/variants/STM32F1xx/F107R(B-C)T/PeripheralPins.c +++ b/variants/STM32F1xx/F107R(B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F107R(B-C)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F1xx/F107VBT_F107VC(H-T)/PeripheralPins.c b/variants/STM32F1xx/F107VBT_F107VC(H-T)/PeripheralPins.c index 9ba500ed49..1612dbf425 100644 --- a/variants/STM32F1xx/F107VBT_F107VC(H-T)/PeripheralPins.c +++ b/variants/STM32F1xx/F107VBT_F107VC(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F107V(B-C)Tx.xml, STM32F107VCHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/PeripheralPins.c b/variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/PeripheralPins.c index 5104bc0a7b..685b9831bf 100644 --- a/variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/PeripheralPins.c +++ b/variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F205R(B-C-E-F-G)Tx.xml, STM32F205R(E-G)Yx.xml * STM32F205RGEx.xml, STM32F215R(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T/PeripheralPins.c b/variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T/PeripheralPins.c index 707ae69c64..6c5b1614e3 100644 --- a/variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T/PeripheralPins.c +++ b/variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F205V(B-C-E-F-G)Tx.xml, STM32F215V(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T/PeripheralPins.c b/variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T/PeripheralPins.c index 6d4b5a18e6..017be473ef 100644 --- a/variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T/PeripheralPins.c +++ b/variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F205Z(C-E-F-G)Tx.xml, STM32F215Z(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)/PeripheralPins.c b/variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)/PeripheralPins.c index 6b01c7ea45..87bf397ace 100644 --- a/variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)/PeripheralPins.c +++ b/variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F207I(C-E-F-G)Hx.xml, STM32F207I(C-E-F-G)Tx.xml * STM32F217I(E-G)Hx.xml, STM32F217I(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T/PeripheralPins.c b/variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T/PeripheralPins.c index 274a501e8a..73360c4949 100644 --- a/variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T/PeripheralPins.c +++ b/variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F207V(C-E-F-G)Tx.xml, STM32F217V(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T/PeripheralPins.c b/variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T/PeripheralPins.c index 8f8718f140..13a99ac3a0 100644 --- a/variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T/PeripheralPins.c +++ b/variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F207Z(C-E-F-G)Tx.xml, STM32F217Z(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F301C6T_F301C8(T-Y)/PeripheralPins.c b/variants/STM32F3xx/F301C6T_F301C8(T-Y)/PeripheralPins.c index 787fab7c3d..49d7660355 100644 --- a/variants/STM32F3xx/F301C6T_F301C8(T-Y)/PeripheralPins.c +++ b/variants/STM32F3xx/F301C6T_F301C8(T-Y)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F301C(6-8)Tx.xml, STM32F301C8Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F301K(6-8)T/PeripheralPins.c b/variants/STM32F3xx/F301K(6-8)T/PeripheralPins.c index 247235bb05..2f2ceaca76 100644 --- a/variants/STM32F3xx/F301K(6-8)T/PeripheralPins.c +++ b/variants/STM32F3xx/F301K(6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F301K(6-8)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F301K(6-8)U/PeripheralPins.c b/variants/STM32F3xx/F301K(6-8)U/PeripheralPins.c index c87142d6a9..dc6aaef503 100644 --- a/variants/STM32F3xx/F301K(6-8)U/PeripheralPins.c +++ b/variants/STM32F3xx/F301K(6-8)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F301K(6-8)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F301R(6-8)T/PeripheralPins.c b/variants/STM32F3xx/F301R(6-8)T/PeripheralPins.c index d66daa690e..d61ce2be79 100644 --- a/variants/STM32F3xx/F301R(6-8)T/PeripheralPins.c +++ b/variants/STM32F3xx/F301R(6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F301R(6-8)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F302C(B-C)T/PeripheralPins.c b/variants/STM32F3xx/F302C(B-C)T/PeripheralPins.c index 0817e58333..f2f4a19d97 100644 --- a/variants/STM32F3xx/F302C(B-C)T/PeripheralPins.c +++ b/variants/STM32F3xx/F302C(B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F302C(B-C)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F302C6T_F302C8(T-Y)/PeripheralPins.c b/variants/STM32F3xx/F302C6T_F302C8(T-Y)/PeripheralPins.c index 0e8d9029d0..90fc55af61 100644 --- a/variants/STM32F3xx/F302C6T_F302C8(T-Y)/PeripheralPins.c +++ b/variants/STM32F3xx/F302C6T_F302C8(T-Y)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F302C(6-8)Tx.xml, STM32F302C8Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F302K(6-8)U/PeripheralPins.c b/variants/STM32F3xx/F302K(6-8)U/PeripheralPins.c index 4b6c6e9259..a2d3418d49 100644 --- a/variants/STM32F3xx/F302K(6-8)U/PeripheralPins.c +++ b/variants/STM32F3xx/F302K(6-8)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F302K(6-8)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F302R(6-8)T/PeripheralPins.c b/variants/STM32F3xx/F302R(6-8)T/PeripheralPins.c index a226ebf516..0a618ec4f1 100644 --- a/variants/STM32F3xx/F302R(6-8)T/PeripheralPins.c +++ b/variants/STM32F3xx/F302R(6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F302R(6-8)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F302R(B-C)T/PeripheralPins.c b/variants/STM32F3xx/F302R(B-C)T/PeripheralPins.c index 3a8475580f..c344b958a2 100644 --- a/variants/STM32F3xx/F302R(B-C)T/PeripheralPins.c +++ b/variants/STM32F3xx/F302R(B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F302R(B-C)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F302R(D-E)T/PeripheralPins.c b/variants/STM32F3xx/F302R(D-E)T/PeripheralPins.c index 0d74532483..cf0ff25098 100644 --- a/variants/STM32F3xx/F302R(D-E)T/PeripheralPins.c +++ b/variants/STM32F3xx/F302R(D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F302R(D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F302V(B-C)T/PeripheralPins.c b/variants/STM32F3xx/F302V(B-C)T/PeripheralPins.c index 0b869b9dfa..6cd7f2ff4c 100644 --- a/variants/STM32F3xx/F302V(B-C)T/PeripheralPins.c +++ b/variants/STM32F3xx/F302V(B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F302V(B-C)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F302V(D-E)(H-T)/PeripheralPins.c b/variants/STM32F3xx/F302V(D-E)(H-T)/PeripheralPins.c index ce8ede916d..bdf536c85a 100644 --- a/variants/STM32F3xx/F302V(D-E)(H-T)/PeripheralPins.c +++ b/variants/STM32F3xx/F302V(D-E)(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F302V(D-E)Hx.xml, STM32F302V(D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F302VCY/PeripheralPins.c b/variants/STM32F3xx/F302VCY/PeripheralPins.c index 73f7944201..e7b231fcfb 100644 --- a/variants/STM32F3xx/F302VCY/PeripheralPins.c +++ b/variants/STM32F3xx/F302VCY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F302VCYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F302Z(D-E)T/PeripheralPins.c b/variants/STM32F3xx/F302Z(D-E)T/PeripheralPins.c index a102a3b2f5..0bf13c7cb1 100644 --- a/variants/STM32F3xx/F302Z(D-E)T/PeripheralPins.c +++ b/variants/STM32F3xx/F302Z(D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F302Z(D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303C(6-8)T_F334C(4-6-8)T/PeripheralPins.c b/variants/STM32F3xx/F303C(6-8)T_F334C(4-6-8)T/PeripheralPins.c index cf49676753..ced4dc8539 100644 --- a/variants/STM32F3xx/F303C(6-8)T_F334C(4-6-8)T/PeripheralPins.c +++ b/variants/STM32F3xx/F303C(6-8)T_F334C(4-6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303C(6-8)Tx.xml, STM32F334C(4-6-8)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303C(B-C)T/PeripheralPins.c b/variants/STM32F3xx/F303C(B-C)T/PeripheralPins.c index f5621b51f0..175dfb6871 100644 --- a/variants/STM32F3xx/F303C(B-C)T/PeripheralPins.c +++ b/variants/STM32F3xx/F303C(B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303C(B-C)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303C8Y_F334C8Y/PeripheralPins.c b/variants/STM32F3xx/F303C8Y_F334C8Y/PeripheralPins.c index 329f9a9a12..260a815dd9 100644 --- a/variants/STM32F3xx/F303C8Y_F334C8Y/PeripheralPins.c +++ b/variants/STM32F3xx/F303C8Y_F334C8Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303C8Yx.xml, STM32F334C8Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T/PeripheralPins.c b/variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T/PeripheralPins.c index 09f676da36..294289b0b4 100644 --- a/variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T/PeripheralPins.c +++ b/variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303K(6-8)Tx.xml, STM32F334K(4-6-8)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303K(6-8)U_F334K(4-6-8)U/PeripheralPins.c b/variants/STM32F3xx/F303K(6-8)U_F334K(4-6-8)U/PeripheralPins.c index beeef2976c..3d49b3f105 100644 --- a/variants/STM32F3xx/F303K(6-8)U_F334K(4-6-8)U/PeripheralPins.c +++ b/variants/STM32F3xx/F303K(6-8)U_F334K(4-6-8)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303K(6-8)Ux.xml, STM32F334K(4-6-8)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/PeripheralPins.c b/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/PeripheralPins.c index 2930af1a20..ae3f4b4ff6 100644 --- a/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/PeripheralPins.c +++ b/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303R(6-8)Tx.xml, STM32F334R(6-8)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303R(B-C)T/PeripheralPins.c b/variants/STM32F3xx/F303R(B-C)T/PeripheralPins.c index 97f0d544a8..ca7f160579 100644 --- a/variants/STM32F3xx/F303R(B-C)T/PeripheralPins.c +++ b/variants/STM32F3xx/F303R(B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303R(B-C)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303R(D-E)T/PeripheralPins.c b/variants/STM32F3xx/F303R(D-E)T/PeripheralPins.c index 0b924e287c..4b4c998904 100644 --- a/variants/STM32F3xx/F303R(D-E)T/PeripheralPins.c +++ b/variants/STM32F3xx/F303R(D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303R(D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303V(B-C)T/PeripheralPins.c b/variants/STM32F3xx/F303V(B-C)T/PeripheralPins.c index 1753ac8b94..f3d0827882 100644 --- a/variants/STM32F3xx/F303V(B-C)T/PeripheralPins.c +++ b/variants/STM32F3xx/F303V(B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303V(B-C)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303V(D-E)(H-T)/PeripheralPins.c b/variants/STM32F3xx/F303V(D-E)(H-T)/PeripheralPins.c index 6b295cc282..66f6495eb9 100644 --- a/variants/STM32F3xx/F303V(D-E)(H-T)/PeripheralPins.c +++ b/variants/STM32F3xx/F303V(D-E)(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303V(D-E)Hx.xml, STM32F303V(D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303VCY/PeripheralPins.c b/variants/STM32F3xx/F303VCY/PeripheralPins.c index f8deecbc4a..ab9dae6d10 100644 --- a/variants/STM32F3xx/F303VCY/PeripheralPins.c +++ b/variants/STM32F3xx/F303VCY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303VCYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303VEY/PeripheralPins.c b/variants/STM32F3xx/F303VEY/PeripheralPins.c index ce4af5293a..38e39fa5a4 100644 --- a/variants/STM32F3xx/F303VEY/PeripheralPins.c +++ b/variants/STM32F3xx/F303VEY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303VEYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F303Z(D-E)T/PeripheralPins.c b/variants/STM32F3xx/F303Z(D-E)T/PeripheralPins.c index 29ba31f33f..296629b4e9 100644 --- a/variants/STM32F3xx/F303Z(D-E)T/PeripheralPins.c +++ b/variants/STM32F3xx/F303Z(D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F303Z(D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F318C8(T-Y)/PeripheralPins.c b/variants/STM32F3xx/F318C8(T-Y)/PeripheralPins.c index 2a432d2306..490c80df16 100644 --- a/variants/STM32F3xx/F318C8(T-Y)/PeripheralPins.c +++ b/variants/STM32F3xx/F318C8(T-Y)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F318C8Tx.xml, STM32F318C8Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F318K8U/PeripheralPins.c b/variants/STM32F3xx/F318K8U/PeripheralPins.c index ac1bc97eff..f1ed973398 100644 --- a/variants/STM32F3xx/F318K8U/PeripheralPins.c +++ b/variants/STM32F3xx/F318K8U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F318K8Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F328C8T/PeripheralPins.c b/variants/STM32F3xx/F328C8T/PeripheralPins.c index 74bfed4130..bb044b0955 100644 --- a/variants/STM32F3xx/F328C8T/PeripheralPins.c +++ b/variants/STM32F3xx/F328C8T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F328C8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F358CCT/PeripheralPins.c b/variants/STM32F3xx/F358CCT/PeripheralPins.c index e61d792a96..be221b0ea9 100644 --- a/variants/STM32F3xx/F358CCT/PeripheralPins.c +++ b/variants/STM32F3xx/F358CCT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F358CCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F358RCT/PeripheralPins.c b/variants/STM32F3xx/F358RCT/PeripheralPins.c index 8348645d8e..390a08d1eb 100644 --- a/variants/STM32F3xx/F358RCT/PeripheralPins.c +++ b/variants/STM32F3xx/F358RCT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F358RCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F358VCT/PeripheralPins.c b/variants/STM32F3xx/F358VCT/PeripheralPins.c index 4a983b8b3b..04939c0d27 100644 --- a/variants/STM32F3xx/F358VCT/PeripheralPins.c +++ b/variants/STM32F3xx/F358VCT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F358VCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F373C(8-B-C)T/PeripheralPins.c b/variants/STM32F3xx/F373C(8-B-C)T/PeripheralPins.c index 47c656193d..2288995a8e 100644 --- a/variants/STM32F3xx/F373C(8-B-C)T/PeripheralPins.c +++ b/variants/STM32F3xx/F373C(8-B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F373C(8-B-C)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F373R(8-B-C)T/PeripheralPins.c b/variants/STM32F3xx/F373R(8-B-C)T/PeripheralPins.c index 99a32a0a27..0142b497af 100644 --- a/variants/STM32F3xx/F373R(8-B-C)T/PeripheralPins.c +++ b/variants/STM32F3xx/F373R(8-B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F373R(8-B-C)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F373V(8-B-C)(H-T)/PeripheralPins.c b/variants/STM32F3xx/F373V(8-B-C)(H-T)/PeripheralPins.c index 0d4c49e06a..74e9f4445d 100644 --- a/variants/STM32F3xx/F373V(8-B-C)(H-T)/PeripheralPins.c +++ b/variants/STM32F3xx/F373V(8-B-C)(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F373V(8-B-C)Hx.xml, STM32F373V(8-B-C)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F378CCT/PeripheralPins.c b/variants/STM32F3xx/F378CCT/PeripheralPins.c index de1efd11d8..7db2a7b513 100644 --- a/variants/STM32F3xx/F378CCT/PeripheralPins.c +++ b/variants/STM32F3xx/F378CCT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F378CCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F378RC(T-Y)/PeripheralPins.c b/variants/STM32F3xx/F378RC(T-Y)/PeripheralPins.c index 4f2cb55006..124914a96b 100644 --- a/variants/STM32F3xx/F378RC(T-Y)/PeripheralPins.c +++ b/variants/STM32F3xx/F378RC(T-Y)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F378RCTx.xml, STM32F378RCYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F378VC(H-T)/PeripheralPins.c b/variants/STM32F3xx/F378VC(H-T)/PeripheralPins.c index b5eabfd7c2..45daf282a2 100644 --- a/variants/STM32F3xx/F378VC(H-T)/PeripheralPins.c +++ b/variants/STM32F3xx/F378VC(H-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F378VCHx.xml, STM32F378VCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F3xx/F398VET/PeripheralPins.c b/variants/STM32F3xx/F398VET/PeripheralPins.c index e8a35b7d0d..0e264dc057 100644 --- a/variants/STM32F3xx/F398VET/PeripheralPins.c +++ b/variants/STM32F3xx/F398VET/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F398VETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)/PeripheralPins.c b/variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)/PeripheralPins.c index cdad096db8..ff85487fdb 100644 --- a/variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)/PeripheralPins.c +++ b/variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32F401C(B-C)Ux.xml, STM32F401C(B-C)Yx.xml * STM32F401C(D-E)Ux.xml, STM32F401C(D-E)Yx.xml * STM32F401CCFx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F401R(B-C-D-E)T/PeripheralPins.c b/variants/STM32F4xx/F401R(B-C-D-E)T/PeripheralPins.c index dbe525234c..585cd350bf 100644 --- a/variants/STM32F4xx/F401R(B-C-D-E)T/PeripheralPins.c +++ b/variants/STM32F4xx/F401R(B-C-D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F401R(B-C)Tx.xml, STM32F401R(D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F401V(B-C-D-E)H/PeripheralPins.c b/variants/STM32F4xx/F401V(B-C-D-E)H/PeripheralPins.c index 54f470aad6..46dc88d9c6 100644 --- a/variants/STM32F4xx/F401V(B-C-D-E)H/PeripheralPins.c +++ b/variants/STM32F4xx/F401V(B-C-D-E)H/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F401V(B-C)Hx.xml, STM32F401V(D-E)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F401V(B-C-D-E)T/PeripheralPins.c b/variants/STM32F4xx/F401V(B-C-D-E)T/PeripheralPins.c index dcea3528aa..9d6d913c7a 100644 --- a/variants/STM32F4xx/F401V(B-C-D-E)T/PeripheralPins.c +++ b/variants/STM32F4xx/F401V(B-C-D-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F401V(B-C)Tx.xml, STM32F401V(D-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F405O(E-G)Y_F415OGY/PeripheralPins.c b/variants/STM32F4xx/F405O(E-G)Y_F415OGY/PeripheralPins.c index c48d116eaa..82759ea7f6 100644 --- a/variants/STM32F4xx/F405O(E-G)Y_F415OGY/PeripheralPins.c +++ b/variants/STM32F4xx/F405O(E-G)Y_F415OGY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F405O(E-G)Yx.xml, STM32F415OGYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F405RGT_F415RGT/PeripheralPins.c b/variants/STM32F4xx/F405RGT_F415RGT/PeripheralPins.c index cc2c7e8743..a25839f936 100644 --- a/variants/STM32F4xx/F405RGT_F415RGT/PeripheralPins.c +++ b/variants/STM32F4xx/F405RGT_F415RGT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F405RGTx.xml, STM32F415RGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F405VGT_F415VGT/PeripheralPins.c b/variants/STM32F4xx/F405VGT_F415VGT/PeripheralPins.c index e6b75f9109..7e7f7efaa4 100644 --- a/variants/STM32F4xx/F405VGT_F415VGT/PeripheralPins.c +++ b/variants/STM32F4xx/F405VGT_F415VGT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F405VGTx.xml, STM32F415VGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F405ZGT_F415ZGT/PeripheralPins.c b/variants/STM32F4xx/F405ZGT_F415ZGT/PeripheralPins.c index b54a49fd11..ff95db75c0 100644 --- a/variants/STM32F4xx/F405ZGT_F415ZGT/PeripheralPins.c +++ b/variants/STM32F4xx/F405ZGT_F415ZGT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F405ZGTx.xml, STM32F415ZGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/PeripheralPins.c b/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/PeripheralPins.c index 06c42b3f41..a07c15cde7 100644 --- a/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/PeripheralPins.c +++ b/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F407I(E-G)Hx.xml, STM32F407I(E-G)Tx.xml * STM32F417I(E-G)Hx.xml, STM32F417I(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T/PeripheralPins.c b/variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T/PeripheralPins.c index 6044f34fe5..7d60d161c9 100644 --- a/variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T/PeripheralPins.c +++ b/variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F407V(E-G)Tx.xml, STM32F417V(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T/PeripheralPins.c b/variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T/PeripheralPins.c index c545132344..278d045c79 100644 --- a/variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T/PeripheralPins.c +++ b/variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F407Z(E-G)Tx.xml, STM32F417Z(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F410C(8-B)T/PeripheralPins.c b/variants/STM32F4xx/F410C(8-B)T/PeripheralPins.c index fa81a3d954..6db931ade5 100644 --- a/variants/STM32F4xx/F410C(8-B)T/PeripheralPins.c +++ b/variants/STM32F4xx/F410C(8-B)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F410C(8-B)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F410C(8-B)U/PeripheralPins.c b/variants/STM32F4xx/F410C(8-B)U/PeripheralPins.c index cc0980b6b2..395f7d2875 100644 --- a/variants/STM32F4xx/F410C(8-B)U/PeripheralPins.c +++ b/variants/STM32F4xx/F410C(8-B)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F410C(8-B)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F410R(8-B)(I-T)/PeripheralPins.c b/variants/STM32F4xx/F410R(8-B)(I-T)/PeripheralPins.c index 4e1a5051ed..e3de88e02c 100644 --- a/variants/STM32F4xx/F410R(8-B)(I-T)/PeripheralPins.c +++ b/variants/STM32F4xx/F410R(8-B)(I-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F410R(8-B)Ix.xml, STM32F410R(8-B)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F410T(8-B)Y/PeripheralPins.c b/variants/STM32F4xx/F410T(8-B)Y/PeripheralPins.c index 427e9c6eeb..dab3043935 100644 --- a/variants/STM32F4xx/F410T(8-B)Y/PeripheralPins.c +++ b/variants/STM32F4xx/F410T(8-B)Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F410T(8-B)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F411C(C-E)(U-Y)/PeripheralPins.c b/variants/STM32F4xx/F411C(C-E)(U-Y)/PeripheralPins.c index eb0ee6423b..fe84de88bc 100644 --- a/variants/STM32F4xx/F411C(C-E)(U-Y)/PeripheralPins.c +++ b/variants/STM32F4xx/F411C(C-E)(U-Y)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F411C(C-E)Ux.xml, STM32F411C(C-E)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F411R(C-E)T/PeripheralPins.c b/variants/STM32F4xx/F411R(C-E)T/PeripheralPins.c index c7cb75941f..47815d294c 100644 --- a/variants/STM32F4xx/F411R(C-E)T/PeripheralPins.c +++ b/variants/STM32F4xx/F411R(C-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F411R(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F411V(C-E)H/PeripheralPins.c b/variants/STM32F4xx/F411V(C-E)H/PeripheralPins.c index ed451e34b5..99dbb9671f 100644 --- a/variants/STM32F4xx/F411V(C-E)H/PeripheralPins.c +++ b/variants/STM32F4xx/F411V(C-E)H/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F411V(C-E)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F411V(C-E)T/PeripheralPins.c b/variants/STM32F4xx/F411V(C-E)T/PeripheralPins.c index 018f7f6aa5..3c76f7eb22 100644 --- a/variants/STM32F4xx/F411V(C-E)T/PeripheralPins.c +++ b/variants/STM32F4xx/F411V(C-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F411V(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F412C(E-G)U/PeripheralPins.c b/variants/STM32F4xx/F412C(E-G)U/PeripheralPins.c index 8f1b1b1c54..c5895b3792 100644 --- a/variants/STM32F4xx/F412C(E-G)U/PeripheralPins.c +++ b/variants/STM32F4xx/F412C(E-G)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F412C(E-G)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F412R(E-G)(T-Y)x(P)/PeripheralPins.c b/variants/STM32F4xx/F412R(E-G)(T-Y)x(P)/PeripheralPins.c index 60c0bd7b0b..c36bf2f3dc 100644 --- a/variants/STM32F4xx/F412R(E-G)(T-Y)x(P)/PeripheralPins.c +++ b/variants/STM32F4xx/F412R(E-G)(T-Y)x(P)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F412R(E-G)Tx.xml, STM32F412R(E-G)Yx.xml * STM32F412R(E-G)YxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F412V(E-G)H/PeripheralPins.c b/variants/STM32F4xx/F412V(E-G)H/PeripheralPins.c index 7972b637f1..53c3be23f0 100644 --- a/variants/STM32F4xx/F412V(E-G)H/PeripheralPins.c +++ b/variants/STM32F4xx/F412V(E-G)H/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F412V(E-G)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F412V(E-G)T/PeripheralPins.c b/variants/STM32F4xx/F412V(E-G)T/PeripheralPins.c index 7e4b3bd0b9..e5587fa2ae 100644 --- a/variants/STM32F4xx/F412V(E-G)T/PeripheralPins.c +++ b/variants/STM32F4xx/F412V(E-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F412V(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F412Z(E-G)(J-T)/PeripheralPins.c b/variants/STM32F4xx/F412Z(E-G)(J-T)/PeripheralPins.c index f80f096080..a22729e34f 100644 --- a/variants/STM32F4xx/F412Z(E-G)(J-T)/PeripheralPins.c +++ b/variants/STM32F4xx/F412Z(E-G)(J-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F412Z(E-G)Jx.xml, STM32F412Z(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F413C(G-H)U_F423CHU/PeripheralPins.c b/variants/STM32F4xx/F413C(G-H)U_F423CHU/PeripheralPins.c index 8a65a966a8..0195e7bb47 100644 --- a/variants/STM32F4xx/F413C(G-H)U_F423CHU/PeripheralPins.c +++ b/variants/STM32F4xx/F413C(G-H)U_F423CHU/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F413C(G-H)Ux.xml, STM32F423CHUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F413M(G-H)Y_F423MHY/PeripheralPins.c b/variants/STM32F4xx/F413M(G-H)Y_F423MHY/PeripheralPins.c index a7a7fe109e..2c05ea2984 100644 --- a/variants/STM32F4xx/F413M(G-H)Y_F423MHY/PeripheralPins.c +++ b/variants/STM32F4xx/F413M(G-H)Y_F423MHY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F413M(G-H)Yx.xml, STM32F423MHYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F413R(G-H)T_F423RHT/PeripheralPins.c b/variants/STM32F4xx/F413R(G-H)T_F423RHT/PeripheralPins.c index 307449066d..917b31b519 100644 --- a/variants/STM32F4xx/F413R(G-H)T_F423RHT/PeripheralPins.c +++ b/variants/STM32F4xx/F413R(G-H)T_F423RHT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F413R(G-H)Tx.xml, STM32F423RHTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F413V(G-H)H_F423VHH/PeripheralPins.c b/variants/STM32F4xx/F413V(G-H)H_F423VHH/PeripheralPins.c index c9a3afa654..632cefaa07 100644 --- a/variants/STM32F4xx/F413V(G-H)H_F423VHH/PeripheralPins.c +++ b/variants/STM32F4xx/F413V(G-H)H_F423VHH/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F413V(G-H)Hx.xml, STM32F423VHHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F413V(G-H)T_F423VHT/PeripheralPins.c b/variants/STM32F4xx/F413V(G-H)T_F423VHT/PeripheralPins.c index 4020da1bb6..ee8b57f88f 100644 --- a/variants/STM32F4xx/F413V(G-H)T_F423VHT/PeripheralPins.c +++ b/variants/STM32F4xx/F413V(G-H)T_F423VHT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F413V(G-H)Tx.xml, STM32F423VHTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)/PeripheralPins.c b/variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)/PeripheralPins.c index 0d6be54c32..743066f6f5 100644 --- a/variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)/PeripheralPins.c +++ b/variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F413Z(G-H)Jx.xml, STM32F413Z(G-H)Tx.xml * STM32F423ZHJx.xml, STM32F423ZHTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F427A(G-I)H_F429A(G-I)H_F437AIH_F439AIH/PeripheralPins.c b/variants/STM32F4xx/F427A(G-I)H_F429A(G-I)H_F437AIH_F439AIH/PeripheralPins.c index 9e842ed26c..69a60645c5 100644 --- a/variants/STM32F4xx/F427A(G-I)H_F429A(G-I)H_F437AIH_F439AIH/PeripheralPins.c +++ b/variants/STM32F4xx/F427A(G-I)H_F429A(G-I)H_F437AIH_F439AIH/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F427A(G-I)Hx.xml, STM32F429A(G-I)Hx.xml * STM32F437AIHx.xml, STM32F439AIHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F427I(G-I)(H-T)_F429I(E-G-I)(H-T)_F437I(G-I)(H-T)_F439I(G-I)(H-T)/PeripheralPins.c b/variants/STM32F4xx/F427I(G-I)(H-T)_F429I(E-G-I)(H-T)_F437I(G-I)(H-T)_F439I(G-I)(H-T)/PeripheralPins.c index 9a1779adb9..01cfe03411 100644 --- a/variants/STM32F4xx/F427I(G-I)(H-T)_F429I(E-G-I)(H-T)_F437I(G-I)(H-T)_F439I(G-I)(H-T)/PeripheralPins.c +++ b/variants/STM32F4xx/F427I(G-I)(H-T)_F429I(E-G-I)(H-T)_F437I(G-I)(H-T)_F439I(G-I)(H-T)/PeripheralPins.c @@ -16,7 +16,7 @@ * STM32F429IITx.xml, STM32F437I(G-I)Hx.xml * STM32F437I(G-I)Tx.xml, STM32F439I(G-I)Hx.xml * STM32F439I(G-I)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F427V(G-I)T_F429V(E-G-I)T_F437V(G-I)T_F439V(G-I)T/PeripheralPins.c b/variants/STM32F4xx/F427V(G-I)T_F429V(E-G-I)T_F437V(G-I)T_F439V(G-I)T/PeripheralPins.c index 203928b55a..2c89ad211d 100644 --- a/variants/STM32F4xx/F427V(G-I)T_F429V(E-G-I)T_F437V(G-I)T_F439V(G-I)T/PeripheralPins.c +++ b/variants/STM32F4xx/F427V(G-I)T_F429V(E-G-I)T_F437V(G-I)T_F439V(G-I)T/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32F427V(G-I)Tx.xml, STM32F429V(E-G)Tx.xml * STM32F429VITx.xml, STM32F437V(G-I)Tx.xml * STM32F439V(G-I)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)/PeripheralPins.c b/variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)/PeripheralPins.c index 6d032b573b..702493645e 100644 --- a/variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)/PeripheralPins.c +++ b/variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32F429ZGYx.xml, STM32F429ZITx.xml * STM32F429ZIYx.xml, STM32F437Z(G-I)Tx.xml * STM32F439Z(G-I)Tx.xml, STM32F439Z(G-I)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F429B(E-G-I)T_F429N(E-G-I)H_F439B(G-I)T_F439N(G-I)H/PeripheralPins.c b/variants/STM32F4xx/F429B(E-G-I)T_F429N(E-G-I)H_F439B(G-I)T_F439N(G-I)H/PeripheralPins.c index 68be3bb017..4a20951138 100644 --- a/variants/STM32F4xx/F429B(E-G-I)T_F429N(E-G-I)H_F439B(G-I)T_F439N(G-I)H/PeripheralPins.c +++ b/variants/STM32F4xx/F429B(E-G-I)T_F429N(E-G-I)H_F439B(G-I)T_F439N(G-I)H/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32F429B(E-G-I)Tx.xml, STM32F429N(E-G)Hx.xml * STM32F429NIHx.xml, STM32F439B(G-I)Tx.xml * STM32F439N(G-I)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F446M(C-E)Y/PeripheralPins.c b/variants/STM32F4xx/F446M(C-E)Y/PeripheralPins.c index 923df27a99..3573249b7f 100644 --- a/variants/STM32F4xx/F446M(C-E)Y/PeripheralPins.c +++ b/variants/STM32F4xx/F446M(C-E)Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F446M(C-E)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F446R(C-E)T/PeripheralPins.c b/variants/STM32F4xx/F446R(C-E)T/PeripheralPins.c index f86a83b4e5..7918b879bc 100644 --- a/variants/STM32F4xx/F446R(C-E)T/PeripheralPins.c +++ b/variants/STM32F4xx/F446R(C-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F446R(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F446V(C-E)T/PeripheralPins.c b/variants/STM32F4xx/F446V(C-E)T/PeripheralPins.c index 0dfb427c06..07359d6cff 100644 --- a/variants/STM32F4xx/F446V(C-E)T/PeripheralPins.c +++ b/variants/STM32F4xx/F446V(C-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F446V(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F446Z(C-E)(H-J-T)/PeripheralPins.c b/variants/STM32F4xx/F446Z(C-E)(H-J-T)/PeripheralPins.c index 4d8ae032d2..40daa7d2cb 100644 --- a/variants/STM32F4xx/F446Z(C-E)(H-J-T)/PeripheralPins.c +++ b/variants/STM32F4xx/F446Z(C-E)(H-J-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F446Z(C-E)Hx.xml, STM32F446Z(C-E)Jx.xml * STM32F446Z(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F469A(E-G-I)(H-Y)_F479A(G-I)(H-Y)/PeripheralPins.c b/variants/STM32F4xx/F469A(E-G-I)(H-Y)_F479A(G-I)(H-Y)/PeripheralPins.c index 827a956faa..f35fddaa79 100644 --- a/variants/STM32F4xx/F469A(E-G-I)(H-Y)_F479A(G-I)(H-Y)/PeripheralPins.c +++ b/variants/STM32F4xx/F469A(E-G-I)(H-Y)_F479A(G-I)(H-Y)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F469A(E-G-I)Hx.xml, STM32F469A(E-G-I)Yx.xml * STM32F479A(G-I)Hx.xml, STM32F479A(G-I)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F469B(E-G-I)T_F469N(E-G-I)H_F479B(G-I)T_F479N(G-I)H/PeripheralPins.c b/variants/STM32F4xx/F469B(E-G-I)T_F469N(E-G-I)H_F479B(G-I)T_F479N(G-I)H/PeripheralPins.c index 7f31ab3c5e..efa79d1310 100644 --- a/variants/STM32F4xx/F469B(E-G-I)T_F469N(E-G-I)H_F479B(G-I)T_F479N(G-I)H/PeripheralPins.c +++ b/variants/STM32F4xx/F469B(E-G-I)T_F469N(E-G-I)H_F479B(G-I)T_F479N(G-I)H/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32F469B(E-G-I)Tx.xml, STM32F469N(E-G)Hx.xml * STM32F469NIHx.xml, STM32F479B(G-I)Tx.xml * STM32F479N(G-I)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F469I(E-G-I)(H-T)_F479I(G-I)(H-T)/PeripheralPins.c b/variants/STM32F4xx/F469I(E-G-I)(H-T)_F479I(G-I)(H-T)/PeripheralPins.c index e57f8cbd36..b7f471d8d6 100644 --- a/variants/STM32F4xx/F469I(E-G-I)(H-T)_F479I(G-I)(H-T)/PeripheralPins.c +++ b/variants/STM32F4xx/F469I(E-G-I)(H-T)_F479I(G-I)(H-T)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32F469I(E-G)Tx.xml, STM32F469I(E-G-I)Hx.xml * STM32F469IITx.xml, STM32F479I(G-I)Hx.xml * STM32F479I(G-I)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F469V(E-G-I)T_F479V(G-I)T/PeripheralPins.c b/variants/STM32F4xx/F469V(E-G-I)T_F479V(G-I)T/PeripheralPins.c index 66b19d520a..4f05014a4f 100644 --- a/variants/STM32F4xx/F469V(E-G-I)T_F479V(G-I)T/PeripheralPins.c +++ b/variants/STM32F4xx/F469V(E-G-I)T_F479V(G-I)T/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F469V(E-G)Tx.xml, STM32F469VITx.xml * STM32F479V(G-I)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F4xx/F469Z(E-G-I)T_F479Z(G-I)T/PeripheralPins.c b/variants/STM32F4xx/F469Z(E-G-I)T_F479Z(G-I)T/PeripheralPins.c index 02944d452b..346351e0cf 100644 --- a/variants/STM32F4xx/F469Z(E-G-I)T_F479Z(G-I)T/PeripheralPins.c +++ b/variants/STM32F4xx/F469Z(E-G-I)T_F479Z(G-I)T/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F469Z(E-G)Tx.xml, STM32F469ZITx.xml * STM32F479Z(G-I)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F722I(C-E)(K-T)_F732IE(K-T)/PeripheralPins.c b/variants/STM32F7xx/F722I(C-E)(K-T)_F732IE(K-T)/PeripheralPins.c index 0df419fc0b..5aff59512a 100644 --- a/variants/STM32F7xx/F722I(C-E)(K-T)_F732IE(K-T)/PeripheralPins.c +++ b/variants/STM32F7xx/F722I(C-E)(K-T)_F732IE(K-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F722I(C-E)Kx.xml, STM32F722I(C-E)Tx.xml * STM32F732IEKx.xml, STM32F732IETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F722R(C-E)T_F730R8T_F732RET/PeripheralPins.c b/variants/STM32F7xx/F722R(C-E)T_F730R8T_F732RET/PeripheralPins.c index 18f514adb6..45cb3530b4 100644 --- a/variants/STM32F7xx/F722R(C-E)T_F730R8T_F732RET/PeripheralPins.c +++ b/variants/STM32F7xx/F722R(C-E)T_F730R8T_F732RET/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F722R(C-E)Tx.xml, STM32F730R8Tx.xml * STM32F732RETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F722V(C-E)T_F730V8T_F732VET/PeripheralPins.c b/variants/STM32F7xx/F722V(C-E)T_F730V8T_F732VET/PeripheralPins.c index 81e0c1572a..142de82f03 100644 --- a/variants/STM32F7xx/F722V(C-E)T_F730V8T_F732VET/PeripheralPins.c +++ b/variants/STM32F7xx/F722V(C-E)T_F730V8T_F732VET/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F722V(C-E)Tx.xml, STM32F730V8Tx.xml * STM32F732VETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F722Z(C-E)T_F732ZET/PeripheralPins.c b/variants/STM32F7xx/F722Z(C-E)T_F732ZET/PeripheralPins.c index 81bb5435e7..051df2a77d 100644 --- a/variants/STM32F7xx/F722Z(C-E)T_F732ZET/PeripheralPins.c +++ b/variants/STM32F7xx/F722Z(C-E)T_F732ZET/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32F722Z(C-E)Tx.xml, STM32F732ZETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)/PeripheralPins.c b/variants/STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)/PeripheralPins.c index c2a2501b5e..b02cdfd3e9 100644 --- a/variants/STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)/PeripheralPins.c +++ b/variants/STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32F723I(C-E)Kx.xml, STM32F723I(C-E)Tx.xml * STM32F730I8Kx.xml, STM32F733IEKx.xml * STM32F733IETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WLxx/WL5MOCH/CMakeLists.txt b/variants/STM32F7xx/F723R(C-E)V/CMakeLists.txt similarity index 100% rename from variants/STM32WLxx/WL5MOCH/CMakeLists.txt rename to variants/STM32F7xx/F723R(C-E)V/CMakeLists.txt diff --git a/variants/STM32F7xx/F723R(C-E)V/PeripheralPins.c b/variants/STM32F7xx/F723R(C-E)V/PeripheralPins.c new file mode 100644 index 0000000000..f19bbab2ba --- /dev/null +++ b/variants/STM32F7xx/F723R(C-E)V/PeripheralPins.c @@ -0,0 +1,432 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32F723RCVx.xml, STM32F723REVx.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + {PA_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 + {PA_0_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PA_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PA_1_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PA_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PA_2_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_3_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_3_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PC_0_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PC_1_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PC_2_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_3_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_3_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** No I3C *** + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2_ALT2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3_ALT2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#if defined(HAL_CAN_MODULE_ENABLED) || defined(HAL_CAN_LEGACY_MODULE_ENABLED) +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +#if defined(HAL_CAN_MODULE_ENABLED) || defined(HAL_CAN_LEGACY_MODULE_ENABLED) +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_DATA0[] = { + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_DATA1[] = { + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_DATA3[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_SCLK[] = { + {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_SSEL[] = { + {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB_OTG_FS[] = { + {PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS + {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID + {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP + {NC, NP, 0} +}; +#endif + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB_OTG_HS[] = { +#ifdef USE_USB_HS_IN_FS + {PA_4, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS + {PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM + {PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#endif /* USE_USB_HS_IN_FS */ + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32F7xx/F723R(C-E)V/PinNamesVar.h b/variants/STM32F7xx/F723R(C-E)V/PinNamesVar.h new file mode 100644 index 0000000000..ab9e841ab3 --- /dev/null +++ b/variants/STM32F7xx/F723R(C-E)V/PinNamesVar.h @@ -0,0 +1,80 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_0_ALT2 = PA_0 | ALT2, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_2_ALT2 = PA_2 | ALT2, +PA_3_ALT1 = PA_3 | ALT1, +PA_3_ALT2 = PA_3 | ALT2, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_9_ALT1 = PB_9 | ALT1, +PC_0_ALT1 = PC_0 | ALT1, +PC_0_ALT2 = PC_0 | ALT2, +PC_1_ALT1 = PC_1 | ALT1, +PC_1_ALT2 = PC_1 | ALT2, +PC_2_ALT1 = PC_2 | ALT1, +PC_2_ALT2 = PC_2 | ALT2, +PC_3_ALT1 = PC_3 | ALT1, +PC_3_ALT2 = PC_3 | ALT2, +PC_4_ALT1 = PC_4 | ALT1, +PC_6_ALT1 = PC_6 | ALT1, +PC_7_ALT1 = PC_7 | ALT1, +PC_8_ALT1 = PC_8 | ALT1, +PC_9_ALT1 = PC_9 | ALT1, +PC_10_ALT1 = PC_10 | ALT1, +PC_11_ALT1 = PC_11 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PC_1, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif + +/* USB */ +#ifdef USBCON + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + USB_OTG_HS_DM = PB_14, + USB_OTG_HS_DP = PB_15, + USB_OTG_HS_ID = PB_12, + USB_OTG_HS_SOF = PA_4, + USB_OTG_HS_VBUS = PB_13, +#endif diff --git a/variants/STM32F7xx/F723R(C-E)V/boards_entry.txt b/variants/STM32F7xx/F723R(C-E)V/boards_entry.txt new file mode 100644 index 0000000000..5383d496ea --- /dev/null +++ b/variants/STM32F7xx/F723R(C-E)V/boards_entry.txt @@ -0,0 +1,23 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic F723RCVx +GenF7.menu.pnum.GENERIC_F723RCVX=Generic F723RCVx +GenF7.menu.pnum.GENERIC_F723RCVX.upload.maximum_size=262144 +GenF7.menu.pnum.GENERIC_F723RCVX.upload.maximum_data_size=196608 +GenF7.menu.pnum.GENERIC_F723RCVX.build.board=GENERIC_F723RCVX +GenF7.menu.pnum.GENERIC_F723RCVX.build.product_line=STM32F723xx +GenF7.menu.pnum.GENERIC_F723RCVX.build.variant=STM32F7xx/F723R(C-E)V +GenF7.menu.pnum.GENERIC_F723RCVX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F7xx/STM32F723.svd + +# Generic F723REVx +GenF7.menu.pnum.GENERIC_F723REVX=Generic F723REVx +GenF7.menu.pnum.GENERIC_F723REVX.upload.maximum_size=524288 +GenF7.menu.pnum.GENERIC_F723REVX.upload.maximum_data_size=196608 +GenF7.menu.pnum.GENERIC_F723REVX.build.board=GENERIC_F723REVX +GenF7.menu.pnum.GENERIC_F723REVX.build.product_line=STM32F723xx +GenF7.menu.pnum.GENERIC_F723REVX.build.variant=STM32F7xx/F723R(C-E)V +GenF7.menu.pnum.GENERIC_F723REVX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F7xx/STM32F723.svd + diff --git a/variants/STM32F7xx/F723R(C-E)V/generic_clock.c b/variants/STM32F7xx/F723R(C-E)V/generic_clock.c new file mode 100644 index 0000000000..d858e6ac76 --- /dev/null +++ b/variants/STM32F7xx/F723R(C-E)V/generic_clock.c @@ -0,0 +1,27 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_F723RCVX) || defined(ARDUINO_GENERIC_F723REVX) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32F7xx/F723R(C-E)V/variant_generic.cpp b/variants/STM32F7xx/F723R(C-E)V/variant_generic.cpp new file mode 100644 index 0000000000..ebc32b6244 --- /dev/null +++ b/variants/STM32F7xx/F723R(C-E)V/variant_generic.cpp @@ -0,0 +1,90 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_F723RCVX) || defined(ARDUINO_GENERIC_F723REVX) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_11, // D27 + PB_12, // D28 + PB_13, // D29 + PB_14, // D30 + PB_15, // D31 + PC_0, // D32/A10 + PC_1, // D33/A11 + PC_2, // D34/A12 + PC_3, // D35/A13 + PC_4, // D36/A14 + PC_6, // D37 + PC_7, // D38 + PC_8, // D39 + PC_9, // D40 + PC_10, // D41 + PC_11, // D42 + PC_12, // D43 + PC_13, // D44 + PC_14, // D45 + PC_15, // D46 + PD_2, // D47 + PD_3, // D48 + PH_0, // D49 + PH_1 // D50 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 32, // A10, PC0 + 33, // A11, PC1 + 34, // A12, PC2 + 35, // A13, PC3 + 36 // A14, PC4 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32F7xx/F723R(C-E)V/variant_generic.h b/variants/STM32F7xx/F723R(C-E)V/variant_generic.h new file mode 100644 index 0000000000..80fff333b9 --- /dev/null +++ b/variants/STM32F7xx/F723R(C-E)V/variant_generic.h @@ -0,0 +1,221 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 18 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB11 27 +#define PB12 28 +#define PB13 29 +#define PB14 30 +#define PB15 31 +#define PC0 PIN_A10 +#define PC1 PIN_A11 +#define PC2 PIN_A12 +#define PC3 PIN_A13 +#define PC4 PIN_A14 +#define PC6 37 +#define PC7 38 +#define PC8 39 +#define PC9 40 +#define PC10 41 +#define PC11 42 +#define PC12 43 +#define PC13 44 +#define PC14 45 +#define PC15 46 +#define PD2 47 +#define PD3 48 +#define PH0 49 +#define PH1 50 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA0_ALT2 (PA0 | ALT2) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA2_ALT2 (PA2 | ALT2) +#define PA3_ALT1 (PA3 | ALT1) +#define PA3_ALT2 (PA3 | ALT2) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PC0_ALT1 (PC0 | ALT1) +#define PC0_ALT2 (PC0 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC1_ALT2 (PC1 | ALT2) +#define PC2_ALT1 (PC2 | ALT1) +#define PC2_ALT2 (PC2 | ALT2) +#define PC3_ALT1 (PC3 | ALT1) +#define PC3_ALT2 (PC3 | ALT2) +#define PC4_ALT1 (PC4 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) + +#define NUM_DIGITAL_PINS 51 +#define NUM_ANALOG_INPUTS 15 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA5 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PB7 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB6 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// SDMMC signals not available +#define SDMMC_CKIN_NA +#define SDMMC_CDIR_NA +#define SDMMC_D0DIR_NA +#define SDMMC_D123DIR_NA + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_QSPI_MODULE_DISABLED) + #define HAL_QSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32F7xx/F723V(C-E)(T-Y)_F733VE(T-Y)/PeripheralPins.c b/variants/STM32F7xx/F723V(C-E)(T-Y)_F733VE(T-Y)/PeripheralPins.c index c1b9da32bb..9b53e707b1 100644 --- a/variants/STM32F7xx/F723V(C-E)(T-Y)_F733VE(T-Y)/PeripheralPins.c +++ b/variants/STM32F7xx/F723V(C-E)(T-Y)_F733VE(T-Y)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F723V(C-E)Tx.xml, STM32F723V(C-E)Yx.xml * STM32F733VETx.xml, STM32F733VEYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F723Z(C-E)(I-T)_F730Z8T_F733ZE(I-T)/PeripheralPins.c b/variants/STM32F7xx/F723Z(C-E)(I-T)_F730Z8T_F733ZE(I-T)/PeripheralPins.c index 9b19815541..fa32da6d8b 100644 --- a/variants/STM32F7xx/F723Z(C-E)(I-T)_F730Z8T_F733ZE(I-T)/PeripheralPins.c +++ b/variants/STM32F7xx/F723Z(C-E)(I-T)_F730Z8T_F733ZE(I-T)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32F723Z(C-E)Ix.xml, STM32F723Z(C-E)Tx.xml * STM32F730Z8Tx.xml, STM32F733ZEIx.xml * STM32F733ZETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F745I(E-G)(K-T)_F746I(E-G)(K-T)_F756IG(K-T)/PeripheralPins.c b/variants/STM32F7xx/F745I(E-G)(K-T)_F746I(E-G)(K-T)_F756IG(K-T)/PeripheralPins.c index ccda5cb5ee..995a178053 100644 --- a/variants/STM32F7xx/F745I(E-G)(K-T)_F746I(E-G)(K-T)_F756IG(K-T)/PeripheralPins.c +++ b/variants/STM32F7xx/F745I(E-G)(K-T)_F746I(E-G)(K-T)_F756IG(K-T)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32F746I(E-G)Kx.xml, STM32F746IETx.xml * STM32F746IGTx.xml, STM32F756IGKx.xml * STM32F756IGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F745V(E-G)(H-T)_F746V(E-G)(H-T)_F750V8T_F756VG(H-T)/PeripheralPins.c b/variants/STM32F7xx/F745V(E-G)(H-T)_F746V(E-G)(H-T)_F750V8T_F756VG(H-T)/PeripheralPins.c index e96e158b4d..31472b72d0 100644 --- a/variants/STM32F7xx/F745V(E-G)(H-T)_F746V(E-G)(H-T)_F750V8T_F756VG(H-T)/PeripheralPins.c +++ b/variants/STM32F7xx/F745V(E-G)(H-T)_F746V(E-G)(H-T)_F750V8T_F756VG(H-T)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32F746V(E-G)Hx.xml, STM32F746VETx.xml * STM32F746VGTx.xml, STM32F750V8Tx.xml * STM32F756VGHx.xml, STM32F756VGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)/PeripheralPins.c b/variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)/PeripheralPins.c index 9cc9d12d5c..d3d2ff9dad 100644 --- a/variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)/PeripheralPins.c +++ b/variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32F746ZETx.xml, STM32F746ZGTx.xml * STM32F750Z8Tx.xml, STM32F756ZGTx.xml * STM32F756ZGYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH/PeripheralPins.c b/variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH/PeripheralPins.c index a950557358..ba6a9b93e2 100644 --- a/variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH/PeripheralPins.c +++ b/variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32F746B(E-G)Tx.xml, STM32F746NEHx.xml * STM32F746NGHx.xml, STM32F750N8Hx.xml * STM32F756BGTx.xml, STM32F756NGHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F765B(G-I)T_F765N(G-I)H_F767B(G-I)T_F767N(G-I)H_F777BIT_F777NIH/PeripheralPins.c b/variants/STM32F7xx/F765B(G-I)T_F765N(G-I)H_F767B(G-I)T_F767N(G-I)H_F777BIT_F777NIH/PeripheralPins.c index cbdaeda2c3..ea9c2a920b 100644 --- a/variants/STM32F7xx/F765B(G-I)T_F765N(G-I)H_F767B(G-I)T_F767N(G-I)H_F777BIT_F777NIH/PeripheralPins.c +++ b/variants/STM32F7xx/F765B(G-I)T_F765N(G-I)H_F767B(G-I)T_F767N(G-I)H_F777BIT_F777NIH/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32F765B(G-I)Tx.xml, STM32F765N(G-I)Hx.xml * STM32F767B(G-I)Tx.xml, STM32F767N(G-I)Hx.xml * STM32F777BITx.xml, STM32F777NIHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/PeripheralPins.c b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/PeripheralPins.c index 5d30dba170..6436f07bc4 100644 --- a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/PeripheralPins.c +++ b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32F765I(G-I)Kx.xml, STM32F765I(G-I)Tx.xml * STM32F767I(G-I)Kx.xml, STM32F767I(G-I)Tx.xml * STM32F777IIKx.xml, STM32F777IITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/PeripheralPins.c b/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/PeripheralPins.c index 474cdaee56..6d2d187ac3 100644 --- a/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/PeripheralPins.c +++ b/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32F767VGHx.xml, STM32F767VGTx.xml * STM32F767VIHx.xml, STM32F767VITx.xml * STM32F777VIHx.xml, STM32F777VITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/PeripheralPins.c b/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/PeripheralPins.c index 229c13687c..356c7212b2 100644 --- a/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/PeripheralPins.c +++ b/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F765Z(G-I)Tx.xml, STM32F767ZGTx.xml * STM32F767ZITx.xml, STM32F777ZITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F768AIY_F769A(G-I)Y_F778AIY_F779AIY/PeripheralPins.c b/variants/STM32F7xx/F768AIY_F769A(G-I)Y_F778AIY_F779AIY/PeripheralPins.c index 6a2ecd680c..072aecde55 100644 --- a/variants/STM32F7xx/F768AIY_F769A(G-I)Y_F778AIY_F779AIY/PeripheralPins.c +++ b/variants/STM32F7xx/F768AIY_F769A(G-I)Y_F778AIY_F779AIY/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F768AIYx.xml, STM32F769A(G-I)Yx.xml * STM32F778AIYx.xml, STM32F779AIYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F769B(G-I)T_F769N(G-I)H_F779BIT_F779NIH/PeripheralPins.c b/variants/STM32F7xx/F769B(G-I)T_F769N(G-I)H_F779BIT_F779NIH/PeripheralPins.c index 285676021c..3d1ec80f5d 100644 --- a/variants/STM32F7xx/F769B(G-I)T_F769N(G-I)H_F779BIT_F779NIH/PeripheralPins.c +++ b/variants/STM32F7xx/F769B(G-I)T_F769N(G-I)H_F779BIT_F779NIH/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32F769B(G-I)Tx.xml, STM32F769NGHx.xml * STM32F769NIHx.xml, STM32F779BITx.xml * STM32F779NIHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32F7xx/F769I(G-I)T_F779IIT/PeripheralPins.c b/variants/STM32F7xx/F769I(G-I)T_F779IIT/PeripheralPins.c index 01abff2378..c17af00871 100644 --- a/variants/STM32F7xx/F769I(G-I)T_F779IIT/PeripheralPins.c +++ b/variants/STM32F7xx/F769I(G-I)T_F779IIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32F769IGTx.xml, STM32F769IITx.xml * STM32F779IITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G030C(6-8)T/PeripheralPins.c b/variants/STM32G0xx/G030C(6-8)T/PeripheralPins.c index 0f85ce7c11..8f97215942 100644 --- a/variants/STM32G0xx/G030C(6-8)T/PeripheralPins.c +++ b/variants/STM32G0xx/G030C(6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G030C(6-8)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G030F6P/PeripheralPins.c b/variants/STM32G0xx/G030F6P/PeripheralPins.c index 1248f23d91..958118b3b6 100644 --- a/variants/STM32G0xx/G030F6P/PeripheralPins.c +++ b/variants/STM32G0xx/G030F6P/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G030F6Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G030J6M/PeripheralPins.c b/variants/STM32G0xx/G030J6M/PeripheralPins.c index 5e150edeee..d5fb1d672b 100644 --- a/variants/STM32G0xx/G030J6M/PeripheralPins.c +++ b/variants/STM32G0xx/G030J6M/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G030J6Mx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G030K(6-8)T/PeripheralPins.c b/variants/STM32G0xx/G030K(6-8)T/PeripheralPins.c index 6821b16049..173677e623 100644 --- a/variants/STM32G0xx/G030K(6-8)T/PeripheralPins.c +++ b/variants/STM32G0xx/G030K(6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G030K(6-8)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)/PeripheralPins.c b/variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)/PeripheralPins.c index 000477f70a..1f5b7d816c 100644 --- a/variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)/PeripheralPins.c +++ b/variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G031C(4-6-8)Tx.xml, STM32G031C(4-6-8)Ux.xml * STM32G041C(6-8)Tx.xml, STM32G041C(6-8)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y/PeripheralPins.c b/variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y/PeripheralPins.c index ae0e6ebace..9aacff3c9a 100644 --- a/variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y/PeripheralPins.c +++ b/variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G031F(4-6-8)Px.xml, STM32G031Y8Yx.xml * STM32G041F(6-8)Px.xml, STM32G041Y8Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G031G(4-6-8)U_G041G(6-8)U/PeripheralPins.c b/variants/STM32G0xx/G031G(4-6-8)U_G041G(6-8)U/PeripheralPins.c index 6dd502dae4..56a408cb3f 100644 --- a/variants/STM32G0xx/G031G(4-6-8)U_G041G(6-8)U/PeripheralPins.c +++ b/variants/STM32G0xx/G031G(4-6-8)U_G041G(6-8)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G031G(4-6-8)Ux.xml, STM32G041G(6-8)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G031J(4-6)M_G041J6M/PeripheralPins.c b/variants/STM32G0xx/G031J(4-6)M_G041J6M/PeripheralPins.c index 6938863fa3..3f723f3fd0 100644 --- a/variants/STM32G0xx/G031J(4-6)M_G041J6M/PeripheralPins.c +++ b/variants/STM32G0xx/G031J(4-6)M_G041J6M/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G031J(4-6)Mx.xml, STM32G041J6Mx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/PeripheralPins.c b/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/PeripheralPins.c index 1738ac153c..c45077fb01 100644 --- a/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/PeripheralPins.c +++ b/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G031K(4-6-8)Tx.xml, STM32G031K(4-6-8)Ux.xml * STM32G041K(6-8)Tx.xml, STM32G041K(6-8)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G050C(6-8)T/PeripheralPins.c b/variants/STM32G0xx/G050C(6-8)T/PeripheralPins.c index 253d10edf6..61ac89e7ba 100644 --- a/variants/STM32G0xx/G050C(6-8)T/PeripheralPins.c +++ b/variants/STM32G0xx/G050C(6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G050C6Tx.xml, STM32G050C8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G050F6P/PeripheralPins.c b/variants/STM32G0xx/G050F6P/PeripheralPins.c index 4e9b41d82f..7b5f6ac6dd 100644 --- a/variants/STM32G0xx/G050F6P/PeripheralPins.c +++ b/variants/STM32G0xx/G050F6P/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G050F6Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G050K(6-8)T/PeripheralPins.c b/variants/STM32G0xx/G050K(6-8)T/PeripheralPins.c index 25ab2bc64b..6597e079a4 100644 --- a/variants/STM32G0xx/G050K(6-8)T/PeripheralPins.c +++ b/variants/STM32G0xx/G050K(6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G050K6Tx.xml, STM32G050K8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)/PeripheralPins.c b/variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)/PeripheralPins.c index 2a8897bbff..24feef6898 100644 --- a/variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)/PeripheralPins.c +++ b/variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G051C(6-8)Tx.xml, STM32G051C(6-8)Ux.xml * STM32G061C(6-8)Tx.xml, STM32G061C(6-8)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)/PeripheralPins.c b/variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)/PeripheralPins.c index 6c2ab6bc11..8528c2ae57 100644 --- a/variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)/PeripheralPins.c +++ b/variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G051F(6-8)Px.xml, STM32G051F8Yx.xml * STM32G061F(6-8)Px.xml, STM32G061F8Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G051G(6-8)U_G061G(6-8)U/PeripheralPins.c b/variants/STM32G0xx/G051G(6-8)U_G061G(6-8)U/PeripheralPins.c index 2772669d4e..2eb8a8b24f 100644 --- a/variants/STM32G0xx/G051G(6-8)U_G061G(6-8)U/PeripheralPins.c +++ b/variants/STM32G0xx/G051G(6-8)U_G061G(6-8)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G051G(6-8)Ux.xml, STM32G061G(6-8)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)/PeripheralPins.c b/variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)/PeripheralPins.c index f8eb36bee1..27c934aedd 100644 --- a/variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)/PeripheralPins.c +++ b/variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G051K(6-8)Tx.xml, STM32G051K(6-8)Ux.xml * STM32G061K(6-8)Tx.xml, STM32G061K(6-8)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G070CBT/PeripheralPins.c b/variants/STM32G0xx/G070CBT/PeripheralPins.c index faee32550b..9e5b4fc2fc 100644 --- a/variants/STM32G0xx/G070CBT/PeripheralPins.c +++ b/variants/STM32G0xx/G070CBT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G070CBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G070KBT/PeripheralPins.c b/variants/STM32G0xx/G070KBT/PeripheralPins.c index df4aa4f273..89fb965922 100644 --- a/variants/STM32G0xx/G070KBT/PeripheralPins.c +++ b/variants/STM32G0xx/G070KBT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G070KBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G070RBT/PeripheralPins.c b/variants/STM32G0xx/G070RBT/PeripheralPins.c index dff8f03dfe..51444e6de0 100644 --- a/variants/STM32G0xx/G070RBT/PeripheralPins.c +++ b/variants/STM32G0xx/G070RBT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G070RBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)/PeripheralPins.c b/variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)/PeripheralPins.c index 0398d14104..308fa0ce0c 100644 --- a/variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)/PeripheralPins.c +++ b/variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G071C(6-8-B)Tx.xml, STM32G071C(6-8-B)Ux.xml * STM32G081CBTx.xml, STM32G081CBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G071EBY_G081EBY/PeripheralPins.c b/variants/STM32G0xx/G071EBY_G081EBY/PeripheralPins.c index 605546d84e..2e22e3bbfa 100644 --- a/variants/STM32G0xx/G071EBY_G081EBY/PeripheralPins.c +++ b/variants/STM32G0xx/G071EBY_G081EBY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G071EBYx.xml, STM32G081EBYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G071G(6-8-B)U_G081GBU/PeripheralPins.c b/variants/STM32G0xx/G071G(6-8-B)U_G081GBU/PeripheralPins.c index 1e0098f15d..d57cd0ae61 100644 --- a/variants/STM32G0xx/G071G(6-8-B)U_G081GBU/PeripheralPins.c +++ b/variants/STM32G0xx/G071G(6-8-B)U_G081GBU/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G071G(6-8-B)Ux.xml, STM32G081GBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G071G(8-B)UxN_G081GBUxN/PeripheralPins.c b/variants/STM32G0xx/G071G(8-B)UxN_G081GBUxN/PeripheralPins.c index 6bb5e14201..9a2160a36e 100644 --- a/variants/STM32G0xx/G071G(8-B)UxN_G081GBUxN/PeripheralPins.c +++ b/variants/STM32G0xx/G071G(8-B)UxN_G081GBUxN/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G071G(8-B)UxN.xml, STM32G081GBUxN.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)/PeripheralPins.c b/variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)/PeripheralPins.c index bb41b9963b..c5770c149e 100644 --- a/variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)/PeripheralPins.c +++ b/variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G071K(6-8-B)Tx.xml, STM32G071K(6-8-B)Ux.xml * STM32G081KBTx.xml, STM32G081KBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G071K(8-B)(T-U)xN_G081KB(T-U)xN/PeripheralPins.c b/variants/STM32G0xx/G071K(8-B)(T-U)xN_G081KB(T-U)xN/PeripheralPins.c index 25ab25908a..3929207047 100644 --- a/variants/STM32G0xx/G071K(8-B)(T-U)xN_G081KB(T-U)xN/PeripheralPins.c +++ b/variants/STM32G0xx/G071K(8-B)(T-U)xN_G081KB(T-U)xN/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G071K(8-B)TxN.xml, STM32G071K(8-B)UxN.xml * STM32G081KBTxN.xml, STM32G081KBUxN.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)/PeripheralPins.c b/variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)/PeripheralPins.c index 78438c721c..ff8116373a 100644 --- a/variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)/PeripheralPins.c +++ b/variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G071R(6-8-B)Tx.xml, STM32G071RBIx.xml * STM32G081RBIx.xml, STM32G081RBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B0CET/PeripheralPins.c b/variants/STM32G0xx/G0B0CET/PeripheralPins.c index 3eff5d0b5e..25a0779734 100644 --- a/variants/STM32G0xx/G0B0CET/PeripheralPins.c +++ b/variants/STM32G0xx/G0B0CET/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G0B0CETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B0KET/PeripheralPins.c b/variants/STM32G0xx/G0B0KET/PeripheralPins.c index 3663327c8c..b9d501a34f 100644 --- a/variants/STM32G0xx/G0B0KET/PeripheralPins.c +++ b/variants/STM32G0xx/G0B0KET/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G0B0KETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B0RET/PeripheralPins.c b/variants/STM32G0xx/G0B0RET/PeripheralPins.c index 4f8f0edad3..d924df6e30 100644 --- a/variants/STM32G0xx/G0B0RET/PeripheralPins.c +++ b/variants/STM32G0xx/G0B0RET/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G0B0RETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B0VET/PeripheralPins.c b/variants/STM32G0xx/G0B0VET/PeripheralPins.c index 3d9e65d667..bfe09c7e3e 100644 --- a/variants/STM32G0xx/G0B0VET/PeripheralPins.c +++ b/variants/STM32G0xx/G0B0VET/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G0B0VETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)/PeripheralPins.c b/variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)/PeripheralPins.c index b2b5fd51b7..08b65141b2 100644 --- a/variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)/PeripheralPins.c +++ b/variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G0B1C(B-C-E)Tx.xml, STM32G0B1C(B-C-E)Ux.xml * STM32G0C1C(C-E)Tx.xml, STM32G0C1C(C-E)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B1C(B-C-E)(T-U)xN_G0C1C(C-E)(T-U)xN/PeripheralPins.c b/variants/STM32G0xx/G0B1C(B-C-E)(T-U)xN_G0C1C(C-E)(T-U)xN/PeripheralPins.c index 139d08dc7d..4d128a0202 100644 --- a/variants/STM32G0xx/G0B1C(B-C-E)(T-U)xN_G0C1C(C-E)(T-U)xN/PeripheralPins.c +++ b/variants/STM32G0xx/G0B1C(B-C-E)(T-U)xN_G0C1C(C-E)(T-U)xN/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G0B1C(B-C-E)TxN.xml, STM32G0B1C(B-C-E)UxN.xml * STM32G0C1C(C-E)TxN.xml, STM32G0C1C(C-E)UxN.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)/PeripheralPins.c b/variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)/PeripheralPins.c index db1e4f1fb9..f665629124 100644 --- a/variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)/PeripheralPins.c +++ b/variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G0B1K(B-C-E)Tx.xml, STM32G0B1K(B-C-E)Ux.xml * STM32G0C1K(C-E)Tx.xml, STM32G0C1K(C-E)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B1K(B-C-E)(T-U)xN_G0C1K(C-E)(T-U)xN/PeripheralPins.c b/variants/STM32G0xx/G0B1K(B-C-E)(T-U)xN_G0C1K(C-E)(T-U)xN/PeripheralPins.c index b3553c5ffe..b16cbe59b6 100644 --- a/variants/STM32G0xx/G0B1K(B-C-E)(T-U)xN_G0C1K(C-E)(T-U)xN/PeripheralPins.c +++ b/variants/STM32G0xx/G0B1K(B-C-E)(T-U)xN_G0C1K(C-E)(T-U)xN/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G0B1K(B-C-E)TxN.xml, STM32G0B1K(B-C-E)UxN.xml * STM32G0C1K(C-E)TxN.xml, STM32G0C1K(C-E)UxN.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B1M(B-C-E)T_G0C1M(C-E)T/PeripheralPins.c b/variants/STM32G0xx/G0B1M(B-C-E)T_G0C1M(C-E)T/PeripheralPins.c index 65beef7a35..09922ec50e 100644 --- a/variants/STM32G0xx/G0B1M(B-C-E)T_G0C1M(C-E)T/PeripheralPins.c +++ b/variants/STM32G0xx/G0B1M(B-C-E)T_G0C1M(C-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G0B1M(B-C-E)Tx.xml, STM32G0C1M(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B1NEY_G0C1NEY/PeripheralPins.c b/variants/STM32G0xx/G0B1NEY_G0C1NEY/PeripheralPins.c index 2aa68a9ffb..850b4ece7e 100644 --- a/variants/STM32G0xx/G0B1NEY_G0C1NEY/PeripheralPins.c +++ b/variants/STM32G0xx/G0B1NEY_G0C1NEY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G0B1NEYx.xml, STM32G0C1NEYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B1R(B-C-E)(I-T)xN_G0C1R(C-E)(I-T)xN/PeripheralPins.c b/variants/STM32G0xx/G0B1R(B-C-E)(I-T)xN_G0C1R(C-E)(I-T)xN/PeripheralPins.c index be461e994b..2215bc3df2 100644 --- a/variants/STM32G0xx/G0B1R(B-C-E)(I-T)xN_G0C1R(C-E)(I-T)xN/PeripheralPins.c +++ b/variants/STM32G0xx/G0B1R(B-C-E)(I-T)xN_G0C1R(C-E)(I-T)xN/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G0B1R(B-C-E)IxN.xml, STM32G0B1R(B-C-E)TxN.xml * STM32G0C1R(C-E)IxN.xml, STM32G0C1R(C-E)TxN.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T/PeripheralPins.c b/variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T/PeripheralPins.c index ef5b36e41c..78db0e820e 100644 --- a/variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T/PeripheralPins.c +++ b/variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G0B1R(B-C-E)Tx.xml, STM32G0C1R(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)/PeripheralPins.c b/variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)/PeripheralPins.c index 0477b9cc92..0907c2fb60 100644 --- a/variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)/PeripheralPins.c +++ b/variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G0B1V(B-C-E)Ix.xml, STM32G0B1V(B-C-E)Tx.xml * STM32G0C1V(C-E)Ix.xml, STM32G0C1V(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G411C(6-8-B)T/PeripheralPins.c b/variants/STM32G4xx/G411C(6-8-B)T/PeripheralPins.c index 5cc0cf126d..78d7ff56d2 100644 --- a/variants/STM32G4xx/G411C(6-8-B)T/PeripheralPins.c +++ b/variants/STM32G4xx/G411C(6-8-B)T/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G411C6Tx.xml, STM32G411C8Tx.xml * STM32G411CBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G411C(6-8-B)U/PeripheralPins.c b/variants/STM32G4xx/G411C(6-8-B)U/PeripheralPins.c index 6a1f438fb0..b9c6e818ae 100644 --- a/variants/STM32G4xx/G411C(6-8-B)U/PeripheralPins.c +++ b/variants/STM32G4xx/G411C(6-8-B)U/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G411C6Ux.xml, STM32G411C8Ux.xml * STM32G411CBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G411CCT/PeripheralPins.c b/variants/STM32G4xx/G411CCT/PeripheralPins.c index 3b456578d8..9b97170536 100644 --- a/variants/STM32G4xx/G411CCT/PeripheralPins.c +++ b/variants/STM32G4xx/G411CCT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G411CCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G411CCU/PeripheralPins.c b/variants/STM32G4xx/G411CCU/PeripheralPins.c index 457bad164f..3a13626894 100644 --- a/variants/STM32G4xx/G411CCU/PeripheralPins.c +++ b/variants/STM32G4xx/G411CCU/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G411CCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G411K(6-8-B)(T-U)/PeripheralPins.c b/variants/STM32G4xx/G411K(6-8-B)(T-U)/PeripheralPins.c index c1678e5031..5bd0604eed 100644 --- a/variants/STM32G4xx/G411K(6-8-B)(T-U)/PeripheralPins.c +++ b/variants/STM32G4xx/G411K(6-8-B)(T-U)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32G411K6Tx.xml, STM32G411K6Ux.xml * STM32G411K8Tx.xml, STM32G411K8Ux.xml * STM32G411KBTx.xml, STM32G411KBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G411M(6-8-B)T/PeripheralPins.c b/variants/STM32G4xx/G411M(6-8-B)T/PeripheralPins.c index bd6d9d023f..a2d42151ef 100644 --- a/variants/STM32G4xx/G411M(6-8-B)T/PeripheralPins.c +++ b/variants/STM32G4xx/G411M(6-8-B)T/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G411M6Tx.xml, STM32G411M8Tx.xml * STM32G411MBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G411MCT/PeripheralPins.c b/variants/STM32G4xx/G411MCT/PeripheralPins.c index 2680046043..96baba28b7 100644 --- a/variants/STM32G4xx/G411MCT/PeripheralPins.c +++ b/variants/STM32G4xx/G411MCT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G411MCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G411R(6-8-B)T/PeripheralPins.c b/variants/STM32G4xx/G411R(6-8-B)T/PeripheralPins.c index f2e300457e..0439b9bee7 100644 --- a/variants/STM32G4xx/G411R(6-8-B)T/PeripheralPins.c +++ b/variants/STM32G4xx/G411R(6-8-B)T/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G411R6Tx.xml, STM32G411R8Tx.xml * STM32G411RBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G411RCT/PeripheralPins.c b/variants/STM32G4xx/G411RCT/PeripheralPins.c index 344c6810ad..3fc1c38e5a 100644 --- a/variants/STM32G4xx/G411RCT/PeripheralPins.c +++ b/variants/STM32G4xx/G411RCT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G411RCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G414C(B-C)T/PeripheralPins.c b/variants/STM32G4xx/G414C(B-C)T/PeripheralPins.c index d6d2779949..57405ebb1f 100644 --- a/variants/STM32G4xx/G414C(B-C)T/PeripheralPins.c +++ b/variants/STM32G4xx/G414C(B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G414CBTx.xml, STM32G414CCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G414C(B-C)U/PeripheralPins.c b/variants/STM32G4xx/G414C(B-C)U/PeripheralPins.c index 083c44a24e..fcf74c7759 100644 --- a/variants/STM32G4xx/G414C(B-C)U/PeripheralPins.c +++ b/variants/STM32G4xx/G414C(B-C)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G414CBUx.xml, STM32G414CCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G414M(B-C)T/PeripheralPins.c b/variants/STM32G4xx/G414M(B-C)T/PeripheralPins.c index b17ad69546..8da7811e70 100644 --- a/variants/STM32G4xx/G414M(B-C)T/PeripheralPins.c +++ b/variants/STM32G4xx/G414M(B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G414MBTx.xml, STM32G414MCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G414R(B-C)T/PeripheralPins.c b/variants/STM32G4xx/G414R(B-C)T/PeripheralPins.c index f165c33dcc..31b87067e5 100644 --- a/variants/STM32G4xx/G414R(B-C)T/PeripheralPins.c +++ b/variants/STM32G4xx/G414R(B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G414RBTx.xml, STM32G414RCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G414V(B-C)T/PeripheralPins.c b/variants/STM32G4xx/G414V(B-C)T/PeripheralPins.c index b218a0f345..7206bc5702 100644 --- a/variants/STM32G4xx/G414V(B-C)T/PeripheralPins.c +++ b/variants/STM32G4xx/G414V(B-C)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G414VBTx.xml, STM32G414VCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G431C(6-8-B)T_G441CBT/PeripheralPins.c b/variants/STM32G4xx/G431C(6-8-B)T_G441CBT/PeripheralPins.c index 8260bc367a..0f75f86e3d 100644 --- a/variants/STM32G4xx/G431C(6-8-B)T_G441CBT/PeripheralPins.c +++ b/variants/STM32G4xx/G431C(6-8-B)T_G441CBT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G431C(6-8-B)Tx.xml, STM32G441CBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G431C(6-8-B)U_G441CBU/PeripheralPins.c b/variants/STM32G4xx/G431C(6-8-B)U_G441CBU/PeripheralPins.c index fae3875898..03e07889f5 100644 --- a/variants/STM32G4xx/G431C(6-8-B)U_G441CBU/PeripheralPins.c +++ b/variants/STM32G4xx/G431C(6-8-B)U_G441CBU/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G431C(6-8-B)Ux.xml, STM32G441CBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G431CBTxZ/PeripheralPins.c b/variants/STM32G4xx/G431CBTxZ/PeripheralPins.c index 41fc04e6c9..6df9742a66 100644 --- a/variants/STM32G4xx/G431CBTxZ/PeripheralPins.c +++ b/variants/STM32G4xx/G431CBTxZ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G431CBTxZ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G431CBY_G441CBY/PeripheralPins.c b/variants/STM32G4xx/G431CBY_G441CBY/PeripheralPins.c index 925ede6ae1..cfe9c8bb56 100644 --- a/variants/STM32G4xx/G431CBY_G441CBY/PeripheralPins.c +++ b/variants/STM32G4xx/G431CBY_G441CBY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G431CBYx.xml, STM32G441CBYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)/PeripheralPins.c b/variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)/PeripheralPins.c index 637a8df88c..e792f8f164 100644 --- a/variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)/PeripheralPins.c +++ b/variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G431K(6-8-B)Tx.xml, STM32G431K(6-8-B)Ux.xml * STM32G441KBTx.xml, STM32G441KBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G431M(6-8-B)T_G441MBT/PeripheralPins.c b/variants/STM32G4xx/G431M(6-8-B)T_G441MBT/PeripheralPins.c index d5b63f41c2..80de90c54d 100644 --- a/variants/STM32G4xx/G431M(6-8-B)T_G441MBT/PeripheralPins.c +++ b/variants/STM32G4xx/G431M(6-8-B)T_G441MBT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G431M(6-8-B)Tx.xml, STM32G441MBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G431R(6-8)(I-T)_G431RB(I-T)x(Z)_G441RB(I-T)/PeripheralPins.c b/variants/STM32G4xx/G431R(6-8)(I-T)_G431RB(I-T)x(Z)_G441RB(I-T)/PeripheralPins.c index a6ccda20b0..5592f6d081 100644 --- a/variants/STM32G4xx/G431R(6-8)(I-T)_G431RB(I-T)x(Z)_G441RB(I-T)/PeripheralPins.c +++ b/variants/STM32G4xx/G431R(6-8)(I-T)_G431RB(I-T)x(Z)_G441RB(I-T)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32G431R(6-8-B)Ix.xml, STM32G431R(6-8-B)Tx.xml * STM32G431RBTxZ.xml, STM32G441RBIx.xml * STM32G441RBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G431V(6-8-B)T_G441VBT/PeripheralPins.c b/variants/STM32G4xx/G431V(6-8-B)T_G441VBT/PeripheralPins.c index 25f99db7c6..5144a022bf 100644 --- a/variants/STM32G4xx/G431V(6-8-B)T_G441VBT/PeripheralPins.c +++ b/variants/STM32G4xx/G431V(6-8-B)T_G441VBT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G431V(6-8-B)Tx.xml, STM32G441VBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G471C(C-E)T/PeripheralPins.c b/variants/STM32G4xx/G471C(C-E)T/PeripheralPins.c index a5462af78b..8e424cae98 100644 --- a/variants/STM32G4xx/G471C(C-E)T/PeripheralPins.c +++ b/variants/STM32G4xx/G471C(C-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G471C(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G471C(C-E)U/PeripheralPins.c b/variants/STM32G4xx/G471C(C-E)U/PeripheralPins.c index 3fe3d8fb66..a80255f5c0 100644 --- a/variants/STM32G4xx/G471C(C-E)U/PeripheralPins.c +++ b/variants/STM32G4xx/G471C(C-E)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G471C(C-E)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G471M(C-E)T/PeripheralPins.c b/variants/STM32G4xx/G471M(C-E)T/PeripheralPins.c index 59c97f6051..1dd21d97b3 100644 --- a/variants/STM32G4xx/G471M(C-E)T/PeripheralPins.c +++ b/variants/STM32G4xx/G471M(C-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G471M(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G471MEY/PeripheralPins.c b/variants/STM32G4xx/G471MEY/PeripheralPins.c index a47eecde2a..4b3f640b66 100644 --- a/variants/STM32G4xx/G471MEY/PeripheralPins.c +++ b/variants/STM32G4xx/G471MEY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G471MEYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G471Q(C-E)T/PeripheralPins.c b/variants/STM32G4xx/G471Q(C-E)T/PeripheralPins.c index 47f0306c93..563947e496 100644 --- a/variants/STM32G4xx/G471Q(C-E)T/PeripheralPins.c +++ b/variants/STM32G4xx/G471Q(C-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G471Q(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G471R(C-E)T/PeripheralPins.c b/variants/STM32G4xx/G471R(C-E)T/PeripheralPins.c index dfbb11a8a4..0c683bab05 100644 --- a/variants/STM32G4xx/G471R(C-E)T/PeripheralPins.c +++ b/variants/STM32G4xx/G471R(C-E)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G471R(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G471V(C-E)(H-I-T)/PeripheralPins.c b/variants/STM32G4xx/G471V(C-E)(H-I-T)/PeripheralPins.c index 39e3e69bdc..8395cc8e64 100644 --- a/variants/STM32G4xx/G471V(C-E)(H-I-T)/PeripheralPins.c +++ b/variants/STM32G4xx/G471V(C-E)(H-I-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G471V(C-E)Hx.xml, STM32G471V(C-E)Ix.xml * STM32G471V(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET/PeripheralPins.c b/variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET/PeripheralPins.c index 989b038e68..715b39fbfd 100644 --- a/variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET/PeripheralPins.c +++ b/variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G473C(B-C-E)Tx.xml, STM32G474C(B-C-E)Tx.xml * STM32G483CETx.xml, STM32G484CETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/PeripheralPins.c b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/PeripheralPins.c index 93a4089eef..8b178be893 100644 --- a/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/PeripheralPins.c +++ b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G473C(B-C-E)Ux.xml, STM32G474C(B-C-E)Ux.xml * STM32G483CEUx.xml, STM32G484CEUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET/PeripheralPins.c b/variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET/PeripheralPins.c index 26c66a2a00..662a72bb5f 100644 --- a/variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET/PeripheralPins.c +++ b/variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G473M(B-C-E)Tx.xml, STM32G474M(B-C-E)Tx.xml * STM32G483METx.xml, STM32G484METx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G473MEY_G474MEY_G483MEY_G484MEY/PeripheralPins.c b/variants/STM32G4xx/G473MEY_G474MEY_G483MEY_G484MEY/PeripheralPins.c index 7a44fdc03f..52111a354e 100644 --- a/variants/STM32G4xx/G473MEY_G474MEY_G483MEY_G484MEY/PeripheralPins.c +++ b/variants/STM32G4xx/G473MEY_G474MEY_G483MEY_G484MEY/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G473MEYx.xml, STM32G474MEYx.xml * STM32G483MEYx.xml, STM32G484MEYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI/PeripheralPins.c b/variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI/PeripheralPins.c index d3383c9999..ea56cc9f06 100644 --- a/variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI/PeripheralPins.c +++ b/variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G473P(B-C-E)Ix.xml, STM32G474P(B-C-E)Ix.xml * STM32G483PEIx.xml, STM32G484PEIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G473Q(B-C)T_G473QETx(Z)_G474Q(B-C-E)T_G483QET_G484QET/PeripheralPins.c b/variants/STM32G4xx/G473Q(B-C)T_G473QETx(Z)_G474Q(B-C-E)T_G483QET_G484QET/PeripheralPins.c index 2479ea5e94..53c3f6eff7 100644 --- a/variants/STM32G4xx/G473Q(B-C)T_G473QETx(Z)_G474Q(B-C-E)T_G483QET_G484QET/PeripheralPins.c +++ b/variants/STM32G4xx/G473Q(B-C)T_G473QETx(Z)_G474Q(B-C-E)T_G483QET_G484QET/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32G473Q(B-C-E)Tx.xml, STM32G473QETxZ.xml * STM32G474Q(B-C-E)Tx.xml, STM32G483QETx.xml * STM32G484QETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G473R(B-C)T_G473RETx(Z)_G474R(B-C-E)T_G483RET_G484RET/PeripheralPins.c b/variants/STM32G4xx/G473R(B-C)T_G473RETx(Z)_G474R(B-C-E)T_G483RET_G484RET/PeripheralPins.c index 8c995c3085..46c58798c1 100644 --- a/variants/STM32G4xx/G473R(B-C)T_G473RETx(Z)_G474R(B-C-E)T_G483RET_G484RET/PeripheralPins.c +++ b/variants/STM32G4xx/G473R(B-C)T_G473RETx(Z)_G474R(B-C-E)T_G483RET_G484RET/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32G473R(B-C-E)Tx.xml, STM32G473RETxZ.xml * STM32G474R(B-C-E)Tx.xml, STM32G483RETx.xml * STM32G484RETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)/PeripheralPins.c b/variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)/PeripheralPins.c index 3f72aea8b6..8b893bd0c9 100644 --- a/variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)/PeripheralPins.c +++ b/variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32G474V(B-C-E)Hx.xml, STM32G474V(B-C-E)Tx.xml * STM32G483VEHx.xml, STM32G483VETx.xml * STM32G484VEHx.xml, STM32G484VETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G491C(C-E)T_G4A1CET/PeripheralPins.c b/variants/STM32G4xx/G491C(C-E)T_G4A1CET/PeripheralPins.c index 96b7598137..a22dd3b7fd 100644 --- a/variants/STM32G4xx/G491C(C-E)T_G4A1CET/PeripheralPins.c +++ b/variants/STM32G4xx/G491C(C-E)T_G4A1CET/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G491C(C-E)Tx.xml, STM32G4A1CETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G491C(C-E)U/PeripheralPins.c b/variants/STM32G4xx/G491C(C-E)U/PeripheralPins.c index 645c711b05..4e33274102 100644 --- a/variants/STM32G4xx/G491C(C-E)U/PeripheralPins.c +++ b/variants/STM32G4xx/G491C(C-E)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G491C(C-E)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G491K(C-E)U_G4A1KEU/PeripheralPins.c b/variants/STM32G4xx/G491K(C-E)U_G4A1KEU/PeripheralPins.c index f6209c2b2f..d1b4c28b3b 100644 --- a/variants/STM32G4xx/G491K(C-E)U_G4A1KEU/PeripheralPins.c +++ b/variants/STM32G4xx/G491K(C-E)U_G4A1KEU/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G491K(C-E)Ux.xml, STM32G4A1KEUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)/PeripheralPins.c b/variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)/PeripheralPins.c index 4db2e7422f..9f344fc48f 100644 --- a/variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)/PeripheralPins.c +++ b/variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32G491M(C-E)Sx.xml, STM32G491M(C-E)Tx.xml * STM32G4A1MESx.xml, STM32G4A1METx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)/PeripheralPins.c b/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)/PeripheralPins.c index 6688824a98..5ae975205e 100644 --- a/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)/PeripheralPins.c +++ b/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32G491RETxZ.xml, STM32G491REYx.xml * STM32G4A1REIx.xml, STM32G4A1RETx.xml * STM32G4A1REYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)/boards_entry.txt b/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)/boards_entry.txt index 32c0c5e70e..28e0d98814 100644 --- a/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)/boards_entry.txt +++ b/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)/boards_entry.txt @@ -42,7 +42,7 @@ GenG4.menu.pnum.GENERIC_G491RETX.debug.svd_file={runtime.tools.STM32_SVD.path}/s # Generic G491RETxZ GenG4.menu.pnum.GENERIC_G491RETXZ=Generic G491RETxZ GenG4.menu.pnum.GENERIC_G491RETXZ.upload.maximum_size=524288 -GenG4.menu.pnum.GENERIC_G491RETXZ.upload.maximum_data_size=131072 +GenG4.menu.pnum.GENERIC_G491RETXZ.upload.maximum_data_size=114688 GenG4.menu.pnum.GENERIC_G491RETXZ.build.board=GENERIC_G491RETXZ GenG4.menu.pnum.GENERIC_G491RETXZ.build.product_line=STM32G491xx GenG4.menu.pnum.GENERIC_G491RETXZ.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y) diff --git a/variants/STM32G4xx/G491V(C-E)T_G4A1VET/PeripheralPins.c b/variants/STM32G4xx/G491V(C-E)T_G4A1VET/PeripheralPins.c index a2940b5eff..83a6ac13b6 100644 --- a/variants/STM32G4xx/G491V(C-E)T_G4A1VET/PeripheralPins.c +++ b/variants/STM32G4xx/G491V(C-E)T_G4A1VET/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G491V(C-E)Tx.xml, STM32G4A1VETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32G4xx/G4A1CEU/PeripheralPins.c b/variants/STM32G4xx/G4A1CEU/PeripheralPins.c index 4a77eebadb..a369d5b018 100644 --- a/variants/STM32G4xx/G4A1CEU/PeripheralPins.c +++ b/variants/STM32G4xx/G4A1CEU/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32G4A1CEUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H503CB(T-U)/PeripheralPins.c b/variants/STM32H5xx/H503CB(T-U)/PeripheralPins.c index 4444300e11..d555febdda 100644 --- a/variants/STM32H5xx/H503CB(T-U)/PeripheralPins.c +++ b/variants/STM32H5xx/H503CB(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H503CBTx.xml, STM32H503CBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H503EBY/PeripheralPins.c b/variants/STM32H5xx/H503EBY/PeripheralPins.c index 45d92f4d47..f993d3633a 100644 --- a/variants/STM32H5xx/H503EBY/PeripheralPins.c +++ b/variants/STM32H5xx/H503EBY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H503EBYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H503KBU/PeripheralPins.c b/variants/STM32H5xx/H503KBU/PeripheralPins.c index 0dc89f4d33..9fc779d3a1 100644 --- a/variants/STM32H5xx/H503KBU/PeripheralPins.c +++ b/variants/STM32H5xx/H503KBU/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H503KBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H503RBT/PeripheralPins.c b/variants/STM32H5xx/H503RBT/PeripheralPins.c index f375ca4212..d369369c04 100644 --- a/variants/STM32H5xx/H503RBT/PeripheralPins.c +++ b/variants/STM32H5xx/H503RBT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H503RBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H523C(C-E)(T-U)_H533CE(T-U)/PeripheralPins.c b/variants/STM32H5xx/H523C(C-E)(T-U)_H533CE(T-U)/PeripheralPins.c index 1d9d769842..e045d2143e 100644 --- a/variants/STM32H5xx/H523C(C-E)(T-U)_H533CE(T-U)/PeripheralPins.c +++ b/variants/STM32H5xx/H523C(C-E)(T-U)_H533CE(T-U)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32H523CCTx.xml, STM32H523CCUx.xml * STM32H523CETx.xml, STM32H523CEUx.xml * STM32H533CETx.xml, STM32H533CEUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H523HEY_H533HEY/PeripheralPins.c b/variants/STM32H5xx/H523HEY_H533HEY/PeripheralPins.c index 1394fd4702..b5f6526444 100644 --- a/variants/STM32H5xx/H523HEY_H533HEY/PeripheralPins.c +++ b/variants/STM32H5xx/H523HEY_H533HEY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H523HEYx.xml, STM32H533HEYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H523R(C-E)T_H533RET/PeripheralPins.c b/variants/STM32H5xx/H523R(C-E)T_H533RET/PeripheralPins.c index 8000071285..df5c66a85a 100644 --- a/variants/STM32H5xx/H523R(C-E)T_H533RET/PeripheralPins.c +++ b/variants/STM32H5xx/H523R(C-E)T_H533RET/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H523RCTx.xml, STM32H523RETx.xml * STM32H533RETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H523V(C-E)(I-T)_H533VE(I-T)/PeripheralPins.c b/variants/STM32H5xx/H523V(C-E)(I-T)_H533VE(I-T)/PeripheralPins.c index 11c4790902..b99e2971a1 100644 --- a/variants/STM32H5xx/H523V(C-E)(I-T)_H533VE(I-T)/PeripheralPins.c +++ b/variants/STM32H5xx/H523V(C-E)(I-T)_H533VE(I-T)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32H523VCIx.xml, STM32H523VCTx.xml * STM32H523VEIx.xml, STM32H523VETx.xml * STM32H533VEIx.xml, STM32H533VETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H523Z(C-E)(J-T)_H533ZE(J-T)/PeripheralPins.c b/variants/STM32H5xx/H523Z(C-E)(J-T)_H533ZE(J-T)/PeripheralPins.c index e2a7066e36..bb94b4b771 100644 --- a/variants/STM32H5xx/H523Z(C-E)(J-T)_H533ZE(J-T)/PeripheralPins.c +++ b/variants/STM32H5xx/H523Z(C-E)(J-T)_H533ZE(J-T)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32H523ZCJx.xml, STM32H523ZCTx.xml * STM32H523ZEJx.xml, STM32H523ZETx.xml * STM32H533ZEJx.xml, STM32H533ZETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H562A(G-I)I/PeripheralPins.c b/variants/STM32H5xx/H562A(G-I)I/PeripheralPins.c index 17992c84a8..2c864d6c39 100644 --- a/variants/STM32H5xx/H562A(G-I)I/PeripheralPins.c +++ b/variants/STM32H5xx/H562A(G-I)I/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H562AGIx.xml, STM32H562AIIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H562I(G-I)(K-T)/PeripheralPins.c b/variants/STM32H5xx/H562I(G-I)(K-T)/PeripheralPins.c index 383c847fb3..4afedcacb6 100644 --- a/variants/STM32H5xx/H562I(G-I)(K-T)/PeripheralPins.c +++ b/variants/STM32H5xx/H562I(G-I)(K-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H562IGKx.xml, STM32H562IGTx.xml * STM32H562IIKx.xml, STM32H562IITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H562R(G-I)T/PeripheralPins.c b/variants/STM32H5xx/H562R(G-I)T/PeripheralPins.c index f02a8a6166..b039942f90 100644 --- a/variants/STM32H5xx/H562R(G-I)T/PeripheralPins.c +++ b/variants/STM32H5xx/H562R(G-I)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H562RGTx.xml, STM32H562RITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H562R(G-I)V/PeripheralPins.c b/variants/STM32H5xx/H562R(G-I)V/PeripheralPins.c index f05a013e5c..f4943e3df6 100644 --- a/variants/STM32H5xx/H562R(G-I)V/PeripheralPins.c +++ b/variants/STM32H5xx/H562R(G-I)V/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H562RGVx.xml, STM32H562RIVx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H562V(G-I)T/PeripheralPins.c b/variants/STM32H5xx/H562V(G-I)T/PeripheralPins.c index ec8b940e48..dc9c67ffa0 100644 --- a/variants/STM32H5xx/H562V(G-I)T/PeripheralPins.c +++ b/variants/STM32H5xx/H562V(G-I)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H562VGTx.xml, STM32H562VITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H562Z(G-I)T/PeripheralPins.c b/variants/STM32H5xx/H562Z(G-I)T/PeripheralPins.c index 76d28c4f76..731e95c760 100644 --- a/variants/STM32H5xx/H562Z(G-I)T/PeripheralPins.c +++ b/variants/STM32H5xx/H562Z(G-I)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H562ZGTx.xml, STM32H562ZITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H563A(G-I)I_H573AII/PeripheralPins.c b/variants/STM32H5xx/H563A(G-I)I_H573AII/PeripheralPins.c index c6a1053640..43088fd808 100644 --- a/variants/STM32H5xx/H563A(G-I)I_H573AII/PeripheralPins.c +++ b/variants/STM32H5xx/H563A(G-I)I_H573AII/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H563AGIx.xml, STM32H563AIIx.xml * STM32H573AIIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H563AIIxQ_H573AIIxQ/PeripheralPins.c b/variants/STM32H5xx/H563AIIxQ_H573AIIxQ/PeripheralPins.c index e4ae7e2ef6..8434ac678e 100644 --- a/variants/STM32H5xx/H563AIIxQ_H573AIIxQ/PeripheralPins.c +++ b/variants/STM32H5xx/H563AIIxQ_H573AIIxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H563AIIxQ.xml, STM32H573AIIxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H563I(G-I)(K-T)_H563LIHxQ_H573II(K-T)_H573LIHxQ/PeripheralPins.c b/variants/STM32H5xx/H563I(G-I)(K-T)_H563LIHxQ_H573II(K-T)_H573LIHxQ/PeripheralPins.c index 6845d5b382..755a4a83e7 100644 --- a/variants/STM32H5xx/H563I(G-I)(K-T)_H563LIHxQ_H573II(K-T)_H573LIHxQ/PeripheralPins.c +++ b/variants/STM32H5xx/H563I(G-I)(K-T)_H563LIHxQ_H573II(K-T)_H573LIHxQ/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32H563IIKx.xml, STM32H563IITx.xml * STM32H563LIHxQ.xml, STM32H573IIKx.xml * STM32H573IITx.xml, STM32H573LIHxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H563IIKxQ_H573IIKxQ/PeripheralPins.c b/variants/STM32H5xx/H563IIKxQ_H573IIKxQ/PeripheralPins.c index be26a88ab9..0a42bc026e 100644 --- a/variants/STM32H5xx/H563IIKxQ_H573IIKxQ/PeripheralPins.c +++ b/variants/STM32H5xx/H563IIKxQ_H573IIKxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H563IIKxQ.xml, STM32H573IIKxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H563IITxQ_H573IITxQ/PeripheralPins.c b/variants/STM32H5xx/H563IITxQ_H573IITxQ/PeripheralPins.c index 32d4ffaced..b8cad61f03 100644 --- a/variants/STM32H5xx/H563IITxQ_H573IITxQ/PeripheralPins.c +++ b/variants/STM32H5xx/H563IITxQ_H573IITxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H563IITxQ.xml, STM32H573IITxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H563MIYxQ_H573MIYxQ/PeripheralPins.c b/variants/STM32H5xx/H563MIYxQ_H573MIYxQ/PeripheralPins.c index f3dc146125..87213c06e9 100644 --- a/variants/STM32H5xx/H563MIYxQ_H573MIYxQ/PeripheralPins.c +++ b/variants/STM32H5xx/H563MIYxQ_H573MIYxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H563MIYxQ.xml, STM32H573MIYxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H563R(G-I)T_H573RIT/PeripheralPins.c b/variants/STM32H5xx/H563R(G-I)T_H573RIT/PeripheralPins.c index 4cb2de2557..6811ce592d 100644 --- a/variants/STM32H5xx/H563R(G-I)T_H573RIT/PeripheralPins.c +++ b/variants/STM32H5xx/H563R(G-I)T_H573RIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H563RGTx.xml, STM32H563RITx.xml * STM32H573RITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H563R(G-I)V_H573RIV/PeripheralPins.c b/variants/STM32H5xx/H563R(G-I)V_H573RIV/PeripheralPins.c index 63ba6d3a3f..aec467684f 100644 --- a/variants/STM32H5xx/H563R(G-I)V_H573RIV/PeripheralPins.c +++ b/variants/STM32H5xx/H563R(G-I)V_H573RIV/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H563RGVx.xml, STM32H563RIVx.xml * STM32H573RIVx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H563V(G-I)T_H573VIT/PeripheralPins.c b/variants/STM32H5xx/H563V(G-I)T_H573VIT/PeripheralPins.c index 544d1a45cf..038e65f8a6 100644 --- a/variants/STM32H5xx/H563V(G-I)T_H573VIT/PeripheralPins.c +++ b/variants/STM32H5xx/H563V(G-I)T_H573VIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H563VGTx.xml, STM32H563VITx.xml * STM32H573VITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H563VITxQ_H573VITxQ/PeripheralPins.c b/variants/STM32H5xx/H563VITxQ_H573VITxQ/PeripheralPins.c index df307e2a52..ee1ab9a978 100644 --- a/variants/STM32H5xx/H563VITxQ_H573VITxQ/PeripheralPins.c +++ b/variants/STM32H5xx/H563VITxQ_H573VITxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H563VITxQ.xml, STM32H573VITxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/PeripheralPins.c b/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/PeripheralPins.c index d20d1cae76..955abd4929 100644 --- a/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/PeripheralPins.c +++ b/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H563ZGTx.xml, STM32H563ZITx.xml * STM32H573ZITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H5xx/H563ZITxQ_H573ZITxQ/PeripheralPins.c b/variants/STM32H5xx/H563ZITxQ_H573ZITxQ/PeripheralPins.c index ec492a5b89..e671566201 100644 --- a/variants/STM32H5xx/H563ZITxQ_H573ZITxQ/PeripheralPins.c +++ b/variants/STM32H5xx/H563ZITxQ_H573ZITxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H563ZITxQ.xml, STM32H573ZITxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/PeripheralPins.c b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/PeripheralPins.c index 83b5f685fa..83b2ba443e 100644 --- a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/PeripheralPins.c +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32H723VGHx.xml, STM32H723VGTx.xml * STM32H730VBHx.xml, STM32H730VBTx.xml * STM32H733VGHx.xml, STM32H733VGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H723Z(E-G)I_H730ZBI_H733ZGI/PeripheralPins.c b/variants/STM32H7xx/H723Z(E-G)I_H730ZBI_H733ZGI/PeripheralPins.c index 14d51a2c2f..045d2f3b07 100644 --- a/variants/STM32H7xx/H723Z(E-G)I_H730ZBI_H733ZGI/PeripheralPins.c +++ b/variants/STM32H7xx/H723Z(E-G)I_H730ZBI_H733ZGI/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H723ZEIx.xml, STM32H723ZGIx.xml * STM32H730ZBIx.xml, STM32H733ZGIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT/PeripheralPins.c b/variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT/PeripheralPins.c index 10fb7d6977..4fa342a8c3 100644 --- a/variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT/PeripheralPins.c +++ b/variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H723ZETx.xml, STM32H723ZGTx.xml * STM32H730ZBTx.xml, STM32H733ZGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H725A(E-G)I_H730ABIxQ_H735AGI/PeripheralPins.c b/variants/STM32H7xx/H725A(E-G)I_H730ABIxQ_H735AGI/PeripheralPins.c index 2dad52501e..f0d462bce4 100644 --- a/variants/STM32H7xx/H725A(E-G)I_H730ABIxQ_H735AGI/PeripheralPins.c +++ b/variants/STM32H7xx/H725A(E-G)I_H730ABIxQ_H735AGI/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H725AEIx.xml, STM32H725AGIx.xml * STM32H730ABIxQ.xml, STM32H735AGIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H725I(E-G)K_H730IBKxQ_H735IGK/PeripheralPins.c b/variants/STM32H7xx/H725I(E-G)K_H730IBKxQ_H735IGK/PeripheralPins.c index f8b10aeaec..323ed4651d 100644 --- a/variants/STM32H7xx/H725I(E-G)K_H730IBKxQ_H735IGK/PeripheralPins.c +++ b/variants/STM32H7xx/H725I(E-G)K_H730IBKxQ_H735IGK/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H725IEKx.xml, STM32H725IGKx.xml * STM32H730IBKxQ.xml, STM32H735IGKx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H725I(E-G)T_H730IBTxQ_H735IGT/PeripheralPins.c b/variants/STM32H7xx/H725I(E-G)T_H730IBTxQ_H735IGT/PeripheralPins.c index 15b831a424..b06c40f45d 100644 --- a/variants/STM32H7xx/H725I(E-G)T_H730IBTxQ_H735IGT/PeripheralPins.c +++ b/variants/STM32H7xx/H725I(E-G)T_H730IBTxQ_H735IGT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H725IETx.xml, STM32H725IGTx.xml * STM32H730IBTxQ.xml, STM32H735IGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H725R(E-G)V_H735RGV/PeripheralPins.c b/variants/STM32H7xx/H725R(E-G)V_H735RGV/PeripheralPins.c index 4625bdd119..42c01bdcb7 100644 --- a/variants/STM32H7xx/H725R(E-G)V_H735RGV/PeripheralPins.c +++ b/variants/STM32H7xx/H725R(E-G)V_H735RGV/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H725REVx.xml, STM32H725RGVx.xml * STM32H735RGVx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H725V(E-G)H_H735VGH/PeripheralPins.c b/variants/STM32H7xx/H725V(E-G)H_H735VGH/PeripheralPins.c index b61db69cbd..548a4155f6 100644 --- a/variants/STM32H7xx/H725V(E-G)H_H735VGH/PeripheralPins.c +++ b/variants/STM32H7xx/H725V(E-G)H_H735VGH/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H725VEHx.xml, STM32H725VGHx.xml * STM32H735VGHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H725V(E-G)T_H735VGT/PeripheralPins.c b/variants/STM32H7xx/H725V(E-G)T_H735VGT/PeripheralPins.c index da00e84155..ab586ad5f3 100644 --- a/variants/STM32H7xx/H725V(E-G)T_H735VGT/PeripheralPins.c +++ b/variants/STM32H7xx/H725V(E-G)T_H735VGT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H725VETx.xml, STM32H725VGTx.xml * STM32H735VGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H725VGY_H735VGY/PeripheralPins.c b/variants/STM32H7xx/H725VGY_H735VGY/PeripheralPins.c index 5f9272af12..c12ee76685 100644 --- a/variants/STM32H7xx/H725VGY_H735VGY/PeripheralPins.c +++ b/variants/STM32H7xx/H725VGY_H735VGY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H725VGYx.xml, STM32H735VGYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H725Z(E-G)T_H735ZGT/PeripheralPins.c b/variants/STM32H7xx/H725Z(E-G)T_H735ZGT/PeripheralPins.c index a2a356cca9..2ea1256d46 100644 --- a/variants/STM32H7xx/H725Z(E-G)T_H735ZGT/PeripheralPins.c +++ b/variants/STM32H7xx/H725Z(E-G)T_H735ZGT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H725ZETx.xml, STM32H725ZGTx.xml * STM32H735ZGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H742A(G-I)I_H743A(G-I)I_H753AII/PeripheralPins.c b/variants/STM32H7xx/H742A(G-I)I_H743A(G-I)I_H753AII/PeripheralPins.c index b9f318808a..19f58ad054 100644 --- a/variants/STM32H7xx/H742A(G-I)I_H743A(G-I)I_H753AII/PeripheralPins.c +++ b/variants/STM32H7xx/H742A(G-I)I_H743A(G-I)I_H753AII/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H742A(G-I)Ix.xml, STM32H743A(G-I)Ix.xml * STM32H753AIIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H742B(G-I)T_H743B(G-I)T_H753BIT/PeripheralPins.c b/variants/STM32H7xx/H742B(G-I)T_H743B(G-I)T_H753BIT/PeripheralPins.c index f91fc4080f..881d00a221 100644 --- a/variants/STM32H7xx/H742B(G-I)T_H743B(G-I)T_H753BIT/PeripheralPins.c +++ b/variants/STM32H7xx/H742B(G-I)T_H743B(G-I)T_H753BIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H742B(G-I)Tx.xml, STM32H743BGTx.xml * STM32H743BITx.xml, STM32H753BITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/PeripheralPins.c b/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/PeripheralPins.c index 4d41f01f77..94320c47e8 100644 --- a/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/PeripheralPins.c +++ b/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/PeripheralPins.c @@ -16,7 +16,7 @@ * STM32H743IIKx.xml, STM32H743IITx.xml * STM32H750IBKx.xml, STM32H750IBTx.xml * STM32H753IIKx.xml, STM32H753IITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins.c b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins.c index aacd8e0b93..872b601b4d 100644 --- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins.c +++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32H743V(G-I)Hx.xml, STM32H743VGTx.xml * STM32H743VITx.xml, STM32H750VBTx.xml * STM32H753VIHx.xml, STM32H753VITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H742X(G-I)H_H743X(G-I)H_H745X(G-I)H_H747X(G-I)H_H750XBH_H753XIH_H755XIH_H757XIH/PeripheralPins.c b/variants/STM32H7xx/H742X(G-I)H_H743X(G-I)H_H745X(G-I)H_H747X(G-I)H_H750XBH_H753XIH_H755XIH_H757XIH/PeripheralPins.c index c6cb0779e3..cc46e9622c 100644 --- a/variants/STM32H7xx/H742X(G-I)H_H743X(G-I)H_H745X(G-I)H_H747X(G-I)H_H750XBH_H753XIH_H755XIH_H757XIH/PeripheralPins.c +++ b/variants/STM32H7xx/H742X(G-I)H_H743X(G-I)H_H745X(G-I)H_H747X(G-I)H_H750XBH_H753XIH_H755XIH_H757XIH/PeripheralPins.c @@ -17,7 +17,7 @@ * STM32H747XIHx.xml, STM32H750XBHx.xml * STM32H753XIHx.xml, STM32H755XIHx.xml * STM32H757XIHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT/PeripheralPins.c b/variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT/PeripheralPins.c index ff03e7bd65..329bee1cbb 100644 --- a/variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT/PeripheralPins.c +++ b/variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT/PeripheralPins.c @@ -16,7 +16,7 @@ * STM32H747IGTx.xml, STM32H747IITx.xml * STM32H750ZBTx.xml, STM32H753ZITx.xml * STM32H757AIIx.xml, STM32H757IITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H745B(G-I)T_H755BIT/PeripheralPins.c b/variants/STM32H7xx/H745B(G-I)T_H755BIT/PeripheralPins.c index feb50bdb2b..cc2d2144e9 100644 --- a/variants/STM32H7xx/H745B(G-I)T_H755BIT/PeripheralPins.c +++ b/variants/STM32H7xx/H745B(G-I)T_H755BIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H745BGTx.xml, STM32H745BITx.xml * STM32H755BITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H745I(G-I)K_H755IIK/PeripheralPins.c b/variants/STM32H7xx/H745I(G-I)K_H755IIK/PeripheralPins.c index 0294bbba2e..0fe7ccd59d 100644 --- a/variants/STM32H7xx/H745I(G-I)K_H755IIK/PeripheralPins.c +++ b/variants/STM32H7xx/H745I(G-I)K_H755IIK/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H745IGKx.xml, STM32H745IIKx.xml * STM32H755IIKx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H745I(G-I)T_H755IIT/PeripheralPins.c b/variants/STM32H7xx/H745I(G-I)T_H755IIT/PeripheralPins.c index 0eb2ecae5c..1181f69e6b 100644 --- a/variants/STM32H7xx/H745I(G-I)T_H755IIT/PeripheralPins.c +++ b/variants/STM32H7xx/H745I(G-I)T_H755IIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H745IGTx.xml, STM32H745IITx.xml * STM32H755IITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H745Z(G-I)T_H755ZIT/PeripheralPins.c b/variants/STM32H7xx/H745Z(G-I)T_H755ZIT/PeripheralPins.c index b7177c4693..3c71d88189 100644 --- a/variants/STM32H7xx/H745Z(G-I)T_H755ZIT/PeripheralPins.c +++ b/variants/STM32H7xx/H745Z(G-I)T_H755ZIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H745ZGTx.xml, STM32H745ZITx.xml * STM32H755ZITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H747B(G-I)T_H757BIT/PeripheralPins.c b/variants/STM32H7xx/H747B(G-I)T_H757BIT/PeripheralPins.c index ff72f85b56..d7fab1eaad 100644 --- a/variants/STM32H7xx/H747B(G-I)T_H757BIT/PeripheralPins.c +++ b/variants/STM32H7xx/H747B(G-I)T_H757BIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H747BGTx.xml, STM32H747BITx.xml * STM32H757BITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H747ZIY_H757ZIY/PeripheralPins.c b/variants/STM32H7xx/H747ZIY_H757ZIY/PeripheralPins.c index 8ee7d427c7..be91f34aab 100644 --- a/variants/STM32H7xx/H747ZIY_H757ZIY/PeripheralPins.c +++ b/variants/STM32H7xx/H747ZIY_H757ZIY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H747ZIYx.xml, STM32H757ZIYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3A(G-I)IxQ_H7B0ABIxQ_H7B3AIIxQ/PeripheralPins.c b/variants/STM32H7xx/H7A3A(G-I)IxQ_H7B0ABIxQ_H7B3AIIxQ/PeripheralPins.c index 02ed1f4069..d7961cb427 100644 --- a/variants/STM32H7xx/H7A3A(G-I)IxQ_H7B0ABIxQ_H7B3AIIxQ/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3A(G-I)IxQ_H7B0ABIxQ_H7B3AIIxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H7A3A(G-I)IxQ.xml, STM32H7B0ABIxQ.xml * STM32H7B3AIIxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3I(G-I)(K-T)_H7B0IBT_H7B3II(K-T)/PeripheralPins.c b/variants/STM32H7xx/H7A3I(G-I)(K-T)_H7B0IBT_H7B3II(K-T)/PeripheralPins.c index 7ce2ab5096..f967fcd30e 100644 --- a/variants/STM32H7xx/H7A3I(G-I)(K-T)_H7B0IBT_H7B3II(K-T)/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3I(G-I)(K-T)_H7B0IBT_H7B3II(K-T)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32H7A3I(G-I)Kx.xml, STM32H7A3I(G-I)Tx.xml * STM32H7B0IBTx.xml, STM32H7B3IIKx.xml * STM32H7B3IITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3I(G-I)KxQ_H7B0IBKxQ_H7B3IIKxQ/PeripheralPins.c b/variants/STM32H7xx/H7A3I(G-I)KxQ_H7B0IBKxQ_H7B3IIKxQ/PeripheralPins.c index ea892e339c..0c9e912b3b 100644 --- a/variants/STM32H7xx/H7A3I(G-I)KxQ_H7B0IBKxQ_H7B3IIKxQ/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3I(G-I)KxQ_H7B0IBKxQ_H7B3IIKxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H7A3I(G-I)KxQ.xml, STM32H7B0IBKxQ.xml * STM32H7B3IIKxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3I(G-I)TxQ_H7B3IITxQ/PeripheralPins.c b/variants/STM32H7xx/H7A3I(G-I)TxQ_H7B3IITxQ/PeripheralPins.c index f6498987b4..a9a5d3a305 100644 --- a/variants/STM32H7xx/H7A3I(G-I)TxQ_H7B3IITxQ/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3I(G-I)TxQ_H7B3IITxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H7A3I(G-I)TxQ.xml, STM32H7B3IITxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3L(G-I)HxQ_H7B3LIHxQ/PeripheralPins.c b/variants/STM32H7xx/H7A3L(G-I)HxQ_H7B3LIHxQ/PeripheralPins.c index fc899b5f50..75a533e1ec 100644 --- a/variants/STM32H7xx/H7A3L(G-I)HxQ_H7B3LIHxQ/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3L(G-I)HxQ_H7B3LIHxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H7A3L(G-I)HxQ.xml, STM32H7B3LIHxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3N(G-I)H_H7B3NIH/PeripheralPins.c b/variants/STM32H7xx/H7A3N(G-I)H_H7B3NIH/PeripheralPins.c index c700bf585e..9b1e88c3b2 100644 --- a/variants/STM32H7xx/H7A3N(G-I)H_H7B3NIH/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3N(G-I)H_H7B3NIH/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H7A3N(G-I)Hx.xml, STM32H7B3NIHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3QIYxQ_H7B3QIYxQ/PeripheralPins.c b/variants/STM32H7xx/H7A3QIYxQ_H7B3QIYxQ/PeripheralPins.c index 828911b61a..ef29fd39e4 100644 --- a/variants/STM32H7xx/H7A3QIYxQ_H7B3QIYxQ/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3QIYxQ_H7B3QIYxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H7A3QIYxQ.xml, STM32H7B3QIYxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3R(G-I)T_H7B0RBT_H7B3RIT/PeripheralPins.c b/variants/STM32H7xx/H7A3R(G-I)T_H7B0RBT_H7B3RIT/PeripheralPins.c index 1bc4fc331b..9eb769cc31 100644 --- a/variants/STM32H7xx/H7A3R(G-I)T_H7B0RBT_H7B3RIT/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3R(G-I)T_H7B0RBT_H7B3RIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H7A3R(G-I)Tx.xml, STM32H7B0RBTx.xml * STM32H7B3RITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/PeripheralPins.c b/variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/PeripheralPins.c index 8eb50e9030..1778620480 100644 --- a/variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32H7A3V(G-I)Hx.xml, STM32H7A3V(G-I)Tx.xml * STM32H7B0VBTx.xml, STM32H7B3VIHx.xml * STM32H7B3VITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3V(G-I)HxQ_H7B3VIHxQ/PeripheralPins.c b/variants/STM32H7xx/H7A3V(G-I)HxQ_H7B3VIHxQ/PeripheralPins.c index 1e0805122d..c6a758ede6 100644 --- a/variants/STM32H7xx/H7A3V(G-I)HxQ_H7B3VIHxQ/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3V(G-I)HxQ_H7B3VIHxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H7A3V(G-I)HxQ.xml, STM32H7B3VIHxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3V(G-I)TxQ_H7B3VITxQ/PeripheralPins.c b/variants/STM32H7xx/H7A3V(G-I)TxQ_H7B3VITxQ/PeripheralPins.c index 6c68b952f8..992d7e1d6d 100644 --- a/variants/STM32H7xx/H7A3V(G-I)TxQ_H7B3VITxQ/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3V(G-I)TxQ_H7B3VITxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H7A3V(G-I)TxQ.xml, STM32H7B3VITxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3Z(G-I)T_H7B0ZBT_H7B3ZIT/PeripheralPins.c b/variants/STM32H7xx/H7A3Z(G-I)T_H7B0ZBT_H7B3ZIT/PeripheralPins.c index 4ea62b2d90..a6f9aed602 100644 --- a/variants/STM32H7xx/H7A3Z(G-I)T_H7B0ZBT_H7B3ZIT/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3Z(G-I)T_H7B0ZBT_H7B3ZIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32H7A3Z(G-I)Tx.xml, STM32H7B0ZBTx.xml * STM32H7B3ZITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32H7xx/H7A3Z(G-I)TxQ_H7B3ZITxQ/PeripheralPins.c b/variants/STM32H7xx/H7A3Z(G-I)TxQ_H7B3ZITxQ/PeripheralPins.c index 3c25d5a5c1..2022a4f6aa 100644 --- a/variants/STM32H7xx/H7A3Z(G-I)TxQ_H7B3ZITxQ/PeripheralPins.c +++ b/variants/STM32H7xx/H7A3Z(G-I)TxQ_H7B3ZITxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32H7A3Z(G-I)TxQ.xml, STM32H7B3ZITxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L010C6T/PeripheralPins.c b/variants/STM32L0xx/L010C6T/PeripheralPins.c index 1c1e3db621..1363248ac4 100644 --- a/variants/STM32L0xx/L010C6T/PeripheralPins.c +++ b/variants/STM32L0xx/L010C6T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L010C6Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L010F4P_L011F(3-4)P_L021F4P/PeripheralPins.c b/variants/STM32L0xx/L010F4P_L011F(3-4)P_L021F4P/PeripheralPins.c index 5179956fd3..4db164e27a 100644 --- a/variants/STM32L0xx/L010F4P_L011F(3-4)P_L021F4P/PeripheralPins.c +++ b/variants/STM32L0xx/L010F4P_L011F(3-4)P_L021F4P/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L010F4Px.xml, STM32L011F(3-4)Px.xml * STM32L021F4Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L010K4T_L011K(3-4)T_L021K4T/PeripheralPins.c b/variants/STM32L0xx/L010K4T_L011K(3-4)T_L021K4T/PeripheralPins.c index 70a91bcab3..ff3c277d44 100644 --- a/variants/STM32L0xx/L010K4T_L011K(3-4)T_L021K4T/PeripheralPins.c +++ b/variants/STM32L0xx/L010K4T_L011K(3-4)T_L021K4T/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L010K4Tx.xml, STM32L011K(3-4)Tx.xml * STM32L021K4Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L010K8T/PeripheralPins.c b/variants/STM32L0xx/L010K8T/PeripheralPins.c index 92727eddb8..cdea1f879a 100644 --- a/variants/STM32L0xx/L010K8T/PeripheralPins.c +++ b/variants/STM32L0xx/L010K8T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L010K8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L010R8T/PeripheralPins.c b/variants/STM32L0xx/L010R8T/PeripheralPins.c index 51d9b82a5d..544bba7a4f 100644 --- a/variants/STM32L0xx/L010R8T/PeripheralPins.c +++ b/variants/STM32L0xx/L010R8T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L010R8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L010RBT/PeripheralPins.c b/variants/STM32L0xx/L010RBT/PeripheralPins.c index 30fbedf695..66e1fee8ff 100644 --- a/variants/STM32L0xx/L010RBT/PeripheralPins.c +++ b/variants/STM32L0xx/L010RBT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L010RBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L011D(3-4)P_L021D4P/PeripheralPins.c b/variants/STM32L0xx/L011D(3-4)P_L021D4P/PeripheralPins.c index 0b1dab20a6..5944aebe6e 100644 --- a/variants/STM32L0xx/L011D(3-4)P_L021D4P/PeripheralPins.c +++ b/variants/STM32L0xx/L011D(3-4)P_L021D4P/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L011D(3-4)Px.xml, STM32L021D4Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L011E(3-4)Y/PeripheralPins.c b/variants/STM32L0xx/L011E(3-4)Y/PeripheralPins.c index 959211114a..cf70e0f1dc 100644 --- a/variants/STM32L0xx/L011E(3-4)Y/PeripheralPins.c +++ b/variants/STM32L0xx/L011E(3-4)Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L011E(3-4)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L011F(3-4)U_L021F4U/PeripheralPins.c b/variants/STM32L0xx/L011F(3-4)U_L021F4U/PeripheralPins.c index b9725f9a89..5f401b3b72 100644 --- a/variants/STM32L0xx/L011F(3-4)U_L021F4U/PeripheralPins.c +++ b/variants/STM32L0xx/L011F(3-4)U_L021F4U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L011F(3-4)Ux.xml, STM32L021F4Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L011G(3-4)U_L021G4U/PeripheralPins.c b/variants/STM32L0xx/L011G(3-4)U_L021G4U/PeripheralPins.c index 8b14483269..fb29707aee 100644 --- a/variants/STM32L0xx/L011G(3-4)U_L021G4U/PeripheralPins.c +++ b/variants/STM32L0xx/L011G(3-4)U_L021G4U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L011G(3-4)Ux.xml, STM32L021G4Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L011K(3-4)U_L021K4U/PeripheralPins.c b/variants/STM32L0xx/L011K(3-4)U_L021K4U/PeripheralPins.c index db77c70c78..5e8c6b774a 100644 --- a/variants/STM32L0xx/L011K(3-4)U_L021K4U/PeripheralPins.c +++ b/variants/STM32L0xx/L011K(3-4)U_L021K4U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L011K(3-4)Ux.xml, STM32L021K4Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)/PeripheralPins.c b/variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)/PeripheralPins.c index 638284d898..1f7f0f3949 100644 --- a/variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)/PeripheralPins.c +++ b/variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L031C(4-6)Tx.xml, STM32L031C(4-6)Ux.xml * STM32L041C(4-6)Tx.xml, STM32L041C6Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L031E(4-6)Y_L041E6Y/PeripheralPins.c b/variants/STM32L0xx/L031E(4-6)Y_L041E6Y/PeripheralPins.c index a08f43aaa5..0f746a13a0 100644 --- a/variants/STM32L0xx/L031E(4-6)Y_L041E6Y/PeripheralPins.c +++ b/variants/STM32L0xx/L031E(4-6)Y_L041E6Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L031E(4-6)Yx.xml, STM32L041E6Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L031F(4-6)P_L041F6P/PeripheralPins.c b/variants/STM32L0xx/L031F(4-6)P_L041F6P/PeripheralPins.c index 2735508bd5..20cb9f4f3a 100644 --- a/variants/STM32L0xx/L031F(4-6)P_L041F6P/PeripheralPins.c +++ b/variants/STM32L0xx/L031F(4-6)P_L041F6P/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L031F(4-6)Px.xml, STM32L041F6Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L031G(4-6)U_L041G6U/PeripheralPins.c b/variants/STM32L0xx/L031G(4-6)U_L041G6U/PeripheralPins.c index 1ff4b8fc2e..82f1bd3468 100644 --- a/variants/STM32L0xx/L031G(4-6)U_L041G6U/PeripheralPins.c +++ b/variants/STM32L0xx/L031G(4-6)U_L041G6U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L031G(4-6)Ux.xml, STM32L041G6Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L031G6UxS_L041G6UxS/PeripheralPins.c b/variants/STM32L0xx/L031G6UxS_L041G6UxS/PeripheralPins.c index dce486cec1..87ae25efa1 100644 --- a/variants/STM32L0xx/L031G6UxS_L041G6UxS/PeripheralPins.c +++ b/variants/STM32L0xx/L031G6UxS_L041G6UxS/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L031G6UxS.xml, STM32L041G6UxS.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L031K(4-6)T_L041K6T/PeripheralPins.c b/variants/STM32L0xx/L031K(4-6)T_L041K6T/PeripheralPins.c index 4e9328f999..9657e27b5b 100644 --- a/variants/STM32L0xx/L031K(4-6)T_L041K6T/PeripheralPins.c +++ b/variants/STM32L0xx/L031K(4-6)T_L041K6T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L031K(4-6)Tx.xml, STM32L041K6Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L031K(4-6)U_L041K6U/PeripheralPins.c b/variants/STM32L0xx/L031K(4-6)U_L041K6U/PeripheralPins.c index e9f3bc7afc..ef77a27fb0 100644 --- a/variants/STM32L0xx/L031K(4-6)U_L041K6U/PeripheralPins.c +++ b/variants/STM32L0xx/L031K(4-6)U_L041K6U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L031K(4-6)Ux.xml, STM32L041K6Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L051C(6-8)(T-U)/PeripheralPins.c b/variants/STM32L0xx/L051C(6-8)(T-U)/PeripheralPins.c index f716a521f5..089881c98b 100644 --- a/variants/STM32L0xx/L051C(6-8)(T-U)/PeripheralPins.c +++ b/variants/STM32L0xx/L051C(6-8)(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L051C(6-8)Tx.xml, STM32L051C(6-8)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L051K(6-8)T/PeripheralPins.c b/variants/STM32L0xx/L051K(6-8)T/PeripheralPins.c index ffedb47d16..e773ca9727 100644 --- a/variants/STM32L0xx/L051K(6-8)T/PeripheralPins.c +++ b/variants/STM32L0xx/L051K(6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L051K(6-8)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L051K(6-8)U/PeripheralPins.c b/variants/STM32L0xx/L051K(6-8)U/PeripheralPins.c index f1aa1bb569..1e01af89bf 100644 --- a/variants/STM32L0xx/L051K(6-8)U/PeripheralPins.c +++ b/variants/STM32L0xx/L051K(6-8)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L051K(6-8)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L051R(6-8)H/PeripheralPins.c b/variants/STM32L0xx/L051R(6-8)H/PeripheralPins.c index 5ed831efdb..2d2ed472c7 100644 --- a/variants/STM32L0xx/L051R(6-8)H/PeripheralPins.c +++ b/variants/STM32L0xx/L051R(6-8)H/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L051R(6-8)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L051R(6-8)T/PeripheralPins.c b/variants/STM32L0xx/L051R(6-8)T/PeripheralPins.c index f2be0cdb97..6eb4b34467 100644 --- a/variants/STM32L0xx/L051R(6-8)T/PeripheralPins.c +++ b/variants/STM32L0xx/L051R(6-8)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L051R(6-8)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L051T(6-8)Y/PeripheralPins.c b/variants/STM32L0xx/L051T(6-8)Y/PeripheralPins.c index 6cd2edffc7..590c3df1b8 100644 --- a/variants/STM32L0xx/L051T(6-8)Y/PeripheralPins.c +++ b/variants/STM32L0xx/L051T(6-8)Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L051T(6-8)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)/PeripheralPins.c b/variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)/PeripheralPins.c index 409c048268..8f40c0d9af 100644 --- a/variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)/PeripheralPins.c +++ b/variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32L053C(6-8)Tx.xml, STM32L053C(6-8)Ux.xml * STM32L062C8Ux.xml, STM32L063C8Tx.xml * STM32L063C8Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L052K(6-8)T_L062K8T/PeripheralPins.c b/variants/STM32L0xx/L052K(6-8)T_L062K8T/PeripheralPins.c index 30fc62ce2c..46b6c0546a 100644 --- a/variants/STM32L0xx/L052K(6-8)T_L062K8T/PeripheralPins.c +++ b/variants/STM32L0xx/L052K(6-8)T_L062K8T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L052K(6-8)Tx.xml, STM32L062K8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L052K(6-8)U_L062K8U/PeripheralPins.c b/variants/STM32L0xx/L052K(6-8)U_L062K8U/PeripheralPins.c index 0b9dbee493..cb3ac2d8e4 100644 --- a/variants/STM32L0xx/L052K(6-8)U_L062K8U/PeripheralPins.c +++ b/variants/STM32L0xx/L052K(6-8)U_L062K8U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L052K(6-8)Ux.xml, STM32L062K8Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L052R(6-8)H_L053R(6-8)H/PeripheralPins.c b/variants/STM32L0xx/L052R(6-8)H_L053R(6-8)H/PeripheralPins.c index d74206e1ca..e51c89d7d3 100644 --- a/variants/STM32L0xx/L052R(6-8)H_L053R(6-8)H/PeripheralPins.c +++ b/variants/STM32L0xx/L052R(6-8)H_L053R(6-8)H/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L052R(6-8)Hx.xml, STM32L053R(6-8)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T/PeripheralPins.c b/variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T/PeripheralPins.c index 7cc59c1064..4d54906df3 100644 --- a/variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T/PeripheralPins.c +++ b/variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L052R(6-8)Tx.xml, STM32L053R(6-8)Tx.xml * STM32L063R8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L052T6Y_L052T8(F-Y)/PeripheralPins.c b/variants/STM32L0xx/L052T6Y_L052T8(F-Y)/PeripheralPins.c index 67439e6853..f187e77ba6 100644 --- a/variants/STM32L0xx/L052T6Y_L052T8(F-Y)/PeripheralPins.c +++ b/variants/STM32L0xx/L052T6Y_L052T8(F-Y)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L052T(6-8)Yx.xml, STM32L052T8Fx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L071C(8-B-Z)(T-U)_L081CBT_L081CZ(T-U)/PeripheralPins.c b/variants/STM32L0xx/L071C(8-B-Z)(T-U)_L081CBT_L081CZ(T-U)/PeripheralPins.c index 144887a34c..d7f4aadc54 100644 --- a/variants/STM32L0xx/L071C(8-B-Z)(T-U)_L081CBT_L081CZ(T-U)/PeripheralPins.c +++ b/variants/STM32L0xx/L071C(8-B-Z)(T-U)_L081CBT_L081CZ(T-U)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32L071C(B-Z)Tx.xml, STM32L071C(B-Z)Ux.xml * STM32L071C8Tx.xml, STM32L071C8Ux.xml * STM32L081C(B-Z)Tx.xml, STM32L081CZUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L071C(B-Z)Y/PeripheralPins.c b/variants/STM32L0xx/L071C(B-Z)Y/PeripheralPins.c index 426bc35019..8a7daca82e 100644 --- a/variants/STM32L0xx/L071C(B-Z)Y/PeripheralPins.c +++ b/variants/STM32L0xx/L071C(B-Z)Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L071C(B-Z)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L071K(8-B-Z)U_L081KZU/PeripheralPins.c b/variants/STM32L0xx/L071K(8-B-Z)U_L081KZU/PeripheralPins.c index 3502c58d92..eb39c5fae8 100644 --- a/variants/STM32L0xx/L071K(8-B-Z)U_L081KZU/PeripheralPins.c +++ b/variants/STM32L0xx/L071K(8-B-Z)U_L081KZU/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L071K(B-Z)Ux.xml, STM32L071K8Ux.xml * STM32L081KZUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L071K(B-Z)T_L081KZT/PeripheralPins.c b/variants/STM32L0xx/L071K(B-Z)T_L081KZT/PeripheralPins.c index b854a30ff3..d502f8d324 100644 --- a/variants/STM32L0xx/L071K(B-Z)T_L081KZT/PeripheralPins.c +++ b/variants/STM32L0xx/L071K(B-Z)T_L081KZT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L071K(B-Z)Tx.xml, STM32L081KZTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L071R(B-Z)H/PeripheralPins.c b/variants/STM32L0xx/L071R(B-Z)H/PeripheralPins.c index 78cf761cd6..4d7cd8f820 100644 --- a/variants/STM32L0xx/L071R(B-Z)H/PeripheralPins.c +++ b/variants/STM32L0xx/L071R(B-Z)H/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L071R(B-Z)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L071R(B-Z)T/PeripheralPins.c b/variants/STM32L0xx/L071R(B-Z)T/PeripheralPins.c index 677ad805f1..22805f6a29 100644 --- a/variants/STM32L0xx/L071R(B-Z)T/PeripheralPins.c +++ b/variants/STM32L0xx/L071R(B-Z)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L071R(B-Z)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L071V(8-B-Z)(I-T)/PeripheralPins.c b/variants/STM32L0xx/L071V(8-B-Z)(I-T)/PeripheralPins.c index 330c126b78..b1e150089d 100644 --- a/variants/STM32L0xx/L071V(8-B-Z)(I-T)/PeripheralPins.c +++ b/variants/STM32L0xx/L071V(8-B-Z)(I-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L071V(B-Z)Ix.xml, STM32L071V(B-Z)Tx.xml * STM32L071V8Ix.xml, STM32L071V8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)/PeripheralPins.c b/variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)/PeripheralPins.c index 1494a3da87..968845dd3a 100644 --- a/variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)/PeripheralPins.c +++ b/variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32L073C(B-Z)Tx.xml, STM32L073C(B-Z)Ux.xml * STM32L082CZUx.xml, STM32L083C(B-Z)Tx.xml * STM32L083CZUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY/PeripheralPins.c b/variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY/PeripheralPins.c index 4e19ed6d1f..746bbb75e6 100644 --- a/variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY/PeripheralPins.c +++ b/variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L072C(B-Z)Yx.xml, STM32L072CZEx.xml * STM32L073CZYx.xml, STM32L082CZYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L072K(B-Z)T_L082K(B-Z)T/PeripheralPins.c b/variants/STM32L0xx/L072K(B-Z)T_L082K(B-Z)T/PeripheralPins.c index e165669416..0d7765ea00 100644 --- a/variants/STM32L0xx/L072K(B-Z)T_L082K(B-Z)T/PeripheralPins.c +++ b/variants/STM32L0xx/L072K(B-Z)T_L082K(B-Z)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L072K(B-Z)Tx.xml, STM32L082K(B-Z)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L072K(B-Z)U_L082K(B-Z)U/PeripheralPins.c b/variants/STM32L0xx/L072K(B-Z)U_L082K(B-Z)U/PeripheralPins.c index 67f9916b7e..117300dfb5 100644 --- a/variants/STM32L0xx/L072K(B-Z)U_L082K(B-Z)U/PeripheralPins.c +++ b/variants/STM32L0xx/L072K(B-Z)U_L082K(B-Z)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L072K(B-Z)Ux.xml, STM32L082K(B-Z)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H/PeripheralPins.c b/variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H/PeripheralPins.c index 680d8e863c..0e5f5af162 100644 --- a/variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H/PeripheralPins.c +++ b/variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32L072R(B-Z)Hx.xml, STM32L072R(B-Z)Ix.xml * STM32L073R(B-Z)Hx.xml, STM32L073RZIx.xml * STM32L083R(B-Z)Hx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T/PeripheralPins.c b/variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T/PeripheralPins.c index f67a37f746..16e7da5120 100644 --- a/variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T/PeripheralPins.c +++ b/variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L072R(B-Z)Tx.xml, STM32L073R(B-Z)Tx.xml * STM32L083R(B-Z)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)/PeripheralPins.c b/variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)/PeripheralPins.c index f233760a94..7609ff4747 100644 --- a/variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)/PeripheralPins.c +++ b/variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)/PeripheralPins.c @@ -17,7 +17,7 @@ * STM32L073V8Ix.xml, STM32L073V8Tx.xml * STM32L083V(B-Z)Ix.xml, STM32L083V(B-Z)Tx.xml * STM32L083V8Ix.xml, STM32L083V8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)/PeripheralPins.c b/variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)/PeripheralPins.c index 44b519d486..4eb8a1d5f9 100644 --- a/variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)/PeripheralPins.c +++ b/variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)/PeripheralPins.c @@ -16,7 +16,7 @@ * STM32L151C(6-8-B)Ux.xml, STM32L151C(6-8-B)UxA.xml * STM32L152C(6-8-B)Tx.xml, STM32L152C(6-8-B)TxA.xml * STM32L152C(6-8-B)Ux.xml, STM32L152C(6-8-B)UxA.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L100R(8-B)Tx(A)_L151R(6-8-B)Tx(A)_L152R(6-8-B)Tx(A)/PeripheralPins.c b/variants/STM32L1xx/L100R(8-B)Tx(A)_L151R(6-8-B)Tx(A)_L152R(6-8-B)Tx(A)/PeripheralPins.c index b2c90ed336..52105407f2 100644 --- a/variants/STM32L1xx/L100R(8-B)Tx(A)_L151R(6-8-B)Tx(A)_L152R(6-8-B)Tx(A)/PeripheralPins.c +++ b/variants/STM32L1xx/L100R(8-B)Tx(A)_L151R(6-8-B)Tx(A)_L152R(6-8-B)Tx(A)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32L100R(8-B)Tx.xml, STM32L100R(8-B)TxA.xml * STM32L151R(6-8-B)Tx.xml, STM32L151R(6-8-B)TxA.xml * STM32L152R(6-8-B)Tx.xml, STM32L152R(6-8-B)TxA.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L100RCT/PeripheralPins.c b/variants/STM32L1xx/L100RCT/PeripheralPins.c index b37dbe9422..c9cdc14953 100644 --- a/variants/STM32L1xx/L100RCT/PeripheralPins.c +++ b/variants/STM32L1xx/L100RCT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L100RCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151CC(T-U)_L152CC(T-U)/PeripheralPins.c b/variants/STM32L1xx/L151CC(T-U)_L152CC(T-U)/PeripheralPins.c index c68b310082..bce02edfba 100644 --- a/variants/STM32L1xx/L151CC(T-U)_L152CC(T-U)/PeripheralPins.c +++ b/variants/STM32L1xx/L151CC(T-U)_L152CC(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L151CCTx.xml, STM32L151CCUx.xml * STM32L152CCTx.xml, STM32L152CCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151QCH_L152QCH_L162QCH/PeripheralPins.c b/variants/STM32L1xx/L151QCH_L152QCH_L162QCH/PeripheralPins.c index e47f6b42dc..3d8ad4ab73 100644 --- a/variants/STM32L1xx/L151QCH_L152QCH_L162QCH/PeripheralPins.c +++ b/variants/STM32L1xx/L151QCH_L152QCH_L162QCH/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L151QCHx.xml, STM32L152QCHx.xml * STM32L162QCHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151QDH_L152QDH_L162QDH/PeripheralPins.c b/variants/STM32L1xx/L151QDH_L152QDH_L162QDH/PeripheralPins.c index 8009b9f199..cad7447b39 100644 --- a/variants/STM32L1xx/L151QDH_L152QDH_L162QDH/PeripheralPins.c +++ b/variants/STM32L1xx/L151QDH_L152QDH_L162QDH/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L151QDHx.xml, STM32L152QDHx.xml * STM32L162QDHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151QEH_L152QEH/PeripheralPins.c b/variants/STM32L1xx/L151QEH_L152QEH/PeripheralPins.c index e971ed40f3..0b0fe70cff 100644 --- a/variants/STM32L1xx/L151QEH_L152QEH/PeripheralPins.c +++ b/variants/STM32L1xx/L151QEH_L152QEH/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L151QEHx.xml, STM32L152QEHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151R(6-8-B)Hx(A)_L152R(6-8-B)Hx(A)/PeripheralPins.c b/variants/STM32L1xx/L151R(6-8-B)Hx(A)_L152R(6-8-B)Hx(A)/PeripheralPins.c index 8396ea6ba6..45bef4a83c 100644 --- a/variants/STM32L1xx/L151R(6-8-B)Hx(A)_L152R(6-8-B)Hx(A)/PeripheralPins.c +++ b/variants/STM32L1xx/L151R(6-8-B)Hx(A)_L152R(6-8-B)Hx(A)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L151R(6-8-B)Hx.xml, STM32L151R(6-8-B)HxA.xml * STM32L152R(6-8-B)Hx.xml, STM32L152R(6-8-B)HxA.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151RC(T-Y)x(A)_L151UCY_L152RCTx(A)_L152UCY_L162RCTx(A)/PeripheralPins.c b/variants/STM32L1xx/L151RC(T-Y)x(A)_L151UCY_L152RCTx(A)_L152UCY_L162RCTx(A)/PeripheralPins.c index d7dad8cddd..6a0ba5d24b 100644 --- a/variants/STM32L1xx/L151RC(T-Y)x(A)_L151UCY_L152RCTx(A)_L152UCY_L162RCTx(A)/PeripheralPins.c +++ b/variants/STM32L1xx/L151RC(T-Y)x(A)_L151UCY_L152RCTx(A)_L152UCY_L162RCTx(A)/PeripheralPins.c @@ -16,7 +16,7 @@ * STM32L152RCTx.xml, STM32L152RCTxA.xml * STM32L152UCYx.xml, STM32L162RCTx.xml * STM32L162RCTxA.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151RD(T-Y)_L152RD(T-Y)_L162RD(T-Y)/PeripheralPins.c b/variants/STM32L1xx/L151RD(T-Y)_L152RD(T-Y)_L162RD(T-Y)/PeripheralPins.c index 02a1d85bdf..1abbb25d58 100644 --- a/variants/STM32L1xx/L151RD(T-Y)_L152RD(T-Y)_L162RD(T-Y)/PeripheralPins.c +++ b/variants/STM32L1xx/L151RD(T-Y)_L152RD(T-Y)_L162RD(T-Y)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32L151RDTx.xml, STM32L151RDYx.xml * STM32L152RDTx.xml, STM32L152RDYx.xml * STM32L162RDTx.xml, STM32L162RDYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151RET_L152RET_L162RET/PeripheralPins.c b/variants/STM32L1xx/L151RET_L152RET_L162RET/PeripheralPins.c index 0291361d2d..238a6099e1 100644 --- a/variants/STM32L1xx/L151RET_L152RET_L162RET/PeripheralPins.c +++ b/variants/STM32L1xx/L151RET_L152RET_L162RET/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L151RETx.xml, STM32L152RETx.xml * STM32L162RETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151V(8-B)(H-T)x(A)_L152V(8-B)(H-T)x(A)/PeripheralPins.c b/variants/STM32L1xx/L151V(8-B)(H-T)x(A)_L152V(8-B)(H-T)x(A)/PeripheralPins.c index b099990b03..c4b3e9479e 100644 --- a/variants/STM32L1xx/L151V(8-B)(H-T)x(A)_L152V(8-B)(H-T)x(A)/PeripheralPins.c +++ b/variants/STM32L1xx/L151V(8-B)(H-T)x(A)_L152V(8-B)(H-T)x(A)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32L151V(8-B)Tx.xml, STM32L151V(8-B)TxA.xml * STM32L152V(8-B)Hx.xml, STM32L152V(8-B)HxA.xml * STM32L152V(8-B)Tx.xml, STM32L152V(8-B)TxA.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151VC(H-T)x(A)_L152VC(H-T)x(A)_L162VC(H-T)x(A)/PeripheralPins.c b/variants/STM32L1xx/L151VC(H-T)x(A)_L152VC(H-T)x(A)_L162VC(H-T)x(A)/PeripheralPins.c index d459b27126..f418155f91 100644 --- a/variants/STM32L1xx/L151VC(H-T)x(A)_L152VC(H-T)x(A)_L162VC(H-T)x(A)/PeripheralPins.c +++ b/variants/STM32L1xx/L151VC(H-T)x(A)_L152VC(H-T)x(A)_L162VC(H-T)x(A)/PeripheralPins.c @@ -16,7 +16,7 @@ * STM32L152VCTx.xml, STM32L152VCTxA.xml * STM32L162VCHx.xml, STM32L162VCTx.xml * STM32L162VCTxA.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151VD(T-Y)xX_L151VE(T-Y)_L152VDTxX_L152VE(T-Y)_L162VDYxX_L162VE(T-Y)/PeripheralPins.c b/variants/STM32L1xx/L151VD(T-Y)xX_L151VE(T-Y)_L152VDTxX_L152VE(T-Y)_L162VDYxX_L162VE(T-Y)/PeripheralPins.c index aa019559da..ca4062daef 100644 --- a/variants/STM32L1xx/L151VD(T-Y)xX_L151VE(T-Y)_L152VDTxX_L152VE(T-Y)_L162VDYxX_L162VE(T-Y)/PeripheralPins.c +++ b/variants/STM32L1xx/L151VD(T-Y)xX_L151VE(T-Y)_L152VDTxX_L152VE(T-Y)_L162VDYxX_L162VE(T-Y)/PeripheralPins.c @@ -16,7 +16,7 @@ * STM32L152VDTxX.xml, STM32L152VETx.xml * STM32L152VEYx.xml, STM32L162VDYxX.xml * STM32L162VETx.xml, STM32L162VEYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151VDT_L152VDT_L162VDT/PeripheralPins.c b/variants/STM32L1xx/L151VDT_L152VDT_L162VDT/PeripheralPins.c index 68dfb6d743..a114a50f72 100644 --- a/variants/STM32L1xx/L151VDT_L152VDT_L162VDT/PeripheralPins.c +++ b/variants/STM32L1xx/L151VDT_L152VDT_L162VDT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L151VDTx.xml, STM32L152VDTx.xml * STM32L162VDTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151ZCT_L152ZCT_L162ZCT/PeripheralPins.c b/variants/STM32L1xx/L151ZCT_L152ZCT_L162ZCT/PeripheralPins.c index 9914270c3d..7f88dd49bb 100644 --- a/variants/STM32L1xx/L151ZCT_L152ZCT_L162ZCT/PeripheralPins.c +++ b/variants/STM32L1xx/L151ZCT_L152ZCT_L162ZCT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L151ZCTx.xml, STM32L152ZCTx.xml * STM32L162ZCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151ZDT_L152ZDT_L162ZDT/PeripheralPins.c b/variants/STM32L1xx/L151ZDT_L152ZDT_L162ZDT/PeripheralPins.c index b9791d3f49..aedacaabfd 100644 --- a/variants/STM32L1xx/L151ZDT_L152ZDT_L162ZDT/PeripheralPins.c +++ b/variants/STM32L1xx/L151ZDT_L152ZDT_L162ZDT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L151ZDTx.xml, STM32L152ZDTx.xml * STM32L162ZDTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L1xx/L151ZET_L152ZET_L162ZET/PeripheralPins.c b/variants/STM32L1xx/L151ZET_L152ZET_L162ZET/PeripheralPins.c index 17857c6be4..58d7a9a64e 100644 --- a/variants/STM32L1xx/L151ZET_L152ZET_L162ZET/PeripheralPins.c +++ b/variants/STM32L1xx/L151ZET_L152ZET_L162ZET/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L151ZETx.xml, STM32L152ZETx.xml * STM32L162ZETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L412C(8-B)(T-U)_L422CB(T-U)/PeripheralPins.c b/variants/STM32L4xx/L412C(8-B)(T-U)_L422CB(T-U)/PeripheralPins.c index e387c2f34b..e5193071a7 100644 --- a/variants/STM32L4xx/L412C(8-B)(T-U)_L422CB(T-U)/PeripheralPins.c +++ b/variants/STM32L4xx/L412C(8-B)(T-U)_L422CB(T-U)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32L412C8Tx.xml, STM32L412C8Ux.xml * STM32L412CBTx.xml, STM32L412CBUx.xml * STM32L422CBTx.xml, STM32L422CBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L412CB(T-U)xP/PeripheralPins.c b/variants/STM32L4xx/L412CB(T-U)xP/PeripheralPins.c index f1f22fb4eb..b24e3074ac 100644 --- a/variants/STM32L4xx/L412CB(T-U)xP/PeripheralPins.c +++ b/variants/STM32L4xx/L412CB(T-U)xP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L412CBTxP.xml, STM32L412CBUxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)/PeripheralPins.c b/variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)/PeripheralPins.c index 14cb967caf..e6effe4c91 100644 --- a/variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)/PeripheralPins.c +++ b/variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32L412K8Tx.xml, STM32L412K8Ux.xml * STM32L412KBTx.xml, STM32L412KBUx.xml * STM32L422KBTx.xml, STM32L422KBUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L412R(8-B)(I-T)_L422RB(I-T)/PeripheralPins.c b/variants/STM32L4xx/L412R(8-B)(I-T)_L422RB(I-T)/PeripheralPins.c index b0090dccd5..ae6cf27373 100644 --- a/variants/STM32L4xx/L412R(8-B)(I-T)_L422RB(I-T)/PeripheralPins.c +++ b/variants/STM32L4xx/L412R(8-B)(I-T)_L422RB(I-T)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32L412R8Ix.xml, STM32L412R8Tx.xml * STM32L412RBIx.xml, STM32L412RBTx.xml * STM32L422RBIx.xml, STM32L422RBTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L412RB(I-T)xP/PeripheralPins.c b/variants/STM32L4xx/L412RB(I-T)xP/PeripheralPins.c index 5cc3dfa76c..46c073e8ab 100644 --- a/variants/STM32L4xx/L412RB(I-T)xP/PeripheralPins.c +++ b/variants/STM32L4xx/L412RB(I-T)xP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L412RBIxP.xml, STM32L412RBTxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L412T(8-B)Y_L422TBY/PeripheralPins.c b/variants/STM32L4xx/L412T(8-B)Y_L422TBY/PeripheralPins.c index fd9af485ad..bb12544f4c 100644 --- a/variants/STM32L4xx/L412T(8-B)Y_L422TBY/PeripheralPins.c +++ b/variants/STM32L4xx/L412T(8-B)Y_L422TBY/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L412T8Yx.xml, STM32L412TBYx.xml * STM32L422TBYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L412TBYxP/PeripheralPins.c b/variants/STM32L4xx/L412TBYxP/PeripheralPins.c index 1cf55ab603..ae29e3a1e8 100644 --- a/variants/STM32L4xx/L412TBYxP/PeripheralPins.c +++ b/variants/STM32L4xx/L412TBYxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L412TBYxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L431C(B-C)(T-U)/PeripheralPins.c b/variants/STM32L4xx/L431C(B-C)(T-U)/PeripheralPins.c index b9eef71ce5..0d090744be 100644 --- a/variants/STM32L4xx/L431C(B-C)(T-U)/PeripheralPins.c +++ b/variants/STM32L4xx/L431C(B-C)(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L431C(B-C)Tx.xml, STM32L431C(B-C)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L431C(B-C)Y/PeripheralPins.c b/variants/STM32L4xx/L431C(B-C)Y/PeripheralPins.c index 4d0b74b2fb..f701c1e979 100644 --- a/variants/STM32L4xx/L431C(B-C)Y/PeripheralPins.c +++ b/variants/STM32L4xx/L431C(B-C)Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L431C(B-C)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L431K(B-C)U/PeripheralPins.c b/variants/STM32L4xx/L431K(B-C)U/PeripheralPins.c index 030628191d..219ebe77ab 100644 --- a/variants/STM32L4xx/L431K(B-C)U/PeripheralPins.c +++ b/variants/STM32L4xx/L431K(B-C)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L431K(B-C)Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L431R(B-C)(I-T-Y)/PeripheralPins.c b/variants/STM32L4xx/L431R(B-C)(I-T-Y)/PeripheralPins.c index 9294a2e538..701090c2cd 100644 --- a/variants/STM32L4xx/L431R(B-C)(I-T-Y)/PeripheralPins.c +++ b/variants/STM32L4xx/L431R(B-C)(I-T-Y)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L431R(B-C)Ix.xml, STM32L431R(B-C)Tx.xml * STM32L431R(B-C)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L431VC(I-T)/PeripheralPins.c b/variants/STM32L4xx/L431VC(I-T)/PeripheralPins.c index f94758bfdc..13104b6960 100644 --- a/variants/STM32L4xx/L431VC(I-T)/PeripheralPins.c +++ b/variants/STM32L4xx/L431VC(I-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L431VCIx.xml, STM32L431VCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L432K(B-C)U_L442KCU/PeripheralPins.c b/variants/STM32L4xx/L432K(B-C)U_L442KCU/PeripheralPins.c index 511372beaa..2e2ebe3ace 100644 --- a/variants/STM32L4xx/L432K(B-C)U_L442KCU/PeripheralPins.c +++ b/variants/STM32L4xx/L432K(B-C)U_L442KCU/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L432K(B-C)Ux.xml, STM32L442KCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins.c b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins.c index fb66aa4ef6..5c70885ca5 100644 --- a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins.c +++ b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L433C(B-C)Tx.xml, STM32L433C(B-C)Ux.xml * STM32L443CCTx.xml, STM32L443CCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L433C(B-C)Y_L443CC(F-Y)/PeripheralPins.c b/variants/STM32L4xx/L433C(B-C)Y_L443CC(F-Y)/PeripheralPins.c index 72419de2ce..7ff22f75c1 100644 --- a/variants/STM32L4xx/L433C(B-C)Y_L443CC(F-Y)/PeripheralPins.c +++ b/variants/STM32L4xx/L433C(B-C)Y_L443CC(F-Y)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L433C(B-C)Yx.xml, STM32L443CCFx.xml * STM32L443CCYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L433R(B-C)(I-T-Y)_L443RC(I-T-Y)/PeripheralPins.c b/variants/STM32L4xx/L433R(B-C)(I-T-Y)_L443RC(I-T-Y)/PeripheralPins.c index fe49869d4b..50d6decdb2 100644 --- a/variants/STM32L4xx/L433R(B-C)(I-T-Y)_L443RC(I-T-Y)/PeripheralPins.c +++ b/variants/STM32L4xx/L433R(B-C)(I-T-Y)_L443RC(I-T-Y)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32L433R(B-C)Ix.xml, STM32L433R(B-C)Tx.xml * STM32L433R(B-C)Yx.xml, STM32L443RCIx.xml * STM32L443RCTx.xml, STM32L443RCYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L433RCTxP/PeripheralPins.c b/variants/STM32L4xx/L433RCTxP/PeripheralPins.c index 5ef0157812..ae59df758d 100644 --- a/variants/STM32L4xx/L433RCTxP/PeripheralPins.c +++ b/variants/STM32L4xx/L433RCTxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L433RCTxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L433VC(I-T)_L443VC(I-T)/PeripheralPins.c b/variants/STM32L4xx/L433VC(I-T)_L443VC(I-T)/PeripheralPins.c index 0366b8bcbc..3cef13b16a 100644 --- a/variants/STM32L4xx/L433VC(I-T)_L443VC(I-T)/PeripheralPins.c +++ b/variants/STM32L4xx/L433VC(I-T)_L443VC(I-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L433VCIx.xml, STM32L433VCTx.xml * STM32L443VCIx.xml, STM32L443VCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L451CCU_L451CE(T-U)/PeripheralPins.c b/variants/STM32L4xx/L451CCU_L451CE(T-U)/PeripheralPins.c index c5ddcf157a..1fdb3b3800 100644 --- a/variants/STM32L4xx/L451CCU_L451CE(T-U)/PeripheralPins.c +++ b/variants/STM32L4xx/L451CCU_L451CE(T-U)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L451C(C-E)Ux.xml, STM32L451CETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L451R(C-E)(I-T-Y)/PeripheralPins.c b/variants/STM32L4xx/L451R(C-E)(I-T-Y)/PeripheralPins.c index 23f1501493..7692f467b3 100644 --- a/variants/STM32L4xx/L451R(C-E)(I-T-Y)/PeripheralPins.c +++ b/variants/STM32L4xx/L451R(C-E)(I-T-Y)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L451R(C-E)Ix.xml, STM32L451R(C-E)Tx.xml * STM32L451R(C-E)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L451V(C-E)(I-T)/PeripheralPins.c b/variants/STM32L4xx/L451V(C-E)(I-T)/PeripheralPins.c index 3bd5c0afef..6c87c87cd3 100644 --- a/variants/STM32L4xx/L451V(C-E)(I-T)/PeripheralPins.c +++ b/variants/STM32L4xx/L451V(C-E)(I-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L451V(C-E)Ix.xml, STM32L451V(C-E)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L452CCU_L452CE(T-U)x(P)_L462CE(T-U)/PeripheralPins.c b/variants/STM32L4xx/L452CCU_L452CE(T-U)x(P)_L462CE(T-U)/PeripheralPins.c index b9a6eeb081..605e7f553e 100644 --- a/variants/STM32L4xx/L452CCU_L452CE(T-U)x(P)_L462CE(T-U)/PeripheralPins.c +++ b/variants/STM32L4xx/L452CCU_L452CE(T-U)x(P)_L462CE(T-U)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32L452C(C-E)Ux.xml, STM32L452CETx.xml * STM32L452CETxP.xml, STM32L462CETx.xml * STM32L462CEUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)/PeripheralPins.c b/variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)/PeripheralPins.c index 5f67e93fc5..d1c9d03300 100644 --- a/variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)/PeripheralPins.c +++ b/variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32L452R(C-E)Yx.xml, STM32L452REYxP.xml * STM32L462REIx.xml, STM32L462RETx.xml * STM32L462REYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L452RETxP/PeripheralPins.c b/variants/STM32L4xx/L452RETxP/PeripheralPins.c index a15e44c050..9e98bfab56 100644 --- a/variants/STM32L4xx/L452RETxP/PeripheralPins.c +++ b/variants/STM32L4xx/L452RETxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L452RETxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L452V(C-E)(I-T)_L462VE(I-T)/PeripheralPins.c b/variants/STM32L4xx/L452V(C-E)(I-T)_L462VE(I-T)/PeripheralPins.c index e523af2ba3..2a7a016a88 100644 --- a/variants/STM32L4xx/L452V(C-E)(I-T)_L462VE(I-T)/PeripheralPins.c +++ b/variants/STM32L4xx/L452V(C-E)(I-T)_L462VE(I-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L452V(C-E)Ix.xml, STM32L452V(C-E)Tx.xml * STM32L462VEIx.xml, STM32L462VETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L471Q(E-G)I/PeripheralPins.c b/variants/STM32L4xx/L471Q(E-G)I/PeripheralPins.c index 9b98612680..7c48eed55e 100644 --- a/variants/STM32L4xx/L471Q(E-G)I/PeripheralPins.c +++ b/variants/STM32L4xx/L471Q(E-G)I/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L471Q(E-G)Ix.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L471R(E-G)T/PeripheralPins.c b/variants/STM32L4xx/L471R(E-G)T/PeripheralPins.c index 343eab0cf6..82d08a1d91 100644 --- a/variants/STM32L4xx/L471R(E-G)T/PeripheralPins.c +++ b/variants/STM32L4xx/L471R(E-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L471R(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L471V(E-G)T/PeripheralPins.c b/variants/STM32L4xx/L471V(E-G)T/PeripheralPins.c index acbfdc1d4d..0e0d6739e6 100644 --- a/variants/STM32L4xx/L471V(E-G)T/PeripheralPins.c +++ b/variants/STM32L4xx/L471V(E-G)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L471V(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L471Z(E-G)(J-T)/PeripheralPins.c b/variants/STM32L4xx/L471Z(E-G)(J-T)/PeripheralPins.c index 630ce8872f..abaf7be623 100644 --- a/variants/STM32L4xx/L471Z(E-G)(J-T)/PeripheralPins.c +++ b/variants/STM32L4xx/L471Z(E-G)(J-T)/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L471Z(E-G)Jx.xml, STM32L471Z(E-G)Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT/PeripheralPins.c b/variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT/PeripheralPins.c index 2b1b48aae5..440a6a09df 100644 --- a/variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT/PeripheralPins.c +++ b/variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L475R(C-E-G)Tx.xml, STM32L476R(C-E-G)Tx.xml * STM32L486RGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT/PeripheralPins.c b/variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT/PeripheralPins.c index a4014f3822..d1b3642272 100644 --- a/variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT/PeripheralPins.c +++ b/variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L475V(C-E-G)Tx.xml, STM32L476V(C-E-G)Tx.xml * STM32L486VGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L476J(E-G)Y_L485J(C-E)Y_L486JGY/PeripheralPins.c b/variants/STM32L4xx/L476J(E-G)Y_L485J(C-E)Y_L486JGY/PeripheralPins.c index 75ffd26d63..f6233345aa 100644 --- a/variants/STM32L4xx/L476J(E-G)Y_L485J(C-E)Y_L486JGY/PeripheralPins.c +++ b/variants/STM32L4xx/L476J(E-G)Y_L485J(C-E)Y_L486JGY/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L476J(E-G)Yx.xml, STM32L485J(C-E)Yx.xml * STM32L486JGYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L476JGYxP/PeripheralPins.c b/variants/STM32L4xx/L476JGYxP/PeripheralPins.c index 50f95e55b5..64585ade57 100644 --- a/variants/STM32L4xx/L476JGYxP/PeripheralPins.c +++ b/variants/STM32L4xx/L476JGYxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L476JGYxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L476M(E-G)Y/PeripheralPins.c b/variants/STM32L4xx/L476M(E-G)Y/PeripheralPins.c index 585e81e69e..95e41bd717 100644 --- a/variants/STM32L4xx/L476M(E-G)Y/PeripheralPins.c +++ b/variants/STM32L4xx/L476M(E-G)Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L476M(E-G)Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L476QEI_L476QGIx(P)_L486QGI/PeripheralPins.c b/variants/STM32L4xx/L476QEI_L476QGIx(P)_L486QGI/PeripheralPins.c index b9e5ceae73..ac87961c18 100644 --- a/variants/STM32L4xx/L476QEI_L476QGIx(P)_L486QGI/PeripheralPins.c +++ b/variants/STM32L4xx/L476QEI_L476QGIx(P)_L486QGI/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L476Q(E-G)Ix.xml, STM32L476QGIxP.xml * STM32L486QGIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L476VGYxP/PeripheralPins.c b/variants/STM32L4xx/L476VGYxP/PeripheralPins.c index 2a37e57090..c4d8d7aacc 100644 --- a/variants/STM32L4xx/L476VGYxP/PeripheralPins.c +++ b/variants/STM32L4xx/L476VGYxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L476VGYxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L476ZET_L476ZG(J-T)_L486ZGT/PeripheralPins.c b/variants/STM32L4xx/L476ZET_L476ZG(J-T)_L486ZGT/PeripheralPins.c index eeae99f7b6..746ef8f051 100644 --- a/variants/STM32L4xx/L476ZET_L476ZG(J-T)_L486ZGT/PeripheralPins.c +++ b/variants/STM32L4xx/L476ZET_L476ZG(J-T)_L486ZGT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L476Z(E-G)Tx.xml, STM32L476ZGJx.xml * STM32L486ZGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L476ZGTxP/PeripheralPins.c b/variants/STM32L4xx/L476ZGTxP/PeripheralPins.c index d9af8a0916..e0c8b61bad 100644 --- a/variants/STM32L4xx/L476ZGTxP/PeripheralPins.c +++ b/variants/STM32L4xx/L476ZGTxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L476ZGTxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496A(E-G)I_L4A6AGI/PeripheralPins.c b/variants/STM32L4xx/L496A(E-G)I_L4A6AGI/PeripheralPins.c index 0b186f39d8..c22a13e907 100644 --- a/variants/STM32L4xx/L496A(E-G)I_L4A6AGI/PeripheralPins.c +++ b/variants/STM32L4xx/L496A(E-G)I_L4A6AGI/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L496A(E-G)Ix.xml, STM32L4A6AGIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496AGIxP_L4A6AGIxP/PeripheralPins.c b/variants/STM32L4xx/L496AGIxP_L4A6AGIxP/PeripheralPins.c index 6f2ea8f61c..0916126aa1 100644 --- a/variants/STM32L4xx/L496AGIxP_L4A6AGIxP/PeripheralPins.c +++ b/variants/STM32L4xx/L496AGIxP_L4A6AGIxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L496AGIxP.xml, STM32L4A6AGIxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496QEI_L496QGIx(S)_L4A6QGI/PeripheralPins.c b/variants/STM32L4xx/L496QEI_L496QGIx(S)_L4A6QGI/PeripheralPins.c index 77bd1ac119..90554f102c 100644 --- a/variants/STM32L4xx/L496QEI_L496QGIx(S)_L4A6QGI/PeripheralPins.c +++ b/variants/STM32L4xx/L496QEI_L496QGIx(S)_L4A6QGI/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L496Q(E-G)Ix.xml, STM32L496QGIxS.xml * STM32L4A6QGIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496QGIxP_L4A6QGIxP/PeripheralPins.c b/variants/STM32L4xx/L496QGIxP_L4A6QGIxP/PeripheralPins.c index c5b2951bc0..ed2011e2e5 100644 --- a/variants/STM32L4xx/L496QGIxP_L4A6QGIxP/PeripheralPins.c +++ b/variants/STM32L4xx/L496QGIxP_L4A6QGIxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L496QGIxP.xml, STM32L4A6QGIxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496R(E-G)T_L4A6RGT/PeripheralPins.c b/variants/STM32L4xx/L496R(E-G)T_L4A6RGT/PeripheralPins.c index 6de12971d0..587e604620 100644 --- a/variants/STM32L4xx/L496R(E-G)T_L4A6RGT/PeripheralPins.c +++ b/variants/STM32L4xx/L496R(E-G)T_L4A6RGT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L496R(E-G)Tx.xml, STM32L4A6RGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496RGTxP/PeripheralPins.c b/variants/STM32L4xx/L496RGTxP/PeripheralPins.c index 3b4e0a03a1..7f8990059f 100644 --- a/variants/STM32L4xx/L496RGTxP/PeripheralPins.c +++ b/variants/STM32L4xx/L496RGTxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L496RGTxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496V(E-G)T_L4A6VGT/PeripheralPins.c b/variants/STM32L4xx/L496V(E-G)T_L4A6VGT/PeripheralPins.c index e03b89591e..6d4cc56f34 100644 --- a/variants/STM32L4xx/L496V(E-G)T_L4A6VGT/PeripheralPins.c +++ b/variants/STM32L4xx/L496V(E-G)T_L4A6VGT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L496V(E-G)Tx.xml, STM32L4A6VGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496VGTxP_L4A6VGTxP/PeripheralPins.c b/variants/STM32L4xx/L496VGTxP_L4A6VGTxP/PeripheralPins.c index 9c712de5b0..08f5be698e 100644 --- a/variants/STM32L4xx/L496VGTxP_L4A6VGTxP/PeripheralPins.c +++ b/variants/STM32L4xx/L496VGTxP_L4A6VGTxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L496VGTxP.xml, STM32L4A6VGTxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496VGY_L4A6VGY/PeripheralPins.c b/variants/STM32L4xx/L496VGY_L4A6VGY/PeripheralPins.c index fd5d73cecc..12b23b7b6e 100644 --- a/variants/STM32L4xx/L496VGY_L4A6VGY/PeripheralPins.c +++ b/variants/STM32L4xx/L496VGY_L4A6VGY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L496VGYx.xml, STM32L4A6VGYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496VGYxP_L4A6VGYxP/PeripheralPins.c b/variants/STM32L4xx/L496VGYxP_L4A6VGYxP/PeripheralPins.c index 992865ab8b..e2cd3edaac 100644 --- a/variants/STM32L4xx/L496VGYxP_L4A6VGYxP/PeripheralPins.c +++ b/variants/STM32L4xx/L496VGYxP_L4A6VGYxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L496VGYxP.xml, STM32L4A6VGYxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496WGYxP/PeripheralPins.c b/variants/STM32L4xx/L496WGYxP/PeripheralPins.c index b4e1267d3d..53e932019e 100644 --- a/variants/STM32L4xx/L496WGYxP/PeripheralPins.c +++ b/variants/STM32L4xx/L496WGYxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L496WGYxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496Z(E-G)T_L4A6ZGT/PeripheralPins.c b/variants/STM32L4xx/L496Z(E-G)T_L4A6ZGT/PeripheralPins.c index 264aa7989d..4d8d8fbce5 100644 --- a/variants/STM32L4xx/L496Z(E-G)T_L4A6ZGT/PeripheralPins.c +++ b/variants/STM32L4xx/L496Z(E-G)T_L4A6ZGT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L496Z(E-G)Tx.xml, STM32L4A6ZGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L496ZGTxP_L4A6ZGTxP/PeripheralPins.c b/variants/STM32L4xx/L496ZGTxP_L4A6ZGTxP/PeripheralPins.c index 4b948866f3..cd02b9d356 100644 --- a/variants/STM32L4xx/L496ZGTxP_L4A6ZGTxP/PeripheralPins.c +++ b/variants/STM32L4xx/L496ZGTxP_L4A6ZGTxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L496ZGTxP.xml, STM32L4A6ZGTxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4A6RGTxP/PeripheralPins.c b/variants/STM32L4xx/L4A6RGTxP/PeripheralPins.c index a5f6d80acd..14c36e0a40 100644 --- a/variants/STM32L4xx/L4A6RGTxP/PeripheralPins.c +++ b/variants/STM32L4xx/L4A6RGTxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4A6RGTxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5A(G-E)I_L4Q5AGI/PeripheralPins.c b/variants/STM32L4xx/L4P5A(G-E)I_L4Q5AGI/PeripheralPins.c index 232b4b931f..cb44b78613 100644 --- a/variants/STM32L4xx/L4P5A(G-E)I_L4Q5AGI/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5A(G-E)I_L4Q5AGI/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4P5A(G-E)Ix.xml, STM32L4Q5AGIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5AGIxP_L4Q5AGIxP/PeripheralPins.c b/variants/STM32L4xx/L4P5AGIxP_L4Q5AGIxP/PeripheralPins.c index a538719278..7c8d10f873 100644 --- a/variants/STM32L4xx/L4P5AGIxP_L4Q5AGIxP/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5AGIxP_L4Q5AGIxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4P5AGIxP.xml, STM32L4Q5AGIxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5C(E-G)(T-U)_L4Q5CG(T-U)/PeripheralPins.c b/variants/STM32L4xx/L4P5C(E-G)(T-U)_L4Q5CG(T-U)/PeripheralPins.c index 7863ebecf5..4726ba3f00 100644 --- a/variants/STM32L4xx/L4P5C(E-G)(T-U)_L4Q5CG(T-U)/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5C(E-G)(T-U)_L4Q5CG(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L4P5C(G-E)Tx.xml, STM32L4P5C(G-E)Ux.xml * STM32L4Q5CGTx.xml, STM32L4Q5CGUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5CG(T-U)xP_L4Q5CG(T-U)xP/PeripheralPins.c b/variants/STM32L4xx/L4P5CG(T-U)xP_L4Q5CG(T-U)xP/PeripheralPins.c index ada7d2fbd4..2f89965005 100644 --- a/variants/STM32L4xx/L4P5CG(T-U)xP_L4Q5CG(T-U)xP/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5CG(T-U)xP_L4Q5CG(T-U)xP/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L4P5CGTxP.xml, STM32L4P5CGUxP.xml * STM32L4Q5CGTxP.xml, STM32L4Q5CGUxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5Q(G-E)I_L4Q5QGI/PeripheralPins.c b/variants/STM32L4xx/L4P5Q(G-E)I_L4Q5QGI/PeripheralPins.c index 6ee6c7650d..3d2b8bf13e 100644 --- a/variants/STM32L4xx/L4P5Q(G-E)I_L4Q5QGI/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5Q(G-E)I_L4Q5QGI/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4P5Q(G-E)Ix.xml, STM32L4Q5QGIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5QGIx(P-S)_L4Q5QGIxP/PeripheralPins.c b/variants/STM32L4xx/L4P5QGIx(P-S)_L4Q5QGIxP/PeripheralPins.c index 608f6243ad..02975d8f4a 100644 --- a/variants/STM32L4xx/L4P5QGIx(P-S)_L4Q5QGIxP/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5QGIx(P-S)_L4Q5QGIxP/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L4P5QGIxP.xml, STM32L4P5QGIxS.xml * STM32L4Q5QGIxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5R(G-E)T_L4Q5RGT/PeripheralPins.c b/variants/STM32L4xx/L4P5R(G-E)T_L4Q5RGT/PeripheralPins.c index dcfcb3a634..c2ab427df1 100644 --- a/variants/STM32L4xx/L4P5R(G-E)T_L4Q5RGT/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5R(G-E)T_L4Q5RGT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4P5R(G-E)Tx.xml, STM32L4Q5RGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5RGTxP_L4Q5RGTxP/PeripheralPins.c b/variants/STM32L4xx/L4P5RGTxP_L4Q5RGTxP/PeripheralPins.c index e81c482c2e..0d2a534230 100644 --- a/variants/STM32L4xx/L4P5RGTxP_L4Q5RGTxP/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5RGTxP_L4Q5RGTxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4P5RGTxP.xml, STM32L4Q5RGTxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5V(G-E)T_L4Q5VGT/PeripheralPins.c b/variants/STM32L4xx/L4P5V(G-E)T_L4Q5VGT/PeripheralPins.c index 0b425f8ae1..112a5df236 100644 --- a/variants/STM32L4xx/L4P5V(G-E)T_L4Q5VGT/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5V(G-E)T_L4Q5VGT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4P5V(G-E)Tx.xml, STM32L4Q5VGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5V(G-E)Y_L4Q5VGY/PeripheralPins.c b/variants/STM32L4xx/L4P5V(G-E)Y_L4Q5VGY/PeripheralPins.c index b3bfdc5b3b..b2c4c077cf 100644 --- a/variants/STM32L4xx/L4P5V(G-E)Y_L4Q5VGY/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5V(G-E)Y_L4Q5VGY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4P5V(G-E)Yx.xml, STM32L4Q5VGYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5VGTxP_L4Q5VGTxP/PeripheralPins.c b/variants/STM32L4xx/L4P5VGTxP_L4Q5VGTxP/PeripheralPins.c index 29aafe58cf..70865a3634 100644 --- a/variants/STM32L4xx/L4P5VGTxP_L4Q5VGTxP/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5VGTxP_L4Q5VGTxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4P5VGTxP.xml, STM32L4Q5VGTxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5VGYxP_L4Q5VGYxP/PeripheralPins.c b/variants/STM32L4xx/L4P5VGYxP_L4Q5VGYxP/PeripheralPins.c index 7790099b6a..4824f38cf3 100644 --- a/variants/STM32L4xx/L4P5VGYxP_L4Q5VGYxP/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5VGYxP_L4Q5VGYxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4P5VGYxP.xml, STM32L4Q5VGYxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5Z(G-E)T_L4Q5ZGT/PeripheralPins.c b/variants/STM32L4xx/L4P5Z(G-E)T_L4Q5ZGT/PeripheralPins.c index 62df89122d..912b3cc7d8 100644 --- a/variants/STM32L4xx/L4P5Z(G-E)T_L4Q5ZGT/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5Z(G-E)T_L4Q5ZGT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4P5Z(G-E)Tx.xml, STM32L4Q5ZGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4P5ZGTxP_L4Q5ZGTxP/PeripheralPins.c b/variants/STM32L4xx/L4P5ZGTxP_L4Q5ZGTxP/PeripheralPins.c index 9977b331e2..665febc033 100644 --- a/variants/STM32L4xx/L4P5ZGTxP_L4Q5ZGTxP/PeripheralPins.c +++ b/variants/STM32L4xx/L4P5ZGTxP_L4Q5ZGTxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4P5ZGTxP.xml, STM32L4Q5ZGTxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4R5AGI_L4R5AIIx(P)_L4R7AII_L4S5AII_L4S7AII/PeripheralPins.c b/variants/STM32L4xx/L4R5AGI_L4R5AIIx(P)_L4R7AII_L4S5AII_L4S7AII/PeripheralPins.c index 8521232c0d..215974f212 100644 --- a/variants/STM32L4xx/L4R5AGI_L4R5AIIx(P)_L4R7AII_L4S5AII_L4S7AII/PeripheralPins.c +++ b/variants/STM32L4xx/L4R5AGI_L4R5AIIx(P)_L4R7AII_L4S5AII_L4S7AII/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32L4R5A(G-I)Ix.xml, STM32L4R5AIIxP.xml * STM32L4R7AIIx.xml, STM32L4S5AIIx.xml * STM32L4S7AIIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4R5QGIx(S)_L4R5QIIx(P)_L4S5QII/PeripheralPins.c b/variants/STM32L4xx/L4R5QGIx(S)_L4R5QIIx(P)_L4S5QII/PeripheralPins.c index 117a010763..f805651a7c 100644 --- a/variants/STM32L4xx/L4R5QGIx(S)_L4R5QIIx(P)_L4S5QII/PeripheralPins.c +++ b/variants/STM32L4xx/L4R5QGIx(S)_L4R5QIIx(P)_L4S5QII/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L4R5Q(G-I)Ix.xml, STM32L4R5QGIxS.xml * STM32L4R5QIIxP.xml, STM32L4S5QIIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT/PeripheralPins.c b/variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT/PeripheralPins.c index ac5ea2d40f..e5480fd39c 100644 --- a/variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT/PeripheralPins.c +++ b/variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L4R5V(G-I)Tx.xml, STM32L4R7VITx.xml * STM32L4S5VITx.xml, STM32L4S7VITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT/PeripheralPins.c b/variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT/PeripheralPins.c index 068fb179f1..c0586c6f68 100644 --- a/variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT/PeripheralPins.c +++ b/variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L4R5Z(G-I)Tx.xml, STM32L4R7ZITx.xml * STM32L4S5ZITx.xml, STM32L4S7ZITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/PeripheralPins.c b/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/PeripheralPins.c index cb1e828a4d..1c03143218 100644 --- a/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/PeripheralPins.c +++ b/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L4R5Z(G-I)Yx.xml, STM32L4R9Z(G-I)Yx.xml * STM32L4S5ZIYx.xml, STM32L4S9ZIYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4R5ZITxP/PeripheralPins.c b/variants/STM32L4xx/L4R5ZITxP/PeripheralPins.c index 9cf53bbc07..44dca970bf 100644 --- a/variants/STM32L4xx/L4R5ZITxP/PeripheralPins.c +++ b/variants/STM32L4xx/L4R5ZITxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4R5ZITxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4R9A(G-I)I_L4S9AII/PeripheralPins.c b/variants/STM32L4xx/L4R9A(G-I)I_L4S9AII/PeripheralPins.c index 71298b419e..5263669538 100644 --- a/variants/STM32L4xx/L4R9A(G-I)I_L4S9AII/PeripheralPins.c +++ b/variants/STM32L4xx/L4R9A(G-I)I_L4S9AII/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4R9A(G-I)Ix.xml, STM32L4S9AIIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4R9V(G-I)T_L4S9VIT/PeripheralPins.c b/variants/STM32L4xx/L4R9V(G-I)T_L4S9VIT/PeripheralPins.c index 087c15af6e..8951509688 100644 --- a/variants/STM32L4xx/L4R9V(G-I)T_L4S9VIT/PeripheralPins.c +++ b/variants/STM32L4xx/L4R9V(G-I)T_L4S9VIT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4R9V(G-I)Tx.xml, STM32L4S9VITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ/PeripheralPins.c b/variants/STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ/PeripheralPins.c index e2b8d4a8f4..4456ffe432 100644 --- a/variants/STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ/PeripheralPins.c +++ b/variants/STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4R9Z(G-I)Jx.xml, STM32L4S9ZIJx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4R9Z(G-I)T_L4S9ZIT/PeripheralPins.c b/variants/STM32L4xx/L4R9Z(G-I)T_L4S9ZIT/PeripheralPins.c index de8ecf6cc4..84eae0d8b8 100644 --- a/variants/STM32L4xx/L4R9Z(G-I)T_L4S9ZIT/PeripheralPins.c +++ b/variants/STM32L4xx/L4R9Z(G-I)T_L4S9ZIT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4R9Z(G-I)Tx.xml, STM32L4S9ZITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L4xx/L4R9ZIYxP/PeripheralPins.c b/variants/STM32L4xx/L4R9ZIYxP/PeripheralPins.c index 1a5f5f8123..c5ae4dc660 100644 --- a/variants/STM32L4xx/L4R9ZIYxP/PeripheralPins.c +++ b/variants/STM32L4xx/L4R9ZIYxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L4R9ZIYxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552C(C-E)(T-U)_L562CE(T-U)/PeripheralPins.c b/variants/STM32L5xx/L552C(C-E)(T-U)_L562CE(T-U)/PeripheralPins.c index 61d55d67c9..94b0cdb538 100644 --- a/variants/STM32L5xx/L552C(C-E)(T-U)_L562CE(T-U)/PeripheralPins.c +++ b/variants/STM32L5xx/L552C(C-E)(T-U)_L562CE(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L552C(C-E)Tx.xml, STM32L552C(C-E)Ux.xml * STM32L562CETx.xml, STM32L562CEUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552CE(T-U)xP_L562CE(T-U)xP/PeripheralPins.c b/variants/STM32L5xx/L552CE(T-U)xP_L562CE(T-U)xP/PeripheralPins.c index 9d823e67fb..9ca788cabb 100644 --- a/variants/STM32L5xx/L552CE(T-U)xP_L562CE(T-U)xP/PeripheralPins.c +++ b/variants/STM32L5xx/L552CE(T-U)xP_L562CE(T-U)xP/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32L552CETxP.xml, STM32L552CEUxP.xml * STM32L562CETxP.xml, STM32L562CEUxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552MEYxP_L562MEYxP/PeripheralPins.c b/variants/STM32L5xx/L552MEYxP_L562MEYxP/PeripheralPins.c index 1aeea5b28f..84dc9ed240 100644 --- a/variants/STM32L5xx/L552MEYxP_L562MEYxP/PeripheralPins.c +++ b/variants/STM32L5xx/L552MEYxP_L562MEYxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L552MEYxP.xml, STM32L562MEYxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552MEYxQ_L562MEYxQ/PeripheralPins.c b/variants/STM32L5xx/L552MEYxQ_L562MEYxQ/PeripheralPins.c index f2cd707cd7..3b3fcd3edb 100644 --- a/variants/STM32L5xx/L552MEYxQ_L562MEYxQ/PeripheralPins.c +++ b/variants/STM32L5xx/L552MEYxQ_L562MEYxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L552MEYxQ.xml, STM32L562MEYxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/PeripheralPins.c b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/PeripheralPins.c index 2dcd9fd74e..50206eb5a2 100644 --- a/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/PeripheralPins.c +++ b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L552Q(C-E)IxQ.xml, STM32L562QEIxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552QEI_L562QEI/PeripheralPins.c b/variants/STM32L5xx/L552QEI_L562QEI/PeripheralPins.c index 694eed11ed..4dd5dac34c 100644 --- a/variants/STM32L5xx/L552QEI_L562QEI/PeripheralPins.c +++ b/variants/STM32L5xx/L552QEI_L562QEI/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L552QEIx.xml, STM32L562QEIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552QEIxP_L562QEIxP/PeripheralPins.c b/variants/STM32L5xx/L552QEIxP_L562QEIxP/PeripheralPins.c index e739239d28..066cdfea0f 100644 --- a/variants/STM32L5xx/L552QEIxP_L562QEIxP/PeripheralPins.c +++ b/variants/STM32L5xx/L552QEIxP_L562QEIxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L552QEIxP.xml, STM32L562QEIxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552R(C-E)T_L562RET/PeripheralPins.c b/variants/STM32L5xx/L552R(C-E)T_L562RET/PeripheralPins.c index 855ae1b581..cd8bffaf75 100644 --- a/variants/STM32L5xx/L552R(C-E)T_L562RET/PeripheralPins.c +++ b/variants/STM32L5xx/L552R(C-E)T_L562RET/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L552R(C-E)Tx.xml, STM32L562RETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552RETxP_L562RETxP/PeripheralPins.c b/variants/STM32L5xx/L552RETxP_L562RETxP/PeripheralPins.c index 030d539f9f..1743e0229a 100644 --- a/variants/STM32L5xx/L552RETxP_L562RETxP/PeripheralPins.c +++ b/variants/STM32L5xx/L552RETxP_L562RETxP/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L552RETxP.xml, STM32L562RETxP.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552RETxQ_L562RETxQ/PeripheralPins.c b/variants/STM32L5xx/L552RETxQ_L562RETxQ/PeripheralPins.c index d62cad6f3d..e143fe81ae 100644 --- a/variants/STM32L5xx/L552RETxQ_L562RETxQ/PeripheralPins.c +++ b/variants/STM32L5xx/L552RETxQ_L562RETxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L552RETxQ.xml, STM32L562RETxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552V(C-E)TxQ_L562VETxQ/PeripheralPins.c b/variants/STM32L5xx/L552V(C-E)TxQ_L562VETxQ/PeripheralPins.c index 765295f3e9..e4e3c6e0f2 100644 --- a/variants/STM32L5xx/L552V(C-E)TxQ_L562VETxQ/PeripheralPins.c +++ b/variants/STM32L5xx/L552V(C-E)TxQ_L562VETxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L552V(C-E)TxQ.xml, STM32L562VETxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552VET_L562VET/PeripheralPins.c b/variants/STM32L5xx/L552VET_L562VET/PeripheralPins.c index 494fdc8c80..6ec7f92401 100644 --- a/variants/STM32L5xx/L552VET_L562VET/PeripheralPins.c +++ b/variants/STM32L5xx/L552VET_L562VET/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L552VETx.xml, STM32L562VETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/PeripheralPins.c b/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/PeripheralPins.c index 331797e11b..29230c9d92 100644 --- a/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/PeripheralPins.c +++ b/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L552Z(C-E)TxQ.xml, STM32L562ZETxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32L5xx/L552ZET_L562ZET/PeripheralPins.c b/variants/STM32L5xx/L552ZET_L562ZET/PeripheralPins.c index 97b48436f1..4b57f48765 100644 --- a/variants/STM32L5xx/L552ZET_L562ZET/PeripheralPins.c +++ b/variants/STM32L5xx/L552ZET_L562ZET/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32L552ZETx.xml, STM32L562ZETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32MP1xx/MP151AA(B-D)_MP151CA(B-D)_MP151DA(B-D)_MP151FA(B-D)/PeripheralPins.c b/variants/STM32MP1xx/MP151AA(B-D)_MP151CA(B-D)_MP151DA(B-D)_MP151FA(B-D)/PeripheralPins.c index de2f1628db..903b5b62c6 100644 --- a/variants/STM32MP1xx/MP151AA(B-D)_MP151CA(B-D)_MP151DA(B-D)_MP151FA(B-D)/PeripheralPins.c +++ b/variants/STM32MP1xx/MP151AA(B-D)_MP151CA(B-D)_MP151DA(B-D)_MP151FA(B-D)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32MP151CABx.xml, STM32MP151CADx.xml * STM32MP151DABx.xml, STM32MP151DADx.xml * STM32MP151FABx.xml, STM32MP151FADx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32MP1xx/MP151AAA_MP151CAA_MP151DAA_MP151FAA/PeripheralPins.c b/variants/STM32MP1xx/MP151AAA_MP151CAA_MP151DAA_MP151FAA/PeripheralPins.c index 6643b1e579..214cd77ed6 100644 --- a/variants/STM32MP1xx/MP151AAA_MP151CAA_MP151DAA_MP151FAA/PeripheralPins.c +++ b/variants/STM32MP1xx/MP151AAA_MP151CAA_MP151DAA_MP151FAA/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32MP151AAAx.xml, STM32MP151CAAx.xml * STM32MP151DAAx.xml, STM32MP151FAAx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32MP1xx/MP151AAC_MP151CAC_MP151DAC_MP151FAC/PeripheralPins.c b/variants/STM32MP1xx/MP151AAC_MP151CAC_MP151DAC_MP151FAC/PeripheralPins.c index 7e6b4097d6..5820454e2b 100644 --- a/variants/STM32MP1xx/MP151AAC_MP151CAC_MP151DAC_MP151FAC/PeripheralPins.c +++ b/variants/STM32MP1xx/MP151AAC_MP151CAC_MP151DAC_MP151FAC/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32MP151AACx.xml, STM32MP151CACx.xml * STM32MP151DACx.xml, STM32MP151FACx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32MP1xx/MP153AA(B-D)_MP153CA(B-D)_MP153DA(B-D)_MP153FA(B-D)_MP157AA(B-D)_MP157CA(B-D)_MP157DA(B-D)_MP157FA(B-D)/PeripheralPins.c b/variants/STM32MP1xx/MP153AA(B-D)_MP153CA(B-D)_MP153DA(B-D)_MP153FA(B-D)_MP157AA(B-D)_MP157CA(B-D)_MP157DA(B-D)_MP157FA(B-D)/PeripheralPins.c index ec5d6b158f..301e35b810 100644 --- a/variants/STM32MP1xx/MP153AA(B-D)_MP153CA(B-D)_MP153DA(B-D)_MP153FA(B-D)_MP157AA(B-D)_MP157CA(B-D)_MP157DA(B-D)_MP157FA(B-D)/PeripheralPins.c +++ b/variants/STM32MP1xx/MP153AA(B-D)_MP153CA(B-D)_MP153DA(B-D)_MP153FA(B-D)_MP157AA(B-D)_MP157CA(B-D)_MP157DA(B-D)_MP157FA(B-D)/PeripheralPins.c @@ -19,7 +19,7 @@ * STM32MP157CABx.xml, STM32MP157CADx.xml * STM32MP157DABx.xml, STM32MP157DADx.xml * STM32MP157FABx.xml, STM32MP157FADx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32MP1xx/MP153AAA_MP153CAA_MP153DAA_MP153FAA_MP157AAA_MP157CAA_MP157DAA_MP157FAA/PeripheralPins.c b/variants/STM32MP1xx/MP153AAA_MP153CAA_MP153DAA_MP153FAA_MP157AAA_MP157CAA_MP157DAA_MP157FAA/PeripheralPins.c index b77e30ed49..78db6d6541 100644 --- a/variants/STM32MP1xx/MP153AAA_MP153CAA_MP153DAA_MP153FAA_MP157AAA_MP157CAA_MP157DAA_MP157FAA/PeripheralPins.c +++ b/variants/STM32MP1xx/MP153AAA_MP153CAA_MP153DAA_MP153FAA_MP157AAA_MP157CAA_MP157DAA_MP157FAA/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32MP153DAAx.xml, STM32MP153FAAx.xml * STM32MP157AAAx.xml, STM32MP157CAAx.xml * STM32MP157DAAx.xml, STM32MP157FAAx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC/PeripheralPins.c b/variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC/PeripheralPins.c index 2fc89b641b..915b28b1d0 100644 --- a/variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC/PeripheralPins.c +++ b/variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32MP153DACx.xml, STM32MP153FACx.xml * STM32MP157AACx.xml, STM32MP157CACx.xml * STM32MP157DACx.xml, STM32MP157FACx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U0xx/U031C(6-8)(T-U)/PeripheralPins.c b/variants/STM32U0xx/U031C(6-8)(T-U)/PeripheralPins.c index c5ec84843a..7020768294 100644 --- a/variants/STM32U0xx/U031C(6-8)(T-U)/PeripheralPins.c +++ b/variants/STM32U0xx/U031C(6-8)(T-U)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U031C6Tx.xml, STM32U031C6Ux.xml * STM32U031C8Tx.xml, STM32U031C8Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U0xx/U031F(4-6-8)P/PeripheralPins.c b/variants/STM32U0xx/U031F(4-6-8)P/PeripheralPins.c index b57b6e89b6..c6fc0a52e9 100644 --- a/variants/STM32U0xx/U031F(4-6-8)P/PeripheralPins.c +++ b/variants/STM32U0xx/U031F(4-6-8)P/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U031F4Px.xml, STM32U031F6Px.xml * STM32U031F8Px.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U0xx/U031G(6-8)Y/PeripheralPins.c b/variants/STM32U0xx/U031G(6-8)Y/PeripheralPins.c index cf7be3a1ca..c696946168 100644 --- a/variants/STM32U0xx/U031G(6-8)Y/PeripheralPins.c +++ b/variants/STM32U0xx/U031G(6-8)Y/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U031G6Yx.xml, STM32U031G8Yx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U0xx/U031K(4-6-8)U/PeripheralPins.c b/variants/STM32U0xx/U031K(4-6-8)U/PeripheralPins.c index 1a4d5423ef..7aa44dae7f 100644 --- a/variants/STM32U0xx/U031K(4-6-8)U/PeripheralPins.c +++ b/variants/STM32U0xx/U031K(4-6-8)U/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U031K4Ux.xml, STM32U031K6Ux.xml * STM32U031K8Ux.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U0xx/U031R(6-8)(I-T)/PeripheralPins.c b/variants/STM32U0xx/U031R(6-8)(I-T)/PeripheralPins.c index 33a6c39101..b3fcdd2401 100644 --- a/variants/STM32U0xx/U031R(6-8)(I-T)/PeripheralPins.c +++ b/variants/STM32U0xx/U031R(6-8)(I-T)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U031R6Ix.xml, STM32U031R6Tx.xml * STM32U031R8Ix.xml, STM32U031R8Tx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U0xx/U073C(8-B-C)(T-U)_U083CC(T-U)/PeripheralPins.c b/variants/STM32U0xx/U073C(8-B-C)(T-U)_U083CC(T-U)/PeripheralPins.c index f0f9fc01fd..9586b42669 100644 --- a/variants/STM32U0xx/U073C(8-B-C)(T-U)_U083CC(T-U)/PeripheralPins.c +++ b/variants/STM32U0xx/U073C(8-B-C)(T-U)_U083CC(T-U)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32U073CBTx.xml, STM32U073CBUx.xml * STM32U073CCTx.xml, STM32U073CCUx.xml * STM32U083CCTx.xml, STM32U083CCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U0xx/U073H(8-B-C)Y_U083HCY/PeripheralPins.c b/variants/STM32U0xx/U073H(8-B-C)Y_U083HCY/PeripheralPins.c index d7a64208e9..7ad34a8186 100644 --- a/variants/STM32U0xx/U073H(8-B-C)Y_U083HCY/PeripheralPins.c +++ b/variants/STM32U0xx/U073H(8-B-C)Y_U083HCY/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U073H8Yx.xml, STM32U073HBYx.xml * STM32U073HCYx.xml, STM32U083HCYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U0xx/U073K(8-B-C)U_U083KCU/PeripheralPins.c b/variants/STM32U0xx/U073K(8-B-C)U_U083KCU/PeripheralPins.c index fe4e245510..bc6f56aa10 100644 --- a/variants/STM32U0xx/U073K(8-B-C)U_U083KCU/PeripheralPins.c +++ b/variants/STM32U0xx/U073K(8-B-C)U_U083KCU/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U073K8Ux.xml, STM32U073KBUx.xml * STM32U073KCUx.xml, STM32U083KCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U0xx/U073M(8-B-C)I_U083MCI/PeripheralPins.c b/variants/STM32U0xx/U073M(8-B-C)I_U083MCI/PeripheralPins.c index ac0316de81..d734bdfe43 100644 --- a/variants/STM32U0xx/U073M(8-B-C)I_U083MCI/PeripheralPins.c +++ b/variants/STM32U0xx/U073M(8-B-C)I_U083MCI/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U073M8Ix.xml, STM32U073MBIx.xml * STM32U073MCIx.xml, STM32U083MCIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U0xx/U073M(8-B-C)T_U083MCT/PeripheralPins.c b/variants/STM32U0xx/U073M(8-B-C)T_U083MCT/PeripheralPins.c index d8066b59d3..391df7df57 100644 --- a/variants/STM32U0xx/U073M(8-B-C)T_U083MCT/PeripheralPins.c +++ b/variants/STM32U0xx/U073M(8-B-C)T_U083MCT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U073M8Tx.xml, STM32U073MBTx.xml * STM32U073MCTx.xml, STM32U083MCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U0xx/U073R(8-B-C)(I-T)_U083RC(I-T)/PeripheralPins.c b/variants/STM32U0xx/U073R(8-B-C)(I-T)_U083RC(I-T)/PeripheralPins.c index 95b44c64e7..83bef8258c 100644 --- a/variants/STM32U0xx/U073R(8-B-C)(I-T)_U083RC(I-T)/PeripheralPins.c +++ b/variants/STM32U0xx/U073R(8-B-C)(I-T)_U083RC(I-T)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32U073RBIx.xml, STM32U073RBTx.xml * STM32U073RCIx.xml, STM32U073RCTx.xml * STM32U083RCIx.xml, STM32U083RCTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375C(E-G)(T-U)_U385CG(T-U)/PeripheralPins.c b/variants/STM32U3xx/U375C(E-G)(T-U)_U385CG(T-U)/PeripheralPins.c index ccf69ab2e0..d9f27c3abb 100644 --- a/variants/STM32U3xx/U375C(E-G)(T-U)_U385CG(T-U)/PeripheralPins.c +++ b/variants/STM32U3xx/U375C(E-G)(T-U)_U385CG(T-U)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32U375CETx.xml, STM32U375CEUx.xml * STM32U375CGTx.xml, STM32U375CGUx.xml * STM32U385CGTx.xml, STM32U385CGUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375C(E-G)(T-U)xQ_U385CG(T-U)xQ/PeripheralPins.c b/variants/STM32U3xx/U375C(E-G)(T-U)xQ_U385CG(T-U)xQ/PeripheralPins.c index 1a7b141712..f037802f22 100644 --- a/variants/STM32U3xx/U375C(E-G)(T-U)xQ_U385CG(T-U)xQ/PeripheralPins.c +++ b/variants/STM32U3xx/U375C(E-G)(T-U)xQ_U385CG(T-U)xQ/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32U375CETxQ.xml, STM32U375CEUxQ.xml * STM32U375CGTxQ.xml, STM32U375CGUxQ.xml * STM32U385CGTxQ.xml, STM32U385CGUxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375C(E-G)YxQ_U385CGYxQ/PeripheralPins.c b/variants/STM32U3xx/U375C(E-G)YxQ_U385CGYxQ/PeripheralPins.c index 106f09e035..e1cba642db 100644 --- a/variants/STM32U3xx/U375C(E-G)YxQ_U385CGYxQ/PeripheralPins.c +++ b/variants/STM32U3xx/U375C(E-G)YxQ_U385CGYxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U375CEYxQ.xml, STM32U375CGYxQ.xml * STM32U385CGYxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375K(E-G)U_U385KGU/PeripheralPins.c b/variants/STM32U3xx/U375K(E-G)U_U385KGU/PeripheralPins.c index ee5e70d317..63c3efea2e 100644 --- a/variants/STM32U3xx/U375K(E-G)U_U385KGU/PeripheralPins.c +++ b/variants/STM32U3xx/U375K(E-G)U_U385KGU/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U375KEUx.xml, STM32U375KGUx.xml * STM32U385KGUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375R(E-G)I_U385RGI/PeripheralPins.c b/variants/STM32U3xx/U375R(E-G)I_U385RGI/PeripheralPins.c index 4cb15e6d6c..f59a2475dc 100644 --- a/variants/STM32U3xx/U375R(E-G)I_U385RGI/PeripheralPins.c +++ b/variants/STM32U3xx/U375R(E-G)I_U385RGI/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U375REIx.xml, STM32U375RGIx.xml * STM32U385RGIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375R(E-G)IxQ_U385RGIxQ/PeripheralPins.c b/variants/STM32U3xx/U375R(E-G)IxQ_U385RGIxQ/PeripheralPins.c index 4a05c85f6b..4d372fd4ae 100644 --- a/variants/STM32U3xx/U375R(E-G)IxQ_U385RGIxQ/PeripheralPins.c +++ b/variants/STM32U3xx/U375R(E-G)IxQ_U385RGIxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U375REIxQ.xml, STM32U375RGIxQ.xml * STM32U385RGIxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375R(E-G)T_U385RGT/PeripheralPins.c b/variants/STM32U3xx/U375R(E-G)T_U385RGT/PeripheralPins.c index b4f082320e..a20f6424eb 100644 --- a/variants/STM32U3xx/U375R(E-G)T_U385RGT/PeripheralPins.c +++ b/variants/STM32U3xx/U375R(E-G)T_U385RGT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U375RETx.xml, STM32U375RGTx.xml * STM32U385RGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375R(E-G)TxQ_U385RGTxQ/PeripheralPins.c b/variants/STM32U3xx/U375R(E-G)TxQ_U385RGTxQ/PeripheralPins.c index 72226cd7d8..97e07a71e2 100644 --- a/variants/STM32U3xx/U375R(E-G)TxQ_U385RGTxQ/PeripheralPins.c +++ b/variants/STM32U3xx/U375R(E-G)TxQ_U385RGTxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U375RETxQ.xml, STM32U375RGTxQ.xml * STM32U385RGTxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375R(E-G)YxG_U385RGYxG/PeripheralPins.c b/variants/STM32U3xx/U375R(E-G)YxG_U385RGYxG/PeripheralPins.c index 9e0d675d11..d8172edc54 100644 --- a/variants/STM32U3xx/U375R(E-G)YxG_U385RGYxG/PeripheralPins.c +++ b/variants/STM32U3xx/U375R(E-G)YxG_U385RGYxG/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U375REYxG.xml, STM32U375RGYxG.xml * STM32U385RGYxG.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375R(E-G)YxG_U385RGYxG/boards_entry.txt b/variants/STM32U3xx/U375R(E-G)YxG_U385RGYxG/boards_entry.txt index ee715c8e7c..5da06177d5 100644 --- a/variants/STM32U3xx/U375R(E-G)YxG_U385RGYxG/boards_entry.txt +++ b/variants/STM32U3xx/U375R(E-G)YxG_U385RGYxG/boards_entry.txt @@ -8,7 +8,7 @@ GenU3.menu.pnum.GENERIC_U375REYXG=Generic U375REYxG GenU3.menu.pnum.GENERIC_U375REYXG.upload.maximum_size=524288 GenU3.menu.pnum.GENERIC_U375REYXG.upload.maximum_data_size=262144 GenU3.menu.pnum.GENERIC_U375REYXG.build.board=GENERIC_U375REYXG -GenU3.menu.pnum.GENERIC_U375REYXG.build.product_line=STM32U385xx +GenU3.menu.pnum.GENERIC_U375REYXG.build.product_line=STM32U375xx GenU3.menu.pnum.GENERIC_U375REYXG.build.variant=STM32U3xx/U375R(E-G)YxG_U385RGYxG GenU3.menu.pnum.GENERIC_U375REYXG.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U375.svd @@ -17,7 +17,7 @@ GenU3.menu.pnum.GENERIC_U375RGYXG=Generic U375RGYxG GenU3.menu.pnum.GENERIC_U375RGYXG.upload.maximum_size=1048576 GenU3.menu.pnum.GENERIC_U375RGYXG.upload.maximum_data_size=262144 GenU3.menu.pnum.GENERIC_U375RGYXG.build.board=GENERIC_U375RGYXG -GenU3.menu.pnum.GENERIC_U375RGYXG.build.product_line=STM32U385xx +GenU3.menu.pnum.GENERIC_U375RGYXG.build.product_line=STM32U375xx GenU3.menu.pnum.GENERIC_U375RGYXG.build.variant=STM32U3xx/U375R(E-G)YxG_U385RGYxG GenU3.menu.pnum.GENERIC_U375RGYXG.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U375.svd @@ -26,7 +26,7 @@ GenU3.menu.pnum.GENERIC_U385RGYXG=Generic U385RGYxG GenU3.menu.pnum.GENERIC_U385RGYXG.upload.maximum_size=1048576 GenU3.menu.pnum.GENERIC_U385RGYXG.upload.maximum_data_size=262144 GenU3.menu.pnum.GENERIC_U385RGYXG.build.board=GENERIC_U385RGYXG -GenU3.menu.pnum.GENERIC_U385RGYXG.build.product_line= +GenU3.menu.pnum.GENERIC_U385RGYXG.build.product_line=STM32U385xx GenU3.menu.pnum.GENERIC_U385RGYXG.build.variant=STM32U3xx/U375R(E-G)YxG_U385RGYxG GenU3.menu.pnum.GENERIC_U385RGYXG.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U385.svd diff --git a/variants/STM32U3xx/U375R(E-G)YxQ_U385RGYxQ/PeripheralPins.c b/variants/STM32U3xx/U375R(E-G)YxQ_U385RGYxQ/PeripheralPins.c index 1428679bbc..9b312e3966 100644 --- a/variants/STM32U3xx/U375R(E-G)YxQ_U385RGYxQ/PeripheralPins.c +++ b/variants/STM32U3xx/U375R(E-G)YxQ_U385RGYxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U375REYxQ.xml, STM32U375RGYxQ.xml * STM32U385RGYxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375V(E-G)I_U385VGI/PeripheralPins.c b/variants/STM32U3xx/U375V(E-G)I_U385VGI/PeripheralPins.c index 89152bc9bc..4cde07d815 100644 --- a/variants/STM32U3xx/U375V(E-G)I_U385VGI/PeripheralPins.c +++ b/variants/STM32U3xx/U375V(E-G)I_U385VGI/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U375VEIx.xml, STM32U375VGIx.xml * STM32U385VGIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375V(E-G)IxQ_U385VGIxQ/PeripheralPins.c b/variants/STM32U3xx/U375V(E-G)IxQ_U385VGIxQ/PeripheralPins.c index e643f79fce..5f3ae1f22f 100644 --- a/variants/STM32U3xx/U375V(E-G)IxQ_U385VGIxQ/PeripheralPins.c +++ b/variants/STM32U3xx/U375V(E-G)IxQ_U385VGIxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U375VEIxQ.xml, STM32U375VGIxQ.xml * STM32U385VGIxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375V(E-G)T_U385VGT/PeripheralPins.c b/variants/STM32U3xx/U375V(E-G)T_U385VGT/PeripheralPins.c index 86284c3a5d..9a6468a7f2 100644 --- a/variants/STM32U3xx/U375V(E-G)T_U385VGT/PeripheralPins.c +++ b/variants/STM32U3xx/U375V(E-G)T_U385VGT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U375VETx.xml, STM32U375VGTx.xml * STM32U385VGTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U375V(E-G)TxQ_U385VGTxQ/PeripheralPins.c b/variants/STM32U3xx/U375V(E-G)TxQ_U385VGTxQ/PeripheralPins.c index d1368a2fe0..724a70bfdf 100644 --- a/variants/STM32U3xx/U375V(E-G)TxQ_U385VGTxQ/PeripheralPins.c +++ b/variants/STM32U3xx/U375V(E-G)TxQ_U385VGTxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U375VETxQ.xml, STM32U375VGTxQ.xml * STM32U385VGTxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/CMakeLists.txt b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/PeripheralPins.c b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/PeripheralPins.c new file mode 100644 index 0000000000..4a82679c04 --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/PeripheralPins.c @@ -0,0 +1,411 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5CGTx.xml, STM32U3B5CGUx.xml + * STM32U3B5CITx.xml, STM32U3B5CIUx.xml + * STM32U3C5CITx.xml, STM32U3C5CIUx.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_9, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_9_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_12_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_2, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_10, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_10_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** No SD *** + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/PinNamesVar.h b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/PinNamesVar.h new file mode 100644 index 0000000000..e37bc1f935 --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/PinNamesVar.h @@ -0,0 +1,97 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_9_ALT1 = PB_9 | ALT1, +PB_10_ALT1 = PB_10 | ALT1, +PB_12_ALT1 = PB_12 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_1 = PB_2, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PA_7, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_1 = PB_10, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/boards_entry.txt b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/boards_entry.txt new file mode 100644 index 0000000000..b8d38ccb29 --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/boards_entry.txt @@ -0,0 +1,59 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5CGTx +GenU3.menu.pnum.GENERIC_U3B5CGTX=Generic U3B5CGTx +GenU3.menu.pnum.GENERIC_U3B5CGTX.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5CGTX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5CGTX.build.board=GENERIC_U3B5CGTX +GenU3.menu.pnum.GENERIC_U3B5CGTX.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5CGTX.build.variant=STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U) +GenU3.menu.pnum.GENERIC_U3B5CGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5CGUx +GenU3.menu.pnum.GENERIC_U3B5CGUX=Generic U3B5CGUx +GenU3.menu.pnum.GENERIC_U3B5CGUX.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5CGUX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5CGUX.build.board=GENERIC_U3B5CGUX +GenU3.menu.pnum.GENERIC_U3B5CGUX.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5CGUX.build.variant=STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U) +GenU3.menu.pnum.GENERIC_U3B5CGUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5CITx +GenU3.menu.pnum.GENERIC_U3B5CITX=Generic U3B5CITx +GenU3.menu.pnum.GENERIC_U3B5CITX.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5CITX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5CITX.build.board=GENERIC_U3B5CITX +GenU3.menu.pnum.GENERIC_U3B5CITX.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5CITX.build.variant=STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U) +GenU3.menu.pnum.GENERIC_U3B5CITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5CIUx +GenU3.menu.pnum.GENERIC_U3B5CIUX=Generic U3B5CIUx +GenU3.menu.pnum.GENERIC_U3B5CIUX.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5CIUX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5CIUX.build.board=GENERIC_U3B5CIUX +GenU3.menu.pnum.GENERIC_U3B5CIUX.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5CIUX.build.variant=STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U) +GenU3.menu.pnum.GENERIC_U3B5CIUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5CITx +GenU3.menu.pnum.GENERIC_U3C5CITX=Generic U3C5CITx +GenU3.menu.pnum.GENERIC_U3C5CITX.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5CITX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5CITX.build.board=GENERIC_U3C5CITX +GenU3.menu.pnum.GENERIC_U3C5CITX.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5CITX.build.variant=STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U) +GenU3.menu.pnum.GENERIC_U3C5CITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + +# Generic U3C5CIUx +GenU3.menu.pnum.GENERIC_U3C5CIUX=Generic U3C5CIUx +GenU3.menu.pnum.GENERIC_U3C5CIUX.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5CIUX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5CIUX.build.board=GENERIC_U3C5CIUX +GenU3.menu.pnum.GENERIC_U3C5CIUX.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5CIUX.build.variant=STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U) +GenU3.menu.pnum.GENERIC_U3C5CIUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/generic_clock.c b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/generic_clock.c new file mode 100644 index 0000000000..da73f3e7e8 --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/generic_clock.c @@ -0,0 +1,29 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5CGTX) || defined(ARDUINO_GENERIC_U3B5CGUX) ||\ + defined(ARDUINO_GENERIC_U3B5CITX) || defined(ARDUINO_GENERIC_U3B5CIUX) ||\ + defined(ARDUINO_GENERIC_U3C5CITX) || defined(ARDUINO_GENERIC_U3C5CIUX) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/variant_generic.cpp b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/variant_generic.cpp new file mode 100644 index 0000000000..92fd143d34 --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/variant_generic.cpp @@ -0,0 +1,74 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5CGTX) || defined(ARDUINO_GENERIC_U3B5CGUX) ||\ + defined(ARDUINO_GENERIC_U3B5CITX) || defined(ARDUINO_GENERIC_U3B5CIUX) ||\ + defined(ARDUINO_GENERIC_U3C5CITX) || defined(ARDUINO_GENERIC_U3C5CIUX) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18/A10 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_12, // D27 + PB_13, // D28 + PB_14, // D29 + PB_15, // D30 + PC_13, // D31 + PC_14, // D32 + PC_15, // D33 + PH_0, // D34 + PH_1, // D35 + PH_3 // D36 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 18 // A10, PB2 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/variant_generic.h b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/variant_generic.h new file mode 100644 index 0000000000..2164b6cc18 --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)_U3C5CI(T-U)/variant_generic.h @@ -0,0 +1,205 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 PIN_A10 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB12 27 +#define PB13 28 +#define PB14 29 +#define PB15 30 +#define PC13 31 +#define PC14 32 +#define PC15 33 +#define PH0 34 +#define PH1 35 +#define PH3 36 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB12_ALT1 (PB12 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 37 +#define NUM_ANALOG_INPUTS 11 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB2 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN8_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/CMakeLists.txt b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/PeripheralPins.c b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/PeripheralPins.c new file mode 100644 index 0000000000..2d1c86434f --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/PeripheralPins.c @@ -0,0 +1,386 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5CGTxQ.xml, STM32U3B5CGUxQ.xml + * STM32U3B5CITxQ.xml, STM32U3B5CIUxQ.xml + * STM32U3C5CITxQ.xml, STM32U3C5CIUxQ.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** No SD *** + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/PinNamesVar.h b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/PinNamesVar.h new file mode 100644 index 0000000000..c0f376ce36 --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/PinNamesVar.h @@ -0,0 +1,88 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PA_7, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/boards_entry.txt b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/boards_entry.txt new file mode 100644 index 0000000000..871206008e --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/boards_entry.txt @@ -0,0 +1,59 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5CGTxQ +GenU3.menu.pnum.GENERIC_U3B5CGTXQ=Generic U3B5CGTxQ +GenU3.menu.pnum.GENERIC_U3B5CGTXQ.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5CGTXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5CGTXQ.build.board=GENERIC_U3B5CGTXQ +GenU3.menu.pnum.GENERIC_U3B5CGTXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5CGTXQ.build.variant=STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ +GenU3.menu.pnum.GENERIC_U3B5CGTXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5CGUxQ +GenU3.menu.pnum.GENERIC_U3B5CGUXQ=Generic U3B5CGUxQ +GenU3.menu.pnum.GENERIC_U3B5CGUXQ.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5CGUXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5CGUXQ.build.board=GENERIC_U3B5CGUXQ +GenU3.menu.pnum.GENERIC_U3B5CGUXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5CGUXQ.build.variant=STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ +GenU3.menu.pnum.GENERIC_U3B5CGUXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5CITxQ +GenU3.menu.pnum.GENERIC_U3B5CITXQ=Generic U3B5CITxQ +GenU3.menu.pnum.GENERIC_U3B5CITXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5CITXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5CITXQ.build.board=GENERIC_U3B5CITXQ +GenU3.menu.pnum.GENERIC_U3B5CITXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5CITXQ.build.variant=STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ +GenU3.menu.pnum.GENERIC_U3B5CITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5CIUxQ +GenU3.menu.pnum.GENERIC_U3B5CIUXQ=Generic U3B5CIUxQ +GenU3.menu.pnum.GENERIC_U3B5CIUXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5CIUXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5CIUXQ.build.board=GENERIC_U3B5CIUXQ +GenU3.menu.pnum.GENERIC_U3B5CIUXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5CIUXQ.build.variant=STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ +GenU3.menu.pnum.GENERIC_U3B5CIUXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5CITxQ +GenU3.menu.pnum.GENERIC_U3C5CITXQ=Generic U3C5CITxQ +GenU3.menu.pnum.GENERIC_U3C5CITXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5CITXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5CITXQ.build.board=GENERIC_U3C5CITXQ +GenU3.menu.pnum.GENERIC_U3C5CITXQ.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5CITXQ.build.variant=STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ +GenU3.menu.pnum.GENERIC_U3C5CITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + +# Generic U3C5CIUxQ +GenU3.menu.pnum.GENERIC_U3C5CIUXQ=Generic U3C5CIUxQ +GenU3.menu.pnum.GENERIC_U3C5CIUXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5CIUXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5CIUXQ.build.board=GENERIC_U3C5CIUXQ +GenU3.menu.pnum.GENERIC_U3C5CIUXQ.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5CIUXQ.build.variant=STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ +GenU3.menu.pnum.GENERIC_U3C5CIUXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/generic_clock.c b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/generic_clock.c new file mode 100644 index 0000000000..bc935c4366 --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/generic_clock.c @@ -0,0 +1,29 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5CGTXQ) || defined(ARDUINO_GENERIC_U3B5CGUXQ) ||\ + defined(ARDUINO_GENERIC_U3B5CITXQ) || defined(ARDUINO_GENERIC_U3B5CIUXQ) ||\ + defined(ARDUINO_GENERIC_U3C5CITXQ) || defined(ARDUINO_GENERIC_U3C5CIUXQ) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/variant_generic.cpp b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/variant_generic.cpp new file mode 100644 index 0000000000..b13ea86bde --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/variant_generic.cpp @@ -0,0 +1,69 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5CGTXQ) || defined(ARDUINO_GENERIC_U3B5CGUXQ) ||\ + defined(ARDUINO_GENERIC_U3B5CITXQ) || defined(ARDUINO_GENERIC_U3B5CIUXQ) ||\ + defined(ARDUINO_GENERIC_U3C5CITXQ) || defined(ARDUINO_GENERIC_U3C5CIUXQ) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_3, // D18 + PB_4, // D19 + PB_5, // D20 + PB_6, // D21 + PB_7, // D22 + PB_8, // D23 + PB_13, // D24 + PB_14, // D25 + PB_15, // D26 + PC_13, // D27 + PC_14, // D28 + PC_15, // D29 + PH_0, // D30 + PH_1, // D31 + PH_3 // D32 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17 // A9, PB1 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/variant_generic.h b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/variant_generic.h new file mode 100644 index 0000000000..d9ef6dbe58 --- /dev/null +++ b/variants/STM32U3xx/U3B5C(G-I)(T-U)xQ_U3C5CI(T-U)xQ/variant_generic.h @@ -0,0 +1,196 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB3 18 +#define PB4 19 +#define PB5 20 +#define PB6 21 +#define PB7 22 +#define PB8 23 +#define PB13 24 +#define PB14 25 +#define PB15 26 +#define PC13 27 +#define PC14 28 +#define PC15 29 +#define PH0 30 +#define PH1 31 +#define PH3 32 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 33 +#define NUM_ANALOG_INPUTS 10 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB13 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN7_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/CMakeLists.txt b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/PeripheralPins.c b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/PeripheralPins.c new file mode 100644 index 0000000000..c60a67bfc7 --- /dev/null +++ b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/PeripheralPins.c @@ -0,0 +1,581 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5JGYxQ.xml, STM32U3B5JIYxQ.xml + * STM32U3C5JIYxQ.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_9, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_9_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_12_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PC_1_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_2, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_10, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_10_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_0, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PE_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PC_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PE_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PD_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PE_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PC_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {PB_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI1)}, // OCTOSPI1_NCS + {PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/PinNamesVar.h b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/PinNamesVar.h new file mode 100644 index 0000000000..1a938255c7 --- /dev/null +++ b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/PinNamesVar.h @@ -0,0 +1,105 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_9_ALT1 = PB_9 | ALT1, +PB_10_ALT1 = PB_10 | ALT1, +PB_11_ALT1 = PB_11 | ALT1, +PB_12_ALT1 = PB_12 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PC_1_ALT1 = PC_1 | ALT1, +PC_6_ALT1 = PC_6 | ALT1, +PC_7_ALT1 = PC_7 | ALT1, +PC_8_ALT1 = PC_8 | ALT1, +PC_9_ALT1 = PC_9 | ALT1, +PC_10_ALT1 = PC_10 | ALT1, +PC_11_ALT1 = PC_11 | ALT1, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_1 = PB_2, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PA_7, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_1 = PB_10, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/boards_entry.txt b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/boards_entry.txt new file mode 100644 index 0000000000..dc96840903 --- /dev/null +++ b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/boards_entry.txt @@ -0,0 +1,32 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5JGYxQ +GenU3.menu.pnum.GENERIC_U3B5JGYXQ=Generic U3B5JGYxQ +GenU3.menu.pnum.GENERIC_U3B5JGYXQ.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5JGYXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5JGYXQ.build.board=GENERIC_U3B5JGYXQ +GenU3.menu.pnum.GENERIC_U3B5JGYXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5JGYXQ.build.variant=STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ +GenU3.menu.pnum.GENERIC_U3B5JGYXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5JIYxQ +GenU3.menu.pnum.GENERIC_U3B5JIYXQ=Generic U3B5JIYxQ +GenU3.menu.pnum.GENERIC_U3B5JIYXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5JIYXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5JIYXQ.build.board=GENERIC_U3B5JIYXQ +GenU3.menu.pnum.GENERIC_U3B5JIYXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5JIYXQ.build.variant=STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ +GenU3.menu.pnum.GENERIC_U3B5JIYXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5JIYxQ +GenU3.menu.pnum.GENERIC_U3C5JIYXQ=Generic U3C5JIYxQ +GenU3.menu.pnum.GENERIC_U3C5JIYXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5JIYXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5JIYXQ.build.board=GENERIC_U3C5JIYXQ +GenU3.menu.pnum.GENERIC_U3C5JIYXQ.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5JIYXQ.build.variant=STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ +GenU3.menu.pnum.GENERIC_U3C5JIYXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/generic_clock.c b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/generic_clock.c new file mode 100644 index 0000000000..3c81ae458d --- /dev/null +++ b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/generic_clock.c @@ -0,0 +1,28 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5JGYXQ) || defined(ARDUINO_GENERIC_U3B5JIYXQ) ||\ + defined(ARDUINO_GENERIC_U3C5JIYXQ) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/variant_generic.cpp b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/variant_generic.cpp new file mode 100644 index 0000000000..c6e99e9316 --- /dev/null +++ b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/variant_generic.cpp @@ -0,0 +1,95 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5JGYXQ) || defined(ARDUINO_GENERIC_U3B5JIYXQ) ||\ + defined(ARDUINO_GENERIC_U3C5JIYXQ) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18/A10 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_11, // D27 + PB_12, // D28 + PB_13, // D29 + PB_14, // D30 + PB_15, // D31 + PC_0, // D32/A11 + PC_1, // D33/A12 + PC_2, // D34/A13 + PC_3, // D35/A14 + PC_6, // D36 + PC_7, // D37 + PC_8, // D38 + PC_9, // D39 + PC_10, // D40 + PC_11, // D41 + PC_12, // D42 + PC_13, // D43 + PC_14, // D44 + PC_15, // D45 + PD_2, // D46 + PE_10, // D47 + PE_11, // D48 + PE_12, // D49 + PE_13, // D50 + PE_14, // D51 + PH_0, // D52 + PH_1, // D53 + PH_3 // D54 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 18, // A10, PB2 + 32, // A11, PC0 + 33, // A12, PC1 + 34, // A13, PC2 + 35 // A14, PC3 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/variant_generic.h b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/variant_generic.h new file mode 100644 index 0000000000..c135c95d6b --- /dev/null +++ b/variants/STM32U3xx/U3B5J(G-I)YxQ_U3C5JIYxQ/variant_generic.h @@ -0,0 +1,234 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 PIN_A10 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB11 27 +#define PB12 28 +#define PB13 29 +#define PB14 30 +#define PB15 31 +#define PC0 PIN_A11 +#define PC1 PIN_A12 +#define PC2 PIN_A13 +#define PC3 PIN_A14 +#define PC6 36 +#define PC7 37 +#define PC8 38 +#define PC9 39 +#define PC10 40 +#define PC11 41 +#define PC12 42 +#define PC13 43 +#define PC14 44 +#define PC15 45 +#define PD2 46 +#define PE10 47 +#define PE11 48 +#define PE12 49 +#define PE13 50 +#define PE14 51 +#define PH0 52 +#define PH1 53 +#define PH3 54 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB11_ALT1 (PB11 | ALT1) +#define PB12_ALT1 (PB12 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 55 +#define NUM_ANALOG_INPUTS 15 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PE12 +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB2 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN8_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/CMakeLists.txt b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/PeripheralPins.c b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/PeripheralPins.c new file mode 100644 index 0000000000..078f60d76e --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/PeripheralPins.c @@ -0,0 +1,696 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5QGIx.xml, STM32U3B5QIIx.xml + * STM32U3C5QIIx.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PD_11, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PD_12, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PD_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_13, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PG_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_13, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_12, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PG_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_14, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_9, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_9_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_12_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PC_1_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PG_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PG_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_2, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_10, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_10_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_0, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PG_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PG_13, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PC_5, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 1)}, // TIM1_CH4N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PE_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PE_3, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PE_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PE_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM1, 4, 1)}, // TIM1_CH4N + {PG_9, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PG_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PG_11, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PG_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PE_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PG_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PC_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PE_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PG_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PD_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PE_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PG_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PC_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PE_15, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PG_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PG_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PG_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PG_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PG_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO7 + {PC_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {PD_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {PG_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PG_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PG_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {PB_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI1)}, // OCTOSPI1_NCS + {PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PG_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {PG_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {PG_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {PG_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {PG_3, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {PG_4, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {PG_5, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {PG_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PG_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {PG_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {PG_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {PG_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {PG_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {PG_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {PG_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/PinNamesVar.h b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/PinNamesVar.h new file mode 100644 index 0000000000..997b8aa8a1 --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/PinNamesVar.h @@ -0,0 +1,128 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_9_ALT1 = PB_9 | ALT1, +PB_10_ALT1 = PB_10 | ALT1, +PB_11_ALT1 = PB_11 | ALT1, +PB_12_ALT1 = PB_12 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PC_1_ALT1 = PC_1 | ALT1, +PC_4_ALT1 = PC_4 | ALT1, +PC_5_ALT1 = PC_5 | ALT1, +PC_6_ALT1 = PC_6 | ALT1, +PC_7_ALT1 = PC_7 | ALT1, +PC_8_ALT1 = PC_8 | ALT1, +PC_9_ALT1 = PC_9 | ALT1, +PC_10_ALT1 = PC_10 | ALT1, +PC_11_ALT1 = PC_11 | ALT1, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PE_4, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_2 = PB_2, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PE_5, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_2 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PE_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_2 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PC_5, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_2 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PE_7, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_2 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PE_8, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_2 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PF_2, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_1 = PA_7, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_2 = PB_10, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/boards_entry.txt b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/boards_entry.txt new file mode 100644 index 0000000000..4652884cf0 --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/boards_entry.txt @@ -0,0 +1,32 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5QGIx +GenU3.menu.pnum.GENERIC_U3B5QGIX=Generic U3B5QGIx +GenU3.menu.pnum.GENERIC_U3B5QGIX.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5QGIX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5QGIX.build.board=GENERIC_U3B5QGIX +GenU3.menu.pnum.GENERIC_U3B5QGIX.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5QGIX.build.variant=STM32U3xx/U3B5Q(G-I)I_U3C5QII +GenU3.menu.pnum.GENERIC_U3B5QGIX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5QIIx +GenU3.menu.pnum.GENERIC_U3B5QIIX=Generic U3B5QIIx +GenU3.menu.pnum.GENERIC_U3B5QIIX.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5QIIX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5QIIX.build.board=GENERIC_U3B5QIIX +GenU3.menu.pnum.GENERIC_U3B5QIIX.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5QIIX.build.variant=STM32U3xx/U3B5Q(G-I)I_U3C5QII +GenU3.menu.pnum.GENERIC_U3B5QIIX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5QIIx +GenU3.menu.pnum.GENERIC_U3C5QIIX=Generic U3C5QIIx +GenU3.menu.pnum.GENERIC_U3C5QIIX.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5QIIX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5QIIX.build.board=GENERIC_U3C5QIIX +GenU3.menu.pnum.GENERIC_U3C5QIIX.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5QIIX.build.variant=STM32U3xx/U3B5Q(G-I)I_U3C5QII +GenU3.menu.pnum.GENERIC_U3C5QIIX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/generic_clock.c b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/generic_clock.c new file mode 100644 index 0000000000..3be0a2ef3d --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/generic_clock.c @@ -0,0 +1,28 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5QGIX) || defined(ARDUINO_GENERIC_U3B5QIIX) ||\ + defined(ARDUINO_GENERIC_U3C5QIIX) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/variant_generic.cpp b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/variant_generic.cpp new file mode 100644 index 0000000000..46802bf8d2 --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/variant_generic.cpp @@ -0,0 +1,155 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5QGIX) || defined(ARDUINO_GENERIC_U3B5QIIX) ||\ + defined(ARDUINO_GENERIC_U3C5QIIX) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18/A10 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_11, // D27 + PB_12, // D28 + PB_13, // D29 + PB_14, // D30 + PB_15, // D31 + PC_0, // D32/A11 + PC_1, // D33/A12 + PC_2, // D34/A13 + PC_3, // D35/A14 + PC_4, // D36/A15 + PC_5, // D37/A16 + PC_6, // D38 + PC_7, // D39 + PC_8, // D40 + PC_9, // D41 + PC_10, // D42 + PC_11, // D43 + PC_12, // D44 + PC_13, // D45 + PC_14, // D46 + PC_15, // D47 + PD_0, // D48 + PD_1, // D49 + PD_2, // D50 + PD_3, // D51 + PD_4, // D52 + PD_5, // D53 + PD_6, // D54 + PD_7, // D55 + PD_8, // D56 + PD_9, // D57 + PD_10, // D58 + PD_11, // D59/A17 + PD_12, // D60/A18 + PD_13, // D61/A19 + PD_14, // D62 + PD_15, // D63 + PE_0, // D64 + PE_1, // D65 + PE_2, // D66 + PE_3, // D67 + PE_4, // D68 + PE_5, // D69 + PE_6, // D70 + PE_7, // D71 + PE_8, // D72 + PE_9, // D73 + PE_10, // D74 + PE_11, // D75 + PE_12, // D76 + PE_13, // D77 + PE_14, // D78 + PE_15, // D79 + PF_0, // D80 + PF_1, // D81 + PF_2, // D82 + PF_3, // D83 + PF_4, // D84 + PF_5, // D85 + PF_11, // D86 + PF_12, // D87 + PF_13, // D88 + PF_14, // D89 + PF_15, // D90 + PG_0, // D91 + PG_1, // D92 + PG_2, // D93 + PG_3, // D94 + PG_4, // D95 + PG_5, // D96 + PG_6, // D97 + PG_7, // D98 + PG_8, // D99 + PG_9, // D100 + PG_10, // D101 + PG_11, // D102 + PG_12, // D103 + PG_13, // D104 + PG_14, // D105 + PG_15, // D106 + PH_0, // D107 + PH_1, // D108 + PH_3 // D109 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 18, // A10, PB2 + 32, // A11, PC0 + 33, // A12, PC1 + 34, // A13, PC2 + 35, // A14, PC3 + 36, // A15, PC4 + 37, // A16, PC5 + 59, // A17, PD11 + 60, // A18, PD12 + 61 // A19, PD13 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/variant_generic.h b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/variant_generic.h new file mode 100644 index 0000000000..f02e0a35b7 --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)I_U3C5QII/variant_generic.h @@ -0,0 +1,298 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 PIN_A10 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB11 27 +#define PB12 28 +#define PB13 29 +#define PB14 30 +#define PB15 31 +#define PC0 PIN_A11 +#define PC1 PIN_A12 +#define PC2 PIN_A13 +#define PC3 PIN_A14 +#define PC4 PIN_A15 +#define PC5 PIN_A16 +#define PC6 38 +#define PC7 39 +#define PC8 40 +#define PC9 41 +#define PC10 42 +#define PC11 43 +#define PC12 44 +#define PC13 45 +#define PC14 46 +#define PC15 47 +#define PD0 48 +#define PD1 49 +#define PD2 50 +#define PD3 51 +#define PD4 52 +#define PD5 53 +#define PD6 54 +#define PD7 55 +#define PD8 56 +#define PD9 57 +#define PD10 58 +#define PD11 PIN_A17 +#define PD12 PIN_A18 +#define PD13 PIN_A19 +#define PD14 62 +#define PD15 63 +#define PE0 64 +#define PE1 65 +#define PE2 66 +#define PE3 67 +#define PE4 68 +#define PE5 69 +#define PE6 70 +#define PE7 71 +#define PE8 72 +#define PE9 73 +#define PE10 74 +#define PE11 75 +#define PE12 76 +#define PE13 77 +#define PE14 78 +#define PE15 79 +#define PF0 80 +#define PF1 81 +#define PF2 82 +#define PF3 83 +#define PF4 84 +#define PF5 85 +#define PF11 86 +#define PF12 87 +#define PF13 88 +#define PF14 89 +#define PF15 90 +#define PG0 91 +#define PG1 92 +#define PG2 93 +#define PG3 94 +#define PG4 95 +#define PG5 96 +#define PG6 97 +#define PG7 98 +#define PG8 99 +#define PG9 100 +#define PG10 101 +#define PG11 102 +#define PG12 103 +#define PG13 104 +#define PG14 105 +#define PG15 106 +#define PH0 107 +#define PH1 108 +#define PH3 109 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB11_ALT1 (PB11 | ALT1) +#define PB12_ALT1 (PB12 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC4_ALT1 (PC4 | ALT1) +#define PC5_ALT1 (PC5 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 110 +#define NUM_ANALOG_INPUTS 20 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PE12 +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB2 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN1_2 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN2_2 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN3_2 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN5_2 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN6_2 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN7_2 +#define PWR_WAKEUP_PIN8_1 +#define PWR_WAKEUP_PIN8_2 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/CMakeLists.txt b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/PeripheralPins.c b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/PeripheralPins.c new file mode 100644 index 0000000000..c0e46cde8e --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/PeripheralPins.c @@ -0,0 +1,685 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5QGIxQ.xml, STM32U3B5QIIxQ.xml + * STM32U3C5QIIxQ.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PD_11, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PD_12, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PD_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_13, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PG_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_12, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PG_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_9, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_9_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_12_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PC_1_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PG_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_2, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_10, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_10_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_0, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PG_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PC_5, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 1)}, // TIM1_CH4N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PE_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PE_3, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PE_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PE_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM1, 4, 1)}, // TIM1_CH4N + {PG_9, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PG_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PE_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PG_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PC_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PE_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PG_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PD_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PE_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PG_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PC_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PE_15, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PG_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PG_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PG_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PG_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO7 + {PC_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {PD_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {PG_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PG_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {PB_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI1)}, // OCTOSPI1_NCS + {PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PG_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {PG_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {PG_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {PG_3, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {PG_4, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {PG_5, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {PG_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PG_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {PG_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {PG_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {PG_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {PG_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {PG_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/PinNamesVar.h b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/PinNamesVar.h new file mode 100644 index 0000000000..997b8aa8a1 --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/PinNamesVar.h @@ -0,0 +1,128 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_9_ALT1 = PB_9 | ALT1, +PB_10_ALT1 = PB_10 | ALT1, +PB_11_ALT1 = PB_11 | ALT1, +PB_12_ALT1 = PB_12 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PC_1_ALT1 = PC_1 | ALT1, +PC_4_ALT1 = PC_4 | ALT1, +PC_5_ALT1 = PC_5 | ALT1, +PC_6_ALT1 = PC_6 | ALT1, +PC_7_ALT1 = PC_7 | ALT1, +PC_8_ALT1 = PC_8 | ALT1, +PC_9_ALT1 = PC_9 | ALT1, +PC_10_ALT1 = PC_10 | ALT1, +PC_11_ALT1 = PC_11 | ALT1, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PE_4, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_2 = PB_2, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PE_5, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_2 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PE_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_2 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PC_5, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_2 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PE_7, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_2 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PE_8, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_2 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PF_2, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_1 = PA_7, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_2 = PB_10, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/boards_entry.txt b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/boards_entry.txt new file mode 100644 index 0000000000..f875f445d9 --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/boards_entry.txt @@ -0,0 +1,32 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5QGIxQ +GenU3.menu.pnum.GENERIC_U3B5QGIXQ=Generic U3B5QGIxQ +GenU3.menu.pnum.GENERIC_U3B5QGIXQ.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5QGIXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5QGIXQ.build.board=GENERIC_U3B5QGIXQ +GenU3.menu.pnum.GENERIC_U3B5QGIXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5QGIXQ.build.variant=STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ +GenU3.menu.pnum.GENERIC_U3B5QGIXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5QIIxQ +GenU3.menu.pnum.GENERIC_U3B5QIIXQ=Generic U3B5QIIxQ +GenU3.menu.pnum.GENERIC_U3B5QIIXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5QIIXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5QIIXQ.build.board=GENERIC_U3B5QIIXQ +GenU3.menu.pnum.GENERIC_U3B5QIIXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5QIIXQ.build.variant=STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ +GenU3.menu.pnum.GENERIC_U3B5QIIXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5QIIxQ +GenU3.menu.pnum.GENERIC_U3C5QIIXQ=Generic U3C5QIIxQ +GenU3.menu.pnum.GENERIC_U3C5QIIXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5QIIXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5QIIXQ.build.board=GENERIC_U3C5QIIXQ +GenU3.menu.pnum.GENERIC_U3C5QIIXQ.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5QIIXQ.build.variant=STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ +GenU3.menu.pnum.GENERIC_U3C5QIIXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/generic_clock.c b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/generic_clock.c new file mode 100644 index 0000000000..00b152c96b --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/generic_clock.c @@ -0,0 +1,28 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5QGIXQ) || defined(ARDUINO_GENERIC_U3B5QIIXQ) ||\ + defined(ARDUINO_GENERIC_U3C5QIIXQ) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/variant_generic.cpp b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/variant_generic.cpp new file mode 100644 index 0000000000..c18bd6e54a --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/variant_generic.cpp @@ -0,0 +1,151 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5QGIXQ) || defined(ARDUINO_GENERIC_U3B5QIIXQ) ||\ + defined(ARDUINO_GENERIC_U3C5QIIXQ) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18/A10 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_11, // D27 + PB_12, // D28 + PB_13, // D29 + PB_14, // D30 + PB_15, // D31 + PC_0, // D32/A11 + PC_1, // D33/A12 + PC_2, // D34/A13 + PC_3, // D35/A14 + PC_4, // D36/A15 + PC_5, // D37/A16 + PC_6, // D38 + PC_7, // D39 + PC_8, // D40 + PC_9, // D41 + PC_10, // D42 + PC_11, // D43 + PC_12, // D44 + PC_13, // D45 + PC_14, // D46 + PC_15, // D47 + PD_0, // D48 + PD_1, // D49 + PD_2, // D50 + PD_3, // D51 + PD_4, // D52 + PD_5, // D53 + PD_6, // D54 + PD_7, // D55 + PD_8, // D56 + PD_9, // D57 + PD_10, // D58 + PD_11, // D59/A17 + PD_12, // D60/A18 + PD_13, // D61/A19 + PD_14, // D62 + PD_15, // D63 + PE_0, // D64 + PE_1, // D65 + PE_2, // D66 + PE_3, // D67 + PE_4, // D68 + PE_5, // D69 + PE_6, // D70 + PE_7, // D71 + PE_8, // D72 + PE_9, // D73 + PE_10, // D74 + PE_11, // D75 + PE_12, // D76 + PE_13, // D77 + PE_14, // D78 + PE_15, // D79 + PF_0, // D80 + PF_1, // D81 + PF_2, // D82 + PF_3, // D83 + PF_4, // D84 + PF_5, // D85 + PF_11, // D86 + PF_12, // D87 + PF_13, // D88 + PF_14, // D89 + PF_15, // D90 + PG_0, // D91 + PG_1, // D92 + PG_2, // D93 + PG_3, // D94 + PG_4, // D95 + PG_5, // D96 + PG_6, // D97 + PG_7, // D98 + PG_8, // D99 + PG_9, // D100 + PG_10, // D101 + PG_12, // D102 + PH_0, // D103 + PH_1, // D104 + PH_3 // D105 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 18, // A10, PB2 + 32, // A11, PC0 + 33, // A12, PC1 + 34, // A13, PC2 + 35, // A14, PC3 + 36, // A15, PC4 + 37, // A16, PC5 + 59, // A17, PD11 + 60, // A18, PD12 + 61 // A19, PD13 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/variant_generic.h b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/variant_generic.h new file mode 100644 index 0000000000..4c0a976c32 --- /dev/null +++ b/variants/STM32U3xx/U3B5Q(G-I)IxQ_U3C5QIIxQ/variant_generic.h @@ -0,0 +1,294 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 PIN_A10 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB11 27 +#define PB12 28 +#define PB13 29 +#define PB14 30 +#define PB15 31 +#define PC0 PIN_A11 +#define PC1 PIN_A12 +#define PC2 PIN_A13 +#define PC3 PIN_A14 +#define PC4 PIN_A15 +#define PC5 PIN_A16 +#define PC6 38 +#define PC7 39 +#define PC8 40 +#define PC9 41 +#define PC10 42 +#define PC11 43 +#define PC12 44 +#define PC13 45 +#define PC14 46 +#define PC15 47 +#define PD0 48 +#define PD1 49 +#define PD2 50 +#define PD3 51 +#define PD4 52 +#define PD5 53 +#define PD6 54 +#define PD7 55 +#define PD8 56 +#define PD9 57 +#define PD10 58 +#define PD11 PIN_A17 +#define PD12 PIN_A18 +#define PD13 PIN_A19 +#define PD14 62 +#define PD15 63 +#define PE0 64 +#define PE1 65 +#define PE2 66 +#define PE3 67 +#define PE4 68 +#define PE5 69 +#define PE6 70 +#define PE7 71 +#define PE8 72 +#define PE9 73 +#define PE10 74 +#define PE11 75 +#define PE12 76 +#define PE13 77 +#define PE14 78 +#define PE15 79 +#define PF0 80 +#define PF1 81 +#define PF2 82 +#define PF3 83 +#define PF4 84 +#define PF5 85 +#define PF11 86 +#define PF12 87 +#define PF13 88 +#define PF14 89 +#define PF15 90 +#define PG0 91 +#define PG1 92 +#define PG2 93 +#define PG3 94 +#define PG4 95 +#define PG5 96 +#define PG6 97 +#define PG7 98 +#define PG8 99 +#define PG9 100 +#define PG10 101 +#define PG12 102 +#define PH0 103 +#define PH1 104 +#define PH3 105 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB11_ALT1 (PB11 | ALT1) +#define PB12_ALT1 (PB12 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC4_ALT1 (PC4 | ALT1) +#define PC5_ALT1 (PC5 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 106 +#define NUM_ANALOG_INPUTS 20 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PE12 +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB2 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN1_2 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN2_2 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN3_2 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN5_2 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN6_2 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN7_2 +#define PWR_WAKEUP_PIN8_1 +#define PWR_WAKEUP_PIN8_2 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/CMakeLists.txt b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/PeripheralPins.c b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/PeripheralPins.c new file mode 100644 index 0000000000..0059cb81d3 --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/PeripheralPins.c @@ -0,0 +1,566 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5RGTx.xml, STM32U3B5RITx.xml + * STM32U3C5RITx.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_9, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_9_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_12_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PC_1_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_2, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_10, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_10_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_0, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PC_5, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 1)}, // TIM1_CH4N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PC_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PD_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PC_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO7 + {PC_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/PinNamesVar.h b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/PinNamesVar.h new file mode 100644 index 0000000000..bf709e18e4 --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/PinNamesVar.h @@ -0,0 +1,109 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_9_ALT1 = PB_9 | ALT1, +PB_10_ALT1 = PB_10 | ALT1, +PB_12_ALT1 = PB_12 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PC_1_ALT1 = PC_1 | ALT1, +PC_4_ALT1 = PC_4 | ALT1, +PC_5_ALT1 = PC_5 | ALT1, +PC_6_ALT1 = PC_6 | ALT1, +PC_7_ALT1 = PC_7 | ALT1, +PC_8_ALT1 = PC_8 | ALT1, +PC_9_ALT1 = PC_9 | ALT1, +PC_10_ALT1 = PC_10 | ALT1, +PC_11_ALT1 = PC_11 | ALT1, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_1 = PB_2, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PC_5, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_2 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PA_7, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_1 = PB_10, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/boards_entry.txt b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/boards_entry.txt new file mode 100644 index 0000000000..d011fc78c8 --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/boards_entry.txt @@ -0,0 +1,32 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5RGTx +GenU3.menu.pnum.GENERIC_U3B5RGTX=Generic U3B5RGTx +GenU3.menu.pnum.GENERIC_U3B5RGTX.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5RGTX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5RGTX.build.board=GENERIC_U3B5RGTX +GenU3.menu.pnum.GENERIC_U3B5RGTX.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5RGTX.build.variant=STM32U3xx/U3B5R(G-I)T_U3C5RIT +GenU3.menu.pnum.GENERIC_U3B5RGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5RITx +GenU3.menu.pnum.GENERIC_U3B5RITX=Generic U3B5RITx +GenU3.menu.pnum.GENERIC_U3B5RITX.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5RITX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5RITX.build.board=GENERIC_U3B5RITX +GenU3.menu.pnum.GENERIC_U3B5RITX.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5RITX.build.variant=STM32U3xx/U3B5R(G-I)T_U3C5RIT +GenU3.menu.pnum.GENERIC_U3B5RITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5RITx +GenU3.menu.pnum.GENERIC_U3C5RITX=Generic U3C5RITx +GenU3.menu.pnum.GENERIC_U3C5RITX.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5RITX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5RITX.build.board=GENERIC_U3C5RITX +GenU3.menu.pnum.GENERIC_U3C5RITX.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5RITX.build.variant=STM32U3xx/U3B5R(G-I)T_U3C5RIT +GenU3.menu.pnum.GENERIC_U3C5RITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/generic_clock.c b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/generic_clock.c new file mode 100644 index 0000000000..330d977272 --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/generic_clock.c @@ -0,0 +1,28 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5RGTX) || defined(ARDUINO_GENERIC_U3B5RITX) ||\ + defined(ARDUINO_GENERIC_U3C5RITX) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/variant_generic.cpp b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/variant_generic.cpp new file mode 100644 index 0000000000..364406db63 --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/variant_generic.cpp @@ -0,0 +1,93 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5RGTX) || defined(ARDUINO_GENERIC_U3B5RITX) ||\ + defined(ARDUINO_GENERIC_U3C5RITX) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18/A10 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_12, // D27 + PB_13, // D28 + PB_14, // D29 + PB_15, // D30 + PC_0, // D31/A11 + PC_1, // D32/A12 + PC_2, // D33/A13 + PC_3, // D34/A14 + PC_4, // D35/A15 + PC_5, // D36/A16 + PC_6, // D37 + PC_7, // D38 + PC_8, // D39 + PC_9, // D40 + PC_10, // D41 + PC_11, // D42 + PC_12, // D43 + PC_13, // D44 + PC_14, // D45 + PC_15, // D46 + PD_2, // D47 + PH_0, // D48 + PH_1, // D49 + PH_3 // D50 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 18, // A10, PB2 + 31, // A11, PC0 + 32, // A12, PC1 + 33, // A13, PC2 + 34, // A14, PC3 + 35, // A15, PC4 + 36 // A16, PC5 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/variant_generic.h b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/variant_generic.h new file mode 100644 index 0000000000..46c90020f4 --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)T_U3C5RIT/variant_generic.h @@ -0,0 +1,232 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 PIN_A10 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB12 27 +#define PB13 28 +#define PB14 29 +#define PB15 30 +#define PC0 PIN_A11 +#define PC1 PIN_A12 +#define PC2 PIN_A13 +#define PC3 PIN_A14 +#define PC4 PIN_A15 +#define PC5 PIN_A16 +#define PC6 37 +#define PC7 38 +#define PC8 39 +#define PC9 40 +#define PC10 41 +#define PC11 42 +#define PC12 43 +#define PC13 44 +#define PC14 45 +#define PC15 46 +#define PD2 47 +#define PH0 48 +#define PH1 49 +#define PH3 50 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB12_ALT1 (PB12 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC4_ALT1 (PC4 | ALT1) +#define PC5_ALT1 (PC5 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 51 +#define NUM_ANALOG_INPUTS 17 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB2 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN5_2 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN8_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/CMakeLists.txt b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/PeripheralPins.c b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/PeripheralPins.c new file mode 100644 index 0000000000..a459786e4b --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/PeripheralPins.c @@ -0,0 +1,538 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5RGTxQ.xml, STM32U3B5RITxQ.xml + * STM32U3C5RITxQ.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PC_1_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_2, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_10, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_10_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_0, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PC_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PD_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PC_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/PinNamesVar.h b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/PinNamesVar.h new file mode 100644 index 0000000000..fa1a443d1b --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/PinNamesVar.h @@ -0,0 +1,102 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_10_ALT1 = PB_10 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PC_1_ALT1 = PC_1 | ALT1, +PC_6_ALT1 = PC_6 | ALT1, +PC_7_ALT1 = PC_7 | ALT1, +PC_8_ALT1 = PC_8 | ALT1, +PC_9_ALT1 = PC_9 | ALT1, +PC_10_ALT1 = PC_10 | ALT1, +PC_11_ALT1 = PC_11 | ALT1, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_1 = PB_2, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PA_7, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_1 = PB_10, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/boards_entry.txt b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/boards_entry.txt new file mode 100644 index 0000000000..80c848fc63 --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/boards_entry.txt @@ -0,0 +1,32 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5RGTxQ +GenU3.menu.pnum.GENERIC_U3B5RGTXQ=Generic U3B5RGTxQ +GenU3.menu.pnum.GENERIC_U3B5RGTXQ.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5RGTXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5RGTXQ.build.board=GENERIC_U3B5RGTXQ +GenU3.menu.pnum.GENERIC_U3B5RGTXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5RGTXQ.build.variant=STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ +GenU3.menu.pnum.GENERIC_U3B5RGTXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5RITxQ +GenU3.menu.pnum.GENERIC_U3B5RITXQ=Generic U3B5RITxQ +GenU3.menu.pnum.GENERIC_U3B5RITXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5RITXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5RITXQ.build.board=GENERIC_U3B5RITXQ +GenU3.menu.pnum.GENERIC_U3B5RITXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5RITXQ.build.variant=STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ +GenU3.menu.pnum.GENERIC_U3B5RITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5RITxQ +GenU3.menu.pnum.GENERIC_U3C5RITXQ=Generic U3C5RITxQ +GenU3.menu.pnum.GENERIC_U3C5RITXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5RITXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5RITXQ.build.board=GENERIC_U3C5RITXQ +GenU3.menu.pnum.GENERIC_U3C5RITXQ.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5RITXQ.build.variant=STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ +GenU3.menu.pnum.GENERIC_U3C5RITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/generic_clock.c b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/generic_clock.c new file mode 100644 index 0000000000..12251a327a --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/generic_clock.c @@ -0,0 +1,28 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5RGTXQ) || defined(ARDUINO_GENERIC_U3B5RITXQ) ||\ + defined(ARDUINO_GENERIC_U3C5RITXQ) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/variant_generic.cpp b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/variant_generic.cpp new file mode 100644 index 0000000000..5ce2b2dd4f --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/variant_generic.cpp @@ -0,0 +1,87 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5RGTXQ) || defined(ARDUINO_GENERIC_U3B5RITXQ) ||\ + defined(ARDUINO_GENERIC_U3C5RITXQ) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18/A10 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_10, // D25 + PB_13, // D26 + PB_14, // D27 + PB_15, // D28 + PC_0, // D29/A11 + PC_1, // D30/A12 + PC_2, // D31/A13 + PC_3, // D32/A14 + PC_6, // D33 + PC_7, // D34 + PC_8, // D35 + PC_9, // D36 + PC_10, // D37 + PC_11, // D38 + PC_12, // D39 + PC_13, // D40 + PC_14, // D41 + PC_15, // D42 + PD_2, // D43 + PH_0, // D44 + PH_1, // D45 + PH_3 // D46 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 18, // A10, PB2 + 29, // A11, PC0 + 30, // A12, PC1 + 31, // A13, PC2 + 32 // A14, PC3 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/variant_generic.h b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/variant_generic.h new file mode 100644 index 0000000000..ff2789574d --- /dev/null +++ b/variants/STM32U3xx/U3B5R(G-I)TxQ_U3C5RITxQ/variant_generic.h @@ -0,0 +1,226 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 PIN_A10 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB10 25 +#define PB13 26 +#define PB14 27 +#define PB15 28 +#define PC0 PIN_A11 +#define PC1 PIN_A12 +#define PC2 PIN_A13 +#define PC3 PIN_A14 +#define PC6 33 +#define PC7 34 +#define PC8 35 +#define PC9 36 +#define PC10 37 +#define PC11 38 +#define PC12 39 +#define PC13 40 +#define PC14 41 +#define PC15 42 +#define PD2 43 +#define PH0 44 +#define PH1 45 +#define PH3 46 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 47 +#define NUM_ANALOG_INPUTS 15 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB2 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// SDMMC signals not available +#define SDMMC_CDIR_NA + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN8_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/CMakeLists.txt b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/PeripheralPins.c b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/PeripheralPins.c new file mode 100644 index 0000000000..5a5c9ed35d --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/PeripheralPins.c @@ -0,0 +1,632 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5VGTx.xml, STM32U3B5VITx.xml + * STM32U3C5VITx.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PD_11, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PD_12, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PD_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_13, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_12, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_9, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_9_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_12_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PC_1_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_2, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_10, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_10_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_0, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PC_5, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 1)}, // TIM1_CH4N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PE_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PE_3, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PE_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PE_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM1, 4, 1)}, // TIM1_CH4N + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PE_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PC_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PE_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PD_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PE_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PC_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PE_15, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO7 + {PC_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {PD_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI1)}, // OCTOSPI1_NCS + {PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/PinNamesVar.h b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/PinNamesVar.h new file mode 100644 index 0000000000..068a163a08 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/PinNamesVar.h @@ -0,0 +1,124 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_9_ALT1 = PB_9 | ALT1, +PB_10_ALT1 = PB_10 | ALT1, +PB_12_ALT1 = PB_12 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PC_1_ALT1 = PC_1 | ALT1, +PC_4_ALT1 = PC_4 | ALT1, +PC_5_ALT1 = PC_5 | ALT1, +PC_6_ALT1 = PC_6 | ALT1, +PC_7_ALT1 = PC_7 | ALT1, +PC_8_ALT1 = PC_8 | ALT1, +PC_9_ALT1 = PC_9 | ALT1, +PC_10_ALT1 = PC_10 | ALT1, +PC_11_ALT1 = PC_11 | ALT1, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PE_4, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_2 = PB_2, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PE_5, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_2 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PE_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_2 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PC_5, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_2 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PE_7, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_2 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PE_8, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_2 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PA_7, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_1 = PB_10, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/boards_entry.txt b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/boards_entry.txt new file mode 100644 index 0000000000..c55f229cc3 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/boards_entry.txt @@ -0,0 +1,32 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5VGTx +GenU3.menu.pnum.GENERIC_U3B5VGTX=Generic U3B5VGTx +GenU3.menu.pnum.GENERIC_U3B5VGTX.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5VGTX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5VGTX.build.board=GENERIC_U3B5VGTX +GenU3.menu.pnum.GENERIC_U3B5VGTX.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5VGTX.build.variant=STM32U3xx/U3B5V(G-I)T_U3C5VIT +GenU3.menu.pnum.GENERIC_U3B5VGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5VITx +GenU3.menu.pnum.GENERIC_U3B5VITX=Generic U3B5VITx +GenU3.menu.pnum.GENERIC_U3B5VITX.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5VITX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5VITX.build.board=GENERIC_U3B5VITX +GenU3.menu.pnum.GENERIC_U3B5VITX.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5VITX.build.variant=STM32U3xx/U3B5V(G-I)T_U3C5VIT +GenU3.menu.pnum.GENERIC_U3B5VITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5VITx +GenU3.menu.pnum.GENERIC_U3C5VITX=Generic U3C5VITx +GenU3.menu.pnum.GENERIC_U3C5VITX.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5VITX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5VITX.build.board=GENERIC_U3C5VITX +GenU3.menu.pnum.GENERIC_U3C5VITX.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5VITX.build.variant=STM32U3xx/U3B5V(G-I)T_U3C5VIT +GenU3.menu.pnum.GENERIC_U3C5VITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/generic_clock.c b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/generic_clock.c new file mode 100644 index 0000000000..fc5a3b6a7c --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/generic_clock.c @@ -0,0 +1,28 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5VGTX) || defined(ARDUINO_GENERIC_U3B5VITX) ||\ + defined(ARDUINO_GENERIC_U3C5VITX) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/variant_generic.cpp b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/variant_generic.cpp new file mode 100644 index 0000000000..847a2d54b6 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/variant_generic.cpp @@ -0,0 +1,127 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5VGTX) || defined(ARDUINO_GENERIC_U3B5VITX) ||\ + defined(ARDUINO_GENERIC_U3C5VITX) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18/A10 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_12, // D27 + PB_13, // D28 + PB_14, // D29 + PB_15, // D30 + PC_0, // D31/A11 + PC_1, // D32/A12 + PC_2, // D33/A13 + PC_3, // D34/A14 + PC_4, // D35/A15 + PC_5, // D36/A16 + PC_6, // D37 + PC_7, // D38 + PC_8, // D39 + PC_9, // D40 + PC_10, // D41 + PC_11, // D42 + PC_12, // D43 + PC_13, // D44 + PC_14, // D45 + PC_15, // D46 + PD_0, // D47 + PD_1, // D48 + PD_2, // D49 + PD_3, // D50 + PD_4, // D51 + PD_5, // D52 + PD_6, // D53 + PD_7, // D54 + PD_8, // D55 + PD_9, // D56 + PD_10, // D57 + PD_11, // D58/A17 + PD_12, // D59/A18 + PD_13, // D60/A19 + PD_14, // D61 + PD_15, // D62 + PE_0, // D63 + PE_1, // D64 + PE_2, // D65 + PE_3, // D66 + PE_4, // D67 + PE_5, // D68 + PE_6, // D69 + PE_7, // D70 + PE_8, // D71 + PE_9, // D72 + PE_10, // D73 + PE_11, // D74 + PE_12, // D75 + PE_13, // D76 + PE_14, // D77 + PE_15, // D78 + PH_0, // D79 + PH_1, // D80 + PH_3 // D81 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 18, // A10, PB2 + 31, // A11, PC0 + 32, // A12, PC1 + 33, // A13, PC2 + 34, // A14, PC3 + 35, // A15, PC4 + 36, // A16, PC5 + 58, // A17, PD11 + 59, // A18, PD12 + 60 // A19, PD13 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/variant_generic.h b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/variant_generic.h new file mode 100644 index 0000000000..ce82a8dd2f --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)T_U3C5VIT/variant_generic.h @@ -0,0 +1,268 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 PIN_A10 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB12 27 +#define PB13 28 +#define PB14 29 +#define PB15 30 +#define PC0 PIN_A11 +#define PC1 PIN_A12 +#define PC2 PIN_A13 +#define PC3 PIN_A14 +#define PC4 PIN_A15 +#define PC5 PIN_A16 +#define PC6 37 +#define PC7 38 +#define PC8 39 +#define PC9 40 +#define PC10 41 +#define PC11 42 +#define PC12 43 +#define PC13 44 +#define PC14 45 +#define PC15 46 +#define PD0 47 +#define PD1 48 +#define PD2 49 +#define PD3 50 +#define PD4 51 +#define PD5 52 +#define PD6 53 +#define PD7 54 +#define PD8 55 +#define PD9 56 +#define PD10 57 +#define PD11 PIN_A17 +#define PD12 PIN_A18 +#define PD13 PIN_A19 +#define PD14 61 +#define PD15 62 +#define PE0 63 +#define PE1 64 +#define PE2 65 +#define PE3 66 +#define PE4 67 +#define PE5 68 +#define PE6 69 +#define PE7 70 +#define PE8 71 +#define PE9 72 +#define PE10 73 +#define PE11 74 +#define PE12 75 +#define PE13 76 +#define PE14 77 +#define PE15 78 +#define PH0 79 +#define PH1 80 +#define PH3 81 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB12_ALT1 (PB12 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC4_ALT1 (PC4 | ALT1) +#define PC5_ALT1 (PC5 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 82 +#define NUM_ANALOG_INPUTS 20 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PE12 +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB2 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN1_2 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN2_2 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN3_2 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN5_2 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN6_2 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN7_2 +#define PWR_WAKEUP_PIN8_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/CMakeLists.txt b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/PeripheralPins.c b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/PeripheralPins.c new file mode 100644 index 0000000000..9dff86584f --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/PeripheralPins.c @@ -0,0 +1,624 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5VGTxQ.xml, STM32U3B5VITxQ.xml + * STM32U3C5VITxQ.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PD_11, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PD_12, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PD_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_13, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_12, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_9, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_9_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PC_1_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_2, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_10, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_10_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_0, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PE_3, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PE_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PE_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM1, 4, 1)}, // TIM1_CH4N + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PE_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PC_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PE_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PD_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PE_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PC_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PE_15, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO7 + {PD_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {PB_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI1)}, // OCTOSPI1_NCS + {PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/PinNamesVar.h b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/PinNamesVar.h new file mode 100644 index 0000000000..2de6a15f63 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/PinNamesVar.h @@ -0,0 +1,119 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_9_ALT1 = PB_9 | ALT1, +PB_10_ALT1 = PB_10 | ALT1, +PB_11_ALT1 = PB_11 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PC_1_ALT1 = PC_1 | ALT1, +PC_6_ALT1 = PC_6 | ALT1, +PC_7_ALT1 = PC_7 | ALT1, +PC_8_ALT1 = PC_8 | ALT1, +PC_9_ALT1 = PC_9 | ALT1, +PC_10_ALT1 = PC_10 | ALT1, +PC_11_ALT1 = PC_11 | ALT1, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PE_4, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_2 = PB_2, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PE_5, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_2 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PE_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_2 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PE_7, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_2 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PE_8, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_2 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PA_7, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_1 = PB_10, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/boards_entry.txt b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/boards_entry.txt new file mode 100644 index 0000000000..9174aff5ff --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/boards_entry.txt @@ -0,0 +1,32 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5VGTxQ +GenU3.menu.pnum.GENERIC_U3B5VGTXQ=Generic U3B5VGTxQ +GenU3.menu.pnum.GENERIC_U3B5VGTXQ.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5VGTXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5VGTXQ.build.board=GENERIC_U3B5VGTXQ +GenU3.menu.pnum.GENERIC_U3B5VGTXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5VGTXQ.build.variant=STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ +GenU3.menu.pnum.GENERIC_U3B5VGTXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5VITxQ +GenU3.menu.pnum.GENERIC_U3B5VITXQ=Generic U3B5VITxQ +GenU3.menu.pnum.GENERIC_U3B5VITXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5VITXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5VITXQ.build.board=GENERIC_U3B5VITXQ +GenU3.menu.pnum.GENERIC_U3B5VITXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5VITXQ.build.variant=STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ +GenU3.menu.pnum.GENERIC_U3B5VITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5VITxQ +GenU3.menu.pnum.GENERIC_U3C5VITXQ=Generic U3C5VITxQ +GenU3.menu.pnum.GENERIC_U3C5VITXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5VITXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5VITXQ.build.board=GENERIC_U3C5VITXQ +GenU3.menu.pnum.GENERIC_U3C5VITXQ.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5VITXQ.build.variant=STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ +GenU3.menu.pnum.GENERIC_U3C5VITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/generic_clock.c b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/generic_clock.c new file mode 100644 index 0000000000..b090bab71d --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/generic_clock.c @@ -0,0 +1,28 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5VGTXQ) || defined(ARDUINO_GENERIC_U3B5VITXQ) ||\ + defined(ARDUINO_GENERIC_U3C5VITXQ) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/variant_generic.cpp b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/variant_generic.cpp new file mode 100644 index 0000000000..a278f032e3 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/variant_generic.cpp @@ -0,0 +1,122 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5VGTXQ) || defined(ARDUINO_GENERIC_U3B5VITXQ) ||\ + defined(ARDUINO_GENERIC_U3C5VITXQ) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18/A10 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_11, // D27 + PB_13, // D28 + PB_14, // D29 + PB_15, // D30 + PC_0, // D31/A11 + PC_1, // D32/A12 + PC_2, // D33/A13 + PC_3, // D34/A14 + PC_6, // D35 + PC_7, // D36 + PC_8, // D37 + PC_9, // D38 + PC_10, // D39 + PC_11, // D40 + PC_12, // D41 + PC_13, // D42 + PC_14, // D43 + PC_15, // D44 + PD_0, // D45 + PD_1, // D46 + PD_2, // D47 + PD_3, // D48 + PD_4, // D49 + PD_5, // D50 + PD_6, // D51 + PD_7, // D52 + PD_8, // D53 + PD_9, // D54 + PD_10, // D55 + PD_11, // D56/A15 + PD_12, // D57/A16 + PD_13, // D58/A17 + PD_14, // D59 + PD_15, // D60 + PE_0, // D61 + PE_2, // D62 + PE_3, // D63 + PE_4, // D64 + PE_5, // D65 + PE_6, // D66 + PE_7, // D67 + PE_8, // D68 + PE_9, // D69 + PE_10, // D70 + PE_11, // D71 + PE_12, // D72 + PE_13, // D73 + PE_14, // D74 + PE_15, // D75 + PH_0, // D76 + PH_1, // D77 + PH_3 // D78 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 18, // A10, PB2 + 31, // A11, PC0 + 32, // A12, PC1 + 33, // A13, PC2 + 34, // A14, PC3 + 56, // A15, PD11 + 57, // A16, PD12 + 58 // A17, PD13 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/variant_generic.h b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/variant_generic.h new file mode 100644 index 0000000000..21fc356b98 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)TxQ_U3C5VITxQ/variant_generic.h @@ -0,0 +1,262 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 PIN_A10 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB11 27 +#define PB13 28 +#define PB14 29 +#define PB15 30 +#define PC0 PIN_A11 +#define PC1 PIN_A12 +#define PC2 PIN_A13 +#define PC3 PIN_A14 +#define PC6 35 +#define PC7 36 +#define PC8 37 +#define PC9 38 +#define PC10 39 +#define PC11 40 +#define PC12 41 +#define PC13 42 +#define PC14 43 +#define PC15 44 +#define PD0 45 +#define PD1 46 +#define PD2 47 +#define PD3 48 +#define PD4 49 +#define PD5 50 +#define PD6 51 +#define PD7 52 +#define PD8 53 +#define PD9 54 +#define PD10 55 +#define PD11 PIN_A15 +#define PD12 PIN_A16 +#define PD13 PIN_A17 +#define PD14 59 +#define PD15 60 +#define PE0 61 +#define PE2 62 +#define PE3 63 +#define PE4 64 +#define PE5 65 +#define PE6 66 +#define PE7 67 +#define PE8 68 +#define PE9 69 +#define PE10 70 +#define PE11 71 +#define PE12 72 +#define PE13 73 +#define PE14 74 +#define PE15 75 +#define PH0 76 +#define PH1 77 +#define PH3 78 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB11_ALT1 (PB11 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 79 +#define NUM_ANALOG_INPUTS 18 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PE12 +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB2 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN1_2 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN2_2 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN3_2 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN6_2 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN7_2 +#define PWR_WAKEUP_PIN8_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/CMakeLists.txt b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/PeripheralPins.c b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/PeripheralPins.c new file mode 100644 index 0000000000..a7edc59919 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/PeripheralPins.c @@ -0,0 +1,647 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5VGYxQ.xml, STM32U3B5VIYxQ.xml + * STM32U3C5VIYxQ.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_13, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_14, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_9, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_9_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_12_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PC_1_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PG_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PG_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_2, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_10, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_10_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_0, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PG_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PG_13, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PE_3, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PE_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PE_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM1, 4, 1)}, // TIM1_CH4N + {PG_9, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PG_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PG_11, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PG_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PG_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PG_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PE_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PG_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PC_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PE_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PG_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PD_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PE_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PG_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PC_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PE_15, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PG_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PG_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PG_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PG_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PG_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO7 + {PG_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PG_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PG_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {PB_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI1)}, // OCTOSPI1_NCS + {PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PG_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {PG_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {PG_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {PG_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {PG_3, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {PG_4, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {PG_5, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {PG_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PG_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {PG_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {PG_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {PG_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {PG_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {PG_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {PG_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/PinNamesVar.h b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/PinNamesVar.h new file mode 100644 index 0000000000..4e59c5d295 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/PinNamesVar.h @@ -0,0 +1,120 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_9_ALT1 = PB_9 | ALT1, +PB_10_ALT1 = PB_10 | ALT1, +PB_11_ALT1 = PB_11 | ALT1, +PB_12_ALT1 = PB_12 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PC_1_ALT1 = PC_1 | ALT1, +PC_6_ALT1 = PC_6 | ALT1, +PC_7_ALT1 = PC_7 | ALT1, +PC_8_ALT1 = PC_8 | ALT1, +PC_9_ALT1 = PC_9 | ALT1, +PC_10_ALT1 = PC_10 | ALT1, +PC_11_ALT1 = PC_11 | ALT1, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PE_4, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_2 = PB_2, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PE_5, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_2 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PE_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_2 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_2 = PE_7, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_2 = PE_8, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PB_10, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_1 = PA_7, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/boards_entry.txt b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/boards_entry.txt new file mode 100644 index 0000000000..e0937b8e86 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/boards_entry.txt @@ -0,0 +1,32 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5VGYxQ +GenU3.menu.pnum.GENERIC_U3B5VGYXQ=Generic U3B5VGYxQ +GenU3.menu.pnum.GENERIC_U3B5VGYXQ.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5VGYXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5VGYXQ.build.board=GENERIC_U3B5VGYXQ +GenU3.menu.pnum.GENERIC_U3B5VGYXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5VGYXQ.build.variant=STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ +GenU3.menu.pnum.GENERIC_U3B5VGYXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5VIYxQ +GenU3.menu.pnum.GENERIC_U3B5VIYXQ=Generic U3B5VIYxQ +GenU3.menu.pnum.GENERIC_U3B5VIYXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5VIYXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5VIYXQ.build.board=GENERIC_U3B5VIYXQ +GenU3.menu.pnum.GENERIC_U3B5VIYXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5VIYXQ.build.variant=STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ +GenU3.menu.pnum.GENERIC_U3B5VIYXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5VIYxQ +GenU3.menu.pnum.GENERIC_U3C5VIYXQ=Generic U3C5VIYxQ +GenU3.menu.pnum.GENERIC_U3C5VIYXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5VIYXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5VIYXQ.build.board=GENERIC_U3C5VIYXQ +GenU3.menu.pnum.GENERIC_U3C5VIYXQ.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5VIYXQ.build.variant=STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ +GenU3.menu.pnum.GENERIC_U3C5VIYXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/generic_clock.c b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/generic_clock.c new file mode 100644 index 0000000000..f3268a875c --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/generic_clock.c @@ -0,0 +1,28 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5VGYXQ) || defined(ARDUINO_GENERIC_U3B5VIYXQ) ||\ + defined(ARDUINO_GENERIC_U3C5VIYXQ) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/variant_generic.cpp b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/variant_generic.cpp new file mode 100644 index 0000000000..60e777df30 --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/variant_generic.cpp @@ -0,0 +1,117 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5VGYXQ) || defined(ARDUINO_GENERIC_U3B5VIYXQ) ||\ + defined(ARDUINO_GENERIC_U3C5VIYXQ) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18/A10 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_11, // D27 + PB_12, // D28 + PB_13, // D29 + PB_14, // D30 + PB_15, // D31 + PC_0, // D32/A11 + PC_1, // D33/A12 + PC_2, // D34/A13 + PC_3, // D35/A14 + PC_6, // D36 + PC_7, // D37 + PC_8, // D38 + PC_9, // D39 + PC_10, // D40 + PC_11, // D41 + PC_12, // D42 + PC_13, // D43 + PC_14, // D44 + PC_15, // D45 + PD_2, // D46 + PE_2, // D47 + PE_3, // D48 + PE_4, // D49 + PE_5, // D50 + PE_6, // D51 + PE_7, // D52 + PE_8, // D53 + PE_10, // D54 + PE_11, // D55 + PE_12, // D56 + PE_13, // D57 + PE_14, // D58 + PE_15, // D59 + PG_2, // D60 + PG_3, // D61 + PG_4, // D62 + PG_5, // D63 + PG_6, // D64 + PG_7, // D65 + PG_8, // D66 + PG_9, // D67 + PG_10, // D68 + PG_11, // D69 + PG_12, // D70 + PG_13, // D71 + PG_14, // D72 + PG_15, // D73 + PH_0, // D74 + PH_1, // D75 + PH_3 // D76 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 18, // A10, PB2 + 32, // A11, PC0 + 33, // A12, PC1 + 34, // A13, PC2 + 35 // A14, PC3 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/variant_generic.h b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/variant_generic.h new file mode 100644 index 0000000000..0753c560ae --- /dev/null +++ b/variants/STM32U3xx/U3B5V(G-I)YxQ_U3C5VIYxQ/variant_generic.h @@ -0,0 +1,261 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 PIN_A10 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB11 27 +#define PB12 28 +#define PB13 29 +#define PB14 30 +#define PB15 31 +#define PC0 PIN_A11 +#define PC1 PIN_A12 +#define PC2 PIN_A13 +#define PC3 PIN_A14 +#define PC6 36 +#define PC7 37 +#define PC8 38 +#define PC9 39 +#define PC10 40 +#define PC11 41 +#define PC12 42 +#define PC13 43 +#define PC14 44 +#define PC15 45 +#define PD2 46 +#define PE2 47 +#define PE3 48 +#define PE4 49 +#define PE5 50 +#define PE6 51 +#define PE7 52 +#define PE8 53 +#define PE10 54 +#define PE11 55 +#define PE12 56 +#define PE13 57 +#define PE14 58 +#define PE15 59 +#define PG2 60 +#define PG3 61 +#define PG4 62 +#define PG5 63 +#define PG6 64 +#define PG7 65 +#define PG8 66 +#define PG9 67 +#define PG10 68 +#define PG11 69 +#define PG12 70 +#define PG13 71 +#define PG14 72 +#define PG15 73 +#define PH0 74 +#define PH1 75 +#define PH3 76 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB11_ALT1 (PB11 | ALT1) +#define PB12_ALT1 (PB12 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 77 +#define NUM_ANALOG_INPUTS 15 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PE12 +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB2 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN1_2 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN2_2 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN3_2 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN6_2 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN7_2 +#define PWR_WAKEUP_PIN8_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/CMakeLists.txt b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/PeripheralPins.c b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/PeripheralPins.c new file mode 100644 index 0000000000..1af6d2af10 --- /dev/null +++ b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/PeripheralPins.c @@ -0,0 +1,702 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5WGYxQ.xml, STM32U3B5WIYxQ.xml + * STM32U3C5WIYxQ.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PD_11, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PD_12, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PD_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_13, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_13, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_12, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_14, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_9, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_9_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_12_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PC_1_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PG_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PG_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_2, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_10, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_10_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_0, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PG_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PG_13, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PC_5, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 1)}, // TIM1_CH4N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PE_3, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PE_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PE_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM1, 4, 1)}, // TIM1_CH4N + {PF_6, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PF_7, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PF_9, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PF_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PG_9, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PG_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PG_11, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PG_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PF_7, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PF_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PE_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PF_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PG_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PC_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PE_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PF_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PG_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PD_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PE_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PF_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PG_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PC_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PE_15, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PF_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PG_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PG_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PG_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PG_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PG_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO7 + {PC_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {PD_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {PG_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PF_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_CLK + {PG_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PG_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {PB_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI1)}, // OCTOSPI1_NCS + {PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PG_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {PG_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {PG_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {PG_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {PG_3, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {PG_4, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {PG_5, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {PG_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PG_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {PG_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {PG_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {PG_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {PG_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {PG_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {PG_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/PinNamesVar.h b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/PinNamesVar.h new file mode 100644 index 0000000000..9e67198ebc --- /dev/null +++ b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/PinNamesVar.h @@ -0,0 +1,125 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_9_ALT1 = PB_9 | ALT1, +PB_10_ALT1 = PB_10 | ALT1, +PB_11_ALT1 = PB_11 | ALT1, +PB_12_ALT1 = PB_12 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PC_1_ALT1 = PC_1 | ALT1, +PC_4_ALT1 = PC_4 | ALT1, +PC_5_ALT1 = PC_5 | ALT1, +PC_6_ALT1 = PC_6 | ALT1, +PC_7_ALT1 = PC_7 | ALT1, +PC_8_ALT1 = PC_8 | ALT1, +PC_9_ALT1 = PC_9 | ALT1, +PC_10_ALT1 = PC_10 | ALT1, +PC_11_ALT1 = PC_11 | ALT1, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PE_4, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_2 = PB_2, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PE_5, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_2 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PE_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_2 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PC_5, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_2 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PE_7, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_2 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PE_8, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_2 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PB_10, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_1 = PA_7, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/boards_entry.txt b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/boards_entry.txt new file mode 100644 index 0000000000..7ad0fe181f --- /dev/null +++ b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/boards_entry.txt @@ -0,0 +1,32 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5WGYxQ +GenU3.menu.pnum.GENERIC_U3B5WGYXQ=Generic U3B5WGYxQ +GenU3.menu.pnum.GENERIC_U3B5WGYXQ.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5WGYXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5WGYXQ.build.board=GENERIC_U3B5WGYXQ +GenU3.menu.pnum.GENERIC_U3B5WGYXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5WGYXQ.build.variant=STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ +GenU3.menu.pnum.GENERIC_U3B5WGYXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5WIYxQ +GenU3.menu.pnum.GENERIC_U3B5WIYXQ=Generic U3B5WIYxQ +GenU3.menu.pnum.GENERIC_U3B5WIYXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5WIYXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5WIYXQ.build.board=GENERIC_U3B5WIYXQ +GenU3.menu.pnum.GENERIC_U3B5WIYXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5WIYXQ.build.variant=STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ +GenU3.menu.pnum.GENERIC_U3B5WIYXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5WIYxQ +GenU3.menu.pnum.GENERIC_U3C5WIYXQ=Generic U3C5WIYxQ +GenU3.menu.pnum.GENERIC_U3C5WIYXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5WIYXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5WIYXQ.build.board=GENERIC_U3C5WIYXQ +GenU3.menu.pnum.GENERIC_U3C5WIYXQ.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5WIYXQ.build.variant=STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ +GenU3.menu.pnum.GENERIC_U3C5WIYXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/generic_clock.c b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/generic_clock.c new file mode 100644 index 0000000000..39f076ba85 --- /dev/null +++ b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/generic_clock.c @@ -0,0 +1,28 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5WGYXQ) || defined(ARDUINO_GENERIC_U3B5WIYXQ) ||\ + defined(ARDUINO_GENERIC_U3C5WIYXQ) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/variant_generic.cpp b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/variant_generic.cpp new file mode 100644 index 0000000000..4475262e77 --- /dev/null +++ b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/variant_generic.cpp @@ -0,0 +1,146 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5WGYXQ) || defined(ARDUINO_GENERIC_U3B5WIYXQ) ||\ + defined(ARDUINO_GENERIC_U3C5WIYXQ) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18/A10 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_11, // D27 + PB_12, // D28 + PB_13, // D29 + PB_14, // D30 + PB_15, // D31 + PC_0, // D32/A11 + PC_1, // D33/A12 + PC_2, // D34/A13 + PC_3, // D35/A14 + PC_4, // D36/A15 + PC_5, // D37/A16 + PC_6, // D38 + PC_7, // D39 + PC_8, // D40 + PC_9, // D41 + PC_10, // D42 + PC_11, // D43 + PC_12, // D44 + PC_13, // D45 + PC_14, // D46 + PC_15, // D47 + PD_0, // D48 + PD_1, // D49 + PD_2, // D50 + PD_3, // D51 + PD_4, // D52 + PD_5, // D53 + PD_6, // D54 + PD_7, // D55 + PD_8, // D56 + PD_9, // D57 + PD_10, // D58 + PD_11, // D59/A17 + PD_12, // D60/A18 + PD_13, // D61/A19 + PD_14, // D62 + PD_15, // D63 + PE_0, // D64 + PE_2, // D65 + PE_3, // D66 + PE_4, // D67 + PE_5, // D68 + PE_6, // D69 + PE_7, // D70 + PE_8, // D71 + PE_9, // D72 + PE_10, // D73 + PE_11, // D74 + PE_12, // D75 + PE_13, // D76 + PE_14, // D77 + PE_15, // D78 + PF_6, // D79 + PF_7, // D80 + PF_8, // D81 + PF_9, // D82 + PF_10, // D83 + PG_2, // D84 + PG_3, // D85 + PG_4, // D86 + PG_5, // D87 + PG_6, // D88 + PG_7, // D89 + PG_8, // D90 + PG_9, // D91 + PG_10, // D92 + PG_11, // D93 + PG_12, // D94 + PG_13, // D95 + PG_14, // D96 + PG_15, // D97 + PH_0, // D98 + PH_1, // D99 + PH_3 // D100 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 18, // A10, PB2 + 32, // A11, PC0 + 33, // A12, PC1 + 34, // A13, PC2 + 35, // A14, PC3 + 36, // A15, PC4 + 37, // A16, PC5 + 59, // A17, PD11 + 60, // A18, PD12 + 61 // A19, PD13 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/variant_generic.h b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/variant_generic.h new file mode 100644 index 0000000000..5edbd760dd --- /dev/null +++ b/variants/STM32U3xx/U3B5W(G-I)YxQ_U3C5WIYxQ/variant_generic.h @@ -0,0 +1,288 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 PIN_A10 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB11 27 +#define PB12 28 +#define PB13 29 +#define PB14 30 +#define PB15 31 +#define PC0 PIN_A11 +#define PC1 PIN_A12 +#define PC2 PIN_A13 +#define PC3 PIN_A14 +#define PC4 PIN_A15 +#define PC5 PIN_A16 +#define PC6 38 +#define PC7 39 +#define PC8 40 +#define PC9 41 +#define PC10 42 +#define PC11 43 +#define PC12 44 +#define PC13 45 +#define PC14 46 +#define PC15 47 +#define PD0 48 +#define PD1 49 +#define PD2 50 +#define PD3 51 +#define PD4 52 +#define PD5 53 +#define PD6 54 +#define PD7 55 +#define PD8 56 +#define PD9 57 +#define PD10 58 +#define PD11 PIN_A17 +#define PD12 PIN_A18 +#define PD13 PIN_A19 +#define PD14 62 +#define PD15 63 +#define PE0 64 +#define PE2 65 +#define PE3 66 +#define PE4 67 +#define PE5 68 +#define PE6 69 +#define PE7 70 +#define PE8 71 +#define PE9 72 +#define PE10 73 +#define PE11 74 +#define PE12 75 +#define PE13 76 +#define PE14 77 +#define PE15 78 +#define PF6 79 +#define PF7 80 +#define PF8 81 +#define PF9 82 +#define PF10 83 +#define PG2 84 +#define PG3 85 +#define PG4 86 +#define PG5 87 +#define PG6 88 +#define PG7 89 +#define PG8 90 +#define PG9 91 +#define PG10 92 +#define PG11 93 +#define PG12 94 +#define PG13 95 +#define PG14 96 +#define PG15 97 +#define PH0 98 +#define PH1 99 +#define PH3 100 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB11_ALT1 (PB11 | ALT1) +#define PB12_ALT1 (PB12 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC4_ALT1 (PC4 | ALT1) +#define PC5_ALT1 (PC5 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 101 +#define NUM_ANALOG_INPUTS 20 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PE12 +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB2 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN1_2 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN2_2 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN3_2 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN5_2 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN6_2 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN7_2 +#define PWR_WAKEUP_PIN8_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/CMakeLists.txt b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/PeripheralPins.c b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/PeripheralPins.c new file mode 100644 index 0000000000..6927b461ad --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/PeripheralPins.c @@ -0,0 +1,701 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5ZGTx.xml, STM32U3B5ZITx.xml + * STM32U3C5ZITx.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PD_11, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PD_12, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PD_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_13, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PG_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_13, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_12, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PG_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_14, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_9, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_9_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_12_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PC_1_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PG_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PG_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_2, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_10, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_10_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_0, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PG_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PG_13, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PC_5, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 1)}, // TIM1_CH4N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PE_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PE_3, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PE_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PE_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM1, 4, 1)}, // TIM1_CH4N + {PF_6, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PF_7, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PF_9, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PF_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PG_9, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PG_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PG_11, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PG_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PF_7, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PF_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PE_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PF_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PG_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PC_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PE_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PF_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PG_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PD_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PE_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PF_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PG_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PC_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PE_15, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PF_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PG_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PG_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PG_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PG_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PG_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO7 + {PC_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {PD_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {PG_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PF_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_CLK + {PG_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PG_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI1)}, // OCTOSPI1_NCS + {PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PG_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {PG_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {PG_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {PG_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {PG_3, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {PG_4, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {PG_5, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {PG_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PG_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {PG_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {PG_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {PG_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {PG_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {PG_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {PG_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/PinNamesVar.h b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/PinNamesVar.h new file mode 100644 index 0000000000..c0d0838e21 --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/PinNamesVar.h @@ -0,0 +1,127 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_9_ALT1 = PB_9 | ALT1, +PB_10_ALT1 = PB_10 | ALT1, +PB_12_ALT1 = PB_12 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PC_1_ALT1 = PC_1 | ALT1, +PC_4_ALT1 = PC_4 | ALT1, +PC_5_ALT1 = PC_5 | ALT1, +PC_6_ALT1 = PC_6 | ALT1, +PC_7_ALT1 = PC_7 | ALT1, +PC_8_ALT1 = PC_8 | ALT1, +PC_9_ALT1 = PC_9 | ALT1, +PC_10_ALT1 = PC_10 | ALT1, +PC_11_ALT1 = PC_11 | ALT1, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PE_4, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_2 = PB_2, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PE_5, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_2 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PE_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_2 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PC_5, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_2 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PE_7, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_2 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PE_8, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_2 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PF_2, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_1 = PA_7, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_2 = PB_10, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/boards_entry.txt b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/boards_entry.txt new file mode 100644 index 0000000000..943a5ccad7 --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/boards_entry.txt @@ -0,0 +1,32 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5ZGTx +GenU3.menu.pnum.GENERIC_U3B5ZGTX=Generic U3B5ZGTx +GenU3.menu.pnum.GENERIC_U3B5ZGTX.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5ZGTX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5ZGTX.build.board=GENERIC_U3B5ZGTX +GenU3.menu.pnum.GENERIC_U3B5ZGTX.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5ZGTX.build.variant=STM32U3xx/U3B5Z(G-I)T_U3C5ZIT +GenU3.menu.pnum.GENERIC_U3B5ZGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5ZITx +GenU3.menu.pnum.GENERIC_U3B5ZITX=Generic U3B5ZITx +GenU3.menu.pnum.GENERIC_U3B5ZITX.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5ZITX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5ZITX.build.board=GENERIC_U3B5ZITX +GenU3.menu.pnum.GENERIC_U3B5ZITX.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5ZITX.build.variant=STM32U3xx/U3B5Z(G-I)T_U3C5ZIT +GenU3.menu.pnum.GENERIC_U3B5ZITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5ZITx +GenU3.menu.pnum.GENERIC_U3C5ZITX=Generic U3C5ZITx +GenU3.menu.pnum.GENERIC_U3C5ZITX.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5ZITX.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5ZITX.build.board=GENERIC_U3C5ZITX +GenU3.menu.pnum.GENERIC_U3C5ZITX.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5ZITX.build.variant=STM32U3xx/U3B5Z(G-I)T_U3C5ZIT +GenU3.menu.pnum.GENERIC_U3C5ZITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/generic_clock.c b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/generic_clock.c new file mode 100644 index 0000000000..3d1e85fb3d --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/generic_clock.c @@ -0,0 +1,28 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5ZGTX) || defined(ARDUINO_GENERIC_U3B5ZITX) ||\ + defined(ARDUINO_GENERIC_U3C5ZITX) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/variant_generic.cpp b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/variant_generic.cpp new file mode 100644 index 0000000000..a26b2305a3 --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/variant_generic.cpp @@ -0,0 +1,159 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5ZGTX) || defined(ARDUINO_GENERIC_U3B5ZITX) ||\ + defined(ARDUINO_GENERIC_U3C5ZITX) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18/A10 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_12, // D27 + PB_13, // D28 + PB_14, // D29 + PB_15, // D30 + PC_0, // D31/A11 + PC_1, // D32/A12 + PC_2, // D33/A13 + PC_3, // D34/A14 + PC_4, // D35/A15 + PC_5, // D36/A16 + PC_6, // D37 + PC_7, // D38 + PC_8, // D39 + PC_9, // D40 + PC_10, // D41 + PC_11, // D42 + PC_12, // D43 + PC_13, // D44 + PC_14, // D45 + PC_15, // D46 + PD_0, // D47 + PD_1, // D48 + PD_2, // D49 + PD_3, // D50 + PD_4, // D51 + PD_5, // D52 + PD_6, // D53 + PD_7, // D54 + PD_8, // D55 + PD_9, // D56 + PD_10, // D57 + PD_11, // D58/A17 + PD_12, // D59/A18 + PD_13, // D60/A19 + PD_14, // D61 + PD_15, // D62 + PE_0, // D63 + PE_1, // D64 + PE_2, // D65 + PE_3, // D66 + PE_4, // D67 + PE_5, // D68 + PE_6, // D69 + PE_7, // D70 + PE_8, // D71 + PE_9, // D72 + PE_10, // D73 + PE_11, // D74 + PE_12, // D75 + PE_13, // D76 + PE_14, // D77 + PE_15, // D78 + PF_0, // D79 + PF_1, // D80 + PF_2, // D81 + PF_3, // D82 + PF_4, // D83 + PF_5, // D84 + PF_6, // D85 + PF_7, // D86 + PF_8, // D87 + PF_9, // D88 + PF_10, // D89 + PF_11, // D90 + PF_12, // D91 + PF_13, // D92 + PF_14, // D93 + PF_15, // D94 + PG_0, // D95 + PG_1, // D96 + PG_2, // D97 + PG_3, // D98 + PG_4, // D99 + PG_5, // D100 + PG_6, // D101 + PG_7, // D102 + PG_8, // D103 + PG_9, // D104 + PG_10, // D105 + PG_11, // D106 + PG_12, // D107 + PG_13, // D108 + PG_14, // D109 + PG_15, // D110 + PH_0, // D111 + PH_1, // D112 + PH_3 // D113 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 18, // A10, PB2 + 31, // A11, PC0 + 32, // A12, PC1 + 33, // A13, PC2 + 34, // A14, PC3 + 35, // A15, PC4 + 36, // A16, PC5 + 58, // A17, PD11 + 59, // A18, PD12 + 60 // A19, PD13 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/variant_generic.h b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/variant_generic.h new file mode 100644 index 0000000000..d0da8ad62f --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)T_U3C5ZIT/variant_generic.h @@ -0,0 +1,301 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 PIN_A10 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB12 27 +#define PB13 28 +#define PB14 29 +#define PB15 30 +#define PC0 PIN_A11 +#define PC1 PIN_A12 +#define PC2 PIN_A13 +#define PC3 PIN_A14 +#define PC4 PIN_A15 +#define PC5 PIN_A16 +#define PC6 37 +#define PC7 38 +#define PC8 39 +#define PC9 40 +#define PC10 41 +#define PC11 42 +#define PC12 43 +#define PC13 44 +#define PC14 45 +#define PC15 46 +#define PD0 47 +#define PD1 48 +#define PD2 49 +#define PD3 50 +#define PD4 51 +#define PD5 52 +#define PD6 53 +#define PD7 54 +#define PD8 55 +#define PD9 56 +#define PD10 57 +#define PD11 PIN_A17 +#define PD12 PIN_A18 +#define PD13 PIN_A19 +#define PD14 61 +#define PD15 62 +#define PE0 63 +#define PE1 64 +#define PE2 65 +#define PE3 66 +#define PE4 67 +#define PE5 68 +#define PE6 69 +#define PE7 70 +#define PE8 71 +#define PE9 72 +#define PE10 73 +#define PE11 74 +#define PE12 75 +#define PE13 76 +#define PE14 77 +#define PE15 78 +#define PF0 79 +#define PF1 80 +#define PF2 81 +#define PF3 82 +#define PF4 83 +#define PF5 84 +#define PF6 85 +#define PF7 86 +#define PF8 87 +#define PF9 88 +#define PF10 89 +#define PF11 90 +#define PF12 91 +#define PF13 92 +#define PF14 93 +#define PF15 94 +#define PG0 95 +#define PG1 96 +#define PG2 97 +#define PG3 98 +#define PG4 99 +#define PG5 100 +#define PG6 101 +#define PG7 102 +#define PG8 103 +#define PG9 104 +#define PG10 105 +#define PG11 106 +#define PG12 107 +#define PG13 108 +#define PG14 109 +#define PG15 110 +#define PH0 111 +#define PH1 112 +#define PH3 113 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB12_ALT1 (PB12 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC4_ALT1 (PC4 | ALT1) +#define PC5_ALT1 (PC5 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 114 +#define NUM_ANALOG_INPUTS 20 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PE12 +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB2 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN1_2 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN2_2 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN3_2 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN5_2 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN6_2 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN7_2 +#define PWR_WAKEUP_PIN8_1 +#define PWR_WAKEUP_PIN8_2 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/CMakeLists.txt b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/PeripheralPins.c b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/PeripheralPins.c new file mode 100644 index 0000000000..7f7011ebb6 --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/PeripheralPins.c @@ -0,0 +1,688 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U3B5ZGTxQ.xml, STM32U3B5ZITxQ.xml + * STM32U3C5ZITxQ.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PD_11, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PD_12, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PD_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_6, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_13, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PG_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_13, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_2, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C2)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF12_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PD_12, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PG_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_14, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** I3C *** + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SDA[] = { + {PA_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PA_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_7_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_9, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_9_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_1, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PC_1_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PG_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PG_14, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PH_3, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PH_3_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I3C_MODULE_ENABLED +WEAK const PinMap PinMap_I3C_SCL[] = { + {PA_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_2, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_6, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PB_6_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PB_8, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF7_I3C1)}, + {PB_8_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {PB_10, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C1)}, + {PB_10_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C2)}, + {PB_13, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PB_13_ALT1, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PC_0, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I3C2)}, + {PD_12, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I3C1)}, + {PG_7, I3C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C1)}, + {PG_13, I3C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I3C2)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PE_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PE_3, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PE_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PE_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM1, 4, 1)}, // TIM1_CH4N + {PF_6, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PF_7, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PF_9, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PF_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PG_9, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PG_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PH_3, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11_ALT1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_8, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, + {PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PF_7, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN2)}, + {PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PF_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PE_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PF_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {PG_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PC_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PE_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PF_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {PG_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PD_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PE_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PF_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {PG_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PC_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PE_15, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PF_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {PG_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PB_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {PG_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {PG_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PB_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {PG_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO7 + {PD_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {PG_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PF_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_CLK + {PG_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {PG_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_NCS + {PB_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI1)}, // OCTOSPI1_NCS + {PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {PG_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {PA_14, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {PG_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {PG_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {PG_3, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {PG_4, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {PG_5, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {PG_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PG_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {PG_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {PG_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {PG_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {PG_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {PG_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/PinNamesVar.h b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/PinNamesVar.h new file mode 100644 index 0000000000..9ae4ebf1c4 --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/PinNamesVar.h @@ -0,0 +1,122 @@ +/* Alternate pin name */ +PA_0_ALT1 = PA_0 | ALT1, +PA_1_ALT1 = PA_1 | ALT1, +PA_1_ALT2 = PA_1 | ALT2, +PA_2_ALT1 = PA_2 | ALT1, +PA_3_ALT1 = PA_3 | ALT1, +PA_4_ALT1 = PA_4 | ALT1, +PA_5_ALT1 = PA_5 | ALT1, +PA_6_ALT1 = PA_6 | ALT1, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PA_7_ALT3 = PA_7 | ALT3, +PA_9_ALT1 = PA_9 | ALT1, +PA_10_ALT1 = PA_10 | ALT1, +PA_11_ALT1 = PA_11 | ALT1, +PA_12_ALT1 = PA_12 | ALT1, +PA_15_ALT1 = PA_15 | ALT1, +PB_0_ALT1 = PB_0 | ALT1, +PB_0_ALT2 = PB_0 | ALT2, +PB_1_ALT1 = PB_1 | ALT1, +PB_1_ALT2 = PB_1 | ALT2, +PB_3_ALT1 = PB_3 | ALT1, +PB_4_ALT1 = PB_4 | ALT1, +PB_5_ALT1 = PB_5 | ALT1, +PB_6_ALT1 = PB_6 | ALT1, +PB_7_ALT1 = PB_7 | ALT1, +PB_8_ALT1 = PB_8 | ALT1, +PB_9_ALT1 = PB_9 | ALT1, +PB_10_ALT1 = PB_10 | ALT1, +PB_11_ALT1 = PB_11 | ALT1, +PB_13_ALT1 = PB_13 | ALT1, +PB_14_ALT1 = PB_14 | ALT1, +PB_14_ALT2 = PB_14 | ALT2, +PB_15_ALT1 = PB_15 | ALT1, +PB_15_ALT2 = PB_15 | ALT2, +PC_1_ALT1 = PC_1 | ALT1, +PC_6_ALT1 = PC_6 | ALT1, +PC_7_ALT1 = PC_7 | ALT1, +PC_8_ALT1 = PC_8 | ALT1, +PC_9_ALT1 = PC_9 | ALT1, +PC_10_ALT1 = PC_10 | ALT1, +PC_11_ALT1 = PC_11 | ALT1, +PH_3_ALT1 = PH_3 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1 = PE_4, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_1 = PA_0, +#endif +#ifdef PWR_WAKEUP_LINE1 + SYS_WKUP1_2 = PB_2, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2 = PE_5, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_1 = PC_13, +#endif +#ifdef PWR_WAKEUP_LINE2 + SYS_WKUP2_2 = PA_4, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3 = PE_6, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_1 = PA_1, +#endif +#ifdef PWR_WAKEUP_LINE3 + SYS_WKUP3_2 = PB_6, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_1 = PB_1, +#endif +#ifdef PWR_WAKEUP_LINE4 + SYS_WKUP4_2 = PB_7, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5 = PA_3, +#endif +#ifdef PWR_WAKEUP_LINE5 + SYS_WKUP5_1 = PB_8, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6 = PA_5, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_1 = PE_7, +#endif +#ifdef PWR_WAKEUP_LINE6 + SYS_WKUP6_2 = PB_5, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7 = PA_6, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_1 = PE_8, +#endif +#ifdef PWR_WAKEUP_LINE7 + SYS_WKUP7_2 = PB_15, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8 = PF_2, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_1 = PA_7, +#endif +#ifdef PWR_WAKEUP_LINE8 + SYS_WKUP8_2 = PB_10, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, + USB_SOF = PA_14, +#endif diff --git a/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/boards_entry.txt b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/boards_entry.txt new file mode 100644 index 0000000000..96398b0561 --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/boards_entry.txt @@ -0,0 +1,32 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic U3B5ZGTxQ +GenU3.menu.pnum.GENERIC_U3B5ZGTXQ=Generic U3B5ZGTxQ +GenU3.menu.pnum.GENERIC_U3B5ZGTXQ.upload.maximum_size=1048576 +GenU3.menu.pnum.GENERIC_U3B5ZGTXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5ZGTXQ.build.board=GENERIC_U3B5ZGTXQ +GenU3.menu.pnum.GENERIC_U3B5ZGTXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5ZGTXQ.build.variant=STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ +GenU3.menu.pnum.GENERIC_U3B5ZGTXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3B5ZITxQ +GenU3.menu.pnum.GENERIC_U3B5ZITXQ=Generic U3B5ZITxQ +GenU3.menu.pnum.GENERIC_U3B5ZITXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3B5ZITXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3B5ZITXQ.build.board=GENERIC_U3B5ZITXQ +GenU3.menu.pnum.GENERIC_U3B5ZITXQ.build.product_line=STM32U3B5xx +GenU3.menu.pnum.GENERIC_U3B5ZITXQ.build.variant=STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ +GenU3.menu.pnum.GENERIC_U3B5ZITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3B5.svd + +# Generic U3C5ZITxQ +GenU3.menu.pnum.GENERIC_U3C5ZITXQ=Generic U3C5ZITxQ +GenU3.menu.pnum.GENERIC_U3C5ZITXQ.upload.maximum_size=2097152 +GenU3.menu.pnum.GENERIC_U3C5ZITXQ.upload.maximum_data_size=655360 +GenU3.menu.pnum.GENERIC_U3C5ZITXQ.build.board=GENERIC_U3C5ZITXQ +GenU3.menu.pnum.GENERIC_U3C5ZITXQ.build.product_line=STM32U3C5xx +GenU3.menu.pnum.GENERIC_U3C5ZITXQ.build.variant=STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ +GenU3.menu.pnum.GENERIC_U3C5ZITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U3xx/STM32U3C5.svd + diff --git a/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/generic_clock.c b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/generic_clock.c new file mode 100644 index 0000000000..763c5c030a --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/generic_clock.c @@ -0,0 +1,28 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5ZGTXQ) || defined(ARDUINO_GENERIC_U3B5ZITXQ) ||\ + defined(ARDUINO_GENERIC_U3C5ZITXQ) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/variant_generic.cpp b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/variant_generic.cpp new file mode 100644 index 0000000000..50e6bc6b02 --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/variant_generic.cpp @@ -0,0 +1,154 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_U3B5ZGTXQ) || defined(ARDUINO_GENERIC_U3B5ZITXQ) ||\ + defined(ARDUINO_GENERIC_U3C5ZITXQ) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18/A10 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_11, // D27 + PB_13, // D28 + PB_14, // D29 + PB_15, // D30 + PC_0, // D31/A11 + PC_1, // D32/A12 + PC_2, // D33/A13 + PC_3, // D34/A14 + PC_6, // D35 + PC_7, // D36 + PC_8, // D37 + PC_9, // D38 + PC_10, // D39 + PC_11, // D40 + PC_12, // D41 + PC_13, // D42 + PC_14, // D43 + PC_15, // D44 + PD_0, // D45 + PD_1, // D46 + PD_2, // D47 + PD_3, // D48 + PD_4, // D49 + PD_5, // D50 + PD_6, // D51 + PD_7, // D52 + PD_8, // D53 + PD_9, // D54 + PD_10, // D55 + PD_11, // D56/A15 + PD_12, // D57/A16 + PD_13, // D58/A17 + PD_14, // D59 + PD_15, // D60 + PE_0, // D61 + PE_1, // D62 + PE_2, // D63 + PE_3, // D64 + PE_4, // D65 + PE_5, // D66 + PE_6, // D67 + PE_7, // D68 + PE_8, // D69 + PE_9, // D70 + PE_10, // D71 + PE_11, // D72 + PE_12, // D73 + PE_13, // D74 + PE_14, // D75 + PE_15, // D76 + PF_0, // D77 + PF_1, // D78 + PF_2, // D79 + PF_3, // D80 + PF_4, // D81 + PF_5, // D82 + PF_6, // D83 + PF_7, // D84 + PF_8, // D85 + PF_9, // D86 + PF_10, // D87 + PF_11, // D88 + PF_12, // D89 + PF_13, // D90 + PF_14, // D91 + PF_15, // D92 + PG_0, // D93 + PG_1, // D94 + PG_2, // D95 + PG_3, // D96 + PG_4, // D97 + PG_5, // D98 + PG_6, // D99 + PG_7, // D100 + PG_8, // D101 + PG_9, // D102 + PG_10, // D103 + PG_12, // D104 + PG_13, // D105 + PG_14, // D106 + PG_15, // D107 + PH_0, // D108 + PH_1, // D109 + PH_3 // D110 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 18, // A10, PB2 + 31, // A11, PC0 + 32, // A12, PC1 + 33, // A13, PC2 + 34, // A14, PC3 + 56, // A15, PD11 + 57, // A16, PD12 + 58 // A17, PD13 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/variant_generic.h b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/variant_generic.h new file mode 100644 index 0000000000..784f04e73d --- /dev/null +++ b/variants/STM32U3xx/U3B5Z(G-I)TxQ_U3C5ZITxQ/variant_generic.h @@ -0,0 +1,295 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 PIN_A10 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB11 27 +#define PB13 28 +#define PB14 29 +#define PB15 30 +#define PC0 PIN_A11 +#define PC1 PIN_A12 +#define PC2 PIN_A13 +#define PC3 PIN_A14 +#define PC6 35 +#define PC7 36 +#define PC8 37 +#define PC9 38 +#define PC10 39 +#define PC11 40 +#define PC12 41 +#define PC13 42 +#define PC14 43 +#define PC15 44 +#define PD0 45 +#define PD1 46 +#define PD2 47 +#define PD3 48 +#define PD4 49 +#define PD5 50 +#define PD6 51 +#define PD7 52 +#define PD8 53 +#define PD9 54 +#define PD10 55 +#define PD11 PIN_A15 +#define PD12 PIN_A16 +#define PD13 PIN_A17 +#define PD14 59 +#define PD15 60 +#define PE0 61 +#define PE1 62 +#define PE2 63 +#define PE3 64 +#define PE4 65 +#define PE5 66 +#define PE6 67 +#define PE7 68 +#define PE8 69 +#define PE9 70 +#define PE10 71 +#define PE11 72 +#define PE12 73 +#define PE13 74 +#define PE14 75 +#define PE15 76 +#define PF0 77 +#define PF1 78 +#define PF2 79 +#define PF3 80 +#define PF4 81 +#define PF5 82 +#define PF6 83 +#define PF7 84 +#define PF8 85 +#define PF9 86 +#define PF10 87 +#define PF11 88 +#define PF12 89 +#define PF13 90 +#define PF14 91 +#define PF15 92 +#define PG0 93 +#define PG1 94 +#define PG2 95 +#define PG3 96 +#define PG4 97 +#define PG5 98 +#define PG6 99 +#define PG7 100 +#define PG8 101 +#define PG9 102 +#define PG10 103 +#define PG12 104 +#define PG13 105 +#define PG14 106 +#define PG15 107 +#define PH0 108 +#define PH1 109 +#define PH3 110 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB11_ALT1 (PB11 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PH3_ALT1 (PH3 | ALT1) + +#define NUM_DIGITAL_PINS 111 +#define NUM_ANALOG_INPUTS 18 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PE12 +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA1 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA6 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB2 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN1_2 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN2_2 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN3_2 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN6_2 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN7_2 +#define PWR_WAKEUP_PIN8_1 +#define PWR_WAKEUP_PIN8_2 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32U5xx/U535C(B-C-E)(T-U)_U545CE(T-U)/PeripheralPins.c b/variants/STM32U5xx/U535C(B-C-E)(T-U)_U545CE(T-U)/PeripheralPins.c index 1e7542c97a..b39f6c8902 100644 --- a/variants/STM32U5xx/U535C(B-C-E)(T-U)_U545CE(T-U)/PeripheralPins.c +++ b/variants/STM32U5xx/U535C(B-C-E)(T-U)_U545CE(T-U)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32U535CCTx.xml, STM32U535CCUx.xml * STM32U535CETx.xml, STM32U535CEUx.xml * STM32U545CETx.xml, STM32U545CEUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U535C(B-C-E)(T-U)xQ_U545CE(T-U)xQ/PeripheralPins.c b/variants/STM32U5xx/U535C(B-C-E)(T-U)xQ_U545CE(T-U)xQ/PeripheralPins.c index 6e8b139119..3ec8d295fd 100644 --- a/variants/STM32U5xx/U535C(B-C-E)(T-U)xQ_U545CE(T-U)xQ/PeripheralPins.c +++ b/variants/STM32U5xx/U535C(B-C-E)(T-U)xQ_U545CE(T-U)xQ/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32U535CCTxQ.xml, STM32U535CCUxQ.xml * STM32U535CETxQ.xml, STM32U535CEUxQ.xml * STM32U545CETxQ.xml, STM32U545CEUxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U535JEYxQ_U545JEYxQ/PeripheralPins.c b/variants/STM32U5xx/U535JEYxQ_U545JEYxQ/PeripheralPins.c index d44c42483b..8fe10dd9bc 100644 --- a/variants/STM32U5xx/U535JEYxQ_U545JEYxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U535JEYxQ_U545JEYxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U535JEYxQ.xml, STM32U545JEYxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U535N(C-E)YxQ_U545NEYxQ/PeripheralPins.c b/variants/STM32U5xx/U535N(C-E)YxQ_U545NEYxQ/PeripheralPins.c index 0e122d19e7..4b7bcac433 100644 --- a/variants/STM32U5xx/U535N(C-E)YxQ_U545NEYxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U535N(C-E)YxQ_U545NEYxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U535NCYxQ.xml, STM32U535NEYxQ.xml * STM32U545NEYxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U535R(B-C-E)I_U545REI/PeripheralPins.c b/variants/STM32U5xx/U535R(B-C-E)I_U545REI/PeripheralPins.c index 92804497e3..8b57b55efb 100644 --- a/variants/STM32U5xx/U535R(B-C-E)I_U545REI/PeripheralPins.c +++ b/variants/STM32U5xx/U535R(B-C-E)I_U545REI/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U535RBIx.xml, STM32U535RCIx.xml * STM32U535REIx.xml, STM32U545REIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U535R(B-C-E)IxQ_U545REIxQ/PeripheralPins.c b/variants/STM32U5xx/U535R(B-C-E)IxQ_U545REIxQ/PeripheralPins.c index 3e81c6061c..8080ba84c8 100644 --- a/variants/STM32U5xx/U535R(B-C-E)IxQ_U545REIxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U535R(B-C-E)IxQ_U545REIxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U535RBIxQ.xml, STM32U535RCIxQ.xml * STM32U535REIxQ.xml, STM32U545REIxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U535R(B-C-E)T_U545RET/PeripheralPins.c b/variants/STM32U5xx/U535R(B-C-E)T_U545RET/PeripheralPins.c index 9c6ef23b80..119dfaf6fc 100644 --- a/variants/STM32U5xx/U535R(B-C-E)T_U545RET/PeripheralPins.c +++ b/variants/STM32U5xx/U535R(B-C-E)T_U545RET/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U535RBTx.xml, STM32U535RCTx.xml * STM32U535RETx.xml, STM32U545RETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U535R(B-C-E)TxQ_U545RETxQ/PeripheralPins.c b/variants/STM32U5xx/U535R(B-C-E)TxQ_U545RETxQ/PeripheralPins.c index d5c18053e1..22dd8aaa41 100644 --- a/variants/STM32U5xx/U535R(B-C-E)TxQ_U545RETxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U535R(B-C-E)TxQ_U545RETxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U535RBTxQ.xml, STM32U535RCTxQ.xml * STM32U535RETxQ.xml, STM32U545RETxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U535V(C-E)I_U545VEI/PeripheralPins.c b/variants/STM32U5xx/U535V(C-E)I_U545VEI/PeripheralPins.c index beab645fd1..dc3ec75447 100644 --- a/variants/STM32U5xx/U535V(C-E)I_U545VEI/PeripheralPins.c +++ b/variants/STM32U5xx/U535V(C-E)I_U545VEI/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U535VCIx.xml, STM32U535VEIx.xml * STM32U545VEIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U535V(C-E)IxQ_U545VEIxQ/PeripheralPins.c b/variants/STM32U5xx/U535V(C-E)IxQ_U545VEIxQ/PeripheralPins.c index 14abc9b251..d601281ab0 100644 --- a/variants/STM32U5xx/U535V(C-E)IxQ_U545VEIxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U535V(C-E)IxQ_U545VEIxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U535VCIxQ.xml, STM32U535VEIxQ.xml * STM32U545VEIxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U535V(C-E)T_U545VET/PeripheralPins.c b/variants/STM32U5xx/U535V(C-E)T_U545VET/PeripheralPins.c index f14ea37ac4..cff3e62658 100644 --- a/variants/STM32U5xx/U535V(C-E)T_U545VET/PeripheralPins.c +++ b/variants/STM32U5xx/U535V(C-E)T_U545VET/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U535VCTx.xml, STM32U535VETx.xml * STM32U545VETx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U535V(C-E)TxQ_U545VETxQ/PeripheralPins.c b/variants/STM32U5xx/U535V(C-E)TxQ_U545VETxQ/PeripheralPins.c index 15838d32d6..3e79eefab3 100644 --- a/variants/STM32U5xx/U535V(C-E)TxQ_U545VETxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U535V(C-E)TxQ_U545VETxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U535VCTxQ.xml, STM32U535VETxQ.xml * STM32U545VETxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575A(G-I)I_U585AII/PeripheralPins.c b/variants/STM32U5xx/U575A(G-I)I_U585AII/PeripheralPins.c index 34b6e06fd2..5233f37fbe 100644 --- a/variants/STM32U5xx/U575A(G-I)I_U585AII/PeripheralPins.c +++ b/variants/STM32U5xx/U575A(G-I)I_U585AII/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U575AGIx.xml, STM32U575AIIx.xml * STM32U585AIIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ/PeripheralPins.c b/variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ/PeripheralPins.c index 0c5a7bc650..ae2000ba9e 100644 --- a/variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U575AGIxQ.xml, STM32U575AIIxQ.xml * STM32U585AIIxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)/PeripheralPins.c b/variants/STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)/PeripheralPins.c index 0252e12a80..9b40cf8e24 100644 --- a/variants/STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)/PeripheralPins.c +++ b/variants/STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32U575CGTx.xml, STM32U575CGUx.xml * STM32U575CITx.xml, STM32U575CIUx.xml * STM32U585CITx.xml, STM32U585CIUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575C(G-I)(T-U)xQ_U585CI(T-U)xQ/PeripheralPins.c b/variants/STM32U5xx/U575C(G-I)(T-U)xQ_U585CI(T-U)xQ/PeripheralPins.c index 1b31b45a11..8237778c92 100644 --- a/variants/STM32U5xx/U575C(G-I)(T-U)xQ_U585CI(T-U)xQ/PeripheralPins.c +++ b/variants/STM32U5xx/U575C(G-I)(T-U)xQ_U585CI(T-U)xQ/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32U575CGTxQ.xml, STM32U575CGUxQ.xml * STM32U575CITxQ.xml, STM32U575CIUxQ.xml * STM32U585CITxQ.xml, STM32U585CIUxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/PeripheralPins.c b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/PeripheralPins.c index a03978973d..5091ad3c5c 100644 --- a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U575OGYxQ.xml, STM32U575OIYxQ.xml * STM32U585OIYxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575Q(G-I)I_U585QII/PeripheralPins.c b/variants/STM32U5xx/U575Q(G-I)I_U585QII/PeripheralPins.c index 46dd29d64a..81c2e04bd3 100644 --- a/variants/STM32U5xx/U575Q(G-I)I_U585QII/PeripheralPins.c +++ b/variants/STM32U5xx/U575Q(G-I)I_U585QII/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U575QGIx.xml, STM32U575QIIx.xml * STM32U585QIIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575Q(G-I)IxQ_U585QIIxQ/PeripheralPins.c b/variants/STM32U5xx/U575Q(G-I)IxQ_U585QIIxQ/PeripheralPins.c index 91f992601b..43628ad2c9 100644 --- a/variants/STM32U5xx/U575Q(G-I)IxQ_U585QIIxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U575Q(G-I)IxQ_U585QIIxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U575QGIxQ.xml, STM32U575QIIxQ.xml * STM32U585QIIxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575R(G-I)T_U585RIT/PeripheralPins.c b/variants/STM32U5xx/U575R(G-I)T_U585RIT/PeripheralPins.c index fd580f539d..89e4bd53e0 100644 --- a/variants/STM32U5xx/U575R(G-I)T_U585RIT/PeripheralPins.c +++ b/variants/STM32U5xx/U575R(G-I)T_U585RIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U575RGTx.xml, STM32U575RITx.xml * STM32U585RITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575R(G-I)TxQ_U585RITxQ/PeripheralPins.c b/variants/STM32U5xx/U575R(G-I)TxQ_U585RITxQ/PeripheralPins.c index aa87223de2..7fa03a204d 100644 --- a/variants/STM32U5xx/U575R(G-I)TxQ_U585RITxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U575R(G-I)TxQ_U585RITxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U575RGTxQ.xml, STM32U575RITxQ.xml * STM32U585RITxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575V(G-I)T_U585VIT/PeripheralPins.c b/variants/STM32U5xx/U575V(G-I)T_U585VIT/PeripheralPins.c index c7fcb267f9..1e413ad5b6 100644 --- a/variants/STM32U5xx/U575V(G-I)T_U585VIT/PeripheralPins.c +++ b/variants/STM32U5xx/U575V(G-I)T_U585VIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U575VGTx.xml, STM32U575VITx.xml * STM32U585VITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575V(G-I)TxQ_U585VITxQ/PeripheralPins.c b/variants/STM32U5xx/U575V(G-I)TxQ_U585VITxQ/PeripheralPins.c index 09ddc8ba96..efa88cc541 100644 --- a/variants/STM32U5xx/U575V(G-I)TxQ_U585VITxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U575V(G-I)TxQ_U585VITxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U575VGTxQ.xml, STM32U575VITxQ.xml * STM32U585VITxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575Z(G-I)T_U585ZIT/PeripheralPins.c b/variants/STM32U5xx/U575Z(G-I)T_U585ZIT/PeripheralPins.c index b619a1b24c..951dc655ff 100644 --- a/variants/STM32U5xx/U575Z(G-I)T_U585ZIT/PeripheralPins.c +++ b/variants/STM32U5xx/U575Z(G-I)T_U585ZIT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U575ZGTx.xml, STM32U575ZITx.xml * STM32U585ZITx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ/PeripheralPins.c b/variants/STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ/PeripheralPins.c index 8d218c9240..22f2d5b5a0 100644 --- a/variants/STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U575ZGTxQ.xml, STM32U575ZITxQ.xml * STM32U585ZITxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U595A(I-J)H_U5A5AJH/PeripheralPins.c b/variants/STM32U5xx/U595A(I-J)H_U5A5AJH/PeripheralPins.c index 5749ff1daf..778d6f2d9e 100644 --- a/variants/STM32U5xx/U595A(I-J)H_U5A5AJH/PeripheralPins.c +++ b/variants/STM32U5xx/U595A(I-J)H_U5A5AJH/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U595AIHx.xml, STM32U595AJHx.xml * STM32U5A5AJHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U595A(I-J)HxQ_U5A5AJHxQ/PeripheralPins.c b/variants/STM32U5xx/U595A(I-J)HxQ_U5A5AJHxQ/PeripheralPins.c index 329d25ddfc..8f8aa92627 100644 --- a/variants/STM32U5xx/U595A(I-J)HxQ_U5A5AJHxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U595A(I-J)HxQ_U5A5AJHxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U595AIHxQ.xml, STM32U595AJHxQ.xml * STM32U5A5AJHxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U595Q(I-J)I_U5A5QJI/PeripheralPins.c b/variants/STM32U5xx/U595Q(I-J)I_U5A5QJI/PeripheralPins.c index 331c78ea8d..60aec5fc30 100644 --- a/variants/STM32U5xx/U595Q(I-J)I_U5A5QJI/PeripheralPins.c +++ b/variants/STM32U5xx/U595Q(I-J)I_U5A5QJI/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U595QIIx.xml, STM32U595QJIx.xml * STM32U5A5QJIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U595Q(I-J)IxQ_U5A5Q(I-J)IxQ/PeripheralPins.c b/variants/STM32U5xx/U595Q(I-J)IxQ_U5A5Q(I-J)IxQ/PeripheralPins.c index 132608ce5f..f0f03eac83 100644 --- a/variants/STM32U5xx/U595Q(I-J)IxQ_U5A5Q(I-J)IxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U595Q(I-J)IxQ_U5A5Q(I-J)IxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U595QIIxQ.xml, STM32U595QJIxQ.xml * STM32U5A5QIIxQ.xml, STM32U5A5QJIxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U595R(I-J)T_U5A5RJT/PeripheralPins.c b/variants/STM32U5xx/U595R(I-J)T_U5A5RJT/PeripheralPins.c index 2c5ca595af..af0d83eacc 100644 --- a/variants/STM32U5xx/U595R(I-J)T_U5A5RJT/PeripheralPins.c +++ b/variants/STM32U5xx/U595R(I-J)T_U5A5RJT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U595RITx.xml, STM32U595RJTx.xml * STM32U5A5RJTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U595R(I-J)TxQ_U5A5RJTxQ/PeripheralPins.c b/variants/STM32U5xx/U595R(I-J)TxQ_U5A5RJTxQ/PeripheralPins.c index 73f1d80035..fc231a0543 100644 --- a/variants/STM32U5xx/U595R(I-J)TxQ_U5A5RJTxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U595R(I-J)TxQ_U5A5RJTxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U595RITxQ.xml, STM32U595RJTxQ.xml * STM32U5A5RJTxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U595V(I-J)T_U599VJT_U5A5VJT/PeripheralPins.c b/variants/STM32U5xx/U595V(I-J)T_U599VJT_U5A5VJT/PeripheralPins.c index 0df3dfe145..65c6605d34 100644 --- a/variants/STM32U5xx/U595V(I-J)T_U599VJT_U5A5VJT/PeripheralPins.c +++ b/variants/STM32U5xx/U595V(I-J)T_U599VJT_U5A5VJT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U595VITx.xml, STM32U595VJTx.xml * STM32U599VJTx.xml, STM32U5A5VJTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U595V(I-J)TxQ_U599V(I-J)TxQ_U5A5VJTxQ_U5A9VJTxQ/PeripheralPins.c b/variants/STM32U5xx/U595V(I-J)TxQ_U599V(I-J)TxQ_U5A5VJTxQ_U5A9VJTxQ/PeripheralPins.c index 58aef5bfe4..5af426fcba 100644 --- a/variants/STM32U5xx/U595V(I-J)TxQ_U599V(I-J)TxQ_U5A5VJTxQ_U5A9VJTxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U595V(I-J)TxQ_U599V(I-J)TxQ_U5A5VJTxQ_U5A9VJTxQ/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32U595VITxQ.xml, STM32U595VJTxQ.xml * STM32U599VITxQ.xml, STM32U599VJTxQ.xml * STM32U5A5VJTxQ.xml, STM32U5A9VJTxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U595Z(I-J)T_U5A5ZJT/PeripheralPins.c b/variants/STM32U5xx/U595Z(I-J)T_U5A5ZJT/PeripheralPins.c index 70266e6878..06528ba45c 100644 --- a/variants/STM32U5xx/U595Z(I-J)T_U5A5ZJT/PeripheralPins.c +++ b/variants/STM32U5xx/U595Z(I-J)T_U5A5ZJT/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U595ZITx.xml, STM32U595ZJTx.xml * STM32U5A5ZJTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/PeripheralPins.c b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/PeripheralPins.c index f5c08ccb81..045d5b49b6 100644 --- a/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32U595ZITxQ.xml, STM32U595ZJTxQ.xml * STM32U599ZITxQ.xml, STM32U599ZJTxQ.xml * STM32U5A5ZJTxQ.xml, STM32U5A9ZJTxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U595Z(I-J)YxQ_U5A5ZJYxQ/PeripheralPins.c b/variants/STM32U5xx/U595Z(I-J)YxQ_U5A5ZJYxQ/PeripheralPins.c index 3856b47264..e8c4ffa491 100644 --- a/variants/STM32U5xx/U595Z(I-J)YxQ_U5A5ZJYxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U595Z(I-J)YxQ_U5A5ZJYxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U595ZIYxQ.xml, STM32U595ZJYxQ.xml * STM32U5A5ZJYxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U599BJYxQ_U5A9BJYxQ/PeripheralPins.c b/variants/STM32U5xx/U599BJYxQ_U5A9BJYxQ/PeripheralPins.c index 252c63754a..a94d7804f2 100644 --- a/variants/STM32U5xx/U599BJYxQ_U5A9BJYxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U599BJYxQ_U5A9BJYxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U599BJYxQ.xml, STM32U5A9BJYxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U599N(I-J)HxQ_U5A9NJHxQ/PeripheralPins.c b/variants/STM32U5xx/U599N(I-J)HxQ_U5A9NJHxQ/PeripheralPins.c index 32995ff0ff..a3d0087321 100644 --- a/variants/STM32U5xx/U599N(I-J)HxQ_U5A9NJHxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U599N(I-J)HxQ_U5A9NJHxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U599NIHxQ.xml, STM32U599NJHxQ.xml * STM32U5A9NJHxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U599Z(I-J)YxQ_U5A9ZJYxQ/PeripheralPins.c b/variants/STM32U5xx/U599Z(I-J)YxQ_U5A9ZJYxQ/PeripheralPins.c index ff091171b3..3dc80bcecc 100644 --- a/variants/STM32U5xx/U599Z(I-J)YxQ_U5A9ZJYxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U599Z(I-J)YxQ_U5A9ZJYxQ/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32U599ZIYxQ.xml, STM32U599ZJYxQ.xml * STM32U5A9ZJYxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5F7V(I-J)T/PeripheralPins.c b/variants/STM32U5xx/U5F7V(I-J)T/PeripheralPins.c index 007c8ae673..730df32eac 100644 --- a/variants/STM32U5xx/U5F7V(I-J)T/PeripheralPins.c +++ b/variants/STM32U5xx/U5F7V(I-J)T/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5F7VITx.xml, STM32U5F7VJTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5F7V(I-J)TxQ/PeripheralPins.c b/variants/STM32U5xx/U5F7V(I-J)TxQ/PeripheralPins.c index 393fb5a2a2..32e4e16d75 100644 --- a/variants/STM32U5xx/U5F7V(I-J)TxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U5F7V(I-J)TxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5F7VITxQ.xml, STM32U5F7VJTxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5F9BJYxQ_U5G9BJYxQ/PeripheralPins.c b/variants/STM32U5xx/U5F9BJYxQ_U5G9BJYxQ/PeripheralPins.c index 1066ab114a..c663bd1691 100644 --- a/variants/STM32U5xx/U5F9BJYxQ_U5G9BJYxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U5F9BJYxQ_U5G9BJYxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5F9BJYxQ.xml, STM32U5G9BJYxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5F9NJHxQ/PeripheralPins.c b/variants/STM32U5xx/U5F9NJHxQ/PeripheralPins.c index 830d3e5aa2..ada0a0cbc1 100644 --- a/variants/STM32U5xx/U5F9NJHxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U5F9NJHxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5F9NJHxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5F9V(I-J)TxQ/PeripheralPins.c b/variants/STM32U5xx/U5F9V(I-J)TxQ/PeripheralPins.c index bea8c0f52d..21da3cfc32 100644 --- a/variants/STM32U5xx/U5F9V(I-J)TxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U5F9V(I-J)TxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5F9VITxQ.xml, STM32U5F9VJTxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5F9Z(I-J)JxQ/PeripheralPins.c b/variants/STM32U5xx/U5F9Z(I-J)JxQ/PeripheralPins.c index 198a2e7ad9..e2d6840c32 100644 --- a/variants/STM32U5xx/U5F9Z(I-J)JxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U5F9Z(I-J)JxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5F9ZIJxQ.xml, STM32U5F9ZJJxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5F9Z(I-J)TxQ/PeripheralPins.c b/variants/STM32U5xx/U5F9Z(I-J)TxQ/PeripheralPins.c index 51e20f4e0b..b064affc74 100644 --- a/variants/STM32U5xx/U5F9Z(I-J)TxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U5F9Z(I-J)TxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5F9ZITxQ.xml, STM32U5F9ZJTxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5G7VJT/PeripheralPins.c b/variants/STM32U5xx/U5G7VJT/PeripheralPins.c index 761996640b..593d29bd86 100644 --- a/variants/STM32U5xx/U5G7VJT/PeripheralPins.c +++ b/variants/STM32U5xx/U5G7VJT/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5G7VJTx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5G7VJTxQ/PeripheralPins.c b/variants/STM32U5xx/U5G7VJTxQ/PeripheralPins.c index 81c76e033e..bf085c5183 100644 --- a/variants/STM32U5xx/U5G7VJTxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U5G7VJTxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5G7VJTxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5G9NJHxQ/PeripheralPins.c b/variants/STM32U5xx/U5G9NJHxQ/PeripheralPins.c index f3e791f1a8..c201ad175f 100644 --- a/variants/STM32U5xx/U5G9NJHxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U5G9NJHxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5G9NJHxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5G9VJTxQ/PeripheralPins.c b/variants/STM32U5xx/U5G9VJTxQ/PeripheralPins.c index d9ea6a5fc5..4ffc2cb67f 100644 --- a/variants/STM32U5xx/U5G9VJTxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U5G9VJTxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5G9VJTxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5G9ZJJxQ/PeripheralPins.c b/variants/STM32U5xx/U5G9ZJJxQ/PeripheralPins.c index 5826bbeda7..ed7d687d80 100644 --- a/variants/STM32U5xx/U5G9ZJJxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U5G9ZJJxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5G9ZJJxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32U5xx/U5G9ZJTxQ/PeripheralPins.c b/variants/STM32U5xx/U5G9ZJTxQ/PeripheralPins.c index 93827a0c99..7baa1bf0c4 100644 --- a/variants/STM32U5xx/U5G9ZJTxQ/PeripheralPins.c +++ b/variants/STM32U5xx/U5G9ZJTxQ/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32U5G9ZJTxQ.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WB0x/WB05KZV_WB05TZF_WB09KEV_WB09TEF/PeripheralPins.c b/variants/STM32WB0x/WB05KZV_WB05TZF_WB09KEV_WB09TEF/PeripheralPins.c index 71c6a39c7e..942ed2b986 100644 --- a/variants/STM32WB0x/WB05KZV_WB05TZF_WB09KEV_WB09TEF/PeripheralPins.c +++ b/variants/STM32WB0x/WB05KZV_WB05TZF_WB09KEV_WB09TEF/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32WB05KZVx.xml, STM32WB05TZFx.xml * STM32WB09KEVx.xml, STM32WB09TEFx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WB0x/WB06CCF_WB07CCF/PeripheralPins.c b/variants/STM32WB0x/WB06CCF_WB07CCF/PeripheralPins.c index 2320c86a1a..127681cbde 100644 --- a/variants/STM32WB0x/WB06CCF_WB07CCF/PeripheralPins.c +++ b/variants/STM32WB0x/WB06CCF_WB07CCF/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WB06CCFx.xml, STM32WB07CCFx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WB0x/WB06CCV_WB07CCV/PeripheralPins.c b/variants/STM32WB0x/WB06CCV_WB07CCV/PeripheralPins.c index a3f2bf949d..75159f1b86 100644 --- a/variants/STM32WB0x/WB06CCV_WB07CCV/PeripheralPins.c +++ b/variants/STM32WB0x/WB06CCV_WB07CCV/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WB06CCVx.xml, STM32WB07CCVx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WB0x/WB06KCV_WB07KCV/PeripheralPins.c b/variants/STM32WB0x/WB06KCV_WB07KCV/PeripheralPins.c index ae0c5a7245..0184471acf 100644 --- a/variants/STM32WB0x/WB06KCV_WB07KCV/PeripheralPins.c +++ b/variants/STM32WB0x/WB06KCV_WB07KCV/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WB06KCVx.xml, STM32WB07KCVx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBAxx/WBA23CEU/CMakeLists.txt b/variants/STM32WBAxx/WBA23CEU/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WBAxx/WBA23CEU/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBAxx/WBA23CEU/PeripheralPins.c b/variants/STM32WBAxx/WBA23CEU/PeripheralPins.c new file mode 100644 index 0000000000..b8e0dd5e18 --- /dev/null +++ b/variants/STM32WBAxx/WBA23CEU/PeripheralPins.c @@ -0,0 +1,191 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32WBA23CEUx.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC4_IN9 + {PA_1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC4_IN8 + {PA_2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC4_IN7 + {PA_5, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC4_IN4 + {PA_6, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC4_IN3 + {PA_7, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC4_IN2 + {PA_8, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC4_IN1 + {NC, NP, 0} +}; +#endif + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_11, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PA_11_ALT1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C3)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_6, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_15, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_2, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_2_ALT1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** No I3C *** + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_2, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_7, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_8, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_4, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_6, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_9, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_12, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_5, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USART1)}, + {PA_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USART1)}, + {PB_2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PH_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USART1)}, + {PA_8, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_15, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_LPUART1)}, + {PB_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PH_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_15, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PA_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_SPI3)}, + {PB_8, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_7, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PA_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_SPI3)}, + {PB_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_0, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_8, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +//*** No CAN *** + +//*** No ETHERNET *** + +//*** No QUADSPI *** + +//*** No USB *** + +//*** No SD *** + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32WBAxx/WBA23CEU/PinNamesVar.h b/variants/STM32WBAxx/WBA23CEU/PinNamesVar.h new file mode 100644 index 0000000000..1fac543d14 --- /dev/null +++ b/variants/STM32WBAxx/WBA23CEU/PinNamesVar.h @@ -0,0 +1,43 @@ +/* Alternate pin name */ +PA_11_ALT1 = PA_11 | ALT1, +PB_2_ALT1 = PB_2 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1_1 = PB_2, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PA_1, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3_1 = PB_6, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = PA_5, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6_1 = PA_12, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = PA_6, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = PA_7, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8_1 = PB_9, +#endif + +/* No USB */ diff --git a/variants/STM32WBAxx/WBA23CEU/boards_entry.txt b/variants/STM32WBAxx/WBA23CEU/boards_entry.txt new file mode 100644 index 0000000000..c9010dbe0c --- /dev/null +++ b/variants/STM32WBAxx/WBA23CEU/boards_entry.txt @@ -0,0 +1,14 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic WBA23CEUx +GenWBA.menu.pnum.GENERIC_WBA23CEUX=Generic WBA23CEUx +GenWBA.menu.pnum.GENERIC_WBA23CEUX.upload.maximum_size=524288 +GenWBA.menu.pnum.GENERIC_WBA23CEUX.upload.maximum_data_size=98304 +GenWBA.menu.pnum.GENERIC_WBA23CEUX.build.board=GENERIC_WBA23CEUX +GenWBA.menu.pnum.GENERIC_WBA23CEUX.build.product_line=STM32WBA23xx +GenWBA.menu.pnum.GENERIC_WBA23CEUX.build.variant=STM32WBAxx/WBA23CEU +GenWBA.menu.pnum.GENERIC_WBA23CEUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBAxx/STM32WBA23.svd + diff --git a/variants/STM32WLxx/WL5MOCH/generic_clock.c b/variants/STM32WBAxx/WBA23CEU/generic_clock.c similarity index 90% rename from variants/STM32WLxx/WL5MOCH/generic_clock.c rename to variants/STM32WBAxx/WBA23CEU/generic_clock.c index 7d69540851..029979b4ed 100644 --- a/variants/STM32WLxx/WL5MOCH/generic_clock.c +++ b/variants/STM32WBAxx/WBA23CEU/generic_clock.c @@ -1,6 +1,6 @@ /* ******************************************************************************* - * Copyright (c) 2020, STMicroelectronics + * Copyright (c) 2020-2026, STMicroelectronics * All rights reserved. * * This software component is licensed by ST under BSD 3-Clause license, @@ -10,7 +10,7 @@ * ******************************************************************************* */ -#if defined(ARDUINO_GENERIC_WL5MOCHX) +#if defined(ARDUINO_GENERIC_WBA23CEUX) #include "pins_arduino.h" /** diff --git a/variants/STM32WBAxx/WBA23CEU/variant_generic.cpp b/variants/STM32WBAxx/WBA23CEU/variant_generic.cpp new file mode 100644 index 0000000000..9e3e1b4fac --- /dev/null +++ b/variants/STM32WBAxx/WBA23CEU/variant_generic.cpp @@ -0,0 +1,58 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_WBA23CEUX) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_5, // D3/A3 + PA_6, // D4/A4 + PA_7, // D5/A5 + PA_8, // D6/A6 + PA_9, // D7 + PA_10, // D8 + PA_11, // D9 + PA_12, // D10 + PA_13, // D11 + PA_14, // D12 + PA_15, // D13 + PB_2, // D14 + PB_3, // D15 + PB_4, // D16 + PB_5, // D17 + PB_6, // D18 + PB_8, // D19 + PB_9, // D20 + PB_12, // D21 + PB_15, // D22 + PC_13, // D23 + PC_14, // D24 + PC_15, // D25 + PH_3 // D26 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA5 + 4, // A4, PA6 + 5, // A5, PA7 + 6 // A6, PA8 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32WBAxx/WBA23CEU/variant_generic.h b/variants/STM32WBAxx/WBA23CEU/variant_generic.h new file mode 100644 index 0000000000..4bc2bbac71 --- /dev/null +++ b/variants/STM32WBAxx/WBA23CEU/variant_generic.h @@ -0,0 +1,149 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA5 PIN_A3 +#define PA6 PIN_A4 +#define PA7 PIN_A5 +#define PA8 PIN_A6 +#define PA9 7 +#define PA10 8 +#define PA11 9 +#define PA12 10 +#define PA13 11 +#define PA14 12 +#define PA15 13 +#define PB2 14 +#define PB3 15 +#define PB4 16 +#define PB5 17 +#define PB6 18 +#define PB8 19 +#define PB9 20 +#define PB12 21 +#define PB15 22 +#define PC13 23 +#define PC14 24 +#define PC15 25 +#define PH3 26 + +// Alternate pins number +#define PA11_ALT1 (PA11 | ALT1) +#define PB2_ALT1 (PB2 | ALT1) + +#define NUM_DIGITAL_PINS 27 +#define NUM_ANALOG_INPUTS 7 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA5 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA6 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA7 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA0 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA7 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PA6 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM16 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM17 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 101 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA2 +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN8_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32WBAxx/WBA23KEU/CMakeLists.txt b/variants/STM32WBAxx/WBA23KEU/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WBAxx/WBA23KEU/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBAxx/WBA23KEU/PeripheralPins.c b/variants/STM32WBAxx/WBA23KEU/PeripheralPins.c new file mode 100644 index 0000000000..26c07020c2 --- /dev/null +++ b/variants/STM32WBAxx/WBA23KEU/PeripheralPins.c @@ -0,0 +1,178 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32WBA23KEUx.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC4_IN9 + {PA_1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC4_IN8 + {PA_2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC4_IN7 + {PA_5, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC4_IN4 + {PA_6, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC4_IN3 + {PA_7, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC4_IN2 + {PA_8, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC4_IN1 + {NC, NP, 0} +}; +#endif + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_6, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_15, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** No I3C *** + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_2, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_7, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_8, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_4, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_9, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_12, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_5, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USART1)}, + {PA_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USART1)}, + {PB_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PH_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USART1)}, + {PA_8, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_15, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PH_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_15, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PB_8, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_7, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_SPI3)}, + {PB_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_0, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_8, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +//*** No CAN *** + +//*** No ETHERNET *** + +//*** No QUADSPI *** + +//*** No USB *** + +//*** No SD *** + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32WBAxx/WBA23KEU/PinNamesVar.h b/variants/STM32WBAxx/WBA23KEU/PinNamesVar.h new file mode 100644 index 0000000000..c6b579ba4f --- /dev/null +++ b/variants/STM32WBAxx/WBA23KEU/PinNamesVar.h @@ -0,0 +1,35 @@ +/* No alternate */ + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PA_1, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = PA_5, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6_1 = PA_12, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = PA_6, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = PA_7, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8_1 = PB_9, +#endif + +/* No USB */ diff --git a/variants/STM32WBAxx/WBA23KEU/boards_entry.txt b/variants/STM32WBAxx/WBA23KEU/boards_entry.txt new file mode 100644 index 0000000000..757b82456f --- /dev/null +++ b/variants/STM32WBAxx/WBA23KEU/boards_entry.txt @@ -0,0 +1,14 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic WBA23KEUx +GenWBA.menu.pnum.GENERIC_WBA23KEUX=Generic WBA23KEUx +GenWBA.menu.pnum.GENERIC_WBA23KEUX.upload.maximum_size=524288 +GenWBA.menu.pnum.GENERIC_WBA23KEUX.upload.maximum_data_size=98304 +GenWBA.menu.pnum.GENERIC_WBA23KEUX.build.board=GENERIC_WBA23KEUX +GenWBA.menu.pnum.GENERIC_WBA23KEUX.build.product_line=STM32WBA23xx +GenWBA.menu.pnum.GENERIC_WBA23KEUX.build.variant=STM32WBAxx/WBA23KEU +GenWBA.menu.pnum.GENERIC_WBA23KEUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBAxx/STM32WBA23.svd + diff --git a/variants/STM32WBAxx/WBA23KEU/generic_clock.c b/variants/STM32WBAxx/WBA23KEU/generic_clock.c new file mode 100644 index 0000000000..47caaa72a9 --- /dev/null +++ b/variants/STM32WBAxx/WBA23KEU/generic_clock.c @@ -0,0 +1,27 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_WBA23KEUX) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32WBAxx/WBA23KEU/variant_generic.cpp b/variants/STM32WBAxx/WBA23KEU/variant_generic.cpp new file mode 100644 index 0000000000..90f10b2304 --- /dev/null +++ b/variants/STM32WBAxx/WBA23KEU/variant_generic.cpp @@ -0,0 +1,51 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_WBA23KEUX) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_5, // D3/A3 + PA_6, // D4/A4 + PA_7, // D5/A5 + PA_8, // D6/A6 + PA_12, // D7 + PA_13, // D8 + PA_14, // D9 + PA_15, // D10 + PB_3, // D11 + PB_4, // D12 + PB_8, // D13 + PB_9, // D14 + PB_12, // D15 + PB_15, // D16 + PC_14, // D17 + PC_15, // D18 + PH_3 // D19 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA5 + 4, // A4, PA6 + 5, // A5, PA7 + 6 // A6, PA8 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32WBAxx/WBA23KEU/variant_generic.h b/variants/STM32WBAxx/WBA23KEU/variant_generic.h new file mode 100644 index 0000000000..8851ebb6f6 --- /dev/null +++ b/variants/STM32WBAxx/WBA23KEU/variant_generic.h @@ -0,0 +1,136 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA5 PIN_A3 +#define PA6 PIN_A4 +#define PA7 PIN_A5 +#define PA8 PIN_A6 +#define PA12 7 +#define PA13 8 +#define PA14 9 +#define PA15 10 +#define PB3 11 +#define PB4 12 +#define PB8 13 +#define PB9 14 +#define PB12 15 +#define PB15 16 +#define PC14 17 +#define PC15 18 +#define PH3 19 + +#define NUM_DIGITAL_PINS 20 +#define NUM_ANALOG_INPUTS 7 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA5 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA6 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA7 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA0 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA7 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PA6 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM16 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM17 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 101 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA2 +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN8_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32WBAxx/WBA25CEU/CMakeLists.txt b/variants/STM32WBAxx/WBA25CEU/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WBAxx/WBA25CEU/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBAxx/WBA25CEU/PeripheralPins.c b/variants/STM32WBAxx/WBA25CEU/PeripheralPins.c new file mode 100644 index 0000000000..2fb42bff4b --- /dev/null +++ b/variants/STM32WBAxx/WBA25CEU/PeripheralPins.c @@ -0,0 +1,198 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32WBA25CEUx.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC4_IN8 + {PA_2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC4_IN7 + {PA_5, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC4_IN4 + {PA_6, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC4_IN3 + {PA_7, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC4_IN2 + {PA_8, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC4_IN1 + {NC, NP, 0} +}; +#endif + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_11, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PA_11_ALT1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C3)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_6, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_15, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_2, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_2_ALT1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** No I3C *** + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_2, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_7, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_8, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_4, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_6, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_9, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_12, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_5, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USART1)}, + {PA_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USART1)}, + {PB_2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PH_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USART1)}, + {PA_8, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_15, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_LPUART1)}, + {PB_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PH_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_15, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PA_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_SPI3)}, + {PB_8, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_7, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PA_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_SPI3)}, + {PB_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_8, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +//*** No CAN *** + +//*** No ETHERNET *** + +//*** No QUADSPI *** + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_8, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USB)}, // USB_NOE + {PB_8, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PB_9, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {NC, NP, 0} +}; +#endif + +//*** No SD *** + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32WBAxx/WBA25CEU/PinNamesVar.h b/variants/STM32WBAxx/WBA25CEU/PinNamesVar.h new file mode 100644 index 0000000000..60f52addae --- /dev/null +++ b/variants/STM32WBAxx/WBA25CEU/PinNamesVar.h @@ -0,0 +1,46 @@ +/* Alternate pin name */ +PA_11_ALT1 = PA_11 | ALT1, +PB_2_ALT1 = PB_2 | ALT1, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PB_2, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PA_1, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3_1 = PB_6, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = PA_5, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6_1 = PA_12, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = PA_6, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = PA_7, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8_1 = PB_9, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PB_9, + USB_DP = PB_8, + USB_NOE = PA_13, + USB_SOF = PA_8, +#endif diff --git a/variants/STM32WBAxx/WBA25CEU/boards_entry.txt b/variants/STM32WBAxx/WBA25CEU/boards_entry.txt new file mode 100644 index 0000000000..dceab894bb --- /dev/null +++ b/variants/STM32WBAxx/WBA25CEU/boards_entry.txt @@ -0,0 +1,14 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic WBA25CEUx +GenWBA.menu.pnum.GENERIC_WBA25CEUX=Generic WBA25CEUx +GenWBA.menu.pnum.GENERIC_WBA25CEUX.upload.maximum_size=524288 +GenWBA.menu.pnum.GENERIC_WBA25CEUX.upload.maximum_data_size=98304 +GenWBA.menu.pnum.GENERIC_WBA25CEUX.build.board=GENERIC_WBA25CEUX +GenWBA.menu.pnum.GENERIC_WBA25CEUX.build.product_line=STM32WBA25xx +GenWBA.menu.pnum.GENERIC_WBA25CEUX.build.variant=STM32WBAxx/WBA25CEU +GenWBA.menu.pnum.GENERIC_WBA25CEUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBAxx/STM32WBA25.svd + diff --git a/variants/STM32WBAxx/WBA25CEU/generic_clock.c b/variants/STM32WBAxx/WBA25CEU/generic_clock.c new file mode 100644 index 0000000000..4c96fcef45 --- /dev/null +++ b/variants/STM32WBAxx/WBA25CEU/generic_clock.c @@ -0,0 +1,27 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_WBA25CEUX) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32WBAxx/WBA25CEU/variant_generic.cpp b/variants/STM32WBAxx/WBA25CEU/variant_generic.cpp new file mode 100644 index 0000000000..584961f401 --- /dev/null +++ b/variants/STM32WBAxx/WBA25CEU/variant_generic.cpp @@ -0,0 +1,56 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_WBA25CEUX) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_1, // D0/A0 + PA_2, // D1/A1 + PA_5, // D2/A2 + PA_6, // D3/A3 + PA_7, // D4/A4 + PA_8, // D5/A5 + PA_9, // D6 + PA_10, // D7 + PA_11, // D8 + PA_12, // D9 + PA_13, // D10 + PA_14, // D11 + PA_15, // D12 + PB_2, // D13 + PB_3, // D14 + PB_4, // D15 + PB_5, // D16 + PB_6, // D17 + PB_8, // D18 + PB_9, // D19 + PB_12, // D20 + PB_15, // D21 + PC_13, // D22 + PC_14, // D23 + PC_15, // D24 + PH_3 // D25 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA1 + 1, // A1, PA2 + 2, // A2, PA5 + 3, // A3, PA6 + 4, // A4, PA7 + 5 // A5, PA8 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32WBAxx/WBA25CEU/variant_generic.h b/variants/STM32WBAxx/WBA25CEU/variant_generic.h new file mode 100644 index 0000000000..bc90b01ce5 --- /dev/null +++ b/variants/STM32WBAxx/WBA25CEU/variant_generic.h @@ -0,0 +1,147 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA1 PIN_A0 +#define PA2 PIN_A1 +#define PA5 PIN_A2 +#define PA6 PIN_A3 +#define PA7 PIN_A4 +#define PA8 PIN_A5 +#define PA9 6 +#define PA10 7 +#define PA11 8 +#define PA12 9 +#define PA13 10 +#define PA14 11 +#define PA15 12 +#define PB2 13 +#define PB3 14 +#define PB4 15 +#define PB5 16 +#define PB6 17 +#define PB8 18 +#define PB9 19 +#define PB12 20 +#define PB15 21 +#define PC13 22 +#define PC14 23 +#define PC15 24 +#define PH3 25 + +// Alternate pins number +#define PA11_ALT1 (PA11 | ALT1) +#define PB2_ALT1 (PB2 | ALT1) + +#define NUM_DIGITAL_PINS 26 +#define NUM_ANALOG_INPUTS 6 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA5 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA6 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA7 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA8 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA7 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PA6 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM16 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM17 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 101 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA2 +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN8_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32WBAxx/WBA25HEF/CMakeLists.txt b/variants/STM32WBAxx/WBA25HEF/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WBAxx/WBA25HEF/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBAxx/WBA25HEF/PeripheralPins.c b/variants/STM32WBAxx/WBA25HEF/PeripheralPins.c new file mode 100644 index 0000000000..8b915f3632 --- /dev/null +++ b/variants/STM32WBAxx/WBA25HEF/PeripheralPins.c @@ -0,0 +1,170 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32WBA25HEFx.xml + * CubeMX DB release 6.0.170 + */ +#if !defined(CUSTOM_PERIPHERAL_PINS) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_5, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC4_IN4 + {PA_6, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC4_IN3 + {PA_8, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC4_IN1 + {NC, NP, 0} +}; +#endif + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_6, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_15, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** No I3C *** + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_8, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_4, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_9, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_5, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USART1)}, + {PA_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USART1)}, + {PH_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_8, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_15, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PH_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_15, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PB_8, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_SPI3)}, + {PB_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_8, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +//*** No CAN *** + +//*** No ETHERNET *** + +//*** No QUADSPI *** + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_8, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_SOF + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USB)}, // USB_NOE + {PB_8, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PB_9, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {NC, NP, 0} +}; +#endif + +//*** No SD *** + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32WBAxx/WBA25HEF/PinNamesVar.h b/variants/STM32WBAxx/WBA25HEF/PinNamesVar.h new file mode 100644 index 0000000000..e8789fc8a6 --- /dev/null +++ b/variants/STM32WBAxx/WBA25HEF/PinNamesVar.h @@ -0,0 +1,38 @@ +/* No alternate */ + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = NC, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = NC, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = PA_5, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6_1 = PA_12, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = PA_6, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = PB_9, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PB_9, + USB_DP = PB_8, + USB_NOE = PA_13, + USB_SOF = PA_8, +#endif diff --git a/variants/STM32WBAxx/WBA25HEF/boards_entry.txt b/variants/STM32WBAxx/WBA25HEF/boards_entry.txt new file mode 100644 index 0000000000..8da0b7fcbb --- /dev/null +++ b/variants/STM32WBAxx/WBA25HEF/boards_entry.txt @@ -0,0 +1,14 @@ +# This file help to add generic board entry. +# upload.maximum_size and product_line have to be verified +# and changed if needed. +# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29 + +# Generic WBA25HEFx +GenWBA.menu.pnum.GENERIC_WBA25HEFX=Generic WBA25HEFx +GenWBA.menu.pnum.GENERIC_WBA25HEFX.upload.maximum_size=524288 +GenWBA.menu.pnum.GENERIC_WBA25HEFX.upload.maximum_data_size=98304 +GenWBA.menu.pnum.GENERIC_WBA25HEFX.build.board=GENERIC_WBA25HEFX +GenWBA.menu.pnum.GENERIC_WBA25HEFX.build.product_line=STM32WBA25xx +GenWBA.menu.pnum.GENERIC_WBA25HEFX.build.variant=STM32WBAxx/WBA25HEF +GenWBA.menu.pnum.GENERIC_WBA25HEFX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBAxx/STM32WBA25.svd + diff --git a/variants/STM32WBAxx/WBA25HEF/generic_clock.c b/variants/STM32WBAxx/WBA25HEF/generic_clock.c new file mode 100644 index 0000000000..a29d9939f0 --- /dev/null +++ b/variants/STM32WBAxx/WBA25HEF/generic_clock.c @@ -0,0 +1,27 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_WBA25HEFX) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32WBAxx/WBA25HEF/variant_generic.cpp b/variants/STM32WBAxx/WBA25HEF/variant_generic.cpp new file mode 100644 index 0000000000..80917c8abe --- /dev/null +++ b/variants/STM32WBAxx/WBA25HEF/variant_generic.cpp @@ -0,0 +1,42 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_WBA25HEFX) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_5, // D0/A0 + PA_6, // D1/A1 + PA_8, // D2/A2 + PA_12, // D3 + PA_13, // D4 + PA_14, // D5 + PA_15, // D6 + PB_3, // D7 + PB_4, // D8 + PB_8, // D9 + PB_9, // D10 + PB_15, // D11 + PC_14, // D12 + PC_15, // D13 + PH_3 // D14 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA5 + 1, // A1, PA6 + 2 // A2, PA8 +}; + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32WBAxx/WBA25HEF/variant_generic.h b/variants/STM32WBAxx/WBA25HEF/variant_generic.h new file mode 100644 index 0000000000..326162e557 --- /dev/null +++ b/variants/STM32WBAxx/WBA25HEF/variant_generic.h @@ -0,0 +1,130 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA5 PIN_A0 +#define PA6 PIN_A1 +#define PA8 PIN_A2 +#define PA12 3 +#define PA13 4 +#define PA14 5 +#define PA15 6 +#define PB3 7 +#define PB4 8 +#define PB8 9 +#define PB9 10 +#define PB15 11 +#define PC14 12 +#define PC15 13 +#define PH3 14 + +#define NUM_DIGITAL_PINS 15 +#define NUM_ANALOG_INPUTS 3 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA5 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA6 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PB4 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA8 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA8 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PA6 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM16 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM17 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 1 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA8 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA5 +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN6_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif diff --git a/variants/STM32WBAxx/WBA50KGU/PeripheralPins.c b/variants/STM32WBAxx/WBA50KGU/PeripheralPins.c index 2afcb9782b..c0e3d96262 100644 --- a/variants/STM32WBAxx/WBA50KGU/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA50KGU/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WBA50KGUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBAxx/WBA52C(E-G)U_WBA54C(E-G)U/PeripheralPins.c b/variants/STM32WBAxx/WBA52C(E-G)U_WBA54C(E-G)U/PeripheralPins.c index 460dd440ae..a6fbc8e2b7 100644 --- a/variants/STM32WBAxx/WBA52C(E-G)U_WBA54C(E-G)U/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA52C(E-G)U_WBA54C(E-G)U/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32WBA52CEUx.xml, STM32WBA52CGUx.xml * STM32WBA54CEUx.xml, STM32WBA54CGUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBAxx/WBA52K(E-G)U_WBA54K(E-G)U/PeripheralPins.c b/variants/STM32WBAxx/WBA52K(E-G)U_WBA54K(E-G)U/PeripheralPins.c index e548753187..e9461df7c5 100644 --- a/variants/STM32WBAxx/WBA52K(E-G)U_WBA54K(E-G)U/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA52K(E-G)U_WBA54K(E-G)U/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32WBA52KEUx.xml, STM32WBA52KGUx.xml * STM32WBA54KEUx.xml, STM32WBA54KGUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBAxx/WBA55C(E-G)U/PeripheralPins.c b/variants/STM32WBAxx/WBA55C(E-G)U/PeripheralPins.c index 598890dcb2..da72de53e8 100644 --- a/variants/STM32WBAxx/WBA55C(E-G)U/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA55C(E-G)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WBA55CEUx.xml, STM32WBA55CGUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBAxx/WBA55H(E-G)F/PeripheralPins.c b/variants/STM32WBAxx/WBA55H(E-G)F/PeripheralPins.c index 141166ee78..c56c4d904b 100644 --- a/variants/STM32WBAxx/WBA55H(E-G)F/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA55H(E-G)F/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WBA55HEFx.xml, STM32WBA55HGFx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBAxx/WBA55U(E-G)I/PeripheralPins.c b/variants/STM32WBAxx/WBA55U(E-G)I/PeripheralPins.c index 9b10c7721a..292a84dadb 100644 --- a/variants/STM32WBAxx/WBA55U(E-G)I/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA55U(E-G)I/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WBA55UEIx.xml, STM32WBA55UGIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBAxx/WBA5MMGH/PeripheralPins.c b/variants/STM32WBAxx/WBA5MMGH/PeripheralPins.c index e33b4e8164..efdbcdc2af 100644 --- a/variants/STM32WBAxx/WBA5MMGH/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA5MMGH/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WBA5MMGHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBAxx/WBA62C(G-I)U_WBA64C(G-I)U/PeripheralPins.c b/variants/STM32WBAxx/WBA62C(G-I)U_WBA64C(G-I)U/PeripheralPins.c index 9d4fc232e2..ab0dadb427 100644 --- a/variants/STM32WBAxx/WBA62C(G-I)U_WBA64C(G-I)U/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA62C(G-I)U_WBA64C(G-I)U/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32WBA62CGUx.xml, STM32WBA62CIUx.xml * STM32WBA64CGUx.xml, STM32WBA64CIUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" @@ -177,6 +177,7 @@ WEAK const PinMap PinMap_UART_CTS[] = { #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_MOSI[] = { {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, {PB_8, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, {NC, NP, 0} }; @@ -184,24 +185,31 @@ WEAK const PinMap PinMap_SPI_MOSI[] = { #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_MISO[] = { - {PA_1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, - {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, - {NC, NP, 0} + {PA_1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} }; #endif #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_SCLK[] = { - {PA_7, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, - {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, - {NC, NP, 0} + {PA_7, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI2)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} }; #endif #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_SSEL[] = { {PA_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI2)}, {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI2)}, {NC, NP, 0} }; #endif diff --git a/variants/STM32WBAxx/WBA62M(G-I)F_WBA65M(G-I)F/PeripheralPins.c b/variants/STM32WBAxx/WBA62M(G-I)F_WBA65M(G-I)F/PeripheralPins.c index 12bcacafa9..0c3575e1b3 100644 --- a/variants/STM32WBAxx/WBA62M(G-I)F_WBA65M(G-I)F/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA62M(G-I)F_WBA65M(G-I)F/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32WBA62MGFx.xml, STM32WBA62MIFx.xml * STM32WBA65MGFx.xml, STM32WBA65MIFx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBAxx/WBA62P(G-I)I_WBA65P(G-I)I/PeripheralPins.c b/variants/STM32WBAxx/WBA62P(G-I)I_WBA65P(G-I)I/PeripheralPins.c index 5de3456b24..891cd89ee3 100644 --- a/variants/STM32WBAxx/WBA62P(G-I)I_WBA65P(G-I)I/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA62P(G-I)I_WBA65P(G-I)I/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32WBA62PGIx.xml, STM32WBA62PIIx.xml * STM32WBA65PGIx.xml, STM32WBA65PIIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBAxx/WBA63C(G-I)U/PeripheralPins.c b/variants/STM32WBAxx/WBA63C(G-I)U/PeripheralPins.c index cfddcd8c04..41bf548c82 100644 --- a/variants/STM32WBAxx/WBA63C(G-I)U/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA63C(G-I)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WBA63CGUx.xml, STM32WBA63CIUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBAxx/WBA65C(G-I)U/PeripheralPins.c b/variants/STM32WBAxx/WBA65C(G-I)U/PeripheralPins.c index 3bd7148084..db21277c92 100644 --- a/variants/STM32WBAxx/WBA65C(G-I)U/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA65C(G-I)U/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WBA65CGUx.xml, STM32WBA65CIUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" @@ -162,6 +162,7 @@ WEAK const PinMap PinMap_UART_CTS[] = { #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_MOSI[] = { {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, {PB_8, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, {NC, NP, 0} }; @@ -169,15 +170,18 @@ WEAK const PinMap PinMap_SPI_MOSI[] = { #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_MISO[] = { - {PA_1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, - {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, - {NC, NP, 0} + {PA_1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} }; #endif #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_SCLK[] = { {PA_7, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI2)}, {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, {NC, NP, 0} }; @@ -186,7 +190,9 @@ WEAK const PinMap PinMap_SPI_SCLK[] = { #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_SSEL[] = { {PA_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI2)}, {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI2)}, {NC, NP, 0} }; #endif diff --git a/variants/STM32WBAxx/WBA65R(G-I)V/PeripheralPins.c b/variants/STM32WBAxx/WBA65R(G-I)V/PeripheralPins.c index 9ad77bcef3..ceab1719df 100644 --- a/variants/STM32WBAxx/WBA65R(G-I)V/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA65R(G-I)V/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WBA65RGVx.xml, STM32WBA65RIVx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBAxx/WBA6MOIH/PeripheralPins.c b/variants/STM32WBAxx/WBA6MOIH/PeripheralPins.c index 765b457b0d..9f7a923214 100644 --- a/variants/STM32WBAxx/WBA6MOIH/PeripheralPins.c +++ b/variants/STM32WBAxx/WBA6MOIH/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WBA6MOIHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" @@ -107,8 +107,8 @@ WEAK const PinMap PinMap_TIM[] = { {PB_2, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N {PB_3, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 {PB_3_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N - {PB_4, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE, 3, 0)}, // TIM1_CH3 - {PB_4_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE, 1, 0)}, // TIM17_CH1 + {PB_4, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PB_4_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 {PB_6, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 {PB_6_ALT1, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_TIM4, 1, 0)}, // TIM4_CH1 @@ -167,7 +167,7 @@ WEAK const PinMap PinMap_UART_RX[] = { {PA_8, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, {PA_11, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, - {PB_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, + {PB_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, {PB_8, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, @@ -241,7 +241,7 @@ WEAK const PinMap PinMap_SPI_SCLK[] = { {PA_0, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, {PA_7, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI2)}, - {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, {NC, NP, 0} diff --git a/variants/STM32WBxx/WB10CCU/PeripheralPins.c b/variants/STM32WBxx/WB10CCU/PeripheralPins.c index 9a2993c898..b42df74874 100644 --- a/variants/STM32WBxx/WB10CCU/PeripheralPins.c +++ b/variants/STM32WBxx/WB10CCU/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WB10CCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBxx/WB15CCU/PeripheralPins.c b/variants/STM32WBxx/WB15CCU/PeripheralPins.c index 127c620d08..3adf65e3e2 100644 --- a/variants/STM32WBxx/WB15CCU/PeripheralPins.c +++ b/variants/STM32WBxx/WB15CCU/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WB15CCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBxx/WB15CCUxE/PeripheralPins.c b/variants/STM32WBxx/WB15CCUxE/PeripheralPins.c index ef268f701f..a3e36dfe7f 100644 --- a/variants/STM32WBxx/WB15CCUxE/PeripheralPins.c +++ b/variants/STM32WBxx/WB15CCUxE/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WB15CCUxE.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBxx/WB15CCY/PeripheralPins.c b/variants/STM32WBxx/WB15CCY/PeripheralPins.c index a73655c717..068e138956 100644 --- a/variants/STM32WBxx/WB15CCY/PeripheralPins.c +++ b/variants/STM32WBxx/WB15CCY/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WB15CCYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBxx/WB1MMCH/PeripheralPins.c b/variants/STM32WBxx/WB1MMCH/PeripheralPins.c index 6bf9cc0bff..f1b0c0eb3d 100644 --- a/variants/STM32WBxx/WB1MMCH/PeripheralPins.c +++ b/variants/STM32WBxx/WB1MMCH/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WB1MMCHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBxx/WB30CEUxA_WB50CGU/PeripheralPins.c b/variants/STM32WBxx/WB30CEUxA_WB50CGU/PeripheralPins.c index 9e779f8ef5..4a3a3c3772 100644 --- a/variants/STM32WBxx/WB30CEUxA_WB50CGU/PeripheralPins.c +++ b/variants/STM32WBxx/WB30CEUxA_WB50CGU/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WB30CEUxA.xml, STM32WB50CGUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBxx/WB35C(C-E)UxA_WB55C(C-E-G)U/PeripheralPins.c b/variants/STM32WBxx/WB35C(C-E)UxA_WB55C(C-E-G)U/PeripheralPins.c index e1ff7b845d..0991258a50 100644 --- a/variants/STM32WBxx/WB35C(C-E)UxA_WB55C(C-E-G)U/PeripheralPins.c +++ b/variants/STM32WBxx/WB35C(C-E)UxA_WB55C(C-E-G)U/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32WB35C(C-E)UxA.xml, STM32WB55CCUx.xml * STM32WB55CEUx.xml, STM32WB55CGUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBxx/WB55R(C-E-G)V/PeripheralPins.c b/variants/STM32WBxx/WB55R(C-E-G)V/PeripheralPins.c index 057ee56441..f69b2b9f30 100644 --- a/variants/STM32WBxx/WB55R(C-E-G)V/PeripheralPins.c +++ b/variants/STM32WBxx/WB55R(C-E-G)V/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32WB55RCVx.xml, STM32WB55REVx.xml * STM32WB55RGVx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY/PeripheralPins.c b/variants/STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY/PeripheralPins.c index 2794ab0e09..2e56ef9776 100644 --- a/variants/STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY/PeripheralPins.c +++ b/variants/STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32WB55VEQx.xml, STM32WB55VEYx.xml * STM32WB55VGQx.xml, STM32WB55VGYx.xml * STM32WB55VYYx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WBxx/WB5MMGH/PeripheralPins.c b/variants/STM32WBxx/WB5MMGH/PeripheralPins.c index d11170e6b2..0b7c267f1f 100644 --- a/variants/STM32WBxx/WB5MMGH/PeripheralPins.c +++ b/variants/STM32WBxx/WB5MMGH/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WB5MMGHx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WL3x/WL30K(8-B)V/PeripheralPins.c b/variants/STM32WL3x/WL30K(8-B)V/PeripheralPins.c index 0760a4727b..0eaf1aa57c 100644 --- a/variants/STM32WL3x/WL30K(8-B)V/PeripheralPins.c +++ b/variants/STM32WL3x/WL30K(8-B)V/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WL30K8Vx.xml, STM32WL30KBVx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WL3x/WL31C(8-B)V/PeripheralPins.c b/variants/STM32WL3x/WL31C(8-B)V/PeripheralPins.c index 0062dbfc7e..6bc4764106 100644 --- a/variants/STM32WL3x/WL31C(8-B)V/PeripheralPins.c +++ b/variants/STM32WL3x/WL31C(8-B)V/PeripheralPins.c @@ -12,7 +12,7 @@ */ /* * Automatically generated from STM32WL31C8Vx.xml, STM32WL31CBVx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WL3x/WL31K(8-B)V_WL33K(8-B-C)Vx(X)/PeripheralPins.c b/variants/STM32WL3x/WL31K(8-B)V_WL33K(8-B-C)Vx(X)/PeripheralPins.c index bc7c98b690..7ca0a22483 100644 --- a/variants/STM32WL3x/WL31K(8-B)V_WL33K(8-B-C)Vx(X)/PeripheralPins.c +++ b/variants/STM32WL3x/WL31K(8-B)V_WL33K(8-B-C)Vx(X)/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32WL33K8Vx.xml, STM32WL33K8VxX.xml * STM32WL33KBVx.xml, STM32WL33KBVxX.xml * STM32WL33KCVx.xml, STM32WL33KCVxX.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WL3x/WL33C(8-B-C)Vx(X)/PeripheralPins.c b/variants/STM32WL3x/WL33C(8-B-C)Vx(X)/PeripheralPins.c index a4bcb309c9..4e132462f2 100644 --- a/variants/STM32WL3x/WL33C(8-B-C)Vx(X)/PeripheralPins.c +++ b/variants/STM32WL3x/WL33C(8-B-C)Vx(X)/PeripheralPins.c @@ -14,7 +14,7 @@ * Automatically generated from STM32WL33C8Vx.xml, STM32WL33C8VxX.xml * STM32WL33CBVx.xml, STM32WL33CBVxX.xml * STM32WL33CCVx.xml, STM32WL33CCVxX.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WL3x/WL3RK(8-B)Vx(X)/PeripheralPins.c b/variants/STM32WL3x/WL3RK(8-B)Vx(X)/PeripheralPins.c index 767056f463..143dfea464 100644 --- a/variants/STM32WL3x/WL3RK(8-B)Vx(X)/PeripheralPins.c +++ b/variants/STM32WL3x/WL3RK(8-B)Vx(X)/PeripheralPins.c @@ -13,7 +13,7 @@ /* * Automatically generated from STM32WL3RK8Vx.xml, STM32WL3RK8VxX.xml * STM32WL3RKBVx.xml, STM32WL3RKBVxX.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/PeripheralPins.c b/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/PeripheralPins.c index e626074e2e..f41c5d6fd7 100644 --- a/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/PeripheralPins.c +++ b/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32WLE4C8Ux.xml, STM32WLE4CBUx.xml * STM32WLE4CCUx.xml, STM32WLE5C8Ux.xml * STM32WLE5CBUx.xml, STM32WLE5CCUx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I/PeripheralPins.c b/variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I/PeripheralPins.c index d984bab908..d769258c14 100644 --- a/variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I/PeripheralPins.c +++ b/variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I/PeripheralPins.c @@ -15,7 +15,7 @@ * STM32WLE4J8Ix.xml, STM32WLE4JBIx.xml * STM32WLE4JCIx.xml, STM32WLE5J8Ix.xml * STM32WLE5JBIx.xml, STM32WLE5JCIx.xml - * CubeMX DB release 6.0.160 + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WLxx/WL5MOCHx(S)/CMakeLists.txt b/variants/STM32WLxx/WL5MOCHx(S)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WLxx/WL5MOCHx(S)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WLxx/WL5MOCH/PeripheralPins.c b/variants/STM32WLxx/WL5MOCHx(S)/PeripheralPins.c similarity index 99% rename from variants/STM32WLxx/WL5MOCH/PeripheralPins.c rename to variants/STM32WLxx/WL5MOCHx(S)/PeripheralPins.c index c0a99122f9..a195f97712 100644 --- a/variants/STM32WLxx/WL5MOCH/PeripheralPins.c +++ b/variants/STM32WLxx/WL5MOCHx(S)/PeripheralPins.c @@ -11,8 +11,8 @@ ******************************************************************************* */ /* - * Automatically generated from STM32WL5MOCHx.xml - * CubeMX DB release 6.0.160 + * Automatically generated from STM32WL5MOCHx.xml, STM32WL5MOCHxS.xml + * CubeMX DB release 6.0.170 */ #if !defined(CUSTOM_PERIPHERAL_PINS) #include "Arduino.h" diff --git a/variants/STM32WLxx/WL5MOCH/PinNamesVar.h b/variants/STM32WLxx/WL5MOCHx(S)/PinNamesVar.h similarity index 100% rename from variants/STM32WLxx/WL5MOCH/PinNamesVar.h rename to variants/STM32WLxx/WL5MOCHx(S)/PinNamesVar.h diff --git a/variants/STM32WLxx/WL5MOCH/boards_entry.txt b/variants/STM32WLxx/WL5MOCHx(S)/boards_entry.txt similarity index 58% rename from variants/STM32WLxx/WL5MOCH/boards_entry.txt rename to variants/STM32WLxx/WL5MOCHx(S)/boards_entry.txt index 510498bfe4..f6e70602c9 100644 --- a/variants/STM32WLxx/WL5MOCH/boards_entry.txt +++ b/variants/STM32WLxx/WL5MOCHx(S)/boards_entry.txt @@ -9,6 +9,15 @@ GenWL.menu.pnum.GENERIC_WL5MOCHX.upload.maximum_size=262144 GenWL.menu.pnum.GENERIC_WL5MOCHX.upload.maximum_data_size=65536 GenWL.menu.pnum.GENERIC_WL5MOCHX.build.board=GENERIC_WL5MOCHX GenWL.menu.pnum.GENERIC_WL5MOCHX.build.product_line=STM32WL5Mxx -GenWL.menu.pnum.GENERIC_WL5MOCHX.build.variant=STM32WLxx/WL5MOCH +GenWL.menu.pnum.GENERIC_WL5MOCHX.build.variant=STM32WLxx/WL5MOCHx(S) GenWL.menu.pnum.GENERIC_WL5MOCHX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WLxx/STM32WL5x_CM4.svd +# Generic WL5MOCHxS +GenWL.menu.pnum.GENERIC_WL5MOCHXS=Generic WL5MOCHxS +GenWL.menu.pnum.GENERIC_WL5MOCHXS.upload.maximum_size=262144 +GenWL.menu.pnum.GENERIC_WL5MOCHXS.upload.maximum_data_size=65536 +GenWL.menu.pnum.GENERIC_WL5MOCHXS.build.board=GENERIC_WL5MOCHXS +GenWL.menu.pnum.GENERIC_WL5MOCHXS.build.product_line=STM32WL5Mxx +GenWL.menu.pnum.GENERIC_WL5MOCHXS.build.variant=STM32WLxx/WL5MOCHx(S) +GenWL.menu.pnum.GENERIC_WL5MOCHXS.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WLxx/STM32WL5x_CM4.svd + diff --git a/variants/STM32WLxx/WL5MOCHx(S)/generic_clock.c b/variants/STM32WLxx/WL5MOCHx(S)/generic_clock.c new file mode 100644 index 0000000000..8e1628e6bb --- /dev/null +++ b/variants/STM32WLxx/WL5MOCHx(S)/generic_clock.c @@ -0,0 +1,27 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_WL5MOCHX) || defined(ARDUINO_GENERIC_WL5MOCHXS) +#include "pins_arduino.h" + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + /* SystemClock_Config can be generated by STM32CubeMX */ +#warning "SystemClock_Config() is empty. Default clock at reset is used." +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32WLxx/WL5MOCH/variant_generic.cpp b/variants/STM32WLxx/WL5MOCHx(S)/variant_generic.cpp similarity index 95% rename from variants/STM32WLxx/WL5MOCH/variant_generic.cpp rename to variants/STM32WLxx/WL5MOCHx(S)/variant_generic.cpp index 1137185a86..439c9d41a2 100644 --- a/variants/STM32WLxx/WL5MOCH/variant_generic.cpp +++ b/variants/STM32WLxx/WL5MOCHx(S)/variant_generic.cpp @@ -10,7 +10,7 @@ * ******************************************************************************* */ -#if defined(ARDUINO_GENERIC_WL5MOCHX) +#if defined(ARDUINO_GENERIC_WL5MOCHX) || defined(ARDUINO_GENERIC_WL5MOCHXS) #include "pins_arduino.h" // Digital PinName array diff --git a/variants/STM32WLxx/WL5MOCH/variant_generic.h b/variants/STM32WLxx/WL5MOCHx(S)/variant_generic.h similarity index 100% rename from variants/STM32WLxx/WL5MOCH/variant_generic.h rename to variants/STM32WLxx/WL5MOCHx(S)/variant_generic.h