From 16178cdbde7198905830ab8354b37342d8480eca Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 21 Oct 2025 13:53:24 +0530 Subject: [PATCH 001/625] DONOTCOMMIT: arm64: armv8_deprecated: Drop deprecated CP15 warning Signed-off-by: Jai Luthra --- arch/arm64/kernel/armv8_deprecated.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/armv8_deprecated.c b/arch/arm64/kernel/armv8_deprecated.c index e737c6295ec759..0f00f59ff21f89 100644 --- a/arch/arm64/kernel/armv8_deprecated.c +++ b/arch/arm64/kernel/armv8_deprecated.c @@ -295,8 +295,8 @@ static int cp15barrier_handler(struct pt_regs *regs, u32 instr) } ret: - pr_warn_ratelimited("\"%s\" (%ld) uses deprecated CP15 Barrier instruction at 0x%llx\n", - current->comm, (unsigned long)current->pid, regs->pc); + /*pr_warn_ratelimited("\"%s\" (%ld) uses deprecated CP15 Barrier instruction at 0x%llx\n",*/ + /*current->comm, (unsigned long)current->pid, regs->pc);*/ arm64_skip_faulting_instruction(regs, 4); return 0; From 80415a3006d811aeeeac99f8a9762a7f319109bf Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 28 Oct 2025 12:30:32 +0530 Subject: [PATCH 002/625] clk: bcm: rpi: Mark ISP clock as critical The ISP clock should also be marked critical to prevent the clock framework from disabling it on boot, which can lead to bus lockups when the kernel tries to submit buffers to the VC4 ISP firmware. Fixes: 919d6924ae9b ("clk: bcm: rpi: Turn firmware clock on/off when preparing/unpreparing") Signed-off-by: Jai Luthra --- drivers/clk/bcm/clk-raspberrypi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c index 1a9162f0ae31e3..dcc3ae5fb91650 100644 --- a/drivers/clk/bcm/clk-raspberrypi.c +++ b/drivers/clk/bcm/clk-raspberrypi.c @@ -151,6 +151,7 @@ raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = { [RPI_FIRMWARE_ISP_CLK_ID] = { .export = true, .minimize = true, + .flags = CLK_IS_CRITICAL, }, [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = { .export = true, From d85fff2da1a4dbbba9ba6795efc54a4369786526 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Thu, 23 Oct 2025 14:11:42 +0530 Subject: [PATCH 003/625] [DNI] media: bcm2835-unicam: Add upstream compatible Only for testing. Signed-off-by: Jai Luthra --- drivers/media/platform/broadcom/bcm2835-unicam.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/platform/broadcom/bcm2835-unicam.c b/drivers/media/platform/broadcom/bcm2835-unicam.c index 53a342853be6ee..7ed4144fbe451e 100644 --- a/drivers/media/platform/broadcom/bcm2835-unicam.c +++ b/drivers/media/platform/broadcom/bcm2835-unicam.c @@ -2736,6 +2736,7 @@ static void unicam_remove(struct platform_device *pdev) static const struct of_device_id unicam_of_match[] = { { .compatible = "brcm,bcm2835-unicam", }, + { .compatible = "brcm,bcm2835-unicam-upstream", }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, unicam_of_match); From 7f90cbc52ac3f6e521e1428a9525124c965c7234 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 4 Jul 2023 01:00:12 +0300 Subject: [PATCH 004/625] [DNI] arm64: dts: broadcom: Add overlay for Raspberry Pi 4B IMX219 camera For testing only at this point. Signed-off-by: Laurent Pinchart --- Changes since v6: - Add combined DTB to dtbs --- arch/arm64/boot/dts/broadcom/Makefile | 4 ++ .../dts/broadcom/bcm2711-rpi-4-b-imx219.dtso | 65 +++++++++++++++++++ 2 files changed, 69 insertions(+) create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b-imx219.dtso diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile index 01ecfa30418453..7e2cd851c89fc9 100644 --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile @@ -15,6 +15,10 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \ bcm2837-rpi-cm3-io3.dtb \ bcm2837-rpi-zero-2-w.dtb +bcm2711-rpi-4-b-imx219-dtbs := bcm2711-rpi-4-b.dtb bcm2711-rpi-4-b-imx219.dtbo + +dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b-imx219.dtb + subdir-y += bcmbca subdir-y += northstar2 subdir-y += stingray diff --git a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b-imx219.dtso b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b-imx219.dtso new file mode 100644 index 00000000000000..33c3219ca4c344 --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b-imx219.dtso @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Definitions for IMX219 camera module on VC I2C bus + +/dts-v1/; +/plugin/; + +&{/} { + cam1_clk: cam1_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; +}; + +&csi1 { + status = "okay"; + + port { + csi_ep: endpoint { + remote-endpoint = <&cam_endpoint>; + clock-lanes = <0>; + data-lanes = <1 2>; + clock-noncontinuous; + }; + }; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c0_1 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + camera@10 { + compatible = "sony,imx219"; + reg = <0x10>; + + clocks = <&cam1_clk>; + clock-names = "xclk"; + + VANA-supply = <&cam1_reg>; /* 2.8v */ + VDIG-supply = <&cam1_reg>; /* 1.8v */ + VDDL-supply = <&cam1_reg>; /* 1.2v */ + + rotation = <180>; + orientation = <2>; + + port { + cam_endpoint: endpoint { + remote-endpoint = <&csi_ep>; + clock-lanes = <0>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <456000000>; + }; + }; + }; +}; + +&i2c0mux { + status = "okay"; +}; From 1c7e40465bb5619d98e6fdde5e194a00cc23927c Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Mon, 27 Oct 2025 16:19:46 +0530 Subject: [PATCH 005/625] [DNI] arm64: dts: broadcom: Add overlay for RPi 4B OV5647 camera For testing only at this point. Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/broadcom/Makefile | 2 + .../dts/broadcom/bcm2711-rpi-4-b-ov5647.dtso | 75 +++++++++++++++++++ 2 files changed, 77 insertions(+) create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b-ov5647.dtso diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile index 7e2cd851c89fc9..85f089c162a9e2 100644 --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile @@ -16,8 +16,10 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \ bcm2837-rpi-zero-2-w.dtb bcm2711-rpi-4-b-imx219-dtbs := bcm2711-rpi-4-b.dtb bcm2711-rpi-4-b-imx219.dtbo +bcm2711-rpi-4-b-ov5647-dtbs := bcm2711-rpi-4-b.dtb bcm2711-rpi-4-b-ov5647.dtbo dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b-imx219.dtb +dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b-ov5647.dtb subdir-y += bcmbca subdir-y += northstar2 diff --git a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b-ov5647.dtso b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b-ov5647.dtso new file mode 100644 index 00000000000000..7e626fa0307dcf --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b-ov5647.dtso @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Definitions for OV5647 camera module on VC I2C bus + +/dts-v1/; +/plugin/; + +&{/} { + cam1_clk: cam1_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + cam_dummy_reg: cam_dummy_reg { + compatible = "regulator-fixed"; + regulator-name = "cam-dummy-reg"; + status = "okay"; + }; +}; + +&cam1_reg { + startup-delay-us = <20000>; +}; + +&csi1 { + status = "okay"; + + port { + csi_ep: endpoint { + remote-endpoint = <&cam_endpoint>; + clock-lanes = <0>; + data-lanes = <1 2>; + clock-noncontinuous; + }; + }; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c0_1 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + camera@36 { + compatible = "ovti,ov5647"; + reg = <0x36>; + + clocks = <&cam1_clk>; + clock-names = "xclk"; + + avdd-supply = <&cam1_reg>; + dovdd-supply = <&cam_dummy_reg>; + dvdd-supply = <&cam_dummy_reg>; + + rotation = <0>; + orientation = <2>; + + port { + cam_endpoint: endpoint { + remote-endpoint = <&csi_ep>; + clock-lanes = <0>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <297000000>; + }; + }; + }; +}; + +&i2c0mux { + status = "okay"; +}; From 574917b5da8c99e814fe68c8cab48e6058d5dbc8 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 7 Oct 2025 12:19:27 +0530 Subject: [PATCH 006/625] ======== OV5647 ======== Signed-off-by: Jai Luthra From 57ec169083e1f406fb86fca696bc5685a01b7053 Mon Sep 17 00:00:00 2001 From: David Plowman Date: Wed, 12 May 2021 07:39:21 +0100 Subject: [PATCH 007/625] media: i2c: ov5647: Fix v4l2-compliance failure subscribing to events Fixes the following v4l2-compliance failure: fail: v4l2-test-controls.cpp(871): subscribe event for control 'User Controls' failed test Signed-off-by: David Plowman Signed-off-by: Jai Luthra --- drivers/media/i2c/ov5647.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/media/i2c/ov5647.c b/drivers/media/i2c/ov5647.c index 6a46ef7233ac3f..b3c3c1ab6f03ed 100644 --- a/drivers/media/i2c/ov5647.c +++ b/drivers/media/i2c/ov5647.c @@ -689,6 +689,8 @@ static const struct v4l2_subdev_core_ops ov5647_subdev_core_ops = { .g_register = ov5647_sensor_get_register, .s_register = ov5647_sensor_set_register, #endif + .subscribe_event = v4l2_ctrl_subdev_subscribe_event, + .unsubscribe_event = v4l2_event_subdev_unsubscribe, }; static const struct v4l2_rect * From 5ff195f0517f0575ab0f6a8e197bbf3dee5a3067 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 7 Oct 2025 12:19:40 +0530 Subject: [PATCH 008/625] ======== VC4 Destage ======== Signed-off-by: Jai Luthra From 751a0ca88136e329000c2fd3a197c6b64578f477 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Wed, 27 Aug 2025 01:23:23 +0530 Subject: [PATCH 009/625] staging: Destage VCHIQ interface and MMAL Hi, The goal of this series is to begin the destaging and upstreaming process for various Raspberry Pi peripherals that currently interact with the firmware using the VCHIQ interface present in the staging tree. While destaging the interface to drivers/platform/raspberrypi, also move the VCHIQ memory abstraction layer (MMAL) driver. Secondly, drop the bcm2835-camera driver, as the bcm2835-unicam driver using V4L2 framework is the recommended way to capture from CSI sensors on this platform. The bcm2835-audio driver is left as-is in the staging tree, as I am not an expert on ALSA. Volunteers are welcome :) In (a) subsequent series, I will upstream the following components: - working driver for the OV5647 sensor in raspberry pi camera v1 module - vc-sm-cma driver - bcm2835-isp driver # Describe the purpose of this series. The information you put here # will be used by the project maintainer to make a decision whether # your patches should be reviewed, and in what priority order. Please be # very detailed and link to any relevant discussions or sites that the # maintainer can review to better understand your proposed changes. If you # only have a single patch in your series, the contents of the cover # letter will be appended to the "under-the-cut" portion of the patch. # Lines starting with # will be removed from the cover letter. You can # use them to add notes or reminders to yourself. If you want to use # markdown headers in your cover letter, start the line with ">#". # You can add trailers to the cover letter. Any email addresses found in # these trailers will be added to the addresses specified/generated # during the b4 send stage. You can also run "b4 prep --auto-to-cc" to # auto-populate the To: and Cc: trailers based on the code being # modified. Thanks, Jai To: Florian Fainelli To: Broadcom internal kernel review list To: Greg Kroah-Hartman To: Ray Jui To: Scott Branden Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-staging@lists.linux.dev Cc: linux-kernel@vger.kernel.org Cc: kernel-list@raspberrypi.com Cc: Stefan Wahren Cc: Dave Stevenson Cc: Laurent Pinchart Cc: Kieran Bingham Cc: Phil Elwell Cc: Umang Jain Signed-off-by: Jai Luthra --- Changes in v4: - EDITME: describe what is new in this series revision. - EDITME: use bulletpoints and terse descriptions. - Link to v3: https://lore.kernel.org/r/20251029-vchiq-destage-v3-0-da8d6c83c2c5@ideasonboard.com Changes in v3: - Reorder patches, drop bcm2835-camera first before destaging interface - Add a new patch to drop usage of bcm2835-camera from vchiq_arm - Add a new patch improving inline documentation (picked from https://lore.kernel.org/linux-staging/20250509221152.13564-2-wahrenst@gmx.net/) - Update MAINTAINERS file to cover all drivers starting with vchiq-* from the first commit, rather than changing it twice - Replace s/broadcom/raspberrypi in commit title and messages - Link to v2: https://lore.kernel.org/r/20250907-vchiq-destage-v2-0-6884505dca78@ideasonboard.com Changes in v2: - Destage to drivers/platform/raspberrypi instead - Move BCM_VIDECORE menuconfig definition to the new directory's Kconfig along with BCM2835_VCHIQ and VCHIQ_CDEV - Link to v1: https://lore.kernel.org/r/20250827-vchiq-destage-v1-0-5052a0d81c42@ideasonboard.com --- b4-submit-tracking --- # This section is used internally by b4 prep for tracking purposes. { "series": { "revision": 4, "change-id": "20250827-vchiq-destage-39de1e67557d", "prefixes": [], "history": { "v1": [ "20250827-vchiq-destage-v1-0-5052a0d81c42@ideasonboard.com" ], "v2": [ "20250907-vchiq-destage-v2-0-6884505dca78@ideasonboard.com" ], "v3": [ "20251029-vchiq-destage-v3-0-da8d6c83c2c5@ideasonboard.com" ] } } } From 4d72cc519af38441fda21983139299849aaf1821 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 7 Oct 2025 12:20:35 +0530 Subject: [PATCH 010/625] ======== VC SM CMA ======== Signed-off-by: Jai Luthra From d9d757b7250298e726d28a74ccf00471fffa666e Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Thu, 30 Oct 2025 19:40:02 +0530 Subject: [PATCH 011/625] platform/raspberrypi: Add Broadcom Videocore shared memory support Hi, The vc-sm-cma driver allows contiguous memory blocks to be imported into the VideoCore VPU memory map. This series adds support for this driver and various changes to VCHIQ MMAL layer required to get this functional. These changes have lived in the staging directory of the downstream Raspberry Pi tree since quite some time, but are necessary for getting the VCHIQ based peripherals like the ISP and codec functional in mainline. This series depends on an earlier series, destaging VCHIQ interface and MMAL driver, which was posted here: https://lore.kernel.org/all/20251029-vchiq-destage-v3-0-da8d6c83c2c5@ideasonboard.com/ # Describe the purpose of this series. The information you put here # will be used by the project maintainer to make a decision whether # your patches should be reviewed, and in what priority order. Please be # very detailed and link to any relevant discussions or sites that the # maintainer can review to better understand your proposed changes. If you # only have a single patch in your series, the contents of the cover # letter will be appended to the "under-the-cut" portion of the patch. # Lines starting with # will be removed from the cover letter. You can # use them to add notes or reminders to yourself. If you want to use # markdown headers in your cover letter, start the line with ">#". # You can add trailers to the cover letter. Any email addresses found in # these trailers will be added to the addresses specified/generated # during the b4 send stage. You can also run "b4 prep --auto-to-cc" to # auto-populate the To: and Cc: trailers based on the code being # modified. Thanks, Jai Signed-off-by: Jai Luthra --- b4-submit-tracking --- # This section is used internally by b4 prep for tracking purposes. { "series": { "revision": 1, "change-id": "20251030-b4-vc-sm-cma-f6727c39cd25", "prefixes": [], "prerequisites": [ "message-id: <20251029-vchiq-destage-v3-0-da8d6c83c2c5@ideasonboard.com>" ] } } From 46e815d6c791d3ad98995f83a907ffa37eb8d029 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 29 Oct 2018 16:20:46 +0000 Subject: [PATCH 012/625] platform/raspberrypi: vchiq-mmal: Avoid use of bool in structures Fixes up a checkpatch error "Avoid using bool structure members because of possible alignment issues". Signed-off-by: Dave Stevenson Signed-off-by: Jai Luthra --- drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c index c89c16fb8b330e..9869f94d2e3416 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c @@ -1776,7 +1776,7 @@ int vchiq_mmal_component_enable(struct vchiq_mmal_instance *instance, ret = enable_component(instance, component); if (ret == 0) - component->enabled = true; + component->enabled = 1; mutex_unlock(&instance->vchiq_mutex); From 63c794cd8279591c3a5f0ea597cdae4c7ca0f511 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 24 Sep 2018 18:15:38 +0100 Subject: [PATCH 013/625] platform/raspberrypi: vchiq-mmal: Add support for event callbacks. The codec uses the event mechanism to report things such as resolution changes. It is signalled by the cmd field of the buffer being non-zero. Add support for passing this information out to the client. Signed-off-by: Dave Stevenson Signed-off-by: Jai Luthra --- .../raspberrypi/vchiq-mmal/mmal-common.h | 1 + .../raspberrypi/vchiq-mmal/mmal-msg.h | 35 ++++ .../raspberrypi/vchiq-mmal/mmal-vchiq.c | 170 ++++++++++++++++-- .../raspberrypi/vchiq-mmal/mmal-vchiq.h | 4 + 4 files changed, 196 insertions(+), 14 deletions(-) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-common.h b/drivers/platform/raspberrypi/vchiq-mmal/mmal-common.h index b33129403a3034..0443be8198ea57 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-common.h +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-common.h @@ -50,6 +50,7 @@ struct mmal_buffer { struct mmal_msg_context *msg_context; + u32 cmd; /* MMAL command. 0=data. */ unsigned long length; u32 mmal_flags; s64 dts; diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-msg.h b/drivers/platform/raspberrypi/vchiq-mmal/mmal-msg.h index 1889494425eb65..7cccd5ee9a9e70 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-msg.h +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-msg.h @@ -346,6 +346,41 @@ struct mmal_msg_port_parameter_get_reply { /* event messages */ #define MMAL_WORKER_EVENT_SPACE 256 +/* Four CC's for events */ +#define MMAL_FOURCC(a, b, c, d) ((a) | (b << 8) | (c << 16) | (d << 24)) + +#define MMAL_EVENT_ERROR MMAL_FOURCC('E', 'R', 'R', 'O') +#define MMAL_EVENT_EOS MMAL_FOURCC('E', 'E', 'O', 'S') +#define MMAL_EVENT_FORMAT_CHANGED MMAL_FOURCC('E', 'F', 'C', 'H') +#define MMAL_EVENT_PARAMETER_CHANGED MMAL_FOURCC('E', 'P', 'C', 'H') + +/* Structs for each of the event message payloads */ +struct mmal_msg_event_eos { + u32 port_type; /**< Type of port that received the end of stream */ + u32 port_index; /**< Index of port that received the end of stream */ +}; + +/** Format changed event data. */ +struct mmal_msg_event_format_changed { + /* Minimum size of buffers the port requires */ + u32 buffer_size_min; + /* Minimum number of buffers the port requires */ + u32 buffer_num_min; + /* Size of buffers the port recommends for optimal performance. + * A value of zero means no special recommendation. + */ + u32 buffer_size_recommended; + /* Number of buffers the port recommends for optimal + * performance. A value of zero means no special recommendation. + */ + u32 buffer_num_recommended; + + u32 es_ptr; + struct mmal_es_format format; + union mmal_es_specific_format es; + u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE]; +}; + struct mmal_msg_event_to_host { u32 client_component; /* component context */ diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c index 9869f94d2e3416..dcb82c9f93370f 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c @@ -145,6 +145,8 @@ struct mmal_msg_context { /* Presentation and Decode timestamps */ s64 pts; s64 dts; + /* MMAL buffer command flag */ + u32 cmd; int status; /* context status */ @@ -232,18 +234,6 @@ release_msg_context(struct mmal_msg_context *msg_context) kfree(msg_context); } -/* deals with receipt of event to host message */ -static void event_to_host_cb(struct vchiq_mmal_instance *instance, - struct mmal_msg *msg, u32 msg_len) -{ - pr_debug("unhandled event\n"); - pr_debug("component:%u port type:%d num:%d cmd:0x%x length:%d\n", - msg->u.event_to_host.client_component, - msg->u.event_to_host.port_type, - msg->u.event_to_host.port_num, - msg->u.event_to_host.cmd, msg->u.event_to_host.length); -} - /* workqueue scheduled callback * * we do this because it is important we do not call any other vchiq @@ -265,13 +255,18 @@ static void buffer_work_cb(struct work_struct *work) buffer->mmal_flags = msg_context->u.bulk.mmal_flags; buffer->dts = msg_context->u.bulk.dts; buffer->pts = msg_context->u.bulk.pts; + buffer->cmd = msg_context->u.bulk.cmd; - atomic_dec(&msg_context->u.bulk.port->buffers_with_vpu); + if (!buffer->cmd) + atomic_dec(&msg_context->u.bulk.port->buffers_with_vpu); msg_context->u.bulk.port->buffer_cb(msg_context->u.bulk.instance, msg_context->u.bulk.port, msg_context->u.bulk.status, msg_context->u.bulk.buffer); + + if (buffer->cmd) + mutex_unlock(&msg_context->u.bulk.port->event_context_mutex); } /* workqueue scheduled callback to handle receiving buffers @@ -349,6 +344,7 @@ static int bulk_receive(struct vchiq_mmal_instance *instance, msg_context->u.bulk.buffer_used = rd_len; msg_context->u.bulk.dts = msg->u.buffer_from_host.buffer_header.dts; msg_context->u.bulk.pts = msg->u.buffer_from_host.buffer_header.pts; + msg_context->u.bulk.cmd = msg->u.buffer_from_host.buffer_header.cmd; queue_work(msg_context->instance->bulk_wq, &msg_context->u.bulk.buffer_to_host_work); @@ -451,6 +447,103 @@ buffer_from_host(struct vchiq_mmal_instance *instance, return ret; } +/* deals with receipt of event to host message */ +static void event_to_host_cb(struct vchiq_mmal_instance *instance, + struct mmal_msg *msg, u32 msg_len) +{ + /* FIXME: Not going to work on 64 bit */ + struct vchiq_mmal_component *component = + (struct vchiq_mmal_component *)msg->u.event_to_host.client_component; + struct vchiq_mmal_port *port = NULL; + struct mmal_msg_context *msg_context; + u32 port_num = msg->u.event_to_host.port_num; + + if (msg->u.buffer_from_host.drvbuf.magic == MMAL_MAGIC) { + pr_err("%s: MMAL_MSG_TYPE_BUFFER_TO_HOST with bad magic\n", + __func__); + return; + } + + switch (msg->u.event_to_host.port_type) { + case MMAL_PORT_TYPE_CONTROL: + if (port_num) { + pr_err("%s: port_num of %u >= number of ports 1", + __func__, port_num); + return; + } + port = &component->control; + break; + case MMAL_PORT_TYPE_INPUT: + if (port_num >= component->inputs) { + pr_err("%s: port_num of %u >= number of ports %u", + __func__, port_num, + port_num >= component->inputs); + return; + } + port = &component->input[port_num]; + break; + case MMAL_PORT_TYPE_OUTPUT: + if (port_num >= component->outputs) { + pr_err("%s: port_num of %u >= number of ports %u", + __func__, port_num, + port_num >= component->outputs); + return; + } + port = &component->output[port_num]; + break; + case MMAL_PORT_TYPE_CLOCK: + if (port_num >= component->clocks) { + pr_err("%s: port_num of %u >= number of ports %u", + __func__, port_num, + port_num >= component->clocks); + return; + } + port = &component->clock[port_num]; + break; + default: + break; + } + + if (!mutex_trylock(&port->event_context_mutex)) { + pr_err("dropping event 0x%x\n", msg->u.event_to_host.cmd); + return; + } + msg_context = port->event_context; + + if (msg->h.status != MMAL_MSG_STATUS_SUCCESS) { + /* message reception had an error */ + //pr_warn + pr_err("%s: error %d in reply\n", __func__, msg->h.status); + + msg_context->u.bulk.status = msg->h.status; + } else if (msg->u.event_to_host.length > MMAL_WORKER_EVENT_SPACE) { + /* data is not in message, queue a bulk receive */ + pr_err("%s: payload not in message - bulk receive??! NOT SUPPORTED\n", + __func__); + msg_context->u.bulk.status = -1; + } else { + memcpy(msg_context->u.bulk.buffer->buffer, + msg->u.event_to_host.data, + msg->u.event_to_host.length); + + msg_context->u.bulk.buffer_used = + msg->u.event_to_host.length; + + msg_context->u.bulk.mmal_flags = 0; + msg_context->u.bulk.dts = MMAL_TIME_UNKNOWN; + msg_context->u.bulk.pts = MMAL_TIME_UNKNOWN; + msg_context->u.bulk.cmd = msg->u.event_to_host.cmd; + + pr_debug("event component:%u port type:%d num:%d cmd:0x%x length:%d\n", + msg->u.event_to_host.client_component, + msg->u.event_to_host.port_type, + msg->u.event_to_host.port_num, + msg->u.event_to_host.cmd, msg->u.event_to_host.length); + } + + schedule_work(&msg_context->u.bulk.work); +} + /* deals with receipt of buffer to host message */ static void buffer_to_host_cb(struct vchiq_mmal_instance *instance, struct mmal_msg *msg, u32 msg_len) @@ -1333,6 +1426,7 @@ static int port_disable(struct vchiq_mmal_instance *instance, mmalbuf->mmal_flags = 0; mmalbuf->dts = MMAL_TIME_UNKNOWN; mmalbuf->pts = MMAL_TIME_UNKNOWN; + mmalbuf->cmd = 0; port->buffer_cb(instance, port, 0, mmalbuf); } @@ -1634,6 +1728,43 @@ int mmal_vchi_buffer_cleanup(struct mmal_buffer *buf) } EXPORT_SYMBOL_GPL(mmal_vchi_buffer_cleanup); +static void init_event_context(struct vchiq_mmal_instance *instance, + struct vchiq_mmal_port *port) +{ + struct mmal_msg_context *ctx = get_msg_context(instance); + + mutex_init(&port->event_context_mutex); + + port->event_context = ctx; + ctx->u.bulk.instance = instance; + ctx->u.bulk.port = port; + ctx->u.bulk.buffer = + kzalloc(sizeof(*ctx->u.bulk.buffer), GFP_KERNEL); + if (!ctx->u.bulk.buffer) + goto release_msg_context; + ctx->u.bulk.buffer->buffer = kzalloc(MMAL_WORKER_EVENT_SPACE, + GFP_KERNEL); + if (!ctx->u.bulk.buffer->buffer) + goto release_buffer; + + INIT_WORK(&ctx->u.bulk.work, buffer_work_cb); + return; + +release_buffer: + kfree(ctx->u.bulk.buffer); +release_msg_context: + release_msg_context(ctx); +} + +static void free_event_context(struct vchiq_mmal_port *port) +{ + struct mmal_msg_context *ctx = port->event_context; + + kfree(ctx->u.bulk.buffer->buffer); + kfree(ctx->u.bulk.buffer); + release_msg_context(ctx); +} + /* Initialise a mmal component and its ports * */ @@ -1683,6 +1814,7 @@ int vchiq_mmal_component_init(struct vchiq_mmal_instance *instance, ret = port_info_get(instance, &component->control); if (ret < 0) goto release_component; + init_event_context(instance, &component->control); for (idx = 0; idx < component->inputs; idx++) { component->input[idx].type = MMAL_PORT_TYPE_INPUT; @@ -1693,6 +1825,7 @@ int vchiq_mmal_component_init(struct vchiq_mmal_instance *instance, ret = port_info_get(instance, &component->input[idx]); if (ret < 0) goto release_component; + init_event_context(instance, &component->input[idx]); } for (idx = 0; idx < component->outputs; idx++) { @@ -1704,6 +1837,7 @@ int vchiq_mmal_component_init(struct vchiq_mmal_instance *instance, ret = port_info_get(instance, &component->output[idx]); if (ret < 0) goto release_component; + init_event_context(instance, &component->output[idx]); } for (idx = 0; idx < component->clocks; idx++) { @@ -1715,6 +1849,7 @@ int vchiq_mmal_component_init(struct vchiq_mmal_instance *instance, ret = port_info_get(instance, &component->clock[idx]); if (ret < 0) goto release_component; + init_event_context(instance, &component->clock[idx]); } *component_out = component; @@ -1740,7 +1875,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_init); int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, struct vchiq_mmal_component *component) { - int ret; + int ret, idx; if (mutex_lock_interruptible(&instance->vchiq_mutex)) return -EINTR; @@ -1752,6 +1887,13 @@ int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, component->in_use = false; + for (idx = 0; idx < component->inputs; idx++) + free_event_context(&component->input[idx]); + for (idx = 0; idx < component->outputs; idx++) + free_event_context(&component->output[idx]); + for (idx = 0; idx < component->clocks; idx++) + free_event_context(&component->clock[idx]); + mutex_unlock(&instance->vchiq_mutex); return ret; diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.h b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.h index 8c3959f6f97fb2..190a0f42bd6b22 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.h +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.h @@ -79,6 +79,10 @@ struct vchiq_mmal_port { vchiq_mmal_buffer_cb buffer_cb; /* callback context */ void *cb_ctx; + + /* ensure serialised use of the one event context structure */ + struct mutex event_context_mutex; + struct mmal_msg_context *event_context; }; struct vchiq_mmal_component { From 3ce6766810caf5573472088f3865f6eea35e0d07 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 24 Sep 2018 18:26:02 +0100 Subject: [PATCH 014/625] platform/raspberrypi: vchiq-mmal: Support sending data to MMAL ports Add the ability to send data to ports. This only supports zero copy mode as the required bulk transfer setup calls are not done. Signed-off-by: Dave Stevenson Signed-off-by: Jai Luthra --- .../raspberrypi/vchiq-mmal/mmal-vchiq.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c index dcb82c9f93370f..afd4aa27d01be0 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c @@ -421,11 +421,19 @@ buffer_from_host(struct vchiq_mmal_instance *instance, m.u.buffer_from_host.buffer_header.data = (u32)(unsigned long)buf->buffer; m.u.buffer_from_host.buffer_header.alloc_size = buf->buffer_size; - m.u.buffer_from_host.buffer_header.length = 0; /* nothing used yet */ - m.u.buffer_from_host.buffer_header.offset = 0; /* no offset */ - m.u.buffer_from_host.buffer_header.flags = 0; /* no flags */ - m.u.buffer_from_host.buffer_header.pts = MMAL_TIME_UNKNOWN; - m.u.buffer_from_host.buffer_header.dts = MMAL_TIME_UNKNOWN; + if (port->type == MMAL_PORT_TYPE_OUTPUT) { + m.u.buffer_from_host.buffer_header.length = 0; + m.u.buffer_from_host.buffer_header.offset = 0; + m.u.buffer_from_host.buffer_header.flags = 0; + m.u.buffer_from_host.buffer_header.pts = MMAL_TIME_UNKNOWN; + m.u.buffer_from_host.buffer_header.dts = MMAL_TIME_UNKNOWN; + } else { + m.u.buffer_from_host.buffer_header.length = buf->length; + m.u.buffer_from_host.buffer_header.offset = 0; + m.u.buffer_from_host.buffer_header.flags = buf->mmal_flags; + m.u.buffer_from_host.buffer_header.pts = buf->pts; + m.u.buffer_from_host.buffer_header.dts = buf->dts; + } /* clear buffer type specific data */ memset(&m.u.buffer_from_host.buffer_header_type_specific, 0, From 0de36deffe40a4cce469ef1591e7a829ce7a006f Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 22 Jan 2019 12:04:09 +0000 Subject: [PATCH 015/625] platform/raspberrypi: vchiq-mmal: Fix client_component for 64 bit kernel The MMAL client_component field is used with the event mechanism to allow the client to identify the component for which the event is generated. The field is only 32bits in size, therefore we can't use a pointer to the component in a 64 bit kernel. Component handles are already held in an array per VCHI instance, so use the array index as the client_component handle to avoid having to create a new IDR for this purpose. Signed-off-by: Dave Stevenson Signed-off-by: Jai Luthra --- drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c index afd4aa27d01be0..5daa550ba8b94f 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c @@ -459,9 +459,9 @@ buffer_from_host(struct vchiq_mmal_instance *instance, static void event_to_host_cb(struct vchiq_mmal_instance *instance, struct mmal_msg *msg, u32 msg_len) { - /* FIXME: Not going to work on 64 bit */ + int comp_idx = msg->u.event_to_host.client_component; struct vchiq_mmal_component *component = - (struct vchiq_mmal_component *)msg->u.event_to_host.client_component; + &instance->component[comp_idx]; struct vchiq_mmal_port *port = NULL; struct mmal_msg_context *msg_context; u32 port_num = msg->u.event_to_host.port_num; From 655ff606bfc098490f1b5a7d99b2de373cd8b04a Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 13 Feb 2019 12:33:29 +0000 Subject: [PATCH 016/625] platform/raspberrypi: vchiq-mmal: Add in the bayer and gray formats The ISP and codec support bayer and gray formats, so add in the encodings for them. Signed-off-by: Dave Stevenson Signed-off-by: Jai Luthra --- .../raspberrypi/vchiq-mmal/mmal-encodings.h | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-encodings.h b/drivers/platform/raspberrypi/vchiq-mmal/mmal-encodings.h index e15ae7b24f73fd..826ed66deafd08 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-encodings.h +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-encodings.h @@ -69,6 +69,47 @@ */ #define MMAL_ENCODING_OPAQUE MMAL_FOURCC('O', 'P', 'Q', 'V') +/** + * Bayer formats + * FourCC values copied from V4L2 where defined. + */ +/* 8 bit per pixel Bayer formats. */ +#define MMAL_ENCODING_BAYER_SBGGR8 MMAL_FOURCC('B', 'A', '8', '1') +#define MMAL_ENCODING_BAYER_SGBRG8 MMAL_FOURCC('G', 'B', 'R', 'G') +#define MMAL_ENCODING_BAYER_SGRBG8 MMAL_FOURCC('G', 'R', 'B', 'G') +#define MMAL_ENCODING_BAYER_SRGGB8 MMAL_FOURCC('R', 'G', 'G', 'B') + +/* 10 bit per pixel packed Bayer formats. */ +#define MMAL_ENCODING_BAYER_SBGGR10P MMAL_FOURCC('p', 'B', 'A', 'A') +#define MMAL_ENCODING_BAYER_SGRBG10P MMAL_FOURCC('p', 'g', 'A', 'A') +#define MMAL_ENCODING_BAYER_SGBRG10P MMAL_FOURCC('p', 'G', 'A', 'A') +#define MMAL_ENCODING_BAYER_SRGGB10P MMAL_FOURCC('p', 'R', 'A', 'A') + +/* 12 bit per pixel packed Bayer formats. */ +#define MMAL_ENCODING_BAYER_SBGGR12P MMAL_FOURCC('p', 'B', '1', '2') +#define MMAL_ENCODING_BAYER_SGRBG12P MMAL_FOURCC('p', 'g', '1', '2') +#define MMAL_ENCODING_BAYER_SGBRG12P MMAL_FOURCC('p', 'G', '1', '2') +#define MMAL_ENCODING_BAYER_SRGGB12P MMAL_FOURCC('p', 'R', '1', '2') + +/* 14 bit per pixel packed Bayer formats. */ +#define MMAL_ENCODING_BAYER_SBGGR14P MMAL_FOURCC('p', 'B', 'E', 'E') +#define MMAL_ENCODING_BAYER_SGBRG14P MMAL_FOURCC('p', 'G', 'E', 'E') +#define MMAL_ENCODING_BAYER_SGRBG14P MMAL_FOURCC('p', 'g', 'E', 'E') +#define MMAL_ENCODING_BAYER_SRGGB14P MMAL_FOURCC('p', 'R', 'E', 'E') + +/* 16 bit per pixel Bayer formats. */ +#define MMAL_ENCODING_BAYER_SBGGR16 MMAL_FOURCC('B', 'G', '1', '6') +#define MMAL_ENCODING_BAYER_SGBRG16 MMAL_FOURCC('G', 'B', '1', '6') +#define MMAL_ENCODING_BAYER_SGRBG16 MMAL_FOURCC('G', 'R', '1', '6') +#define MMAL_ENCODING_BAYER_SRGGB16 MMAL_FOURCC('R', 'G', '1', '6') + +/* MIPI packed monochrome images */ +#define MMAL_ENCODING_GREY MMAL_FOURCC('G', 'R', 'E', 'Y') +#define MMAL_ENCODING_Y10P MMAL_FOURCC('Y', '1', '0', 'P') +#define MMAL_ENCODING_Y12P MMAL_FOURCC('Y', '1', '2', 'P') +#define MMAL_ENCODING_Y14P MMAL_FOURCC('Y', '1', '4', 'P') +#define MMAL_ENCODING_Y16 MMAL_FOURCC('Y', '1', '6', ' ') + /** An EGL image handle */ #define MMAL_ENCODING_EGL_IMAGE MMAL_FOURCC('E', 'G', 'L', 'I') From 054483a5b07a9e5e59c4616d2c355c3680f94827 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 18 Feb 2019 15:52:29 +0000 Subject: [PATCH 017/625] platform/raspberrypi: vchiq-mmal: Update video parameters mmal_parameters.h hasn't been updated to reflect additions made over the last few years. Update it to reflect the currently supported parameters. Signed-off-by: Dave Stevenson Signed-off-by: Jai Luthra --- .../raspberrypi/vchiq-mmal/mmal-parameters.h | 38 ++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-parameters.h b/drivers/platform/raspberrypi/vchiq-mmal/mmal-parameters.h index a0cdd28101f2dd..0a4fc9252b1798 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-parameters.h +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-parameters.h @@ -577,7 +577,43 @@ enum mmal_parameter_video_type { MMAL_PARAMETER_VIDEO_ENCODE_H264_LOW_DELAY_HRD_FLAG, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ - MMAL_PARAMETER_VIDEO_ENCODE_INLINE_HEADER + MMAL_PARAMETER_VIDEO_ENCODE_INLINE_HEADER, + + /**< Take a @ref MMAL_PARAMETER_BOOLEAN_T. */ + MMAL_PARAMETER_VIDEO_ENCODE_SEI_ENABLE, + + /**< Take a @ref MMAL_PARAMETER_BOOLEAN_T. */ + MMAL_PARAMETER_VIDEO_ENCODE_INLINE_VECTORS, + + /**< Take a @ref MMAL_PARAMETER_VIDEO_RENDER_STATS_T. */ + MMAL_PARAMETER_VIDEO_RENDER_STATS, + + /**< Take a @ref MMAL_PARAMETER_VIDEO_INTERLACE_TYPE_T. */ + MMAL_PARAMETER_VIDEO_INTERLACE_TYPE, + + /**< Takes a @ref MMAL_PARAMETER_BOOLEAN_T */ + MMAL_PARAMETER_VIDEO_INTERPOLATE_TIMESTAMPS, + + /**< Takes a @ref MMAL_PARAMETER_BOOLEAN_T */ + MMAL_PARAMETER_VIDEO_ENCODE_SPS_TIMING, + + /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ + MMAL_PARAMETER_VIDEO_MAX_NUM_CALLBACKS, + + /**< Takes a @ref MMAL_PARAMETER_SOURCE_PATTERN_T */ + MMAL_PARAMETER_VIDEO_SOURCE_PATTERN, + + /**< Takes a @ref MMAL_PARAMETER_BOOLEAN_T */ + MMAL_PARAMETER_VIDEO_ENCODE_SEPARATE_NAL_BUFS, + + /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ + MMAL_PARAMETER_VIDEO_DROPPABLE_PFRAME_LENGTH, + + /**< Take a @ref MMAL_PARAMETER_VIDEO_STALL_T */ + MMAL_PARAMETER_VIDEO_STALL_THRESHOLD, + + /**< Take a @ref MMAL_PARAMETER_BOOLEAN_T */ + MMAL_PARAMETER_VIDEO_ENCODE_HEADERS_WITH_FRAME, }; /** Valid mirror modes */ From 500262b15818b685f5da761326f74a73edc31057 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 1 May 2019 13:27:23 +0100 Subject: [PATCH 018/625] platform/raspberrypi: vchiq-mmal: Free the event context for control ports vchiq_mmal_component_init calls init_event_context for the control port, but vchiq_mmal_component_finalise didn't free it, causing a memory leak.. Add the free call. Signed-off-by: Dave Stevenson Signed-off-by: Jai Luthra --- drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c index 5daa550ba8b94f..774d6b961ff576 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c @@ -1902,6 +1902,8 @@ int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, for (idx = 0; idx < component->clocks; idx++) free_event_context(&component->clock[idx]); + free_event_context(&component->control); + mutex_unlock(&instance->vchiq_mutex); return ret; From 4a198faa0ac0edb62611a9ece2995f4bae4de6d6 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 2 May 2019 15:50:01 +0100 Subject: [PATCH 019/625] platform/raspberrypi: vchiq-mmal: Fix memory leak in error path On error, vchiq_mmal_component_init could leave the event context allocated for ports. Clean them up in the error path. Signed-off-by: Dave Stevenson Signed-off-by: Jai Luthra --- .../raspberrypi/vchiq-mmal/mmal-vchiq.c | 29 +++++++++++++------ 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c index 774d6b961ff576..5cacc9eb4aca7d 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c @@ -1768,9 +1768,26 @@ static void free_event_context(struct vchiq_mmal_port *port) { struct mmal_msg_context *ctx = port->event_context; + if (!ctx) + return; + kfree(ctx->u.bulk.buffer->buffer); kfree(ctx->u.bulk.buffer); release_msg_context(ctx); + port->event_context = NULL; +} + +static void release_all_event_contexts(struct vchiq_mmal_component *component) +{ + int idx; + + for (idx = 0; idx < component->inputs; idx++) + free_event_context(&component->input[idx]); + for (idx = 0; idx < component->outputs; idx++) + free_event_context(&component->output[idx]); + for (idx = 0; idx < component->clocks; idx++) + free_event_context(&component->clock[idx]); + free_event_context(&component->control); } /* Initialise a mmal component and its ports @@ -1868,6 +1885,7 @@ int vchiq_mmal_component_init(struct vchiq_mmal_instance *instance, release_component: destroy_component(instance, component); + release_all_event_contexts(component); unlock: if (component) component->in_use = false; @@ -1883,7 +1901,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_init); int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, struct vchiq_mmal_component *component) { - int ret, idx; + int ret; if (mutex_lock_interruptible(&instance->vchiq_mutex)) return -EINTR; @@ -1895,14 +1913,7 @@ int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, component->in_use = false; - for (idx = 0; idx < component->inputs; idx++) - free_event_context(&component->input[idx]); - for (idx = 0; idx < component->outputs; idx++) - free_event_context(&component->output[idx]); - for (idx = 0; idx < component->clocks; idx++) - free_event_context(&component->clock[idx]); - - free_event_context(&component->control); + release_all_event_contexts(component); mutex_unlock(&instance->vchiq_mutex); From 2329ec4ab03bdbb810884d54096c7ae6b625c413 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 23 Sep 2025 12:25:08 +0530 Subject: [PATCH 020/625] platform/raspberrypi: Add new vc-sm-cma driver Add Broadcom VideoCore Shared Memory support. This new driver allows contiguous memory blocks to be imported into the VideoCore VPU memory map, and manages the lifetime of those objects, only releasing the source dmabuf once the VPU has confirmed it has finished with it. Signed-off-by: Dave Stevenson staging: vcsm-cma: Fix memory leak from not detaching dmabuf When importing there was a missing call to detach the buffer, so each import leaked the sg table entry. Actually the release process for both locally allocated and imported buffers is identical, so fix them to both use the same function. Signed-off-by: Dave Stevenson staging/vc-sm-cma: Avoid log spamming on Pi0/1 over cache alias. Pi 0/1 use the 0x80000000 cache alias as the ARM also sees the world through the VPU L2 cache. vc-sm-cma was trying to ensure it was in an uncached alias (0xc), and complaining on every allocation if it weren't. Reduce this logging. Signed-off-by: Dave Stevenson vc-sm-cma: Restore correct cache maintainance operations We have been using the more expensive flush operations rather than invalidate and clean since kernel rpi-5.9.y These are exposed with: 52f1453513ba95084ab811a030032fe605b0cbe2 Re-expose some dmi APIs for use in VCSM But I believe that commit was dropped when (non-cma) vc-sm was dropped, and didn't get updated when the commit was restored Signed-off-by: Dom Cobley staging: vc04_services: Fix clang14 warning Insert a break to fix a fallthrough warning from clang14. Since the fallthrough was to another break, this is a cosmetic change. See: https://github.com/raspberrypi/linux/issues/5078 Signed-off-by: Phil Elwell vc04_services/vc-sm-cma: Handle upstream require vchiq_instance to be passed around vc04_services/vc-sm-cma: Switch one-bit bitfields to bool Clang 16 warns: ../drivers/staging/vc04_services/vc-sm-cma/vc_sm.c:816:19: warning: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Wsingle-bit-bitfield-constant-conversion] buffer->imported = 1; ^ ~ ../drivers/staging/vc04_services/vc-sm-cma/vc_sm.c:822:17: warning: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Wsingle-bit-bitfield-constant-conversion] buffer->in_use = 1; ^ ~ 2 warnings generated. Signed-off-by: Alexander Winkowski vc04_services: vcsm-cma: Detach from the correct dmabuf Commit d3292daee319 ("dma-buf: Make locking consistent in dma_buf_detach()") added checking that the same dmabuf for which dma_buf_attach was called is passed into dma_buf_detach, which flagged up that vcsm-cma was passing in the wrong dmabuf. Correct this so that we don't get the WARN on every dma_buf release. Signed-off-by: Dave Stevenson staging: vc04_services: vc-sm-cma: Remove deprecated header The vchiq_connected.h header was removed in f875976ecf45 ("staging: vc04_services: Drop vchiq_connected.[ch] files") to simplify the implementation. Update the vc_sm driver accordingly which can still use the same functions through the vchiq_arm.h header declarations. Signed-off-by: Kieran Bingham staging: vc04_services: vc-sm-cma: Drop include Makefile directive Drop the include directive. They can break the build, when one only wants to build a subdirectory. Replace with "../" for the includes in the vc_sm files instead. The fix is equivalent to the four patches between 29d49a76c5b2 ("staging: vc04_services: bcm2835-audio: Drop include Makefile directive")...2529ca211402 ("staging: vc04_services: interface: Drop include Makefile directive") Suggested-by: Greg Kroah-Hartman Signed-off-by: Kieran Bingham staging: vc04_services: vc-sm-cma: Register with vchiq_bus_type Register the vcsm rive with the vchiq_bus_type instead of useing the platform driver/device. Signed-off-by: Kieran Bingham staging: vc04_services: vc-sm-cma: Explicitly set DMA mask The platform model originally handled the DMA mask. Now that we are on the vchiq_bus we need to explicitly set this. Signed-off-by: Kieran Bingham staging: vc04_services: vc-sm-cma: Use [map|unmap]_attachment_unlocked lockdep throws warnings when using libcamera as buffers are mapped and unmapped as the dmabuf->resv lock hasn't been taken. Switch to using the _unlocked variants so that the framework takes the lock. https://github.com/raspberrypi/linux/issues/6814 Signed-off-by: Dave Stevenson staging: vc04_services: vc-sm-cma: Use a mutex instead of spinlock There are no contexts where we should be calling the kernelid_map IDR functions where we can't sleep, so switch from using a spinlock to using a mutex. https://github.com/raspberrypi/linux/issues/6815 Signed-off-by: Dave Stevenson staging: vc-sm-cma: Fix field-spanning write warning Replace one-element array with flexible-array member to fix: [ 11.725017] ------------[ cut here ]------------ [ 11.725038] memcpy: detected field-spanning write (size 4) of single field "hdr->body" at drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c:130 (size 0) [ 11.725113] WARNING: CPU: 3 PID: 455 at drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c:130 vc_vchi_cmd_create+0x1a8/0x1d0 [vc_sm_cma] Signed-off-by: Juerg Haefliger Signed-off-by: Dave Stevenson [jai.luthra: fix checkpatch warning, add entry in MAINTAINERS] Co-developed-by: Jai Luthra Signed-off-by: Jai Luthra --- MAINTAINERS | 7 + drivers/platform/raspberrypi/Kconfig | 2 + drivers/platform/raspberrypi/Makefile | 1 + .../platform/raspberrypi/vc-sm-cma/Kconfig | 9 + .../platform/raspberrypi/vc-sm-cma/Makefile | 9 + .../platform/raspberrypi/vc-sm-cma/vc_sm.c | 1618 +++++++++++++++++ .../platform/raspberrypi/vc-sm-cma/vc_sm.h | 83 + .../raspberrypi/vc-sm-cma/vc_sm_cma_vchi.c | 513 ++++++ .../raspberrypi/vc-sm-cma/vc_sm_cma_vchi.h | 63 + .../raspberrypi/vc-sm-cma/vc_sm_defs.h | 296 +++ .../raspberrypi/vc-sm-cma/vc_sm_knl.h | 28 + include/linux/raspberrypi/vc_sm_cma_ioctl.h | 114 ++ 12 files changed, 2743 insertions(+) create mode 100644 drivers/platform/raspberrypi/vc-sm-cma/Kconfig create mode 100644 drivers/platform/raspberrypi/vc-sm-cma/Makefile create mode 100644 drivers/platform/raspberrypi/vc-sm-cma/vc_sm.c create mode 100644 drivers/platform/raspberrypi/vc-sm-cma/vc_sm.h create mode 100644 drivers/platform/raspberrypi/vc-sm-cma/vc_sm_cma_vchi.c create mode 100644 drivers/platform/raspberrypi/vc-sm-cma/vc_sm_cma_vchi.h create mode 100644 drivers/platform/raspberrypi/vc-sm-cma/vc_sm_defs.h create mode 100644 drivers/platform/raspberrypi/vc-sm-cma/vc_sm_knl.h create mode 100644 include/linux/raspberrypi/vc_sm_cma_ioctl.h diff --git a/MAINTAINERS b/MAINTAINERS index c3fe46d7c4bc43..bfb30c0684438a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5489,6 +5489,13 @@ L: netdev@vger.kernel.org S: Maintained F: drivers/net/ethernet/broadcom/tg3.* +BROADCOM VIDEOCORE SHARED MEMORY DRIVER +M: Raspberry Pi Kernel Maintenance +L: linux-kernel@vger.kernel.org +S: Maintained +F: drivers/platform/raspberrypi/vc-sm-cma/* +F: include/linux/raspberrypi/vc_sm_cma* + BROADCOM VK DRIVER M: Scott Branden R: Broadcom internal kernel review list diff --git a/drivers/platform/raspberrypi/Kconfig b/drivers/platform/raspberrypi/Kconfig index 2c928440a47c08..68a7a2d5701cd6 100644 --- a/drivers/platform/raspberrypi/Kconfig +++ b/drivers/platform/raspberrypi/Kconfig @@ -48,5 +48,7 @@ config VCHIQ_CDEV endif source "drivers/platform/raspberrypi/vchiq-mmal/Kconfig" +source "drivers/platform/raspberrypi/vc-sm-cma/Kconfig" + endif diff --git a/drivers/platform/raspberrypi/Makefile b/drivers/platform/raspberrypi/Makefile index 2a7c9511e5d8bb..1980f618e21852 100644 --- a/drivers/platform/raspberrypi/Makefile +++ b/drivers/platform/raspberrypi/Makefile @@ -13,3 +13,4 @@ vchiq-objs += vchiq-interface/vchiq_dev.o endif obj-$(CONFIG_BCM2835_VCHIQ_MMAL) += vchiq-mmal/ +obj-$(CONFIG_BCM_VC_SM_CMA) += vc-sm-cma/ diff --git a/drivers/platform/raspberrypi/vc-sm-cma/Kconfig b/drivers/platform/raspberrypi/vc-sm-cma/Kconfig new file mode 100644 index 00000000000000..7daec14dcfc14b --- /dev/null +++ b/drivers/platform/raspberrypi/vc-sm-cma/Kconfig @@ -0,0 +1,9 @@ +config BCM_VC_SM_CMA + tristate "VideoCore Shared Memory (CMA) driver" + select BCM2835_VCHIQ + select DMA_SHARED_BUFFER + help + Say Y here to enable the shared memory interface that + supports sharing dmabufs with VideoCore. + This operates over the VCHIQ interface to a service + running on VideoCore. diff --git a/drivers/platform/raspberrypi/vc-sm-cma/Makefile b/drivers/platform/raspberrypi/vc-sm-cma/Makefile new file mode 100644 index 00000000000000..c12c1a13165c18 --- /dev/null +++ b/drivers/platform/raspberrypi/vc-sm-cma/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0 +vc-sm-cma-$(CONFIG_BCM_VC_SM_CMA) := \ + vc_sm.o vc_sm_cma_vchi.o + +obj-$(CONFIG_BCM_VC_SM_CMA) += vc-sm-cma.o + +ccflags-y += \ + -D__VCCOREVER__=0 + diff --git a/drivers/platform/raspberrypi/vc-sm-cma/vc_sm.c b/drivers/platform/raspberrypi/vc-sm-cma/vc_sm.c new file mode 100644 index 00000000000000..17a738894c446a --- /dev/null +++ b/drivers/platform/raspberrypi/vc-sm-cma/vc_sm.c @@ -0,0 +1,1618 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * VideoCore Shared Memory driver using CMA. + * + * Copyright: 2018, Raspberry Pi (Trading) Ltd + * Dave Stevenson + * + * Based on vmcs_sm driver from Broadcom Corporation for some API, + * and taking some code for buffer allocation and dmabuf handling from + * videobuf2. + * + * + * This driver has 3 main uses: + * 1) Allocating buffers for the kernel or userspace that can be shared with the + * VPU. + * 2) Importing dmabufs from elsewhere for sharing with the VPU. + * 3) Allocating buffers for use by the VPU. + * + * In the first and second cases the native handle is a dmabuf. Releasing the + * resource inherently comes from releasing the dmabuf, and this will trigger + * unmapping on the VPU. The underlying allocation and our buffer structure are + * retained until the VPU has confirmed that it has finished with it. + * + * For the VPU allocations the VPU is responsible for triggering the release, + * and therefore the released message decrements the dma_buf refcount (with the + * VPU mapping having already been marked as released). + */ + +/* ---- Include Files ----------------------------------------------------- */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "vc_sm_cma_vchi.h" + +#include "vc_sm.h" +#include "vc_sm_knl.h" + +MODULE_IMPORT_NS("DMA_BUF"); + +/* ---- Private Constants and Types --------------------------------------- */ + +#define DEVICE_NAME "vcsm-cma" +#define DEVICE_MINOR 0 + +#define VC_SM_RESOURCE_NAME_DEFAULT "sm-host-resource" + +#define VC_SM_DIR_ROOT_NAME "vcsm-cma" +#define VC_SM_STATE "state" + +/* Private file data associated with each opened device. */ +struct vc_sm_privdata_t { + pid_t pid; /* PID of creator. */ + + int restart_sys; /* Tracks restart on interrupt. */ + enum vc_sm_msg_type int_action; /* Interrupted action. */ + u32 int_trans_id; /* Interrupted transaction. */ +}; + +typedef int (*VC_SM_SHOW) (struct seq_file *s, void *v); +struct sm_pde_t { + VC_SM_SHOW show; /* Debug fs function hookup. */ + struct dentry *dir_entry; /* Debug fs directory entry. */ + void *priv_data; /* Private data */ +}; + +/* Global state information. */ +struct sm_state_t { + struct vchiq_device *device; + + struct miscdevice misc_dev; + + struct sm_instance *sm_handle; /* Handle for videocore service. */ + + struct mutex kernelid_map_lock; /* Mutex protecting kernelid_map */ + struct idr kernelid_map; + + struct mutex map_lock; /* Global map lock. */ + struct list_head buffer_list; /* List of buffer. */ + + struct vc_sm_privdata_t *data_knl; /* Kernel internal data tracking. */ + struct vc_sm_privdata_t *vpu_allocs; /* All allocations from the VPU */ + struct dentry *dir_root; /* Debug fs entries root. */ + struct sm_pde_t dir_state; /* Debug fs entries state sub-tree. */ + + bool require_released_callback; /* VPU will send a released msg when it + * has finished with a resource. + */ + u32 int_trans_id; /* Interrupted transaction. */ + struct vchiq_instance *vchiq_instance; +}; + +struct vc_sm_dma_buf_attachment { + struct device *dev; + struct sg_table sg_table; + struct list_head list; + enum dma_data_direction dma_dir; +}; + +/* ---- Private Variables ----------------------------------------------- */ + +static struct sm_state_t *sm_state; +static int sm_inited; + +/* ---- Private Function Prototypes -------------------------------------- */ + +/* ---- Private Functions ------------------------------------------------ */ + +static int get_kernel_id(struct vc_sm_buffer *buffer) +{ + int handle; + + mutex_lock(&sm_state->kernelid_map_lock); + handle = idr_alloc(&sm_state->kernelid_map, buffer, 0, 0, GFP_KERNEL); + mutex_unlock(&sm_state->kernelid_map_lock); + + return handle; +} + +static struct vc_sm_buffer *lookup_kernel_id(int handle) +{ + return idr_find(&sm_state->kernelid_map, handle); +} + +static void free_kernel_id(int handle) +{ + mutex_lock(&sm_state->kernelid_map_lock); + idr_remove(&sm_state->kernelid_map, handle); + mutex_unlock(&sm_state->kernelid_map_lock); +} + +static int vc_sm_cma_seq_file_show(struct seq_file *s, void *v) +{ + struct sm_pde_t *sm_pde; + + sm_pde = (struct sm_pde_t *)(s->private); + + if (sm_pde && sm_pde->show) + sm_pde->show(s, v); + + return 0; +} + +static int vc_sm_cma_single_open(struct inode *inode, struct file *file) +{ + return single_open(file, vc_sm_cma_seq_file_show, inode->i_private); +} + +static const struct file_operations vc_sm_cma_debug_fs_fops = { + .open = vc_sm_cma_single_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int vc_sm_cma_global_state_show(struct seq_file *s, void *v) +{ + struct vc_sm_buffer *resource = NULL; + int resource_count = 0; + + if (!sm_state) + return 0; + + seq_printf(s, "\nVC-ServiceHandle %p\n", sm_state->sm_handle); + + /* Log all applicable mapping(s). */ + + mutex_lock(&sm_state->map_lock); + seq_puts(s, "\nResources\n"); + if (!list_empty(&sm_state->buffer_list)) { + list_for_each_entry(resource, &sm_state->buffer_list, + global_buffer_list) { + resource_count++; + + seq_printf(s, "\nResource %p\n", + resource); + seq_printf(s, " NAME %s\n", + resource->name); + seq_printf(s, " SIZE %zu\n", + resource->size); + seq_printf(s, " DMABUF %p\n", + resource->dma_buf); + if (resource->imported) { + seq_printf(s, " ATTACH %p\n", + resource->import.attach); + seq_printf(s, " SGT %p\n", + resource->import.sgt); + } else { + seq_printf(s, " SGT %p\n", + resource->alloc.sg_table); + } + seq_printf(s, " DMA_ADDR %pad\n", + &resource->dma_addr); + seq_printf(s, " VC_HANDLE %08x\n", + resource->vc_handle); + seq_printf(s, " VC_MAPPING %d\n", + resource->vpu_state); + } + } + seq_printf(s, "\n\nTotal resource count: %d\n\n", resource_count); + + mutex_unlock(&sm_state->map_lock); + + return 0; +} + +/* + * Adds a buffer to the private data list which tracks all the allocated + * data. + */ +static void vc_sm_add_resource(struct vc_sm_privdata_t *privdata, + struct vc_sm_buffer *buffer) +{ + mutex_lock(&sm_state->map_lock); + list_add(&buffer->global_buffer_list, &sm_state->buffer_list); + mutex_unlock(&sm_state->map_lock); + + pr_debug("[%s]: added buffer %p (name %s, size %zu)\n", + __func__, buffer, buffer->name, buffer->size); +} + +/* + * Cleans up imported dmabuf. + * Should be called with mutex held. + */ +static void vc_sm_clean_up_dmabuf(struct vc_sm_buffer *buffer) +{ + if (!buffer->imported) + return; + + /* Handle cleaning up imported dmabufs */ + if (buffer->import.sgt) { + dma_buf_unmap_attachment_unlocked(buffer->import.attach, + buffer->import.sgt, + DMA_BIDIRECTIONAL); + buffer->import.sgt = NULL; + } + if (buffer->import.attach) { + dma_buf_detach(buffer->import.dma_buf, buffer->import.attach); + buffer->import.attach = NULL; + } +} + +/* + * Instructs VPU to decrement the refcount on a buffer. + */ +static void vc_sm_vpu_free(struct vc_sm_buffer *buffer) +{ + if (buffer->vc_handle && buffer->vpu_state == VPU_MAPPED) { + struct vc_sm_free_t free = { buffer->vc_handle, 0 }; + int status = vc_sm_cma_vchi_free(sm_state->sm_handle, &free, + &sm_state->int_trans_id); + if (status != 0 && status != -EINTR) { + pr_err("[%s]: failed to free memory on videocore (status: %u, trans_id: %u)\n", + __func__, status, sm_state->int_trans_id); + } + + if (sm_state->require_released_callback) { + /* Need to wait for the VPU to confirm the free. */ + + /* Retain a reference on this until the VPU has + * released it + */ + buffer->vpu_state = VPU_UNMAPPING; + } else { + buffer->vpu_state = VPU_NOT_MAPPED; + buffer->vc_handle = 0; + } + } +} + +/* + * Release an allocation. + * All refcounting is done via the dma buf object. + * + * Must be called with the mutex held. The function will either release the + * mutex (if defering the release) or destroy it. The caller must therefore not + * reuse the buffer on return. + */ +static void vc_sm_release_resource(struct vc_sm_buffer *buffer) +{ + pr_debug("[%s]: buffer %p (name %s, size %zu), imported %u\n", + __func__, buffer, buffer->name, buffer->size, + buffer->imported); + + if (buffer->vc_handle) { + /* We've sent the unmap request but not had the response. */ + pr_debug("[%s]: Waiting for VPU unmap response on %p\n", + __func__, buffer); + goto defer; + } + if (buffer->in_use) { + /* dmabuf still in use - we await the release */ + pr_debug("[%s]: buffer %p is still in use\n", __func__, buffer); + goto defer; + } + + /* Release the allocation (whether imported dmabuf or CMA allocation) */ + if (buffer->imported) { + if (buffer->import.dma_buf) + dma_buf_put(buffer->import.dma_buf); + else + pr_err("%s: Imported dmabuf already been put for buf %p\n", + __func__, buffer); + buffer->import.dma_buf = NULL; + } else { + dma_free_coherent(&sm_state->device->dev, buffer->size, + buffer->cookie, buffer->dma_addr); + } + + /* Free our buffer. Start by removing it from the list */ + mutex_lock(&sm_state->map_lock); + list_del(&buffer->global_buffer_list); + mutex_unlock(&sm_state->map_lock); + + pr_debug("%s: Release our allocation - done\n", __func__); + mutex_unlock(&buffer->lock); + + mutex_destroy(&buffer->lock); + + kfree(buffer); + return; + +defer: + mutex_unlock(&buffer->lock); +} + +/* Create support for private data tracking. */ +static struct vc_sm_privdata_t *vc_sm_cma_create_priv_data(pid_t id) +{ + char alloc_name[32]; + struct vc_sm_privdata_t *file_data = NULL; + + /* Allocate private structure. */ + file_data = kzalloc(sizeof(*file_data), GFP_KERNEL); + + if (!file_data) + return NULL; + + snprintf(alloc_name, sizeof(alloc_name), "%d", id); + + file_data->pid = id; + + return file_data; +} + +/* Dma buf operations for use with our own allocations */ + +static int vc_sm_dma_buf_attach(struct dma_buf *dmabuf, + struct dma_buf_attachment *attachment) + +{ + struct vc_sm_dma_buf_attachment *a; + struct sg_table *sgt; + struct vc_sm_buffer *buf = dmabuf->priv; + struct scatterlist *rd, *wr; + int ret, i; + + a = kzalloc(sizeof(*a), GFP_KERNEL); + if (!a) + return -ENOMEM; + + pr_debug("%s dmabuf %p attachment %p\n", __func__, dmabuf, attachment); + + mutex_lock(&buf->lock); + + INIT_LIST_HEAD(&a->list); + + sgt = &a->sg_table; + + /* Copy the buf->base_sgt scatter list to the attachment, as we can't + * map the same scatter list to multiple attachments at the same time. + */ + ret = sg_alloc_table(sgt, buf->alloc.sg_table->orig_nents, GFP_KERNEL); + if (ret) { + kfree(a); + return -ENOMEM; + } + + rd = buf->alloc.sg_table->sgl; + wr = sgt->sgl; + for (i = 0; i < sgt->orig_nents; ++i) { + sg_set_page(wr, sg_page(rd), rd->length, rd->offset); + rd = sg_next(rd); + wr = sg_next(wr); + } + + a->dma_dir = DMA_NONE; + attachment->priv = a; + + list_add(&a->list, &buf->attachments); + mutex_unlock(&buf->lock); + + return 0; +} + +static void vc_sm_dma_buf_detach(struct dma_buf *dmabuf, + struct dma_buf_attachment *attachment) +{ + struct vc_sm_dma_buf_attachment *a = attachment->priv; + struct vc_sm_buffer *buf = dmabuf->priv; + struct sg_table *sgt; + + pr_debug("%s dmabuf %p attachment %p\n", __func__, dmabuf, attachment); + if (!a) + return; + + sgt = &a->sg_table; + + /* release the scatterlist cache */ + if (a->dma_dir != DMA_NONE) + dma_unmap_sg(attachment->dev, sgt->sgl, sgt->orig_nents, + a->dma_dir); + sg_free_table(sgt); + + mutex_lock(&buf->lock); + list_del(&a->list); + mutex_unlock(&buf->lock); + + kfree(a); +} + +static struct sg_table *vc_sm_map_dma_buf(struct dma_buf_attachment *attachment, + enum dma_data_direction direction) +{ + struct vc_sm_dma_buf_attachment *a = attachment->priv; + /* stealing dmabuf mutex to serialize map/unmap operations */ + struct sg_table *table; + + pr_debug("%s attachment %p\n", __func__, attachment); + table = &a->sg_table; + + /* return previously mapped sg table */ + if (a->dma_dir == direction) + return table; + + /* release any previous cache */ + if (a->dma_dir != DMA_NONE) { + dma_unmap_sg(attachment->dev, table->sgl, table->orig_nents, + a->dma_dir); + a->dma_dir = DMA_NONE; + } + + /* mapping to the client with new direction */ + table->nents = dma_map_sg(attachment->dev, table->sgl, + table->orig_nents, direction); + if (!table->nents) { + pr_err("failed to map scatterlist\n"); + return ERR_PTR(-EIO); + } + + a->dma_dir = direction; + + pr_debug("%s attachment %p\n", __func__, attachment); + return table; +} + +static void vc_sm_unmap_dma_buf(struct dma_buf_attachment *attachment, + struct sg_table *table, + enum dma_data_direction direction) +{ + pr_debug("%s attachment %p\n", __func__, attachment); + dma_unmap_sg(attachment->dev, table->sgl, table->nents, direction); +} + +static int vc_sm_dmabuf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma) +{ + struct vc_sm_buffer *buf = dmabuf->priv; + int ret; + + pr_debug("%s dmabuf %p, buf %p, vm_start %08lX\n", __func__, dmabuf, + buf, vma->vm_start); + + /* now map it to userspace */ + vma->vm_pgoff = 0; + + ret = dma_mmap_coherent(&sm_state->device->dev, vma, buf->cookie, + buf->dma_addr, buf->size); + + if (ret) { + pr_err("Remapping memory failed, error: %d\n", ret); + return ret; + } + + vm_flags_reset(vma, vma->vm_flags | VM_DONTEXPAND | VM_DONTDUMP); + + if (ret) + pr_err("%s: failure mapping buffer to userspace\n", + __func__); + + return ret; +} + +static void vc_sm_dma_buf_release(struct dma_buf *dmabuf) +{ + struct vc_sm_buffer *buffer; + + if (!dmabuf) + return; + + buffer = (struct vc_sm_buffer *)dmabuf->priv; + + mutex_lock(&buffer->lock); + + pr_debug("%s dmabuf %p, buffer %p\n", __func__, dmabuf, buffer); + + buffer->in_use = false; + + /* Unmap on the VPU */ + vc_sm_vpu_free(buffer); + pr_debug("%s vpu_free done\n", __func__); + + /* Unmap our dma_buf object (the vc_sm_buffer remains until released + * on the VPU). + */ + vc_sm_clean_up_dmabuf(buffer); + pr_debug("%s clean_up dmabuf done\n", __func__); + + /* buffer->lock will be destroyed by vc_sm_release_resource if finished + * with, otherwise unlocked. Do NOT unlock here. + */ + vc_sm_release_resource(buffer); + pr_debug("%s done\n", __func__); +} + +static int vc_sm_dma_buf_begin_cpu_access(struct dma_buf *dmabuf, + enum dma_data_direction direction) +{ + struct vc_sm_buffer *buf; + struct vc_sm_dma_buf_attachment *a; + + if (!dmabuf) + return -EFAULT; + + buf = dmabuf->priv; + if (!buf) + return -EFAULT; + + mutex_lock(&buf->lock); + + list_for_each_entry(a, &buf->attachments, list) { + dma_sync_sg_for_cpu(a->dev, a->sg_table.sgl, + a->sg_table.nents, direction); + } + mutex_unlock(&buf->lock); + + return 0; +} + +static int vc_sm_dma_buf_end_cpu_access(struct dma_buf *dmabuf, + enum dma_data_direction direction) +{ + struct vc_sm_buffer *buf; + struct vc_sm_dma_buf_attachment *a; + + if (!dmabuf) + return -EFAULT; + buf = dmabuf->priv; + if (!buf) + return -EFAULT; + + mutex_lock(&buf->lock); + + list_for_each_entry(a, &buf->attachments, list) { + dma_sync_sg_for_device(a->dev, a->sg_table.sgl, + a->sg_table.nents, direction); + } + mutex_unlock(&buf->lock); + + return 0; +} + +static const struct dma_buf_ops dma_buf_ops = { + .map_dma_buf = vc_sm_map_dma_buf, + .unmap_dma_buf = vc_sm_unmap_dma_buf, + .mmap = vc_sm_dmabuf_mmap, + .release = vc_sm_dma_buf_release, + .attach = vc_sm_dma_buf_attach, + .detach = vc_sm_dma_buf_detach, + .begin_cpu_access = vc_sm_dma_buf_begin_cpu_access, + .end_cpu_access = vc_sm_dma_buf_end_cpu_access, +}; + +/* Dma_buf operations for chaining through to an imported dma_buf */ + +static +int vc_sm_import_dma_buf_attach(struct dma_buf *dmabuf, + struct dma_buf_attachment *attachment) +{ + struct vc_sm_buffer *buf = dmabuf->priv; + + if (!buf->imported) + return -EINVAL; + return buf->import.dma_buf->ops->attach(buf->import.dma_buf, + attachment); +} + +static +void vc_sm_import_dma_buf_detatch(struct dma_buf *dmabuf, + struct dma_buf_attachment *attachment) +{ + struct vc_sm_buffer *buf = dmabuf->priv; + + if (!buf->imported) + return; + buf->import.dma_buf->ops->detach(buf->import.dma_buf, attachment); +} + +static +struct sg_table *vc_sm_import_map_dma_buf(struct dma_buf_attachment *attachment, + enum dma_data_direction direction) +{ + struct vc_sm_buffer *buf = attachment->dmabuf->priv; + + if (!buf->imported) + return NULL; + return buf->import.dma_buf->ops->map_dma_buf(attachment, + direction); +} + +static +void vc_sm_import_unmap_dma_buf(struct dma_buf_attachment *attachment, + struct sg_table *table, + enum dma_data_direction direction) +{ + struct vc_sm_buffer *buf = attachment->dmabuf->priv; + + if (!buf->imported) + return; + buf->import.dma_buf->ops->unmap_dma_buf(attachment, table, direction); +} + +static +int vc_sm_import_dmabuf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma) +{ + struct vc_sm_buffer *buf = dmabuf->priv; + + pr_debug("%s: mmap dma_buf %p, buf %p, imported db %p\n", __func__, + dmabuf, buf, buf->import.dma_buf); + if (!buf->imported) { + pr_err("%s: mmap dma_buf %p- not an imported buffer\n", + __func__, dmabuf); + return -EINVAL; + } + return buf->import.dma_buf->ops->mmap(buf->import.dma_buf, vma); +} + +static +int vc_sm_import_dma_buf_begin_cpu_access(struct dma_buf *dmabuf, + enum dma_data_direction direction) +{ + struct vc_sm_buffer *buf = dmabuf->priv; + + if (!buf->imported) + return -EINVAL; + return buf->import.dma_buf->ops->begin_cpu_access(buf->import.dma_buf, + direction); +} + +static +int vc_sm_import_dma_buf_end_cpu_access(struct dma_buf *dmabuf, + enum dma_data_direction direction) +{ + struct vc_sm_buffer *buf = dmabuf->priv; + + if (!buf->imported) + return -EINVAL; + return buf->import.dma_buf->ops->end_cpu_access(buf->import.dma_buf, + direction); +} + +static const struct dma_buf_ops dma_buf_import_ops = { + .map_dma_buf = vc_sm_import_map_dma_buf, + .unmap_dma_buf = vc_sm_import_unmap_dma_buf, + .mmap = vc_sm_import_dmabuf_mmap, + .release = vc_sm_dma_buf_release, + .attach = vc_sm_import_dma_buf_attach, + .detach = vc_sm_import_dma_buf_detatch, + .begin_cpu_access = vc_sm_import_dma_buf_begin_cpu_access, + .end_cpu_access = vc_sm_import_dma_buf_end_cpu_access, +}; + +/* Import a dma_buf to be shared with VC. */ +static int +vc_sm_cma_import_dmabuf_internal(struct vc_sm_privdata_t *private, + struct dma_buf *dma_buf, + int fd, + struct dma_buf **imported_buf) +{ + DEFINE_DMA_BUF_EXPORT_INFO(exp_info); + struct vc_sm_buffer *buffer = NULL; + struct vc_sm_import import = { }; + struct vc_sm_import_result result = { }; + struct dma_buf_attachment *attach = NULL; + struct sg_table *sgt = NULL; + dma_addr_t dma_addr; + u32 cache_alias; + int ret = 0; + int status; + + /* Setup our allocation parameters */ + pr_debug("%s: importing dma_buf %p/fd %d\n", __func__, dma_buf, fd); + + if (fd < 0) + get_dma_buf(dma_buf); + else + dma_buf = dma_buf_get(fd); + + if (!dma_buf) + return -EINVAL; + + attach = dma_buf_attach(dma_buf, &sm_state->device->dev); + if (IS_ERR(attach)) { + ret = PTR_ERR(attach); + goto error; + } + + sgt = dma_buf_map_attachment_unlocked(attach, DMA_BIDIRECTIONAL); + if (IS_ERR(sgt)) { + ret = PTR_ERR(sgt); + goto error; + } + + /* Verify that the address block is contiguous */ + if (sgt->nents != 1) { + ret = -ENOMEM; + goto error; + } + + /* Allocate local buffer to track this allocation. */ + buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); + if (!buffer) { + ret = -ENOMEM; + goto error; + } + + import.type = VC_SM_ALLOC_NON_CACHED; + dma_addr = sg_dma_address(sgt->sgl); + import.addr = (u32)dma_addr; + cache_alias = import.addr & 0xC0000000; + if (cache_alias != 0xC0000000 && cache_alias != 0x80000000) { + pr_err("%s: Expecting an uncached alias for dma_addr %pad\n", + __func__, &dma_addr); + /* Note that this assumes we're on >= Pi2, but it implies a + * DT configuration error. + */ + import.addr |= 0xC0000000; + } + import.size = sg_dma_len(sgt->sgl); + import.allocator = current->tgid; + import.kernel_id = get_kernel_id(buffer); + + memcpy(import.name, VC_SM_RESOURCE_NAME_DEFAULT, + sizeof(VC_SM_RESOURCE_NAME_DEFAULT)); + + pr_debug("[%s]: attempt to import \"%s\" data - type %u, addr %pad, size %u.\n", + __func__, import.name, import.type, &dma_addr, import.size); + + /* Allocate the videocore buffer. */ + status = vc_sm_cma_vchi_import(sm_state->sm_handle, &import, &result, + &sm_state->int_trans_id); + if (status == -EINTR) { + pr_debug("[%s]: requesting import memory action restart (trans_id: %u)\n", + __func__, sm_state->int_trans_id); + ret = -ERESTARTSYS; + private->restart_sys = -EINTR; + private->int_action = VC_SM_MSG_TYPE_IMPORT; + goto error; + } else if (status || !result.res_handle) { + pr_debug("[%s]: failed to import memory on videocore (status: %u, trans_id: %u)\n", + __func__, status, sm_state->int_trans_id); + ret = -ENOMEM; + goto error; + } + + mutex_init(&buffer->lock); + INIT_LIST_HEAD(&buffer->attachments); + memcpy(buffer->name, import.name, + min(sizeof(buffer->name), sizeof(import.name) - 1)); + + /* Keep track of the buffer we created. */ + buffer->private = private; + buffer->vc_handle = result.res_handle; + buffer->size = import.size; + buffer->vpu_state = VPU_MAPPED; + + buffer->imported = true; + buffer->import.dma_buf = dma_buf; + + buffer->import.attach = attach; + buffer->import.sgt = sgt; + buffer->dma_addr = dma_addr; + buffer->in_use = true; + buffer->kernel_id = import.kernel_id; + + /* + * We're done - we need to export a new dmabuf chaining through most + * functions, but enabling us to release our own internal references + * here. + */ + exp_info.ops = &dma_buf_import_ops; + exp_info.size = import.size; + exp_info.flags = O_RDWR; + exp_info.priv = buffer; + + buffer->dma_buf = dma_buf_export(&exp_info); + if (IS_ERR(buffer->dma_buf)) { + ret = PTR_ERR(buffer->dma_buf); + goto error; + } + + vc_sm_add_resource(private, buffer); + + *imported_buf = buffer->dma_buf; + + return 0; + +error: + if (result.res_handle) { + struct vc_sm_free_t free = { result.res_handle, 0 }; + + vc_sm_cma_vchi_free(sm_state->sm_handle, &free, + &sm_state->int_trans_id); + } + free_kernel_id(import.kernel_id); + kfree(buffer); + if (sgt) + dma_buf_unmap_attachment_unlocked(attach, sgt, DMA_BIDIRECTIONAL); + if (attach) + dma_buf_detach(dma_buf, attach); + dma_buf_put(dma_buf); + return ret; +} + +static int vc_sm_cma_vpu_alloc(u32 size, u32 align, const char *name, + u32 mem_handle, struct vc_sm_buffer **ret_buffer) +{ + DEFINE_DMA_BUF_EXPORT_INFO(exp_info); + struct vc_sm_buffer *buffer = NULL; + struct sg_table *sgt; + int aligned_size; + int ret = 0; + + /* Align to the user requested align */ + aligned_size = ALIGN(size, align); + /* and then to a page boundary */ + aligned_size = PAGE_ALIGN(aligned_size); + + if (!aligned_size) + return -EINVAL; + + /* Allocate local buffer to track this allocation. */ + buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); + if (!buffer) + return -ENOMEM; + + mutex_init(&buffer->lock); + /* Acquire the mutex as vc_sm_release_resource will release it in the + * error path. + */ + mutex_lock(&buffer->lock); + + buffer->cookie = dma_alloc_coherent(&sm_state->device->dev, + aligned_size, &buffer->dma_addr, + GFP_KERNEL); + if (!buffer->cookie) { + pr_err("[%s]: dma_alloc_coherent alloc of %d bytes failed\n", + __func__, aligned_size); + ret = -ENOMEM; + goto error; + } + + pr_debug("[%s]: alloc of %d bytes success\n", + __func__, aligned_size); + + sgt = kmalloc(sizeof(*sgt), GFP_KERNEL); + if (!sgt) { + ret = -ENOMEM; + goto error; + } + + ret = dma_get_sgtable(&sm_state->device->dev, sgt, buffer->cookie, + buffer->dma_addr, buffer->size); + if (ret < 0) { + pr_err("failed to get scatterlist from DMA API\n"); + kfree(sgt); + ret = -ENOMEM; + goto error; + } + buffer->alloc.sg_table = sgt; + + INIT_LIST_HEAD(&buffer->attachments); + + memcpy(buffer->name, name, + min(sizeof(buffer->name), strlen(name))); + + exp_info.ops = &dma_buf_ops; + exp_info.size = aligned_size; + exp_info.flags = O_RDWR; + exp_info.priv = buffer; + + buffer->dma_buf = dma_buf_export(&exp_info); + if (IS_ERR(buffer->dma_buf)) { + ret = PTR_ERR(buffer->dma_buf); + goto error; + } + buffer->dma_addr = (u32)sg_dma_address(buffer->alloc.sg_table->sgl); + if ((buffer->dma_addr & 0xC0000000) != 0xC0000000) { + pr_warn_once("%s: Expecting an uncached alias for dma_addr %pad\n", + __func__, &buffer->dma_addr); + buffer->dma_addr |= 0xC0000000; + } + buffer->private = sm_state->vpu_allocs; + + buffer->vc_handle = mem_handle; + buffer->vpu_state = VPU_MAPPED; + buffer->vpu_allocated = 1; + buffer->size = size; + /* + * Create an ID that will be passed along with our message so + * that when we service the release reply, we can look up which + * resource is being released. + */ + buffer->kernel_id = get_kernel_id(buffer); + + vc_sm_add_resource(sm_state->vpu_allocs, buffer); + + mutex_unlock(&buffer->lock); + + *ret_buffer = buffer; + return 0; +error: + if (buffer) + vc_sm_release_resource(buffer); + return ret; +} + +static void +vc_sm_vpu_event(struct sm_instance *instance, struct vc_sm_result_t *reply, + int reply_len) +{ + switch (reply->trans_id & ~0x80000000) { + case VC_SM_MSG_TYPE_CLIENT_VERSION: + { + /* Acknowledge that the firmware supports the version command */ + pr_debug("%s: firmware acked version msg. Require release cb\n", + __func__); + sm_state->require_released_callback = true; + } + break; + case VC_SM_MSG_TYPE_RELEASED: + { + struct vc_sm_released *release = (struct vc_sm_released *)reply; + struct vc_sm_buffer *buffer = + lookup_kernel_id(release->kernel_id); + if (!buffer) { + pr_err("%s: VC released a buffer that is already released, kernel_id %d\n", + __func__, release->kernel_id); + break; + } + mutex_lock(&buffer->lock); + + pr_debug("%s: Released addr %08x, size %u, id %08x, mem_handle %08x\n", + __func__, release->addr, release->size, + release->kernel_id, release->vc_handle); + + buffer->vc_handle = 0; + buffer->vpu_state = VPU_NOT_MAPPED; + free_kernel_id(release->kernel_id); + + if (buffer->vpu_allocated) { + /* VPU allocation, so release the dmabuf which will + * trigger the clean up. + */ + mutex_unlock(&buffer->lock); + dma_buf_put(buffer->dma_buf); + } else { + vc_sm_release_resource(buffer); + } + } + break; + case VC_SM_MSG_TYPE_VC_MEM_REQUEST: + { + struct vc_sm_buffer *buffer = NULL; + struct vc_sm_vc_mem_request *req = + (struct vc_sm_vc_mem_request *)reply; + struct vc_sm_vc_mem_request_result reply; + int ret; + + pr_debug("%s: Request %u bytes of memory, align %d name %s, trans_id %08x\n", + __func__, req->size, req->align, req->name, + req->trans_id); + ret = vc_sm_cma_vpu_alloc(req->size, req->align, req->name, + req->vc_handle, &buffer); + + reply.trans_id = req->trans_id; + if (!ret) { + reply.addr = buffer->dma_addr; + reply.kernel_id = buffer->kernel_id; + pr_debug("%s: Allocated resource buffer %p, addr %pad\n", + __func__, buffer, &buffer->dma_addr); + } else { + pr_err("%s: Allocation failed size %u, name %s, vc_handle %u\n", + __func__, req->size, req->name, req->vc_handle); + reply.addr = 0; + reply.kernel_id = 0; + } + vc_sm_vchi_client_vc_mem_req_reply(sm_state->sm_handle, &reply, + &sm_state->int_trans_id); + break; + } + break; + default: + pr_err("%s: Unknown vpu cmd %x\n", __func__, reply->trans_id); + break; + } +} + +/* Userspace handling */ +/* + * Open the device. Creates a private state to help track all allocation + * associated with this device. + */ +static int vc_sm_cma_open(struct inode *inode, struct file *file) +{ + /* Make sure the device was started properly. */ + if (!sm_state) { + pr_err("[%s]: invalid device\n", __func__); + return -EPERM; + } + + file->private_data = vc_sm_cma_create_priv_data(current->tgid); + if (!file->private_data) { + pr_err("[%s]: failed to create data tracker\n", __func__); + + return -ENOMEM; + } + + return 0; +} + +/* + * Close the vcsm-cma device. + * All allocations are file descriptors to the dmabuf objects, so we will get + * the clean up request on those as those are cleaned up. + */ +static int vc_sm_cma_release(struct inode *inode, struct file *file) +{ + struct vc_sm_privdata_t *file_data = + (struct vc_sm_privdata_t *)file->private_data; + int ret = 0; + + /* Make sure the device was started properly. */ + if (!sm_state || !file_data) { + pr_err("[%s]: invalid device\n", __func__); + ret = -EPERM; + goto out; + } + + pr_debug("[%s]: using private data %p\n", __func__, file_data); + + /* Terminate the private data. */ + kfree(file_data); + +out: + return ret; +} + +/* + * Allocate a shared memory handle and block. + * Allocation is from CMA, and then imported into the VPU mappings. + */ +static int vc_sm_cma_ioctl_alloc(struct vc_sm_privdata_t *private, + struct vc_sm_cma_ioctl_alloc *ioparam) +{ + DEFINE_DMA_BUF_EXPORT_INFO(exp_info); + struct vc_sm_buffer *buffer = NULL; + struct vc_sm_import import = { 0 }; + struct vc_sm_import_result result = { 0 }; + struct dma_buf *dmabuf = NULL; + struct sg_table *sgt; + int aligned_size; + int ret = 0; + int status; + int fd = -1; + + aligned_size = PAGE_ALIGN(ioparam->size); + + if (!aligned_size) + return -EINVAL; + + /* Allocate local buffer to track this allocation. */ + buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); + if (!buffer) { + ret = -ENOMEM; + goto error; + } + + buffer->cookie = dma_alloc_coherent(&sm_state->device->dev, + aligned_size, + &buffer->dma_addr, + GFP_KERNEL); + if (!buffer->cookie) { + pr_err("[%s]: dma_alloc_coherent alloc of %d bytes failed\n", + __func__, aligned_size); + ret = -ENOMEM; + goto error; + } + + import.type = VC_SM_ALLOC_NON_CACHED; + import.allocator = current->tgid; + + if (*ioparam->name) + memcpy(import.name, ioparam->name, sizeof(import.name) - 1); + else + memcpy(import.name, VC_SM_RESOURCE_NAME_DEFAULT, + sizeof(VC_SM_RESOURCE_NAME_DEFAULT)); + + mutex_init(&buffer->lock); + INIT_LIST_HEAD(&buffer->attachments); + memcpy(buffer->name, import.name, + min(sizeof(buffer->name), sizeof(import.name) - 1)); + + exp_info.ops = &dma_buf_ops; + exp_info.size = aligned_size; + exp_info.flags = O_RDWR; + exp_info.priv = buffer; + + dmabuf = dma_buf_export(&exp_info); + if (IS_ERR(dmabuf)) { + ret = PTR_ERR(dmabuf); + goto error; + } + buffer->dma_buf = dmabuf; + + import.addr = buffer->dma_addr; + import.size = aligned_size; + import.kernel_id = get_kernel_id(buffer); + + /* Wrap it into a videocore buffer. */ + status = vc_sm_cma_vchi_import(sm_state->sm_handle, &import, &result, + &sm_state->int_trans_id); + if (status == -EINTR) { + pr_debug("[%s]: requesting import memory action restart (trans_id: %u)\n", + __func__, sm_state->int_trans_id); + ret = -ERESTARTSYS; + private->restart_sys = -EINTR; + private->int_action = VC_SM_MSG_TYPE_IMPORT; + goto error; + } else if (status || !result.res_handle) { + pr_err("[%s]: failed to import memory on videocore (status: %u, trans_id: %u)\n", + __func__, status, sm_state->int_trans_id); + ret = -ENOMEM; + goto error; + } + + /* Keep track of the buffer we created. */ + buffer->private = private; + buffer->vc_handle = result.res_handle; + buffer->size = import.size; + buffer->vpu_state = VPU_MAPPED; + buffer->kernel_id = import.kernel_id; + + sgt = kmalloc(sizeof(*sgt), GFP_KERNEL); + if (!sgt) { + ret = -ENOMEM; + goto error; + } + + ret = dma_get_sgtable(&sm_state->device->dev, sgt, buffer->cookie, + buffer->dma_addr, buffer->size); + if (ret < 0) { + /* FIXME: error handling */ + pr_err("failed to get scatterlist from DMA API\n"); + kfree(sgt); + ret = -ENOMEM; + goto error; + } + buffer->alloc.sg_table = sgt; + + fd = dma_buf_fd(dmabuf, O_CLOEXEC); + if (fd < 0) + goto error; + + vc_sm_add_resource(private, buffer); + + pr_debug("[%s]: Added resource as fd %d, buffer %p, private %p, dma_addr %pad\n", + __func__, fd, buffer, private, &buffer->dma_addr); + + /* We're done */ + ioparam->handle = fd; + ioparam->vc_handle = buffer->vc_handle; + ioparam->dma_addr = buffer->dma_addr; + return 0; + +error: + pr_err("[%s]: something failed - cleanup. ret %d\n", __func__, ret); + + if (dmabuf) { + /* dmabuf has been exported, therefore allow dmabuf cleanup to + * deal with this + */ + dma_buf_put(dmabuf); + } else { + /* No dmabuf, therefore just free the buffer here */ + if (buffer->cookie) + dma_free_coherent(&sm_state->device->dev, buffer->size, + buffer->cookie, buffer->dma_addr); + kfree(buffer); + } + return ret; +} + +static long vc_sm_cma_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) +{ + int ret = 0; + unsigned int cmdnr = _IOC_NR(cmd); + struct vc_sm_privdata_t *file_data = + (struct vc_sm_privdata_t *)file->private_data; + + /* Validate we can work with this device. */ + if (!sm_state || !file_data) { + pr_err("[%s]: invalid device\n", __func__); + return -EPERM; + } + + /* Action is a re-post of a previously interrupted action? */ + if (file_data->restart_sys == -EINTR) { + pr_debug("[%s]: clean up of action %u (trans_id: %u) following EINTR\n", + __func__, file_data->int_action, + file_data->int_trans_id); + + file_data->restart_sys = 0; + } + + /* Now process the command. */ + switch (cmdnr) { + /* New memory allocation. + */ + case VC_SM_CMA_CMD_ALLOC: + { + struct vc_sm_cma_ioctl_alloc ioparam; + + /* Get the parameter data. */ + if (copy_from_user + (&ioparam, (void *)arg, sizeof(ioparam)) != 0) { + pr_err("[%s]: failed to copy-from-user for cmd %x\n", + __func__, cmdnr); + ret = -EFAULT; + break; + } + + ret = vc_sm_cma_ioctl_alloc(file_data, &ioparam); + if (!ret && + (copy_to_user((void *)arg, &ioparam, + sizeof(ioparam)) != 0)) { + /* FIXME: Release allocation */ + pr_err("[%s]: failed to copy-to-user for cmd %x\n", + __func__, cmdnr); + ret = -EFAULT; + } + break; + } + + case VC_SM_CMA_CMD_IMPORT_DMABUF: + { + struct vc_sm_cma_ioctl_import_dmabuf ioparam; + struct dma_buf *new_dmabuf; + + /* Get the parameter data. */ + if (copy_from_user + (&ioparam, (void *)arg, sizeof(ioparam)) != 0) { + pr_err("[%s]: failed to copy-from-user for cmd %x\n", + __func__, cmdnr); + ret = -EFAULT; + break; + } + + ret = vc_sm_cma_import_dmabuf_internal(file_data, + NULL, + ioparam.dmabuf_fd, + &new_dmabuf); + + if (!ret) { + struct vc_sm_buffer *buf = new_dmabuf->priv; + + ioparam.size = buf->size; + ioparam.handle = dma_buf_fd(new_dmabuf, + O_CLOEXEC); + ioparam.vc_handle = buf->vc_handle; + ioparam.dma_addr = buf->dma_addr; + + if (ioparam.handle < 0 || + (copy_to_user((void *)arg, &ioparam, + sizeof(ioparam)) != 0)) { + dma_buf_put(new_dmabuf); + /* FIXME: Release allocation */ + ret = -EFAULT; + } + } + break; + } + + default: + pr_debug("[%s]: cmd %x tgid %u, owner %u\n", __func__, cmdnr, + current->tgid, file_data->pid); + + ret = -EINVAL; + break; + } + + return ret; +} + +#ifdef CONFIG_COMPAT +struct vc_sm_cma_ioctl_clean_invalid2_32 { + u32 op_count; + struct vc_sm_cma_ioctl_clean_invalid_block_32 { + u16 invalidate_mode; + u16 block_count; + compat_uptr_t start_address; + u32 block_size; + u32 inter_block_stride; + } s[]; +}; + +#define VC_SM_CMA_CMD_CLEAN_INVALID2_32\ + _IOR(VC_SM_CMA_MAGIC_TYPE, VC_SM_CMA_CMD_CLEAN_INVALID2,\ + struct vc_sm_cma_ioctl_clean_invalid2_32) + +static long vc_sm_cma_compat_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) +{ + switch (cmd) { + case VC_SM_CMA_CMD_CLEAN_INVALID2_32: + /* FIXME */ + return -EINVAL; + + default: + return vc_sm_cma_ioctl(file, cmd, arg); + } +} +#endif + +/* Device operations that we managed in this driver. */ +static const struct file_operations vc_sm_ops = { + .owner = THIS_MODULE, + .unlocked_ioctl = vc_sm_cma_ioctl, +#ifdef CONFIG_COMPAT + .compat_ioctl = vc_sm_cma_compat_ioctl, +#endif + .open = vc_sm_cma_open, + .release = vc_sm_cma_release, +}; + +/* Driver load/unload functions */ +/* Videocore connected. */ +static void vc_sm_connected_init(void) +{ + int ret; + struct vc_sm_version version; + struct vc_sm_result_t version_result; + + /* + * Digging the vchiq_drv_mgmt, so low here and through a global seems + * suspicious. + * + * The callbacks should be able to pass a parameter or context. + */ + struct vchiq_drv_mgmt *mgmt = dev_get_drvdata(sm_state->device->dev.parent); + + pr_debug("[%s]: start\n", __func__); + + /* + * Initialize and create a VCHI connection for the shared memory service + * running on videocore. + */ + ret = vchiq_initialise(&mgmt->state, &sm_state->vchiq_instance); + if (ret) { + pr_err("[%s]: failed to initialise VCHI instance (ret=%d)\n", + __func__, ret); + + return; + } + + ret = vchiq_connect(sm_state->vchiq_instance); + if (ret) { + pr_err("[%s]: failed to connect VCHI instance (ret=%d)\n", + __func__, ret); + + return; + } + + /* Initialize an instance of the shared memory service. */ + sm_state->sm_handle = vc_sm_cma_vchi_init(sm_state->vchiq_instance, 1, + vc_sm_vpu_event); + if (!sm_state->sm_handle) { + pr_err("[%s]: failed to initialize shared memory service\n", + __func__); + + return; + } + + /* Create a debug fs directory entry (root). */ + sm_state->dir_root = debugfs_create_dir(VC_SM_DIR_ROOT_NAME, NULL); + + sm_state->dir_state.show = &vc_sm_cma_global_state_show; + sm_state->dir_state.dir_entry = + debugfs_create_file(VC_SM_STATE, 0444, sm_state->dir_root, + &sm_state->dir_state, + &vc_sm_cma_debug_fs_fops); + + INIT_LIST_HEAD(&sm_state->buffer_list); + + /* Create a shared memory device. */ + sm_state->misc_dev.minor = MISC_DYNAMIC_MINOR; + sm_state->misc_dev.name = DEVICE_NAME; + sm_state->misc_dev.fops = &vc_sm_ops; + sm_state->misc_dev.parent = NULL; + /* Temporarily set as 666 until udev rules have been sorted */ + sm_state->misc_dev.mode = 0666; + ret = misc_register(&sm_state->misc_dev); + if (ret) { + pr_err("vcsm-cma: failed to register misc device.\n"); + goto err_remove_debugfs; + } + + sm_state->data_knl = vc_sm_cma_create_priv_data(0); + if (!sm_state->data_knl) { + pr_err("[%s]: failed to create kernel private data tracker\n", + __func__); + goto err_remove_misc_dev; + } + + version.version = 2; + ret = vc_sm_cma_vchi_client_version(sm_state->sm_handle, &version, + &version_result, + &sm_state->int_trans_id); + if (ret) { + pr_err("[%s]: Failed to send version request %d\n", __func__, + ret); + } + + /* Done! */ + sm_inited = 1; + pr_debug("[%s]: installed successfully\n", __func__); + return; + +err_remove_misc_dev: + misc_deregister(&sm_state->misc_dev); +err_remove_debugfs: + debugfs_remove_recursive(sm_state->dir_root); + vc_sm_cma_vchi_stop(sm_state->vchiq_instance, &sm_state->sm_handle); +} + +/* Driver loading. */ +static int bcm2835_vc_sm_cma_probe(struct vchiq_device *device) +{ + int err; + + pr_info("%s: Videocore shared memory driver\n", __func__); + + err = dma_set_mask_and_coherent(&device->dev, DMA_BIT_MASK(32)); + if (err) { + dev_err(&device->dev, "dma_set_mask_and_coherent failed: %d\n", + err); + return err; + } + + sm_state = devm_kzalloc(&device->dev, sizeof(*sm_state), GFP_KERNEL); + if (!sm_state) + return -ENOMEM; + sm_state->device = device; + mutex_init(&sm_state->map_lock); + + mutex_init(&sm_state->kernelid_map_lock); + idr_init_base(&sm_state->kernelid_map, 1); + + device->dev.dma_parms = devm_kzalloc(&device->dev, + sizeof(*device->dev.dma_parms), + GFP_KERNEL); + /* dma_set_max_seg_size checks if dma_parms is NULL. */ + dma_set_max_seg_size(&device->dev, 0x3FFFFFFF); + + vchiq_add_connected_callback(device, vc_sm_connected_init); + return 0; +} + +/* Driver unloading. */ +static void bcm2835_vc_sm_cma_remove(struct vchiq_device *device) +{ + pr_debug("[%s]: start\n", __func__); + if (sm_inited) { + misc_deregister(&sm_state->misc_dev); + + /* Remove all proc entries. */ + debugfs_remove_recursive(sm_state->dir_root); + + /* Stop the videocore shared memory service. */ + vc_sm_cma_vchi_stop(sm_state->vchiq_instance, &sm_state->sm_handle); + } + + if (sm_state) { + idr_destroy(&sm_state->kernelid_map); + + /* Free the memory for the state structure. */ + mutex_destroy(&sm_state->map_lock); + } + + pr_debug("[%s]: end\n", __func__); +} + +/* Kernel API calls */ +/* Get an internal resource handle mapped from the external one. */ +int vc_sm_cma_int_handle(void *handle) +{ + struct dma_buf *dma_buf = (struct dma_buf *)handle; + struct vc_sm_buffer *buf; + + /* Validate we can work with this device. */ + if (!sm_state || !handle) { + pr_err("[%s]: invalid input\n", __func__); + return 0; + } + + buf = (struct vc_sm_buffer *)dma_buf->priv; + return buf->vc_handle; +} +EXPORT_SYMBOL_GPL(vc_sm_cma_int_handle); + +/* Free a previously allocated shared memory handle and block. */ +int vc_sm_cma_free(void *handle) +{ + struct dma_buf *dma_buf = (struct dma_buf *)handle; + + /* Validate we can work with this device. */ + if (!sm_state || !handle) { + pr_err("[%s]: invalid input\n", __func__); + return -EPERM; + } + + pr_debug("%s: handle %p/dmabuf %p\n", __func__, handle, dma_buf); + + dma_buf_put(dma_buf); + + return 0; +} +EXPORT_SYMBOL_GPL(vc_sm_cma_free); + +/* Import a dmabuf to be shared with VC. */ +int vc_sm_cma_import_dmabuf(struct dma_buf *src_dmabuf, void **handle) +{ + struct dma_buf *new_dma_buf; + int ret; + + /* Validate we can work with this device. */ + if (!sm_state || !src_dmabuf || !handle) { + pr_err("[%s]: invalid input\n", __func__); + return -EPERM; + } + + ret = vc_sm_cma_import_dmabuf_internal(sm_state->data_knl, src_dmabuf, + -1, &new_dma_buf); + + if (!ret) { + pr_debug("%s: imported to ptr %p\n", __func__, new_dma_buf); + + /* Assign valid handle at this time.*/ + *handle = new_dma_buf; + } else { + /* + * succeeded in importing the dma_buf, but then + * failed to look it up again. How? + * Release the fd again. + */ + pr_err("%s: imported vc_sm_cma_get_buffer failed %d\n", + __func__, ret); + } + + return ret; +} +EXPORT_SYMBOL_GPL(vc_sm_cma_import_dmabuf); + +static struct vchiq_driver bcm2835_vcsm_cma_driver = { + .probe = bcm2835_vc_sm_cma_probe, + .remove = bcm2835_vc_sm_cma_remove, + .driver = { + .name = DEVICE_NAME, + .owner = THIS_MODULE, + }, +}; + +module_vchiq_driver(bcm2835_vcsm_cma_driver); + +MODULE_AUTHOR("Dave Stevenson"); +MODULE_DESCRIPTION("VideoCore CMA Shared Memory Driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("vcsm-cma"); diff --git a/drivers/platform/raspberrypi/vc-sm-cma/vc_sm.h b/drivers/platform/raspberrypi/vc-sm-cma/vc_sm.h new file mode 100644 index 00000000000000..aba4c0c0c7bb66 --- /dev/null +++ b/drivers/platform/raspberrypi/vc-sm-cma/vc_sm.h @@ -0,0 +1,83 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* + * VideoCore Shared Memory driver using CMA. + * + * Copyright: 2018, Raspberry Pi (Trading) Ltd + * + */ + +#ifndef VC_SM_H +#define VC_SM_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define VC_SM_MAX_NAME_LEN 32 + +enum vc_sm_vpu_mapping_state { + VPU_NOT_MAPPED, + VPU_MAPPED, + VPU_UNMAPPING +}; + +struct vc_sm_alloc_data { + unsigned long num_pages; + void *priv_virt; + struct sg_table *sg_table; +}; + +struct vc_sm_imported { + struct dma_buf *dma_buf; + struct dma_buf_attachment *attach; + struct sg_table *sgt; +}; + +struct vc_sm_buffer { + struct list_head global_buffer_list; /* Global list of buffers. */ + + /* Index in the kernel_id idr so that we can find the + * mmal_msg_context again when servicing the VCHI reply. + */ + int kernel_id; + + size_t size; + + /* Lock over all the following state for this buffer */ + struct mutex lock; + struct list_head attachments; + + char name[VC_SM_MAX_NAME_LEN]; + + bool in_use:1; /* Kernel is still using this resource */ + bool imported:1; /* Imported dmabuf */ + + enum vc_sm_vpu_mapping_state vpu_state; + u32 vc_handle; /* VideoCore handle for this buffer */ + int vpu_allocated; /* + * The VPU made this allocation. Release the + * local dma_buf when the VPU releases the + * resource. + */ + + /* DMABUF related fields */ + struct dma_buf *dma_buf; + dma_addr_t dma_addr; + void *cookie; + + struct vc_sm_privdata_t *private; + + union { + struct vc_sm_alloc_data alloc; + struct vc_sm_imported import; + }; +}; + +#endif diff --git a/drivers/platform/raspberrypi/vc-sm-cma/vc_sm_cma_vchi.c b/drivers/platform/raspberrypi/vc-sm-cma/vc_sm_cma_vchi.c new file mode 100644 index 00000000000000..cb21becd69fe5e --- /dev/null +++ b/drivers/platform/raspberrypi/vc-sm-cma/vc_sm_cma_vchi.c @@ -0,0 +1,513 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * VideoCore Shared Memory CMA allocator + * + * Copyright: 2018, Raspberry Pi (Trading) Ltd + * Copyright 2011-2012 Broadcom Corporation. All rights reserved. + * + * Based on vmcs_sm driver from Broadcom Corporation. + * + */ + +/* ---- Include Files ----------------------------------------------------- */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include "vc_sm_cma_vchi.h" + +#define VC_SM_VER 1 +#define VC_SM_MIN_VER 0 + +/* ---- Private Constants and Types -------------------------------------- */ + +/* Command blocks come from a pool */ +#define SM_MAX_NUM_CMD_RSP_BLKS 32 + +/* The number of supported connections */ +#define SM_MAX_NUM_CONNECTIONS 3 + +struct sm_cmd_rsp_blk { + struct list_head head; /* To create lists */ + /* To be signaled when the response is there */ + struct completion cmplt; + + u32 id; + u16 length; + + u8 msg[VC_SM_MAX_MSG_LEN]; + + uint32_t wait:1; + uint32_t sent:1; + uint32_t alloc:1; + +}; + +struct sm_instance { + u32 num_connections; + unsigned int service_handle[SM_MAX_NUM_CONNECTIONS]; + struct task_struct *io_thread; + struct completion io_cmplt; + + vpu_event_cb vpu_event; + + /* Mutex over the following lists */ + struct mutex lock; + u32 trans_id; + struct list_head cmd_list; + struct list_head rsp_list; + struct list_head dead_list; + + struct sm_cmd_rsp_blk free_blk[SM_MAX_NUM_CMD_RSP_BLKS]; + + /* Mutex over the free_list */ + struct mutex free_lock; + struct list_head free_list; + + struct semaphore free_sema; + struct vchiq_instance *vchiq_instance; +}; + +/* ---- Private Variables ------------------------------------------------ */ + +/* ---- Private Function Prototypes -------------------------------------- */ + +/* ---- Private Functions ------------------------------------------------ */ +static int +bcm2835_vchi_msg_queue(struct vchiq_instance *vchiq_instance, unsigned int handle, + void *data, + unsigned int size) +{ + return vchiq_queue_kernel_message(vchiq_instance, handle, data, size); +} + +static struct +sm_cmd_rsp_blk *vc_vchi_cmd_create(struct sm_instance *instance, + enum vc_sm_msg_type id, void *msg, + u32 size, int wait) +{ + struct sm_cmd_rsp_blk *blk; + struct vc_sm_msg_hdr_t *hdr; + + if (down_interruptible(&instance->free_sema)) { + blk = kmalloc(sizeof(*blk), GFP_KERNEL); + if (!blk) + return NULL; + + blk->alloc = 1; + init_completion(&blk->cmplt); + } else { + mutex_lock(&instance->free_lock); + blk = + list_first_entry(&instance->free_list, + struct sm_cmd_rsp_blk, head); + list_del(&blk->head); + mutex_unlock(&instance->free_lock); + } + + blk->sent = 0; + blk->wait = wait; + blk->length = sizeof(*hdr) + size; + + hdr = (struct vc_sm_msg_hdr_t *)blk->msg; + hdr->type = id; + mutex_lock(&instance->lock); + instance->trans_id++; + /* + * Retain the top bit for identifying asynchronous events, or VPU cmds. + */ + instance->trans_id &= ~0x80000000; + hdr->trans_id = instance->trans_id; + blk->id = instance->trans_id; + mutex_unlock(&instance->lock); + + if (size) + memcpy(hdr->body, msg, size); + + return blk; +} + +static void +vc_vchi_cmd_delete(struct sm_instance *instance, struct sm_cmd_rsp_blk *blk) +{ + if (blk->alloc) { + kfree(blk); + return; + } + + mutex_lock(&instance->free_lock); + list_add(&blk->head, &instance->free_list); + mutex_unlock(&instance->free_lock); + up(&instance->free_sema); +} + +static void vc_sm_cma_vchi_rx_ack(struct sm_instance *instance, + struct sm_cmd_rsp_blk *cmd, + struct vc_sm_result_t *reply, + u32 reply_len) +{ + mutex_lock(&instance->lock); + list_for_each_entry(cmd, + &instance->rsp_list, + head) { + if (cmd->id == reply->trans_id) + break; + } + mutex_unlock(&instance->lock); + + if (&cmd->head == &instance->rsp_list) { + //pr_debug("%s: received response %u, throw away...", + pr_err("%s: received response %u, throw away...", + __func__, + reply->trans_id); + } else if (reply_len > sizeof(cmd->msg)) { + pr_err("%s: reply too big (%u) %u, throw away...", + __func__, reply_len, + reply->trans_id); + } else { + memcpy(cmd->msg, reply, + reply_len); + complete(&cmd->cmplt); + } +} + +static int vc_sm_cma_vchi_videocore_io(void *arg) +{ + struct sm_instance *instance = arg; + struct sm_cmd_rsp_blk *cmd = NULL, *cmd_tmp; + struct vc_sm_result_t *reply; + struct vchiq_header *header; + s32 status; + int svc_use = 1; + + while (1) { + if (svc_use) + vchiq_release_service(instance->vchiq_instance, + instance->service_handle[0]); + svc_use = 0; + + if (wait_for_completion_interruptible(&instance->io_cmplt)) + continue; + vchiq_use_service(instance->vchiq_instance, instance->service_handle[0]); + svc_use = 1; + + do { + /* + * Get new command and move it to response list + */ + mutex_lock(&instance->lock); + if (list_empty(&instance->cmd_list)) { + /* no more commands to process */ + mutex_unlock(&instance->lock); + break; + } + cmd = list_first_entry(&instance->cmd_list, + struct sm_cmd_rsp_blk, head); + list_move(&cmd->head, &instance->rsp_list); + cmd->sent = 1; + mutex_unlock(&instance->lock); + /* Send the command */ + status = + bcm2835_vchi_msg_queue(instance->vchiq_instance, + instance->service_handle[0], + cmd->msg, cmd->length); + if (status) { + pr_err("%s: failed to queue message (%d)", + __func__, status); + } + + /* If no reply is needed then we're done */ + if (!cmd->wait) { + mutex_lock(&instance->lock); + list_del(&cmd->head); + mutex_unlock(&instance->lock); + vc_vchi_cmd_delete(instance, cmd); + continue; + } + + if (status) { + complete(&cmd->cmplt); + continue; + } + + } while (1); + + while ((header = vchiq_msg_hold(instance->vchiq_instance, + instance->service_handle[0]))) { + reply = (struct vc_sm_result_t *)header->data; + if (reply->trans_id & 0x80000000) { + /* Async event or cmd from the VPU */ + if (instance->vpu_event) + instance->vpu_event(instance, reply, + header->size); + } else { + vc_sm_cma_vchi_rx_ack(instance, cmd, reply, + header->size); + } + + vchiq_release_message(instance->vchiq_instance, + instance->service_handle[0], + header); + } + + /* Go through the dead list and free them */ + mutex_lock(&instance->lock); + list_for_each_entry_safe(cmd, cmd_tmp, &instance->dead_list, + head) { + list_del(&cmd->head); + vc_vchi_cmd_delete(instance, cmd); + } + mutex_unlock(&instance->lock); + } + + return 0; +} + +static int vc_sm_cma_vchi_callback(struct vchiq_instance *vchiq_instance, + enum vchiq_reason reason, + struct vchiq_header *header, + unsigned int handle, void *userdata, + void __user *cb_userdata) +{ + struct sm_instance *instance = vchiq_get_service_userdata(vchiq_instance, handle); + + switch (reason) { + case VCHIQ_MESSAGE_AVAILABLE: + vchiq_msg_queue_push(vchiq_instance, handle, header); + complete(&instance->io_cmplt); + break; + + case VCHIQ_SERVICE_CLOSED: + pr_info("%s: service CLOSED!!", __func__); + break; + + default: + break; + } + + return 0; +} + +struct sm_instance *vc_sm_cma_vchi_init(struct vchiq_instance *vchiq_instance, + unsigned int num_connections, + vpu_event_cb vpu_event) +{ + u32 i; + struct sm_instance *instance; + int status; + + pr_debug("%s: start", __func__); + + if (num_connections > SM_MAX_NUM_CONNECTIONS) { + pr_err("%s: unsupported number of connections %u (max=%u)", + __func__, num_connections, SM_MAX_NUM_CONNECTIONS); + + goto err_null; + } + /* Allocate memory for this instance */ + instance = kzalloc(sizeof(*instance), GFP_KERNEL); + + /* Misc initialisations */ + mutex_init(&instance->lock); + init_completion(&instance->io_cmplt); + INIT_LIST_HEAD(&instance->cmd_list); + INIT_LIST_HEAD(&instance->rsp_list); + INIT_LIST_HEAD(&instance->dead_list); + INIT_LIST_HEAD(&instance->free_list); + sema_init(&instance->free_sema, SM_MAX_NUM_CMD_RSP_BLKS); + mutex_init(&instance->free_lock); + for (i = 0; i < SM_MAX_NUM_CMD_RSP_BLKS; i++) { + init_completion(&instance->free_blk[i].cmplt); + list_add(&instance->free_blk[i].head, &instance->free_list); + } + + instance->vchiq_instance = vchiq_instance; + + /* Open the VCHI service connections */ + instance->num_connections = num_connections; + for (i = 0; i < num_connections; i++) { + struct vchiq_service_params_kernel params = { + .version = VC_SM_VER, + .version_min = VC_SM_MIN_VER, + .fourcc = VCHIQ_MAKE_FOURCC('S', 'M', 'E', 'M'), + .callback = vc_sm_cma_vchi_callback, + .userdata = instance, + }; + + status = vchiq_open_service(vchiq_instance, ¶ms, + &instance->service_handle[i]); + if (status) { + pr_err("%s: failed to open VCHI service (%d)", + __func__, status); + + goto err_close_services; + } + } + /* Create the thread which takes care of all io to/from videoocore. */ + instance->io_thread = kthread_create(&vc_sm_cma_vchi_videocore_io, + (void *)instance, "SMIO"); + if (!instance->io_thread) { + pr_err("%s: failed to create SMIO thread", __func__); + + goto err_close_services; + } + instance->vpu_event = vpu_event; + set_user_nice(instance->io_thread, -10); + wake_up_process(instance->io_thread); + + pr_debug("%s: success - instance %p", __func__, instance); + return instance; + +err_close_services: + for (i = 0; i < instance->num_connections; i++) { + if (instance->service_handle[i]) + vchiq_close_service(vchiq_instance, instance->service_handle[i]); + } + kfree(instance); +err_null: + pr_debug("%s: FAILED", __func__); + return NULL; +} + +int vc_sm_cma_vchi_stop(struct vchiq_instance *vchiq_instance, struct sm_instance **handle) +{ + struct sm_instance *instance; + u32 i; + + if (!handle) { + pr_err("%s: invalid pointer to handle %p", __func__, handle); + goto lock; + } + + if (!*handle) { + pr_err("%s: invalid handle %p", __func__, *handle); + goto lock; + } + + instance = *handle; + + /* Close all VCHI service connections */ + for (i = 0; i < instance->num_connections; i++) { + vchiq_use_service(vchiq_instance, instance->service_handle[i]); + vchiq_close_service(vchiq_instance, instance->service_handle[i]); + } + + kfree(instance); + + *handle = NULL; + return 0; + +lock: + return -EINVAL; +} + +static int vc_sm_cma_vchi_send_msg(struct sm_instance *handle, + enum vc_sm_msg_type msg_id, void *msg, + u32 msg_size, void *result, u32 result_size, + u32 *cur_trans_id, u8 wait_reply) +{ + int status = 0; + struct sm_instance *instance = handle; + struct sm_cmd_rsp_blk *cmd_blk; + + if (!handle) { + pr_err("%s: invalid handle", __func__); + return -EINVAL; + } + if (!msg) { + pr_err("%s: invalid msg pointer", __func__); + return -EINVAL; + } + + cmd_blk = + vc_vchi_cmd_create(instance, msg_id, msg, msg_size, wait_reply); + if (!cmd_blk) { + pr_err("[%s]: failed to allocate global tracking resource", + __func__); + return -ENOMEM; + } + + if (cur_trans_id) + *cur_trans_id = cmd_blk->id; + + mutex_lock(&instance->lock); + list_add_tail(&cmd_blk->head, &instance->cmd_list); + mutex_unlock(&instance->lock); + complete(&instance->io_cmplt); + + if (!wait_reply) + /* We're done */ + return 0; + + /* Wait for the response */ + if (wait_for_completion_interruptible(&cmd_blk->cmplt)) { + mutex_lock(&instance->lock); + if (!cmd_blk->sent) { + list_del(&cmd_blk->head); + mutex_unlock(&instance->lock); + vc_vchi_cmd_delete(instance, cmd_blk); + return -ENXIO; + } + + list_move(&cmd_blk->head, &instance->dead_list); + mutex_unlock(&instance->lock); + complete(&instance->io_cmplt); + return -EINTR; /* We're done */ + } + + if (result && result_size) { + memcpy(result, cmd_blk->msg, result_size); + } else { + struct vc_sm_result_t *res = + (struct vc_sm_result_t *)cmd_blk->msg; + status = (res->success == 0) ? 0 : -ENXIO; + } + + mutex_lock(&instance->lock); + list_del(&cmd_blk->head); + mutex_unlock(&instance->lock); + vc_vchi_cmd_delete(instance, cmd_blk); + return status; +} + +int vc_sm_cma_vchi_free(struct sm_instance *handle, struct vc_sm_free_t *msg, + u32 *cur_trans_id) +{ + return vc_sm_cma_vchi_send_msg(handle, VC_SM_MSG_TYPE_FREE, + msg, sizeof(*msg), 0, 0, cur_trans_id, 0); +} + +int vc_sm_cma_vchi_import(struct sm_instance *handle, struct vc_sm_import *msg, + struct vc_sm_import_result *result, u32 *cur_trans_id) +{ + return vc_sm_cma_vchi_send_msg(handle, VC_SM_MSG_TYPE_IMPORT, + msg, sizeof(*msg), result, sizeof(*result), + cur_trans_id, 1); +} + +int vc_sm_cma_vchi_client_version(struct sm_instance *handle, + struct vc_sm_version *msg, + struct vc_sm_result_t *result, + u32 *cur_trans_id) +{ + return vc_sm_cma_vchi_send_msg(handle, VC_SM_MSG_TYPE_CLIENT_VERSION, + //msg, sizeof(*msg), result, sizeof(*result), + //cur_trans_id, 1); + msg, sizeof(*msg), NULL, 0, + cur_trans_id, 0); +} + +int vc_sm_vchi_client_vc_mem_req_reply(struct sm_instance *handle, + struct vc_sm_vc_mem_request_result *msg, + uint32_t *cur_trans_id) +{ + return vc_sm_cma_vchi_send_msg(handle, + VC_SM_MSG_TYPE_VC_MEM_REQUEST_REPLY, + msg, sizeof(*msg), 0, 0, cur_trans_id, + 0); +} diff --git a/drivers/platform/raspberrypi/vc-sm-cma/vc_sm_cma_vchi.h b/drivers/platform/raspberrypi/vc-sm-cma/vc_sm_cma_vchi.h new file mode 100644 index 00000000000000..5dd23ad408fc1a --- /dev/null +++ b/drivers/platform/raspberrypi/vc-sm-cma/vc_sm_cma_vchi.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* + * VideoCore Shared Memory CMA allocator + * + * Copyright: 2018, Raspberry Pi (Trading) Ltd + * Copyright 2011-2012 Broadcom Corporation. All rights reserved. + * + * Based on vmcs_sm driver from Broadcom Corporation. + * + */ + +#ifndef __VC_SM_CMA_VCHI_H__INCLUDED__ +#define __VC_SM_CMA_VCHI_H__INCLUDED__ + +#include "../include/linux/raspberrypi/vchiq.h" + +#include "vc_sm_defs.h" + +/* + * Forward declare. + */ +struct sm_instance; + +typedef void (*vpu_event_cb)(struct sm_instance *instance, + struct vc_sm_result_t *reply, int reply_len); + +/* + * Initialize the shared memory service, opens up vchi connection to talk to it. + */ +struct sm_instance *vc_sm_cma_vchi_init(struct vchiq_instance *vchi_instance, + unsigned int num_connections, + vpu_event_cb vpu_event); + +/* + * Terminates the shared memory service. + */ +int vc_sm_cma_vchi_stop(struct vchiq_instance *vchi_instance, struct sm_instance **handle); + +/* + * Ask the shared memory service to free up some memory that was previously + * allocated by the vc_sm_cma_vchi_alloc function call. + */ +int vc_sm_cma_vchi_free(struct sm_instance *handle, struct vc_sm_free_t *msg, + u32 *cur_trans_id); + +/* + * Import a contiguous block of memory and wrap it in a GPU MEM_HANDLE_T. + */ +int vc_sm_cma_vchi_import(struct sm_instance *handle, struct vc_sm_import *msg, + struct vc_sm_import_result *result, + u32 *cur_trans_id); + +int vc_sm_cma_vchi_client_version(struct sm_instance *handle, + struct vc_sm_version *msg, + struct vc_sm_result_t *result, + u32 *cur_trans_id); + +int vc_sm_vchi_client_vc_mem_req_reply(struct sm_instance *handle, + struct vc_sm_vc_mem_request_result *msg, + uint32_t *cur_trans_id); + +#endif /* __VC_SM_CMA_VCHI_H__INCLUDED__ */ diff --git a/drivers/platform/raspberrypi/vc-sm-cma/vc_sm_defs.h b/drivers/platform/raspberrypi/vc-sm-cma/vc_sm_defs.h new file mode 100644 index 00000000000000..8b6a395c640dab --- /dev/null +++ b/drivers/platform/raspberrypi/vc-sm-cma/vc_sm_defs.h @@ -0,0 +1,296 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* + * VideoCore Shared Memory CMA allocator + * + * Copyright: 2018, Raspberry Pi (Trading) Ltd + * + * Based on vc_sm_defs.h from the vmcs_sm driver Copyright Broadcom Corporation. + * All IPC messages are copied across to this file, even if the vc-sm-cma + * driver is not currently using them. + * + **************************************************************************** + */ + +#ifndef __VC_SM_DEFS_H__INCLUDED__ +#define __VC_SM_DEFS_H__INCLUDED__ + +/* Maximum message length */ +#define VC_SM_MAX_MSG_LEN (sizeof(union vc_sm_msg_union_t) + \ + sizeof(struct vc_sm_msg_hdr_t)) +#define VC_SM_MAX_RSP_LEN (sizeof(union vc_sm_msg_union_t)) + +/* Resource name maximum size */ +#define VC_SM_RESOURCE_NAME 32 + +/* + * Version to be reported to the VPU + * VPU assumes 0 (aka 1) which does not require the released callback, nor + * expect the client to handle VC_MEM_REQUESTS. + * Version 2 requires the released callback, and must support VC_MEM_REQUESTS. + */ +#define VC_SM_PROTOCOL_VERSION 2 + +enum vc_sm_msg_type { + /* Message types supported for HOST->VC direction */ + + /* Allocate shared memory block */ + VC_SM_MSG_TYPE_ALLOC, + /* Lock allocated shared memory block */ + VC_SM_MSG_TYPE_LOCK, + /* Unlock allocated shared memory block */ + VC_SM_MSG_TYPE_UNLOCK, + /* Unlock allocated shared memory block, do not answer command */ + VC_SM_MSG_TYPE_UNLOCK_NOANS, + /* Free shared memory block */ + VC_SM_MSG_TYPE_FREE, + /* Resize a shared memory block */ + VC_SM_MSG_TYPE_RESIZE, + /* Walk the allocated shared memory block(s) */ + VC_SM_MSG_TYPE_WALK_ALLOC, + + /* A previously applied action will need to be reverted */ + VC_SM_MSG_TYPE_ACTION_CLEAN, + + /* + * Import a physical address and wrap into a MEM_HANDLE_T. + * Release with VC_SM_MSG_TYPE_FREE. + */ + VC_SM_MSG_TYPE_IMPORT, + /* + *Tells VC the protocol version supported by this client. + * 2 supports the async/cmd messages from the VPU for final release + * of memory, and for VC allocations. + */ + VC_SM_MSG_TYPE_CLIENT_VERSION, + /* Response to VC request for memory */ + VC_SM_MSG_TYPE_VC_MEM_REQUEST_REPLY, + + /* + * Asynchronous/cmd messages supported for VC->HOST direction. + * Signalled by setting the top bit in vc_sm_result_t trans_id. + */ + + /* + * VC has finished with an imported memory allocation. + * Release any Linux reference counts on the underlying block. + */ + VC_SM_MSG_TYPE_RELEASED, + /* VC request for memory */ + VC_SM_MSG_TYPE_VC_MEM_REQUEST, + + VC_SM_MSG_TYPE_MAX +}; + +/* Type of memory to be allocated */ +enum vc_sm_alloc_type_t { + VC_SM_ALLOC_CACHED, + VC_SM_ALLOC_NON_CACHED, +}; + +/* Message header for all messages in HOST->VC direction */ +struct vc_sm_msg_hdr_t { + u32 type; + u32 trans_id; + u8 body[]; +}; + +/* Request to allocate memory (HOST->VC) */ +struct vc_sm_alloc_t { + /* type of memory to allocate */ + enum vc_sm_alloc_type_t type; + /* byte amount of data to allocate per unit */ + u32 base_unit; + /* number of unit to allocate */ + u32 num_unit; + /* alignment to be applied on allocation */ + u32 alignment; + /* identity of who allocated this block */ + u32 allocator; + /* resource name (for easier tracking on vc side) */ + char name[VC_SM_RESOURCE_NAME]; + +}; + +/* Result of a requested memory allocation (VC->HOST) */ +struct vc_sm_alloc_result_t { + /* Transaction identifier */ + u32 trans_id; + + /* Resource handle */ + u32 res_handle; + /* Pointer to resource buffer */ + u32 res_mem; + /* Resource base size (bytes) */ + u32 res_base_size; + /* Resource number */ + u32 res_num; + +}; + +/* Request to free a previously allocated memory (HOST->VC) */ +struct vc_sm_free_t { + /* Resource handle (returned from alloc) */ + u32 res_handle; + /* Resource buffer (returned from alloc) */ + u32 res_mem; + +}; + +/* Request to lock a previously allocated memory (HOST->VC) */ +struct vc_sm_lock_unlock_t { + /* Resource handle (returned from alloc) */ + u32 res_handle; + /* Resource buffer (returned from alloc) */ + u32 res_mem; + +}; + +/* Request to resize a previously allocated memory (HOST->VC) */ +struct vc_sm_resize_t { + /* Resource handle (returned from alloc) */ + u32 res_handle; + /* Resource buffer (returned from alloc) */ + u32 res_mem; + /* Resource *new* size requested (bytes) */ + u32 res_new_size; + +}; + +/* Result of a requested memory lock (VC->HOST) */ +struct vc_sm_lock_result_t { + /* Transaction identifier */ + u32 trans_id; + + /* Resource handle */ + u32 res_handle; + /* Pointer to resource buffer */ + u32 res_mem; + /* + * Pointer to former resource buffer if the memory + * was reallocated + */ + u32 res_old_mem; + +}; + +/* Generic result for a request (VC->HOST) */ +struct vc_sm_result_t { + /* Transaction identifier */ + u32 trans_id; + + s32 success; + +}; + +/* Request to revert a previously applied action (HOST->VC) */ +struct vc_sm_action_clean_t { + /* Action of interest */ + enum vc_sm_msg_type res_action; + /* Transaction identifier for the action of interest */ + u32 action_trans_id; + +}; + +/* Request to remove all data associated with a given allocator (HOST->VC) */ +struct vc_sm_free_all_t { + /* Allocator identifier */ + u32 allocator; +}; + +/* Request to import memory (HOST->VC) */ +struct vc_sm_import { + /* type of memory to allocate */ + enum vc_sm_alloc_type_t type; + /* pointer to the VC (ie physical) address of the allocated memory */ + u32 addr; + /* size of buffer */ + u32 size; + /* opaque handle returned in RELEASED messages */ + u32 kernel_id; + /* Allocator identifier */ + u32 allocator; + /* resource name (for easier tracking on vc side) */ + char name[VC_SM_RESOURCE_NAME]; +}; + +/* Result of a requested memory import (VC->HOST) */ +struct vc_sm_import_result { + /* Transaction identifier */ + u32 trans_id; + + /* Resource handle */ + u32 res_handle; +}; + +/* Notification that VC has finished with an allocation (VC->HOST) */ +struct vc_sm_released { + /* cmd type / trans_id */ + u32 cmd; + + /* pointer to the VC (ie physical) address of the allocated memory */ + u32 addr; + /* size of buffer */ + u32 size; + /* opaque handle returned in RELEASED messages */ + u32 kernel_id; + u32 vc_handle; +}; + +/* + * Client informing VC as to the protocol version it supports. + * >=2 requires the released callback, and supports VC asking for memory. + * Failure means that the firmware doesn't support this call, and therefore the + * client should either fail, or NOT rely on getting the released callback. + */ +struct vc_sm_version { + u32 version; +}; + +/* Request FROM VideoCore for some memory */ +struct vc_sm_vc_mem_request { + /* cmd type */ + u32 cmd; + + /* trans_id (from VPU) */ + u32 trans_id; + /* size of buffer */ + u32 size; + /* alignment of buffer */ + u32 align; + /* resource name (for easier tracking) */ + char name[VC_SM_RESOURCE_NAME]; + /* VPU handle for the resource */ + u32 vc_handle; +}; + +/* Response from the kernel to provide the VPU with some memory */ +struct vc_sm_vc_mem_request_result { + /* Transaction identifier for the VPU */ + u32 trans_id; + /* pointer to the physical address of the allocated memory */ + u32 addr; + /* opaque handle returned in RELEASED messages */ + u32 kernel_id; +}; + +/* Union of ALL messages */ +union vc_sm_msg_union_t { + struct vc_sm_alloc_t alloc; + struct vc_sm_alloc_result_t alloc_result; + struct vc_sm_free_t free; + struct vc_sm_lock_unlock_t lock_unlock; + struct vc_sm_action_clean_t action_clean; + struct vc_sm_resize_t resize; + struct vc_sm_lock_result_t lock_result; + struct vc_sm_result_t result; + struct vc_sm_free_all_t free_all; + struct vc_sm_import import; + struct vc_sm_import_result import_result; + struct vc_sm_version version; + struct vc_sm_released released; + struct vc_sm_vc_mem_request vc_request; + struct vc_sm_vc_mem_request_result vc_request_result; +}; + +#endif /* __VC_SM_DEFS_H__INCLUDED__ */ diff --git a/drivers/platform/raspberrypi/vc-sm-cma/vc_sm_knl.h b/drivers/platform/raspberrypi/vc-sm-cma/vc_sm_knl.h new file mode 100644 index 00000000000000..988fdd967922b7 --- /dev/null +++ b/drivers/platform/raspberrypi/vc-sm-cma/vc_sm_knl.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* + * VideoCore Shared Memory CMA allocator + * + * Copyright: 2018, Raspberry Pi (Trading) Ltd + * + * Based on vc_sm_defs.h from the vmcs_sm driver Copyright Broadcom Corporation. + * + */ + +#ifndef __VC_SM_KNL_H__INCLUDED__ +#define __VC_SM_KNL_H__INCLUDED__ + +#if !defined(__KERNEL__) +#error "This interface is for kernel use only..." +#endif + +/* Free a previously allocated or imported shared memory handle and block. */ +int vc_sm_cma_free(void *handle); + +/* Get an internal resource handle mapped from the external one. */ +int vc_sm_cma_int_handle(void *handle); + +/* Import a block of memory into the GPU space. */ +int vc_sm_cma_import_dmabuf(struct dma_buf *dmabuf, void **handle); + +#endif /* __VC_SM_KNL_H__INCLUDED__ */ diff --git a/include/linux/raspberrypi/vc_sm_cma_ioctl.h b/include/linux/raspberrypi/vc_sm_cma_ioctl.h new file mode 100644 index 00000000000000..e43bb2e76dfffb --- /dev/null +++ b/include/linux/raspberrypi/vc_sm_cma_ioctl.h @@ -0,0 +1,114 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* + * Copyright 2019 Raspberry Pi (Trading) Ltd. All rights reserved. + * + * Based on vmcs_sm_ioctl.h Copyright Broadcom Corporation. + */ + +#ifndef __VC_SM_CMA_IOCTL_H +#define __VC_SM_CMA_IOCTL_H + +/* ---- Include Files ---------------------------------------------------- */ + +#if defined(__KERNEL__) +#include /* Needed for standard types */ +#else +#include +#endif + +#include + +/* ---- Constants and Types ---------------------------------------------- */ + +#define VC_SM_CMA_RESOURCE_NAME 32 +#define VC_SM_CMA_RESOURCE_NAME_DEFAULT "sm-host-resource" + +/* Type define used to create unique IOCTL number */ +#define VC_SM_CMA_MAGIC_TYPE 'J' + +/* IOCTL commands on /dev/vc-sm-cma */ +enum vc_sm_cma_cmd_e { + VC_SM_CMA_CMD_ALLOC = 0x5A, /* Start at 0x5A arbitrarily */ + + VC_SM_CMA_CMD_IMPORT_DMABUF, + + VC_SM_CMA_CMD_CLEAN_INVALID2, + + VC_SM_CMA_CMD_LAST /* Do not delete */ +}; + +/* Cache type supported, conveniently matches the user space definition in + * user-vcsm.h. + */ +enum vc_sm_cma_cache_e { + VC_SM_CMA_CACHE_NONE, + VC_SM_CMA_CACHE_HOST, + VC_SM_CMA_CACHE_VC, + VC_SM_CMA_CACHE_BOTH, +}; + +/* IOCTL Data structures */ +struct vc_sm_cma_ioctl_alloc { + /* user -> kernel */ + __u32 size; + __u32 num; + __u32 cached; /* enum vc_sm_cma_cache_e */ + __u32 pad; + __u8 name[VC_SM_CMA_RESOURCE_NAME]; + + /* kernel -> user */ + __s32 handle; + __u32 vc_handle; + __u64 dma_addr; +}; + +struct vc_sm_cma_ioctl_import_dmabuf { + /* user -> kernel */ + __s32 dmabuf_fd; + __u32 cached; /* enum vc_sm_cma_cache_e */ + __u8 name[VC_SM_CMA_RESOURCE_NAME]; + + /* kernel -> user */ + __s32 handle; + __u32 vc_handle; + __u32 size; + __u32 pad; + __u64 dma_addr; +}; + +/* + * Cache functions to be set to struct vc_sm_cma_ioctl_clean_invalid2 + * invalidate_mode. + */ +#define VC_SM_CACHE_OP_NOP 0x00 +#define VC_SM_CACHE_OP_INV 0x01 +#define VC_SM_CACHE_OP_CLEAN 0x02 +#define VC_SM_CACHE_OP_FLUSH 0x03 + +struct vc_sm_cma_ioctl_clean_invalid2 { + __u32 op_count; + __u32 pad; + struct vc_sm_cma_ioctl_clean_invalid_block { + __u32 invalidate_mode; + __u32 block_count; + void * __user start_address; + __u32 block_size; + __u32 inter_block_stride; + } s[]; +}; + +/* IOCTL numbers */ +#define VC_SM_CMA_IOCTL_MEM_ALLOC\ + _IOR(VC_SM_CMA_MAGIC_TYPE, VC_SM_CMA_CMD_ALLOC,\ + struct vc_sm_cma_ioctl_alloc) + +#define VC_SM_CMA_IOCTL_MEM_IMPORT_DMABUF\ + _IOR(VC_SM_CMA_MAGIC_TYPE, VC_SM_CMA_CMD_IMPORT_DMABUF,\ + struct vc_sm_cma_ioctl_import_dmabuf) + +#define VC_SM_CMA_IOCTL_MEM_CLEAN_INVALID2\ + _IOR(VC_SM_CMA_MAGIC_TYPE, VC_SM_CMA_CMD_CLEAN_INVALID2,\ + struct vc_sm_cma_ioctl_clean_invalid2) + +#endif /* __VC_SM_CMA_IOCTL_H */ From 97ee5b7b11c4c02daddca030d67981aba0a94cbd Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 25 Sep 2018 16:07:55 +0100 Subject: [PATCH 021/625] platform/raspberrypi: vchiq-mmal: Use vc-sm-cma to support zero copy With the vc-sm-cma driver we can support zero copy of buffers between the kernel and VPU. Add this support to mmal-vchiq. Signed-off-by: Dave Stevenson Signed-off-by: Jai Luthra --- .../platform/raspberrypi/vchiq-mmal/Kconfig | 3 +- .../raspberrypi/vchiq-mmal/mmal-common.h | 4 ++ .../raspberrypi/vchiq-mmal/mmal-vchiq.c | 66 ++++++++++++++++++- .../raspberrypi/vchiq-mmal/mmal-vchiq.h | 1 + 4 files changed, 71 insertions(+), 3 deletions(-) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/Kconfig b/drivers/platform/raspberrypi/vchiq-mmal/Kconfig index c99525a0bb4525..5df9198cdab178 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/Kconfig +++ b/drivers/platform/raspberrypi/vchiq-mmal/Kconfig @@ -1,6 +1,7 @@ config BCM2835_VCHIQ_MMAL tristate "BCM2835 MMAL VCHIQ service" - depends on BCM2835_VCHIQ + select BCM2835_VCHIQ + select BCM_VC_SM_CMA help Enables the MMAL API over VCHIQ interface as used for the majority of the multimedia services on VideoCore. diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-common.h b/drivers/platform/raspberrypi/vchiq-mmal/mmal-common.h index 0443be8198ea57..a643cad54b1200 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-common.h +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-common.h @@ -50,6 +50,10 @@ struct mmal_buffer { struct mmal_msg_context *msg_context; + struct dma_buf *dma_buf;/* Exported dmabuf fd from videobuf2 */ + void *vcsm_handle; /* VCSM handle having imported the dmabuf */ + u32 vc_handle; /* VC handle to that dmabuf */ + u32 cmd; /* MMAL command. 0=data. */ unsigned long length; u32 mmal_flags; diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c index 5cacc9eb4aca7d..37e494bf6cf118 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c @@ -29,9 +29,12 @@ #include #include "mmal-common.h" +#include "mmal-parameters.h" #include "mmal-vchiq.h" #include "mmal-msg.h" +#include "../vc-sm-cma/vc_sm_knl.h" + /* * maximum number of components supported. * This matches the maximum permitted by default on the VPU @@ -418,8 +421,13 @@ buffer_from_host(struct vchiq_mmal_instance *instance, /* buffer header */ m.u.buffer_from_host.buffer_header.cmd = 0; - m.u.buffer_from_host.buffer_header.data = - (u32)(unsigned long)buf->buffer; + if (port->zero_copy) { + m.u.buffer_from_host.buffer_header.data = buf->vc_handle; + } else { + m.u.buffer_from_host.buffer_header.data = + (u32)(unsigned long)buf->buffer; + } + m.u.buffer_from_host.buffer_header.alloc_size = buf->buffer_size; if (port->type == MMAL_PORT_TYPE_OUTPUT) { m.u.buffer_from_host.buffer_header.length = 0; @@ -585,6 +593,22 @@ static void buffer_to_host_cb(struct vchiq_mmal_instance *instance, msg_context->u.bulk.status = msg->h.status; + } else if (msg->u.buffer_from_host.is_zero_copy) { + /* + * Zero copy buffer, so nothing to do. + * Copy buffer info and make callback. + */ + msg_context->u.bulk.buffer_used = + msg->u.buffer_from_host.buffer_header.length; + msg_context->u.bulk.mmal_flags = + msg->u.buffer_from_host.buffer_header.flags; + msg_context->u.bulk.dts = + msg->u.buffer_from_host.buffer_header.dts; + msg_context->u.bulk.pts = + msg->u.buffer_from_host.buffer_header.pts; + msg_context->u.bulk.cmd = + msg->u.buffer_from_host.buffer_header.cmd; + } else if (msg->u.buffer_from_host.buffer_header.length == 0) { /* empty buffer */ if (msg->u.buffer_from_host.buffer_header.flags & @@ -1531,6 +1555,9 @@ int vchiq_mmal_port_parameter_set(struct vchiq_mmal_instance *instance, mutex_unlock(&instance->vchiq_mutex); + if (parameter == MMAL_PARAMETER_ZERO_COPY && !ret) + port->zero_copy = !!(*(bool *)value); + return ret; } EXPORT_SYMBOL_GPL(vchiq_mmal_port_parameter_set); @@ -1699,6 +1726,31 @@ int vchiq_mmal_submit_buffer(struct vchiq_mmal_instance *instance, unsigned long flags = 0; int ret; + /* + * We really want to do this in mmal_vchi_buffer_init but can't as + * videobuf2 won't let us have the dmabuf there. + */ + if (port->zero_copy && buffer->dma_buf && !buffer->vcsm_handle) { + pr_debug("%s: import dmabuf %p\n", __func__, buffer->dma_buf); + ret = vc_sm_cma_import_dmabuf(buffer->dma_buf, + &buffer->vcsm_handle); + if (ret) { + pr_err("%s: vc_sm_import_dmabuf_fd failed, ret %d\n", + __func__, ret); + return ret; + } + + buffer->vc_handle = vc_sm_cma_int_handle(buffer->vcsm_handle); + if (!buffer->vc_handle) { + pr_err("%s: vc_sm_int_handle failed %d\n", + __func__, ret); + vc_sm_cma_free(buffer->vcsm_handle); + return ret; + } + pr_debug("%s: import dmabuf %p - got vc handle %08X\n", + __func__, buffer->dma_buf, buffer->vc_handle); + } + ret = buffer_from_host(instance, port, buffer); if (ret == -EINVAL) { /* Port is disabled. Queue for when it is enabled. */ @@ -1732,6 +1784,16 @@ int mmal_vchi_buffer_cleanup(struct mmal_buffer *buf) release_msg_context(msg_context); buf->msg_context = NULL; + if (buf->vcsm_handle) { + int ret; + + pr_debug("%s: vc_sm_cma_free on handle %p\n", __func__, + buf->vcsm_handle); + ret = vc_sm_cma_free(buf->vcsm_handle); + if (ret) + pr_err("%s: vcsm_free failed, ret %d\n", __func__, ret); + buf->vcsm_handle = 0; + } return 0; } EXPORT_SYMBOL_GPL(mmal_vchi_buffer_cleanup); diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.h b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.h index 190a0f42bd6b22..ae9e26a3b05b9b 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.h +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.h @@ -49,6 +49,7 @@ typedef void (*vchiq_mmal_buffer_cb)(struct vchiq_mmal_instance *instance, struct vchiq_mmal_port { bool enabled; + u32 zero_copy:1; u32 handle; u32 type; /* port type, cached to use on port info set */ u32 index; /* port index, cached to use on port info set */ From 442b812767b904674fc26b1aa8a79b2df42358c1 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 21 Sep 2021 17:17:57 +0100 Subject: [PATCH 022/625] platform/raspberrypi: vchiq-mmal: Reset buffers_with_vpu on port_enable Should we go through the timeout failure case with port_disable not returning all buffers for whatever reason, the buffers_with_vpu counter gets left at a non-zero value, which will cause reference counting issues should the instance be reused. Reset the count when the port is enabled again, but before any buffers have been sent to the VPU. Signed-off-by: Dave Stevenson Signed-off-by: Jai Luthra --- drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c index 37e494bf6cf118..c294392af7a84a 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c @@ -1490,6 +1490,8 @@ static int port_enable(struct vchiq_mmal_instance *instance, port->enabled = true; + atomic_set(&port->buffers_with_vpu, 0); + if (port->buffer_cb) { /* send buffer headers to videocore */ hdr_count = 1; From 7be911239ed9672c71cd5aa880fd3962ec061917 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 16 May 2022 17:33:48 +0100 Subject: [PATCH 023/625] platform/raspberrypi: vchiq-mmal: Add defines for mmal_es_format flags There is a flags field in struct mmal_es_format, but the defines for what the bits meant weren't included in the headers. For V4L2_PIX_FMT_NV12_COL128 support we need them, so add them in. Signed-off-by: Dave Stevenson Signed-off-by: Jai Luthra --- .../platform/raspberrypi/vchiq-mmal/mmal-msg-format.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-msg-format.h b/drivers/platform/raspberrypi/vchiq-mmal/mmal-msg-format.h index 5569876d8c7d60..e8f5ca85a7c418 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-msg-format.h +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-msg-format.h @@ -53,6 +53,16 @@ union mmal_es_specific_format { struct mmal_subpicture_format subpicture; }; +/* The elementary stream will already be framed */ +#define MMAL_ES_FORMAT_FLAG_FRAMED BIT(0) +/* + * For column formats we ideally want to pass in the column stride. This hasn't + * been the past behaviour, so require a new flag to be set should + * es->video.width be the column stride (in lines) instead of an ignored width + * value. + */ +#define MMAL_ES_FORMAT_FLAG_COL_FMTS_WIDTH_IS_COL_STRIDE BIT(1) + /* Definition of an elementary stream format (MMAL_ES_FORMAT_T) */ struct mmal_es_format_local { u32 type; /* enum mmal_es_type */ From 063b7b2e015f892cf42e599df71eb4bea6af6794 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 6 Nov 2019 13:57:48 +0000 Subject: [PATCH 024/625] platform/raspberrypi: vchiq: Register vc-sm-cma as a platform driver Register the vc-sm-cma driver as a platform driver under vchiq. Signed-off-by: Dave Stevenson Signed-off-by: Jai Luthra --- drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c b/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c index e7864170325222..6affe6d37ace14 100644 --- a/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c +++ b/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c @@ -63,6 +63,7 @@ * the interface. */ static struct vchiq_device *bcm2835_audio; +static struct vchiq_device *vcsm_cma; static const struct vchiq_platform_info bcm2835_info = { .cache_line_size = 32, @@ -1420,6 +1421,7 @@ static int vchiq_probe(struct platform_device *pdev) vchiq_debugfs_init(&mgmt->state); + vcsm_cma = vchiq_device_register(&pdev->dev, "vcsm-cma"); bcm2835_audio = vchiq_device_register(&pdev->dev, "bcm2835-audio"); return 0; @@ -1430,6 +1432,7 @@ static void vchiq_remove(struct platform_device *pdev) struct vchiq_drv_mgmt *mgmt = dev_get_drvdata(&pdev->dev); vchiq_device_unregister(bcm2835_audio); + vchiq_device_unregister(vcsm_cma); vchiq_debugfs_deinit(); vchiq_deregister_chrdev(); vchiq_platform_uninit(mgmt); From 0c81f9653092205609e62ed513cff92f2e8dc45a Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 7 Oct 2025 12:20:50 +0530 Subject: [PATCH 025/625] ======== BCM2835 ISP ======== Signed-off-by: Jai Luthra From 6e9939a4023d66a2709d3dda9ec59bd25ad77666 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 23 Sep 2025 11:48:46 +0530 Subject: [PATCH 026/625] media: Raspberry Pi 4 ISP support # Describe the purpose of this series. The information you put here # will be used by the project maintainer to make a decision whether # your patches should be reviewed, and in what priority order. Please be # very detailed and link to any relevant discussions or sites that the # maintainer can review to better understand your proposed changes. If you # only have a single patch in your series, the contents of the cover # letter will be appended to the "under-the-cut" portion of the patch. # Lines starting with # will be removed from the cover letter. You can # use them to add notes or reminders to yourself. If you want to use # markdown headers in your cover letter, start the line with ">#". # You can add trailers to the cover letter. Any email addresses found in # these trailers will be added to the addresses specified/generated # during the b4 send stage. You can also run "b4 prep --auto-to-cc" to # auto-populate the To: and Cc: trailers based on the code being # modified. Signed-off-by: Jai Luthra --- b4-submit-tracking --- # This section is used internally by b4 prep for tracking purposes. { "series": { "revision": 1, "change-id": "20250923-b4-vchiq-isp-7e8c22c2860c", "prefixes": [] } } From 94cd646724ad41ce396cf78990f6396f7d29f159 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 7 Oct 2025 11:22:56 +0530 Subject: [PATCH 027/625] platform/raspberrypi: vchiq-mmal: Support ISP parameters and stats Signed-off-by: Jai Luthra --- .../raspberrypi/vchiq-mmal/mmal-encodings.h | 4 + .../raspberrypi/vchiq-mmal/mmal-parameters.h | 164 ++++++++++++++++++ 2 files changed, 168 insertions(+) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-encodings.h b/drivers/platform/raspberrypi/vchiq-mmal/mmal-encodings.h index 826ed66deafd08..059ea9298c8ba3 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-encodings.h +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-encodings.h @@ -114,6 +114,10 @@ */ #define MMAL_ENCODING_EGL_IMAGE MMAL_FOURCC('E', 'G', 'L', 'I') +/** ISP image statistics format + */ +#define MMAL_ENCODING_BRCM_STATS MMAL_FOURCC('S', 'T', 'A', 'T') + /* }@ */ /** \name Pre-defined audio encodings */ diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-parameters.h b/drivers/platform/raspberrypi/vchiq-mmal/mmal-parameters.h index 0a4fc9252b1798..0a38dcc7fd6741 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-parameters.h +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-parameters.h @@ -223,6 +223,64 @@ enum mmal_parameter_camera_type { MMAL_PARAMETER_SHUTTER_SPEED, /**< Takes a @ref MMAL_PARAMETER_AWB_GAINS_T */ MMAL_PARAMETER_CUSTOM_AWB_GAINS, + /**< Takes a @ref MMAL_PARAMETER_CAMERA_SETTINGS_T */ + MMAL_PARAMETER_CAMERA_SETTINGS, + /**< Takes a @ref MMAL_PARAMETER_PRIVACY_INDICATOR_T */ + MMAL_PARAMETER_PRIVACY_INDICATOR, + /**< Takes a @ref MMAL_PARAMETER_BOOLEAN_T */ + MMAL_PARAMETER_VIDEO_DENOISE, + /**< Takes a @ref MMAL_PARAMETER_BOOLEAN_T */ + MMAL_PARAMETER_STILLS_DENOISE, + /**< Takes a @ref MMAL_PARAMETER_CAMERA_ANNOTATE_T */ + MMAL_PARAMETER_ANNOTATE, + /**< Takes a @ref MMAL_PARAMETER_STEREOSCOPIC_MODE_T */ + MMAL_PARAMETER_STEREOSCOPIC_MODE, + /**< Takes a @ref MMAL_PARAMETER_CAMERA_INTERFACE_T */ + MMAL_PARAMETER_CAMERA_INTERFACE, + /**< Takes a @ref MMAL_PARAMETER_CAMERA_CLOCKING_MODE_T */ + MMAL_PARAMETER_CAMERA_CLOCKING_MODE, + /**< Takes a @ref MMAL_PARAMETER_CAMERA_RX_CONFIG_T */ + MMAL_PARAMETER_CAMERA_RX_CONFIG, + /**< Takes a @ref MMAL_PARAMETER_CAMERA_RX_TIMING_T */ + MMAL_PARAMETER_CAMERA_RX_TIMING, + /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ + MMAL_PARAMETER_DPF_CONFIG, + + /* 0x50 */ + /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ + MMAL_PARAMETER_JPEG_RESTART_INTERVAL, + /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ + MMAL_PARAMETER_CAMERA_ISP_BLOCK_OVERRIDE, + /**< Takes a @ref MMAL_PARAMETER_LENS_SHADING_T */ + MMAL_PARAMETER_LENS_SHADING_OVERRIDE, + /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ + MMAL_PARAMETER_BLACK_LEVEL, + /**< Takes a @ref MMAL_PARAMETER_RESIZE_T */ + MMAL_PARAMETER_RESIZE_PARAMS, + /**< Takes a @ref MMAL_PARAMETER_CROP_T */ + MMAL_PARAMETER_CROP, + /**< Takes a @ref MMAL_PARAMETER_INT32_T */ + MMAL_PARAMETER_OUTPUT_SHIFT, + /**< Takes a @ref MMAL_PARAMETER_INT32_T */ + MMAL_PARAMETER_CCM_SHIFT, + /**< Takes a @ref MMAL_PARAMETER_CUSTOM_CCM_T */ + MMAL_PARAMETER_CUSTOM_CCM, + /**< Takes a @ref MMAL_PARAMETER_RATIONAL_T */ + MMAL_PARAMETER_ANALOG_GAIN, + /**< Takes a @ref MMAL_PARAMETER_RATIONAL_T */ + MMAL_PARAMETER_DIGITAL_GAIN, + /**< Takes a @ref MMAL_PARAMETER_DENOISE_T */ + MMAL_PARAMETER_DENOISE, + /**< Takes a @ref MMAL_PARAMETER_SHARPEN_T */ + MMAL_PARAMETER_SHARPEN, + /**< Takes a @ref MMAL_PARAMETER_GEQ_T */ + MMAL_PARAMETER_GEQ, + /**< Tales a @ref MMAP_PARAMETER_DPC_T */ + MMAL_PARAMETER_DPC, + /**< Tales a @ref MMAP_PARAMETER_GAMMA_T */ + MMAL_PARAMETER_GAMMA, + /**< Takes a @ref MMAL_PARAMETER_CDN_T */ + MMAL_PARAMETER_CDN, }; enum mmal_parameter_camera_config_timestamp_mode { @@ -785,4 +843,110 @@ struct mmal_parameter_camera_info { flashes[MMAL_PARAMETER_CAMERA_INFO_MAX_FLASHES]; }; +struct mmal_parameter_ccm { + struct s32_fract ccm[3][3]; + s32 offsets[3]; +}; + +struct mmal_parameter_custom_ccm { + u32 enabled; /**< Enable the custom CCM. */ + struct mmal_parameter_ccm ccm; /**< CCM to be used. */ +}; + +struct mmal_parameter_lens_shading { + u32 enabled; + u32 grid_cell_size; + u32 grid_width; + u32 grid_stride; + u32 grid_height; + u32 mem_handle_table; + u32 ref_transform; +}; + +enum mmal_parameter_ls_gain_format_type { + MMAL_PARAMETER_LS_GAIN_FORMAT_TYPE_U0P8_1 = 0, + MMAL_PARAMETER_LS_GAIN_FORMAT_TYPE_U1P7_0 = 1, + MMAL_PARAMETER_LS_GAIN_FORMAT_TYPE_U1P7_1 = 2, + MMAL_PARAMETER_LS_GAIN_FORMAT_TYPE_U2P6_0 = 3, + MMAL_PARAMETER_LS_GAIN_FORMAT_TYPE_U2P6_1 = 4, + MMAL_PARAMETER_LS_GAIN_FORMAT_TYPE_U3P5_0 = 5, + MMAL_PARAMETER_LS_GAIN_FORMAT_TYPE_U3P5_1 = 6, + MMAL_PARAMETER_LS_GAIN_FORMAT_TYPE_U4P10 = 7, + MMAL_PARAMETER_LS_GAIN_FORMAT_TYPE_DUMMY = 0x7FFFFFFF +}; + +struct mmal_parameter_lens_shading_v2 { + u32 enabled; + u32 grid_cell_size; + u32 grid_width; + u32 grid_stride; + u32 grid_height; + u32 mem_handle_table; + u32 ref_transform; + u32 corner_sampled; + enum mmal_parameter_ls_gain_format_type gain_format; +}; + +struct mmal_parameter_black_level { + u32 enabled; + u16 black_level_r; + u16 black_level_g; + u16 black_level_b; + u8 pad_[2]; /* Unused */ +}; + +struct mmal_parameter_geq { + u32 enabled; + u32 offset; + struct s32_fract slope; +}; + +#define MMAL_NUM_GAMMA_PTS 33 +struct mmal_parameter_gamma { + u32 enabled; + u16 x[MMAL_NUM_GAMMA_PTS]; + u16 y[MMAL_NUM_GAMMA_PTS]; +}; + +enum mmal_parameter_cdn_mode { + MMAL_PARAM_CDN_FAST = 0, + MMAL_PARAM_CDN_HIGH_QUALITY = 1, + MMAL_PARAM_CDN_DUMMY = 0x7FFFFFFF +}; + +struct mmal_parameter_colour_denoise { + u32 enabled; + enum mmal_parameter_cdn_mode mode; +}; + +struct mmal_parameter_denoise { + u32 enabled; + u32 constant; + struct s32_fract slope; + struct s32_fract strength; +}; + +struct mmal_parameter_sharpen { + u32 enabled; + struct s32_fract threshold; + struct s32_fract strength; + struct s32_fract limit; +}; + +enum mmal_dpc_mode { + MMAL_DPC_MODE_OFF = 0, + MMAL_DPC_MODE_NORMAL = 1, + MMAL_DPC_MODE_STRONG = 2, + MMAL_DPC_MODE_MAX = 0x7FFFFFFF, +}; + +struct mmal_parameter_dpc { + u32 enabled; + u32 strength; +}; + +struct mmal_parameter_crop { + struct vchiq_mmal_rect rect; +}; + #endif From 43e1153d9ca60f901b90d006a4ad0ec860b2fffe Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 7 Oct 2025 11:24:14 +0530 Subject: [PATCH 028/625] platform/raspberrypi: vchiq-mmal: Support unpacked formats Signed-off-by: Jai Luthra --- .../raspberrypi/vchiq-mmal/mmal-encodings.h | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/platform/raspberrypi/vchiq-mmal/mmal-encodings.h b/drivers/platform/raspberrypi/vchiq-mmal/mmal-encodings.h index 059ea9298c8ba3..1e13ebbaebf607 100644 --- a/drivers/platform/raspberrypi/vchiq-mmal/mmal-encodings.h +++ b/drivers/platform/raspberrypi/vchiq-mmal/mmal-encodings.h @@ -103,6 +103,24 @@ #define MMAL_ENCODING_BAYER_SGRBG16 MMAL_FOURCC('G', 'R', '1', '6') #define MMAL_ENCODING_BAYER_SRGGB16 MMAL_FOURCC('R', 'G', '1', '6') +/* 10 bit per pixel unpacked (16bit) Bayer formats. */ +#define MMAL_ENCODING_BAYER_SBGGR10 MMAL_FOURCC('B', 'G', '1', '0') +#define MMAL_ENCODING_BAYER_SGRBG10 MMAL_FOURCC('B', 'A', '1', '0') +#define MMAL_ENCODING_BAYER_SGBRG10 MMAL_FOURCC('G', 'B', '1', '0') +#define MMAL_ENCODING_BAYER_SRGGB10 MMAL_FOURCC('R', 'G', '1', '0') + +/* 12 bit per pixel unpacked (16bit) Bayer formats */ +#define MMAL_ENCODING_BAYER_SBGGR12 MMAL_FOURCC('B', 'G', '1', '2') +#define MMAL_ENCODING_BAYER_SGRBG12 MMAL_FOURCC('B', 'A', '1', '2') +#define MMAL_ENCODING_BAYER_SGBRG12 MMAL_FOURCC('G', 'B', '1', '2') +#define MMAL_ENCODING_BAYER_SRGGB12 MMAL_FOURCC('R', 'G', '1', '2') + +/* 14 bit per pixel unpacked (16bit) Bayer formats */ +#define MMAL_ENCODING_BAYER_SBGGR14 MMAL_FOURCC('B', 'G', '1', '4') +#define MMAL_ENCODING_BAYER_SGBRG14 MMAL_FOURCC('G', 'B', '1', '4') +#define MMAL_ENCODING_BAYER_SGRBG14 MMAL_FOURCC('G', 'R', '1', '4') +#define MMAL_ENCODING_BAYER_SRGGB14 MMAL_FOURCC('R', 'G', '1', '4') + /* MIPI packed monochrome images */ #define MMAL_ENCODING_GREY MMAL_FOURCC('G', 'R', 'E', 'Y') #define MMAL_ENCODING_Y10P MMAL_FOURCC('Y', '1', '0', 'P') @@ -110,6 +128,11 @@ #define MMAL_ENCODING_Y14P MMAL_FOURCC('Y', '1', '4', 'P') #define MMAL_ENCODING_Y16 MMAL_FOURCC('Y', '1', '6', ' ') +/* Unpacked monochrome formats (16bit per sample, but only N LSBs used) */ +#define MMAL_ENCODING_Y10 MMAL_FOURCC('Y', '1', '0', ' ') +#define MMAL_ENCODING_Y12 MMAL_FOURCC('Y', '1', '2', ' ') +#define MMAL_ENCODING_Y14 MMAL_FOURCC('Y', '1', '4', ' ') + /** An EGL image handle */ #define MMAL_ENCODING_EGL_IMAGE MMAL_FOURCC('E', 'G', 'L', 'I') From b9ffce88eb34f459243c8ebc6962acc7894f6d91 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Mon, 6 Oct 2025 17:08:55 +0530 Subject: [PATCH 029/625] media: platform: broadcom: Move unicam driver to subdir The BCM283x/BCM2711x SoCs capture camera frames using CSI-2, and optionally processes the raw frames using a VC4 firmware based ISP block. As the driver for the ISP will be added subsequently, to ease distinction between the two drivers' files, move the files related to the unicam driver to a separate subdirectory. Signed-off-by: Jai Luthra --- MAINTAINERS | 2 +- drivers/media/platform/broadcom/Kconfig | 22 ++---------------- drivers/media/platform/broadcom/Makefile | 2 +- .../platform/broadcom/bcm2835-unicam/Kconfig | 23 +++++++++++++++++++ .../platform/broadcom/bcm2835-unicam/Makefile | 3 +++ .../bcm2835-unicam-regs.h | 0 .../{ => bcm2835-unicam}/bcm2835-unicam.c | 0 7 files changed, 30 insertions(+), 22 deletions(-) create mode 100644 drivers/media/platform/broadcom/bcm2835-unicam/Kconfig create mode 100644 drivers/media/platform/broadcom/bcm2835-unicam/Makefile rename drivers/media/platform/broadcom/{ => bcm2835-unicam}/bcm2835-unicam-regs.h (100%) rename drivers/media/platform/broadcom/{ => bcm2835-unicam}/bcm2835-unicam.c (100%) diff --git a/MAINTAINERS b/MAINTAINERS index bfb30c0684438a..4856a91251a888 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5047,7 +5047,7 @@ M: Raspberry Pi Kernel Maintenance L: linux-media@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/media/brcm,bcm2835-unicam.yaml -F: drivers/media/platform/broadcom/bcm2835-unicam* +F: drivers/media/platform/broadcom/bcm2835-unicam/* BROADCOM BCM47XX MIPS ARCHITECTURE M: Hauke Mehrtens diff --git a/drivers/media/platform/broadcom/Kconfig b/drivers/media/platform/broadcom/Kconfig index 32b76ebfcd9a19..cab44885182ce6 100644 --- a/drivers/media/platform/broadcom/Kconfig +++ b/drivers/media/platform/broadcom/Kconfig @@ -1,23 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 -config VIDEO_BCM2835_UNICAM - tristate "Broadcom BCM283x/BCM271x Unicam video capture driver" - depends on ARCH_BCM2835 || COMPILE_TEST - depends on COMMON_CLK && PM - depends on VIDEO_DEV - select MEDIA_CONTROLLER - select V4L2_FWNODE - select VIDEO_V4L2_SUBDEV_API - select VIDEOBUF2_DMA_CONTIG - help - Say Y here to enable support for the BCM283x/BCM271x CSI-2 receiver. - This is a V4L2 driver that controls the CSI-2 receiver directly, - independently from the VC4 firmware. +comment "Broadcom BCM283x/BCM271x media platform drivers" - This driver is mutually exclusive with the use of bcm2835-camera. The - firmware will disable all access to the peripheral from within the - firmware if it finds a DT node using it, and bcm2835-camera will - therefore fail to probe. - - To compile this driver as a module, choose M here. The module will be - called bcm2835-unicam. +source "drivers/media/platform/broadcom/bcm2835-unicam/Kconfig" diff --git a/drivers/media/platform/broadcom/Makefile b/drivers/media/platform/broadcom/Makefile index 03d2045aba2e4d..33a89bdb0029bc 100644 --- a/drivers/media/platform/broadcom/Makefile +++ b/drivers/media/platform/broadcom/Makefile @@ -1,3 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_VIDEO_BCM2835_UNICAM) += bcm2835-unicam.o +obj-y += bcm2835-unicam/ diff --git a/drivers/media/platform/broadcom/bcm2835-unicam/Kconfig b/drivers/media/platform/broadcom/bcm2835-unicam/Kconfig new file mode 100644 index 00000000000000..32b76ebfcd9a19 --- /dev/null +++ b/drivers/media/platform/broadcom/bcm2835-unicam/Kconfig @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: GPL-2.0 + +config VIDEO_BCM2835_UNICAM + tristate "Broadcom BCM283x/BCM271x Unicam video capture driver" + depends on ARCH_BCM2835 || COMPILE_TEST + depends on COMMON_CLK && PM + depends on VIDEO_DEV + select MEDIA_CONTROLLER + select V4L2_FWNODE + select VIDEO_V4L2_SUBDEV_API + select VIDEOBUF2_DMA_CONTIG + help + Say Y here to enable support for the BCM283x/BCM271x CSI-2 receiver. + This is a V4L2 driver that controls the CSI-2 receiver directly, + independently from the VC4 firmware. + + This driver is mutually exclusive with the use of bcm2835-camera. The + firmware will disable all access to the peripheral from within the + firmware if it finds a DT node using it, and bcm2835-camera will + therefore fail to probe. + + To compile this driver as a module, choose M here. The module will be + called bcm2835-unicam. diff --git a/drivers/media/platform/broadcom/bcm2835-unicam/Makefile b/drivers/media/platform/broadcom/bcm2835-unicam/Makefile new file mode 100644 index 00000000000000..03d2045aba2e4d --- /dev/null +++ b/drivers/media/platform/broadcom/bcm2835-unicam/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-$(CONFIG_VIDEO_BCM2835_UNICAM) += bcm2835-unicam.o diff --git a/drivers/media/platform/broadcom/bcm2835-unicam-regs.h b/drivers/media/platform/broadcom/bcm2835-unicam/bcm2835-unicam-regs.h similarity index 100% rename from drivers/media/platform/broadcom/bcm2835-unicam-regs.h rename to drivers/media/platform/broadcom/bcm2835-unicam/bcm2835-unicam-regs.h diff --git a/drivers/media/platform/broadcom/bcm2835-unicam.c b/drivers/media/platform/broadcom/bcm2835-unicam/bcm2835-unicam.c similarity index 100% rename from drivers/media/platform/broadcom/bcm2835-unicam.c rename to drivers/media/platform/broadcom/bcm2835-unicam/bcm2835-unicam.c From be29acb9c48cfb51631d4c68fc42492be58a4be3 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 7 Oct 2025 11:25:08 +0530 Subject: [PATCH 030/625] media: platform: broadcom: Add bcm2835-isp driver Signed-off-by: Jai Luthra --- drivers/media/platform/broadcom/Kconfig | 1 + drivers/media/platform/broadcom/Makefile | 1 + .../platform/broadcom/bcm2835-isp/Kconfig | 14 + .../platform/broadcom/bcm2835-isp/Makefile | 7 + .../broadcom/bcm2835-isp/bcm2835-isp-ctrls.h | 72 + .../broadcom/bcm2835-isp/bcm2835-isp-fmts.h | 558 +++++ .../broadcom/bcm2835-isp/bcm2835-v4l2-isp.c | 1838 +++++++++++++++++ include/uapi/linux/bcm2835-isp.h | 347 ++++ 8 files changed, 2838 insertions(+) create mode 100644 drivers/media/platform/broadcom/bcm2835-isp/Kconfig create mode 100644 drivers/media/platform/broadcom/bcm2835-isp/Makefile create mode 100644 drivers/media/platform/broadcom/bcm2835-isp/bcm2835-isp-ctrls.h create mode 100644 drivers/media/platform/broadcom/bcm2835-isp/bcm2835-isp-fmts.h create mode 100644 drivers/media/platform/broadcom/bcm2835-isp/bcm2835-v4l2-isp.c create mode 100644 include/uapi/linux/bcm2835-isp.h diff --git a/drivers/media/platform/broadcom/Kconfig b/drivers/media/platform/broadcom/Kconfig index cab44885182ce6..0da6c83e97ed17 100644 --- a/drivers/media/platform/broadcom/Kconfig +++ b/drivers/media/platform/broadcom/Kconfig @@ -3,3 +3,4 @@ comment "Broadcom BCM283x/BCM271x media platform drivers" source "drivers/media/platform/broadcom/bcm2835-unicam/Kconfig" +source "drivers/media/platform/broadcom/bcm2835-isp/Kconfig" diff --git a/drivers/media/platform/broadcom/Makefile b/drivers/media/platform/broadcom/Makefile index 33a89bdb0029bc..1d49e586f492fa 100644 --- a/drivers/media/platform/broadcom/Makefile +++ b/drivers/media/platform/broadcom/Makefile @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 obj-y += bcm2835-unicam/ +obj-y += bcm2835-isp/ diff --git a/drivers/media/platform/broadcom/bcm2835-isp/Kconfig b/drivers/media/platform/broadcom/bcm2835-isp/Kconfig new file mode 100644 index 00000000000000..6222799ebe16ab --- /dev/null +++ b/drivers/media/platform/broadcom/bcm2835-isp/Kconfig @@ -0,0 +1,14 @@ +config VIDEO_ISP_BCM2835 + tristate "BCM2835 ISP support" + depends on MEDIA_SUPPORT + depends on VIDEO_DEV && (ARCH_BCM2835 || COMPILE_TEST) + depends on MEDIA_CONTROLLER + select BCM2835_VCHIQ_MMAL + select VIDEOBUF2_DMA_CONTIG + help + This is the V4L2 driver for the Broadcom BCM2835 ISP hardware. + This operates over the VCHIQ interface to a service running on + VideoCore. + + To compile this driver as a module, choose M here: the module + will be called bcm2835-isp. diff --git a/drivers/media/platform/broadcom/bcm2835-isp/Makefile b/drivers/media/platform/broadcom/bcm2835-isp/Makefile new file mode 100644 index 00000000000000..1994f12db3fc9c --- /dev/null +++ b/drivers/media/platform/broadcom/bcm2835-isp/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0 +bcm2835-isp-objs := bcm2835-v4l2-isp.o + +obj-$(CONFIG_VIDEO_ISP_BCM2835) += bcm2835-isp.o + +ccflags-y += \ + -D__VCCOREVER__=0x04000000 diff --git a/drivers/media/platform/broadcom/bcm2835-isp/bcm2835-isp-ctrls.h b/drivers/media/platform/broadcom/bcm2835-isp/bcm2835-isp-ctrls.h new file mode 100644 index 00000000000000..172605718cdfb4 --- /dev/null +++ b/drivers/media/platform/broadcom/bcm2835-isp/bcm2835-isp-ctrls.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Broadcom BCM2835 ISP driver + * + * Copyright © 2019-2020 Raspberry Pi (Trading) Ltd. + * + * Author: Naushir Patuck (naush@raspberrypi.com) + * + */ + +#ifndef BCM2835_ISP_CTRLS +#define BCM2835_ISP_CTRLS + +#include + +struct bcm2835_isp_custom_ctrl { + const char *name; + u32 id; + u32 size; + u32 flags; +}; + +static const struct bcm2835_isp_custom_ctrl custom_ctrls[] = { + { + .name = "Colour Correction Matrix", + .id = V4L2_CID_USER_BCM2835_ISP_CC_MATRIX, + .size = sizeof(struct bcm2835_isp_custom_ccm), + .flags = 0 + }, { + .name = "Lens Shading", + .id = V4L2_CID_USER_BCM2835_ISP_LENS_SHADING, + .size = sizeof(struct bcm2835_isp_lens_shading), + .flags = V4L2_CTRL_FLAG_EXECUTE_ON_WRITE + }, { + .name = "Black Level", + .id = V4L2_CID_USER_BCM2835_ISP_BLACK_LEVEL, + .size = sizeof(struct bcm2835_isp_black_level), + .flags = 0 + }, { + .name = "Green Equalisation", + .id = V4L2_CID_USER_BCM2835_ISP_GEQ, + .size = sizeof(struct bcm2835_isp_geq), + .flags = 0 + }, { + .name = "Gamma", + .id = V4L2_CID_USER_BCM2835_ISP_GAMMA, + .size = sizeof(struct bcm2835_isp_gamma), + .flags = 0 + }, { + .name = "Sharpen", + .id = V4L2_CID_USER_BCM2835_ISP_SHARPEN, + .size = sizeof(struct bcm2835_isp_sharpen), + .flags = 0 + }, { + .name = "Denoise", + .id = V4L2_CID_USER_BCM2835_ISP_DENOISE, + .size = sizeof(struct bcm2835_isp_denoise), + .flags = 0 + }, { + .name = "Colour Denoise", + .id = V4L2_CID_USER_BCM2835_ISP_CDN, + .size = sizeof(struct bcm2835_isp_cdn), + .flags = 0 + }, { + .name = "Defective Pixel Correction", + .id = V4L2_CID_USER_BCM2835_ISP_DPC, + .size = sizeof(struct bcm2835_isp_dpc), + .flags = 0 + } +}; + +#endif diff --git a/drivers/media/platform/broadcom/bcm2835-isp/bcm2835-isp-fmts.h b/drivers/media/platform/broadcom/bcm2835-isp/bcm2835-isp-fmts.h new file mode 100644 index 00000000000000..25502d39262f29 --- /dev/null +++ b/drivers/media/platform/broadcom/bcm2835-isp/bcm2835-isp-fmts.h @@ -0,0 +1,558 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Broadcom BCM2835 ISP driver + * + * Copyright © 2019-2020 Raspberry Pi (Trading) Ltd. + * + * Author: Naushir Patuck (naush@raspberrypi.com) + * + */ + +#ifndef BCM2835_ISP_FMTS +#define BCM2835_ISP_FMTS + +#include +#include "../../../../platform/raspberrypi/vchiq-mmal/mmal-encodings.h" + +struct bcm2835_isp_fmt { + u32 fourcc; + int depth; + int bytesperline_align; + u32 mmal_fmt; + int size_multiplier_x2; + u32 colorspace_mask; + enum v4l2_colorspace colorspace_default; + unsigned int step_size; +}; + +#define V4L2_COLORSPACE_MASK(colorspace) BIT(colorspace) + +#define V4L2_COLORSPACE_MASK_JPEG V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_JPEG) +#define V4L2_COLORSPACE_MASK_SMPTE170M V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_SMPTE170M) +#define V4L2_COLORSPACE_MASK_REC709 V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_REC709) +#define V4L2_COLORSPACE_MASK_SRGB V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_SRGB) +#define V4L2_COLORSPACE_MASK_RAW V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_RAW) + +/* + * All three colour spaces JPEG, SMPTE170M and REC709 are fundamentally sRGB + * underneath (as near as makes no difference to us), just with different YCbCr + * encodings. Therefore the ISP can generate sRGB on its main output and any of + * the others on its low resolution output. Applications should, when using both + * outputs, program the colour spaces on them to be the same, matching whatever + * is requested for the low resolution output, even if the main output is + * producing an RGB format. In turn this requires us to allow all these colour + * spaces for every YUV/RGB output format. + */ +#define V4L2_COLORSPACE_MASK_ALL_SRGB (V4L2_COLORSPACE_MASK_JPEG | \ + V4L2_COLORSPACE_MASK_SRGB | \ + V4L2_COLORSPACE_MASK_SMPTE170M | \ + V4L2_COLORSPACE_MASK_REC709) + +static const struct bcm2835_isp_fmt supported_formats[] = { + { + /* YUV formats */ + .fourcc = V4L2_PIX_FMT_YUV420, + .depth = 8, + .bytesperline_align = 64, + .mmal_fmt = MMAL_ENCODING_I420, + .size_multiplier_x2 = 3, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_JPEG, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_YVU420, + .depth = 8, + .bytesperline_align = 64, + .mmal_fmt = MMAL_ENCODING_YV12, + .size_multiplier_x2 = 3, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_SMPTE170M, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_NV12, + .depth = 8, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_NV12, + .size_multiplier_x2 = 3, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_SMPTE170M, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_NV21, + .depth = 8, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_NV21, + .size_multiplier_x2 = 3, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_SMPTE170M, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_YUYV, + .depth = 16, + .bytesperline_align = 64, + .mmal_fmt = MMAL_ENCODING_YUYV, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_SMPTE170M, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_UYVY, + .depth = 16, + .bytesperline_align = 64, + .mmal_fmt = MMAL_ENCODING_UYVY, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_SMPTE170M, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_YVYU, + .depth = 16, + .bytesperline_align = 64, + .mmal_fmt = MMAL_ENCODING_YVYU, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_SMPTE170M, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_VYUY, + .depth = 16, + .bytesperline_align = 64, + .mmal_fmt = MMAL_ENCODING_VYUY, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_SMPTE170M, + .step_size = 2, + }, { + /* RGB formats */ + .fourcc = V4L2_PIX_FMT_RGB24, + .depth = 24, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_RGB24, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_SRGB, + .step_size = 1, + }, { + .fourcc = V4L2_PIX_FMT_RGB565, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_RGB16, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_SRGB, + .step_size = 1, + }, { + .fourcc = V4L2_PIX_FMT_BGR24, + .depth = 24, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BGR24, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_SRGB, + .step_size = 1, + }, { + .fourcc = V4L2_PIX_FMT_XBGR32, + .depth = 32, + .bytesperline_align = 64, + .mmal_fmt = MMAL_ENCODING_BGRA, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_SRGB, + .step_size = 1, + }, { + .fourcc = V4L2_PIX_FMT_RGBX32, + .depth = 32, + .bytesperline_align = 64, + .mmal_fmt = MMAL_ENCODING_RGBA, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_ALL_SRGB, + .colorspace_default = V4L2_COLORSPACE_SRGB, + .step_size = 1, + }, { + /* Bayer formats */ + /* 8 bit */ + .fourcc = V4L2_PIX_FMT_SRGGB8, + .depth = 8, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB8, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR8, + .depth = 8, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR8, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG8, + .depth = 8, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG8, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG8, + .depth = 8, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG8, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 10 bit */ + .fourcc = V4L2_PIX_FMT_SRGGB10P, + .depth = 10, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB10P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR10P, + .depth = 10, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR10P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG10P, + .depth = 10, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG10P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG10P, + .depth = 10, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG10P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 12 bit */ + .fourcc = V4L2_PIX_FMT_SRGGB12P, + .depth = 12, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB12P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR12P, + .depth = 12, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR12P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG12P, + .depth = 12, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG12P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG12P, + .depth = 12, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG12P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 14 bit */ + .fourcc = V4L2_PIX_FMT_SRGGB14P, + .depth = 14, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB14P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR14P, + .depth = 14, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR14P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG14P, + .depth = 14, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG14P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG14P, + .depth = 14, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG14P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 16 bit */ + .fourcc = V4L2_PIX_FMT_SRGGB16, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB16, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR16, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR16, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG16, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG16, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG16, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG16, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* Bayer formats unpacked to 16bpp */ + /* 10 bit */ + .fourcc = V4L2_PIX_FMT_SRGGB10, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB10, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR10, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR10, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG10, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG10, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG10, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG10, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 12 bit */ + .fourcc = V4L2_PIX_FMT_SRGGB12, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB12, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR12, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR12, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG12, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG12, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG12, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG12, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 14 bit */ + .fourcc = V4L2_PIX_FMT_SRGGB14, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB14, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR14, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR14, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG14, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG14, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG14, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG14, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* Monochrome MIPI formats */ + /* 8 bit */ + .fourcc = V4L2_PIX_FMT_GREY, + .depth = 8, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_GREY, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 10 bit */ + .fourcc = V4L2_PIX_FMT_Y10P, + .depth = 10, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_Y10P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 12 bit */ + .fourcc = V4L2_PIX_FMT_Y12P, + .depth = 12, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_Y12P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 14 bit */ + .fourcc = V4L2_PIX_FMT_Y14P, + .depth = 14, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_Y14P, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 16 bit */ + .fourcc = V4L2_PIX_FMT_Y16, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_Y16, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 10 bit as 16bpp */ + .fourcc = V4L2_PIX_FMT_Y10, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_Y10, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 12 bit as 16bpp */ + .fourcc = V4L2_PIX_FMT_Y12, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_Y12, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + /* 14 bit as 16bpp */ + .fourcc = V4L2_PIX_FMT_Y14, + .depth = 16, + .bytesperline_align = 32, + .mmal_fmt = MMAL_ENCODING_Y14, + .size_multiplier_x2 = 2, + .colorspace_mask = V4L2_COLORSPACE_MASK_RAW, + .colorspace_default = V4L2_COLORSPACE_RAW, + .step_size = 2, + }, { + .fourcc = V4L2_META_FMT_BCM2835_ISP_STATS, + .depth = 8, + .mmal_fmt = MMAL_ENCODING_BRCM_STATS, + /* The rest are not valid fields for stats. */ + } +}; + +#endif diff --git a/drivers/media/platform/broadcom/bcm2835-isp/bcm2835-v4l2-isp.c b/drivers/media/platform/broadcom/bcm2835-isp/bcm2835-v4l2-isp.c new file mode 100644 index 00000000000000..1a6fc91deca188 --- /dev/null +++ b/drivers/media/platform/broadcom/bcm2835-isp/bcm2835-v4l2-isp.c @@ -0,0 +1,1838 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Broadcom BCM2835 ISP driver + * + * Copyright © 2019-2020 Raspberry Pi (Trading) Ltd. + * + * Author: Naushir Patuck (naush@raspberrypi.com) + * + */ + +#include +#include + +#include +#include +#include +#include +#include + +#include "../../../../platform/raspberrypi/vchiq-mmal/mmal-msg.h" +#include "../../../../platform/raspberrypi/vchiq-mmal/mmal-parameters.h" +#include "../../../../platform/raspberrypi/vchiq-mmal/mmal-vchiq.h" + +#include "../../../../platform/raspberrypi/vc-sm-cma/vc_sm_knl.h" + +#include "bcm2835-isp-ctrls.h" +#include "bcm2835-isp-fmts.h" + +/* + * We want to instantiate 2 independent instances allowing 2 simultaneous users + * of the ISP hardware. + */ +#define BCM2835_ISP_NUM_INSTANCES 2 + +MODULE_IMPORT_NS("DMA_BUF"); + +static unsigned int debug; +module_param(debug, uint, 0644); +MODULE_PARM_DESC(debug, "activates debug info"); + +static unsigned int video_nr[BCM2835_ISP_NUM_INSTANCES] = { 13, 20 }; +module_param_array(video_nr, uint, NULL, 0644); +MODULE_PARM_DESC(video_nr, "base video device numbers"); + +#define BCM2835_ISP_NAME "bcm2835-isp" +#define BCM2835_ISP_ENTITY_NAME_LEN 32 + +#define BCM2835_ISP_NUM_OUTPUTS 1 +#define BCM2835_ISP_NUM_CAPTURES 2 +#define BCM2835_ISP_NUM_METADATA 1 + +#define BCM2835_ISP_NUM_NODES \ + (BCM2835_ISP_NUM_OUTPUTS + BCM2835_ISP_NUM_CAPTURES + \ + BCM2835_ISP_NUM_METADATA) + +/* Default frame dimension of 1280 pixels. */ +#define DEFAULT_DIM 1280U +/* + * Maximum frame dimension of 16384 pixels. Even though the ISP runs in tiles, + * have a sensible limit so that we do not create an excessive number of tiles + * to process. + */ +#define MAX_DIM 16384U +/* + * Minimum frame dimension of 64 pixels. Anything lower, and the tiling + * algorithm may not be able to cope when applying filter context. + */ +#define MIN_DIM 64U + +/* Timeout for stop_streaming to allow all buffers to return */ +#define COMPLETE_TIMEOUT (2 * HZ) + +/* Per-queue, driver-specific private data */ +struct bcm2835_isp_q_data { + /* + * These parameters should be treated as gospel, with everything else + * being determined from them. + */ + unsigned int bytesperline; + unsigned int width; + unsigned int height; + unsigned int sizeimage; + enum v4l2_colorspace colorspace; + const struct bcm2835_isp_fmt *fmt; +}; + +/* + * Structure to describe a single node /dev/video which represents a single + * input or output queue to the ISP device. + */ +struct bcm2835_isp_node { + int vfl_dir; + unsigned int id; + const char *name; + struct vchiq_mmal_port *port; + struct video_device vfd; + struct media_pad pad; + struct media_intf_devnode *intf_devnode; + struct media_link *intf_link; + struct mutex lock; /* top level device node lock */ + struct mutex queue_lock; + + struct vb2_queue queue; + unsigned int sequence; + + /* The list of formats supported on the node. */ + struct bcm2835_isp_fmt const **supported_fmts; + unsigned int num_supported_fmts; + + struct bcm2835_isp_q_data q_data; + + /* Parent device structure */ + struct bcm2835_isp_dev *dev; + + bool registered; + bool media_node_registered; +}; + +/* + * Structure representing the entire ISP device, comprising several input and + * output nodes /dev/video. + */ +struct bcm2835_isp_dev { + struct v4l2_device v4l2_dev; + struct device *dev; + struct v4l2_ctrl_handler ctrl_handler; + struct media_device mdev; + struct media_entity entity; + bool media_device_registered; + bool media_entity_registered; + struct vchiq_mmal_instance *mmal_instance; + struct vchiq_mmal_component *component; + struct completion frame_cmplt; + + struct bcm2835_isp_node node[BCM2835_ISP_NUM_NODES]; + struct media_pad pad[BCM2835_ISP_NUM_NODES]; + atomic_t num_streaming; + + /* Image pipeline controls. */ + int r_gain; + int b_gain; + struct dma_buf *last_ls_dmabuf; + struct mmal_parameter_lens_shading_v2 ls; +}; + +struct bcm2835_isp_buffer { + struct vb2_v4l2_buffer vb; + struct mmal_buffer mmal; +}; + +static +inline struct bcm2835_isp_dev *node_get_dev(struct bcm2835_isp_node *node) +{ + return node->dev; +} + +static inline bool node_is_output(struct bcm2835_isp_node *node) +{ + return node->queue.type == V4L2_BUF_TYPE_VIDEO_OUTPUT; +} + +static inline bool node_is_capture(struct bcm2835_isp_node *node) +{ + return node->queue.type == V4L2_BUF_TYPE_VIDEO_CAPTURE; +} + +static inline bool node_is_stats(struct bcm2835_isp_node *node) +{ + return node->queue.type == V4L2_BUF_TYPE_META_CAPTURE; +} + +static inline enum v4l2_buf_type index_to_queue_type(int index) +{ + if (index < BCM2835_ISP_NUM_OUTPUTS) + return V4L2_BUF_TYPE_VIDEO_OUTPUT; + else if (index < BCM2835_ISP_NUM_OUTPUTS + BCM2835_ISP_NUM_CAPTURES) + return V4L2_BUF_TYPE_VIDEO_CAPTURE; + else + return V4L2_BUF_TYPE_META_CAPTURE; +} + +static int set_isp_param(struct bcm2835_isp_node *node, u32 parameter, + void *value, u32 value_size) +{ + struct bcm2835_isp_dev *dev = node_get_dev(node); + + return vchiq_mmal_port_parameter_set(dev->mmal_instance, node->port, + parameter, value, value_size); +} + +static int set_wb_gains(struct bcm2835_isp_node *node) +{ + struct bcm2835_isp_dev *dev = node_get_dev(node); + struct mmal_parameter_awbgains gains = { + .r_gain = { dev->r_gain, 1000 }, + .b_gain = { dev->b_gain, 1000 } + }; + + return set_isp_param(node, MMAL_PARAMETER_CUSTOM_AWB_GAINS, + &gains, sizeof(gains)); +} + +static int set_digital_gain(struct bcm2835_isp_node *node, uint32_t gain) +{ + struct s32_fract digital_gain = { + .numerator = gain, + .denominator = 1000 + }; + + return set_isp_param(node, MMAL_PARAMETER_DIGITAL_GAIN, + &digital_gain, sizeof(digital_gain)); +} + +static const struct bcm2835_isp_fmt *get_fmt(u32 mmal_fmt) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(supported_formats); i++) { + if (supported_formats[i].mmal_fmt == mmal_fmt) + return &supported_formats[i]; + } + return NULL; +} + +static const +struct bcm2835_isp_fmt *find_format_by_fourcc(unsigned int fourcc, + struct bcm2835_isp_node *node) +{ + const struct bcm2835_isp_fmt *fmt; + unsigned int i; + + for (i = 0; i < node->num_supported_fmts; i++) { + fmt = node->supported_fmts[i]; + if (fmt->fourcc == fourcc) + return fmt; + } + + return NULL; +} + +static const +struct bcm2835_isp_fmt *find_format(struct v4l2_format *f, + struct bcm2835_isp_node *node) +{ + return find_format_by_fourcc(node_is_stats(node) ? + f->fmt.meta.dataformat : + f->fmt.pix.pixelformat, + node); +} + +/* vb2_to_mmal_buffer() - converts vb2 buffer header to MMAL + * + * Copies all the required fields from a VB2 buffer to the MMAL buffer header, + * ready for sending to the VPU. + */ +static void vb2_to_mmal_buffer(struct mmal_buffer *buf, + struct vb2_v4l2_buffer *vb2) +{ + u64 pts; + + buf->mmal_flags = 0; + if (vb2->flags & V4L2_BUF_FLAG_KEYFRAME) + buf->mmal_flags |= MMAL_BUFFER_HEADER_FLAG_KEYFRAME; + + /* Data must be framed correctly as one frame per buffer. */ + buf->mmal_flags |= MMAL_BUFFER_HEADER_FLAG_FRAME_END; + + buf->length = vb2->vb2_buf.planes[0].bytesused; + /* + * Minor ambiguity in the V4L2 spec as to whether passing in a 0 length + * buffer, or one with V4L2_BUF_FLAG_LAST set denotes end of stream. + * Handle either. + */ + if (!buf->length || vb2->flags & V4L2_BUF_FLAG_LAST) + buf->mmal_flags |= MMAL_BUFFER_HEADER_FLAG_EOS; + + /* vb2 timestamps in nsecs, mmal in usecs */ + pts = vb2->vb2_buf.timestamp; + do_div(pts, 1000); + buf->pts = pts; + buf->dts = MMAL_TIME_UNKNOWN; +} + +static void mmal_buffer_cb(struct vchiq_mmal_instance *instance, + struct vchiq_mmal_port *port, int status, + struct mmal_buffer *mmal_buf) +{ + struct bcm2835_isp_buffer *q_buf; + struct bcm2835_isp_node *node = port->cb_ctx; + struct bcm2835_isp_dev *dev = node_get_dev(node); + struct vb2_v4l2_buffer *vb2; + + q_buf = container_of(mmal_buf, struct bcm2835_isp_buffer, mmal); + vb2 = &q_buf->vb; + v4l2_dbg(2, debug, &dev->v4l2_dev, + "%s: port:%s[%d], status:%d, buf:%p, dmabuf:%p, length:%lu, flags %u, pts %lld\n", + __func__, node_is_output(node) ? "input" : "output", node->id, + status, mmal_buf, mmal_buf->dma_buf, mmal_buf->length, + mmal_buf->mmal_flags, mmal_buf->pts); + + if (mmal_buf->cmd) + v4l2_err(&dev->v4l2_dev, + "%s: Unexpected event on output callback - %08x\n", + __func__, mmal_buf->cmd); + + if (status) { + /* error in transfer */ + if (vb2) { + /* there was a buffer with the error so return it */ + vb2_buffer_done(&vb2->vb2_buf, VB2_BUF_STATE_ERROR); + } + return; + } + + /* vb2 timestamps in nsecs, mmal in usecs */ + vb2->vb2_buf.timestamp = mmal_buf->pts * 1000; + vb2->sequence = node->sequence++; + vb2_set_plane_payload(&vb2->vb2_buf, 0, mmal_buf->length); + vb2_buffer_done(&vb2->vb2_buf, VB2_BUF_STATE_DONE); + + if (!port->enabled) + complete(&dev->frame_cmplt); +} + +struct colorspace_translation { + enum v4l2_colorspace v4l2_value; + u32 mmal_value; +}; + +static u32 translate_color_space(enum v4l2_colorspace color_space) +{ + static const struct colorspace_translation translations[] = { + { V4L2_COLORSPACE_DEFAULT, MMAL_COLOR_SPACE_UNKNOWN }, + { V4L2_COLORSPACE_SMPTE170M, MMAL_COLOR_SPACE_ITUR_BT601 }, + { V4L2_COLORSPACE_SMPTE240M, MMAL_COLOR_SPACE_SMPTE240M }, + { V4L2_COLORSPACE_REC709, MMAL_COLOR_SPACE_ITUR_BT709 }, + /* V4L2_COLORSPACE_BT878 unavailable */ + { V4L2_COLORSPACE_470_SYSTEM_M, MMAL_COLOR_SPACE_BT470_2_M }, + { V4L2_COLORSPACE_470_SYSTEM_BG, MMAL_COLOR_SPACE_BT470_2_BG }, + { V4L2_COLORSPACE_JPEG, MMAL_COLOR_SPACE_JPEG_JFIF }, + /* + * We don't have an encoding for SRGB as such, but VideoCore + * will do the right thing if it gets "unknown". + */ + { V4L2_COLORSPACE_SRGB, MMAL_COLOR_SPACE_UNKNOWN }, + /* V4L2_COLORSPACE_OPRGB unavailable */ + /* V4L2_COLORSPACE_BT2020 unavailable */ + /* V4L2_COLORSPACE_RAW unavailable */ + /* V4L2_COLORSPACE_DCI_P3 unavailable */ + }; + + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(translations); i++) { + if (color_space == translations[i].v4l2_value) + return translations[i].mmal_value; + } + + return MMAL_COLOR_SPACE_UNKNOWN; +} + +static void setup_mmal_port_format(struct bcm2835_isp_node *node, + struct vchiq_mmal_port *port) +{ + struct bcm2835_isp_q_data *q_data = &node->q_data; + + port->format.encoding = q_data->fmt->mmal_fmt; + /* Raw image format - set width/height */ + port->es.video.width = (q_data->bytesperline << 3) / q_data->fmt->depth; + port->es.video.height = q_data->height; + port->es.video.crop.width = q_data->width; + port->es.video.crop.height = q_data->height; + port->es.video.crop.x = 0; + port->es.video.crop.y = 0; + port->es.video.color_space = translate_color_space(q_data->colorspace); +}; + +static int setup_mmal_port(struct bcm2835_isp_node *node) +{ + struct bcm2835_isp_dev *dev = node_get_dev(node); + unsigned int enable = 1; + int ret; + + v4l2_dbg(2, debug, &dev->v4l2_dev, "%s: setup %s[%d]\n", __func__, + node->name, node->id); + + vchiq_mmal_port_parameter_set(dev->mmal_instance, node->port, + MMAL_PARAMETER_ZERO_COPY, &enable, + sizeof(enable)); + setup_mmal_port_format(node, node->port); + ret = vchiq_mmal_port_set_format(dev->mmal_instance, node->port); + if (ret < 0) { + v4l2_dbg(1, debug, &dev->v4l2_dev, + "%s: vchiq_mmal_port_set_format failed\n", + __func__); + return ret; + } + + if (node->q_data.sizeimage < node->port->minimum_buffer.size) { + v4l2_err(&dev->v4l2_dev, + "buffer size mismatch sizeimage %u < min size %u\n", + node->q_data.sizeimage, + node->port->minimum_buffer.size); + return -EINVAL; + } + + return 0; +} + +static int bcm2835_isp_mmal_buf_cleanup(struct mmal_buffer *mmal_buf) +{ + mmal_vchi_buffer_cleanup(mmal_buf); + + if (mmal_buf->dma_buf) { + dma_buf_put(mmal_buf->dma_buf); + mmal_buf->dma_buf = NULL; + } + + return 0; +} + +static int bcm2835_isp_node_queue_setup(struct vb2_queue *q, + unsigned int *nbuffers, + unsigned int *nplanes, + unsigned int sizes[], + struct device *alloc_devs[]) +{ + struct bcm2835_isp_node *node = vb2_get_drv_priv(q); + unsigned int size; + + if (setup_mmal_port(node)) + return -EINVAL; + + size = node->q_data.sizeimage; + if (size == 0) { + v4l2_info(&node_get_dev(node)->v4l2_dev, + "%s: Image size unset in queue_setup for node %s[%d]\n", + __func__, node->name, node->id); + return -EINVAL; + } + + if (*nplanes) + return sizes[0] < size ? -EINVAL : 0; + + *nplanes = 1; + sizes[0] = size; + + node->port->current_buffer.size = size; + + if (*nbuffers < node->port->minimum_buffer.num) + *nbuffers = node->port->minimum_buffer.num; + + node->port->current_buffer.num = *nbuffers; + + v4l2_dbg(2, debug, &node_get_dev(node)->v4l2_dev, + "%s: Image size %u, nbuffers %u for node %s[%d]\n", + __func__, sizes[0], *nbuffers, node->name, node->id); + return 0; +} + +static int bcm2835_isp_buf_init(struct vb2_buffer *vb) +{ + struct bcm2835_isp_node *node = vb2_get_drv_priv(vb->vb2_queue); + struct bcm2835_isp_dev *dev = node_get_dev(node); + struct vb2_v4l2_buffer *vb2 = to_vb2_v4l2_buffer(vb); + struct bcm2835_isp_buffer *buf = + container_of(vb2, struct bcm2835_isp_buffer, vb); + + v4l2_dbg(3, debug, &dev->v4l2_dev, "%s: vb %p\n", __func__, vb); + + buf->mmal.buffer = vb2_plane_vaddr(&buf->vb.vb2_buf, 0); + buf->mmal.buffer_size = vb2_plane_size(&buf->vb.vb2_buf, 0); + mmal_vchi_buffer_init(dev->mmal_instance, &buf->mmal); + return 0; +} + +static int bcm2835_isp_buf_prepare(struct vb2_buffer *vb) +{ + struct bcm2835_isp_node *node = vb2_get_drv_priv(vb->vb2_queue); + struct bcm2835_isp_dev *dev = node_get_dev(node); + struct vb2_v4l2_buffer *vb2 = to_vb2_v4l2_buffer(vb); + struct bcm2835_isp_buffer *buf = + container_of(vb2, struct bcm2835_isp_buffer, vb); + struct dma_buf *dma_buf; + int ret; + + v4l2_dbg(3, debug, &dev->v4l2_dev, "%s: type: %d ptr %p\n", + __func__, vb->vb2_queue->type, vb); + + if (V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) { + if (vb2->field == V4L2_FIELD_ANY) + vb2->field = V4L2_FIELD_NONE; + if (vb2->field != V4L2_FIELD_NONE) { + v4l2_err(&dev->v4l2_dev, + "%s field isn't supported\n", __func__); + return -EINVAL; + } + } + + if (vb2_plane_size(vb, 0) < node->q_data.sizeimage) { + v4l2_err(&dev->v4l2_dev, + "%s data will not fit into plane (%lu < %lu)\n", + __func__, vb2_plane_size(vb, 0), + (long)node->q_data.sizeimage); + return -EINVAL; + } + + if (!V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) + vb2_set_plane_payload(vb, 0, node->q_data.sizeimage); + + switch (vb->memory) { + case VB2_MEMORY_DMABUF: + dma_buf = dma_buf_get(vb->planes[0].m.fd); + + if (dma_buf != buf->mmal.dma_buf) { + /* + * dmabuf either hasn't already been mapped, or it has + * changed. + */ + if (buf->mmal.dma_buf) { + v4l2_err(&dev->v4l2_dev, + "%s Buffer changed - why did the core not call cleanup?\n", + __func__); + bcm2835_isp_mmal_buf_cleanup(&buf->mmal); + } + + buf->mmal.dma_buf = dma_buf; + } else { + /* + * Already have a reference to the buffer, so release it + * here. + */ + dma_buf_put(dma_buf); + } + ret = 0; + break; + case VB2_MEMORY_MMAP: + /* + * We want to do this at init, but vb2_core_expbuf checks that + * the index < q->num_buffers, and q->num_buffers only gets + * updated once all the buffers are allocated. + */ + if (!buf->mmal.dma_buf) { + ret = vb2_core_expbuf_dmabuf(vb->vb2_queue, + vb->vb2_queue->type, + vb, 0, O_CLOEXEC, + &buf->mmal.dma_buf); + v4l2_dbg(3, debug, &dev->v4l2_dev, + "%s: exporting ptr %p to dmabuf %p\n", + __func__, vb, buf->mmal.dma_buf); + if (ret) + v4l2_err(&dev->v4l2_dev, + "%s: Failed to expbuf idx %d, ret %d\n", + __func__, vb->index, ret); + } else { + ret = 0; + } + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} + +static void bcm2835_isp_node_buffer_queue(struct vb2_buffer *buf) +{ + struct bcm2835_isp_node *node = vb2_get_drv_priv(buf->vb2_queue); + struct vb2_v4l2_buffer *vbuf = + container_of(buf, struct vb2_v4l2_buffer, vb2_buf); + struct bcm2835_isp_buffer *buffer = + container_of(vbuf, struct bcm2835_isp_buffer, vb); + struct bcm2835_isp_dev *dev = node_get_dev(node); + + v4l2_dbg(3, debug, &dev->v4l2_dev, "%s: node %s[%d], buffer %p\n", + __func__, node->name, node->id, buffer); + + vb2_to_mmal_buffer(&buffer->mmal, &buffer->vb); + v4l2_dbg(3, debug, &dev->v4l2_dev, + "%s: node %s[%d] - submitting mmal dmabuf %p\n", __func__, + node->name, node->id, buffer->mmal.dma_buf); + vchiq_mmal_submit_buffer(dev->mmal_instance, node->port, &buffer->mmal); +} + +static void bcm2835_isp_buffer_cleanup(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vb2 = to_vb2_v4l2_buffer(vb); + struct bcm2835_isp_buffer *buffer = + container_of(vb2, struct bcm2835_isp_buffer, vb); + + bcm2835_isp_mmal_buf_cleanup(&buffer->mmal); +} + +static int bcm2835_isp_node_start_streaming(struct vb2_queue *q, + unsigned int count) +{ + struct bcm2835_isp_node *node = vb2_get_drv_priv(q); + struct bcm2835_isp_dev *dev = node_get_dev(node); + int ret; + + v4l2_dbg(1, debug, &dev->v4l2_dev, "%s: node %s[%d] (count %u)\n", + __func__, node->name, node->id, count); + + ret = vchiq_mmal_component_enable(dev->mmal_instance, dev->component); + if (ret) { + v4l2_err(&dev->v4l2_dev, "%s: Failed enabling component, ret %d\n", + __func__, ret); + return -EIO; + } + + node->sequence = 0; + node->port->cb_ctx = node; + ret = vchiq_mmal_port_enable(dev->mmal_instance, node->port, + mmal_buffer_cb); + if (!ret) + atomic_inc(&dev->num_streaming); + else + v4l2_err(&dev->v4l2_dev, + "%s: Failed enabling port, ret %d\n", __func__, ret); + + return ret; +} + +static void bcm2835_isp_node_stop_streaming(struct vb2_queue *q) +{ + struct bcm2835_isp_node *node = vb2_get_drv_priv(q); + struct bcm2835_isp_dev *dev = node_get_dev(node); + int ret; + + v4l2_dbg(1, debug, &dev->v4l2_dev, "%s: node %s[%d], mmal port %p\n", + __func__, node->name, node->id, node->port); + + init_completion(&dev->frame_cmplt); + + /* Disable MMAL port - this will flush buffers back */ + ret = vchiq_mmal_port_disable(dev->mmal_instance, node->port); + if (ret) + v4l2_err(&dev->v4l2_dev, + "%s: Failed disabling %s port, ret %d\n", __func__, + node_is_output(node) ? "i/p" : "o/p", + ret); + + while (atomic_read(&node->port->buffers_with_vpu)) { + v4l2_dbg(1, debug, &dev->v4l2_dev, + "%s: Waiting for buffers to be returned - %d outstanding\n", + __func__, atomic_read(&node->port->buffers_with_vpu)); + ret = wait_for_completion_timeout(&dev->frame_cmplt, + COMPLETE_TIMEOUT); + if (ret <= 0) { + v4l2_err(&dev->v4l2_dev, + "%s: Timeout waiting for buffers to be returned - %d outstanding\n", + __func__, + atomic_read(&node->port->buffers_with_vpu)); + break; + } + } + + atomic_dec(&dev->num_streaming); + /* If all ports disabled, then disable the component */ + if (atomic_read(&dev->num_streaming) == 0) { + /* + * The ISP component on the firmware has a reference to the + * dmabuf handle for the lens shading table. Pass a null handle + * to remove that reference now. + */ + memset(&dev->ls, 0, sizeof(dev->ls)); + /* Must set a valid grid size for the FW */ + dev->ls.grid_cell_size = 16; + set_isp_param(&dev->node[0], + MMAL_PARAMETER_LENS_SHADING_OVERRIDE, + &dev->ls, sizeof(dev->ls)); + dev->last_ls_dmabuf = NULL; + + ret = vchiq_mmal_component_disable(dev->mmal_instance, + dev->component); + if (ret) { + v4l2_err(&dev->v4l2_dev, + "%s: Failed disabling component, ret %d\n", + __func__, ret); + } + } + + /* + * Simply wait for any vb2 buffers to finish. We could take steps to + * make them complete more quickly if we care, or even return them + * ourselves. + */ + vb2_wait_for_all_buffers(&node->queue); +} + +static const struct vb2_ops bcm2835_isp_node_queue_ops = { + .queue_setup = bcm2835_isp_node_queue_setup, + .buf_init = bcm2835_isp_buf_init, + .buf_prepare = bcm2835_isp_buf_prepare, + .buf_queue = bcm2835_isp_node_buffer_queue, + .buf_cleanup = bcm2835_isp_buffer_cleanup, + .start_streaming = bcm2835_isp_node_start_streaming, + .stop_streaming = bcm2835_isp_node_stop_streaming, +}; + +static const +struct bcm2835_isp_fmt *get_default_format(struct bcm2835_isp_node *node) +{ + return node->supported_fmts[0]; +} + +static inline unsigned int get_bytesperline(int width, + const struct bcm2835_isp_fmt *fmt) +{ + /* GPU aligns 24bpp images to a multiple of 32 pixels (not bytes). */ + if (fmt->depth == 24) + return ALIGN(width, 32) * 3; + else + return ALIGN((width * fmt->depth) >> 3, fmt->bytesperline_align); +} + +static inline unsigned int get_sizeimage(int bpl, int width, int height, + const struct bcm2835_isp_fmt *fmt) +{ + return (bpl * height * fmt->size_multiplier_x2) >> 1; +} + +static int map_ls_table(struct bcm2835_isp_dev *dev, struct dma_buf *dmabuf, + const struct bcm2835_isp_lens_shading *v4l2_ls) +{ + void *vcsm_handle; + int ret; + + if (IS_ERR_OR_NULL(dmabuf)) + return -EINVAL; + + /* + * struct bcm2835_isp_lens_shading and struct + * mmal_parameter_lens_shading_v2 match so that we can do a + * simple memcpy here. + * Only the dmabuf to the actual table needs any manipulation. + */ + memcpy(&dev->ls, v4l2_ls, sizeof(dev->ls)); + ret = vc_sm_cma_import_dmabuf(dmabuf, &vcsm_handle); + if (ret) { + dma_buf_put(dmabuf); + return ret; + } + + dev->ls.mem_handle_table = vc_sm_cma_int_handle(vcsm_handle); + dev->last_ls_dmabuf = dmabuf; + + vc_sm_cma_free(vcsm_handle); + + return 0; +} + +static int bcm2835_isp_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct bcm2835_isp_dev *dev = + container_of(ctrl->handler, struct bcm2835_isp_dev, ctrl_handler); + struct bcm2835_isp_node *node = &dev->node[0]; + int ret = 0; + + /* + * The ISP firmware driver will ensure these settings are applied on + * a frame boundary, so we are safe to write them as they come in. + * + * Note that the bcm2835_isp_* param structures are identical to the + * mmal-parameters.h definitions. This avoids the need for unnecessary + * field-by-field copying between structures. + */ + switch (ctrl->id) { + case V4L2_CID_RED_BALANCE: + dev->r_gain = ctrl->val; + ret = set_wb_gains(node); + break; + case V4L2_CID_BLUE_BALANCE: + dev->b_gain = ctrl->val; + ret = set_wb_gains(node); + break; + case V4L2_CID_DIGITAL_GAIN: + ret = set_digital_gain(node, ctrl->val); + break; + case V4L2_CID_USER_BCM2835_ISP_CC_MATRIX: + ret = set_isp_param(node, MMAL_PARAMETER_CUSTOM_CCM, + ctrl->p_new.p_u8, + sizeof(struct bcm2835_isp_custom_ccm)); + break; + case V4L2_CID_USER_BCM2835_ISP_LENS_SHADING: + { + struct bcm2835_isp_lens_shading *v4l2_ls; + + v4l2_ls = (struct bcm2835_isp_lens_shading *)ctrl->p_new.p_u8; + struct dma_buf *dmabuf = dma_buf_get(v4l2_ls->dmabuf); + + if (dmabuf != dev->last_ls_dmabuf) + ret = map_ls_table(dev, dmabuf, v4l2_ls); + + if (!ret && dev->ls.mem_handle_table) + /* + * The VPU will take a reference on the vcsm handle, + * which in turn will retain a reference on the dmabuf. + * This code can therefore safely release all + * references to the buffer. + */ + ret = + set_isp_param(node, + MMAL_PARAMETER_LENS_SHADING_OVERRIDE, + &dev->ls, sizeof(dev->ls)); + else + ret = -EINVAL; + + dma_buf_put(dmabuf); + break; + } + case V4L2_CID_USER_BCM2835_ISP_BLACK_LEVEL: + ret = set_isp_param(node, MMAL_PARAMETER_BLACK_LEVEL, + ctrl->p_new.p_u8, + sizeof(struct bcm2835_isp_black_level)); + break; + case V4L2_CID_USER_BCM2835_ISP_GEQ: + ret = set_isp_param(node, MMAL_PARAMETER_GEQ, + ctrl->p_new.p_u8, + sizeof(struct bcm2835_isp_geq)); + break; + case V4L2_CID_USER_BCM2835_ISP_GAMMA: + ret = set_isp_param(node, MMAL_PARAMETER_GAMMA, + ctrl->p_new.p_u8, + sizeof(struct bcm2835_isp_gamma)); + break; + case V4L2_CID_USER_BCM2835_ISP_DENOISE: + ret = set_isp_param(node, MMAL_PARAMETER_DENOISE, + ctrl->p_new.p_u8, + sizeof(struct bcm2835_isp_denoise)); + break; + case V4L2_CID_USER_BCM2835_ISP_CDN: + ret = set_isp_param(node, MMAL_PARAMETER_CDN, + ctrl->p_new.p_u8, + sizeof(struct bcm2835_isp_cdn)); + break; + case V4L2_CID_USER_BCM2835_ISP_SHARPEN: + ret = set_isp_param(node, MMAL_PARAMETER_SHARPEN, + ctrl->p_new.p_u8, + sizeof(struct bcm2835_isp_sharpen)); + break; + case V4L2_CID_USER_BCM2835_ISP_DPC: + ret = set_isp_param(node, MMAL_PARAMETER_DPC, + ctrl->p_new.p_u8, + sizeof(struct bcm2835_isp_dpc)); + break; + default: + v4l2_info(&dev->v4l2_dev, "Unrecognised control\n"); + ret = -EINVAL; + } + + if (ret) { + v4l2_err(&dev->v4l2_dev, "%s: Failed setting ctrl \"%s\" (%08x), err %d\n", + __func__, ctrl->name, ctrl->id, ret); + ret = -EIO; + } + + return ret; +} + +static const struct v4l2_ctrl_ops bcm2835_isp_ctrl_ops = { + .s_ctrl = bcm2835_isp_s_ctrl, +}; + +static const struct v4l2_file_operations bcm2835_isp_fops = { + .owner = THIS_MODULE, + .open = v4l2_fh_open, + .release = vb2_fop_release, + .poll = vb2_fop_poll, + .unlocked_ioctl = video_ioctl2, + .mmap = vb2_fop_mmap +}; + +static int populate_qdata_fmt(struct v4l2_format *f, + struct bcm2835_isp_node *node) +{ + struct bcm2835_isp_dev *dev = node_get_dev(node); + struct bcm2835_isp_q_data *q_data = &node->q_data; + int ret; + + if (!node_is_stats(node)) { + v4l2_dbg(1, debug, &dev->v4l2_dev, + "%s: Setting pix format for type %d, wxh: %ux%u, fmt: %08x, size %u\n", + __func__, f->type, f->fmt.pix.width, f->fmt.pix.height, + f->fmt.pix.pixelformat, f->fmt.pix.sizeimage); + + q_data->fmt = find_format(f, node); + q_data->width = f->fmt.pix.width; + q_data->height = f->fmt.pix.height; + q_data->height = f->fmt.pix.height; + + /* All parameters should have been set correctly by try_fmt */ + q_data->bytesperline = f->fmt.pix.bytesperline; + q_data->sizeimage = f->fmt.pix.sizeimage; + + /* We must indicate which of the allowed colour spaces we have. */ + q_data->colorspace = f->fmt.pix.colorspace; + } else { + v4l2_dbg(1, debug, &dev->v4l2_dev, + "%s: Setting meta format for fmt: %08x, size %u\n", + __func__, f->fmt.meta.dataformat, + f->fmt.meta.buffersize); + + q_data->fmt = find_format(f, node); + q_data->width = 0; + q_data->height = 0; + q_data->bytesperline = 0; + q_data->sizeimage = f->fmt.meta.buffersize; + + /* This won't mean anything for metadata, but may as well fill it in. */ + q_data->colorspace = V4L2_COLORSPACE_DEFAULT; + } + + v4l2_dbg(1, debug, &dev->v4l2_dev, + "%s: Calculated bpl as %u, size %u\n", __func__, + q_data->bytesperline, q_data->sizeimage); + + setup_mmal_port_format(node, node->port); + ret = vchiq_mmal_port_set_format(dev->mmal_instance, node->port); + if (ret) { + v4l2_err(&dev->v4l2_dev, + "%s: Failed vchiq_mmal_port_set_format on port, ret %d\n", + __func__, ret); + ret = -EINVAL; + } + + if (q_data->sizeimage < node->port->minimum_buffer.size) { + v4l2_err(&dev->v4l2_dev, + "%s: Current buffer size of %u < min buf size %u - driver mismatch to MMAL\n", + __func__, + q_data->sizeimage, + node->port->minimum_buffer.size); + } + + v4l2_dbg(1, debug, &dev->v4l2_dev, + "%s: Set format for type %d, wxh: %dx%d, fmt: %08x, size %u\n", + __func__, f->type, q_data->width, q_data->height, + q_data->fmt->fourcc, q_data->sizeimage); + + return ret; +} + +static int bcm2835_isp_node_querycap(struct file *file, void *priv, + struct v4l2_capability *cap) +{ + strscpy(cap->driver, BCM2835_ISP_NAME, sizeof(cap->driver)); + strscpy(cap->card, BCM2835_ISP_NAME, sizeof(cap->card)); + snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s", + BCM2835_ISP_NAME); + + return 0; +} + +static int bcm2835_isp_node_g_fmt(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct bcm2835_isp_node *node = video_drvdata(file); + + if (f->type != node->queue.type) + return -EINVAL; + + if (node_is_stats(node)) { + f->fmt.meta.dataformat = V4L2_META_FMT_BCM2835_ISP_STATS; + f->fmt.meta.buffersize = + node->port->minimum_buffer.size; + } else { + struct bcm2835_isp_q_data *q_data = &node->q_data; + + f->fmt.pix.width = q_data->width; + f->fmt.pix.height = q_data->height; + f->fmt.pix.field = V4L2_FIELD_NONE; + f->fmt.pix.pixelformat = q_data->fmt->fourcc; + f->fmt.pix.bytesperline = q_data->bytesperline; + f->fmt.pix.sizeimage = q_data->sizeimage; + f->fmt.pix.colorspace = q_data->colorspace; + } + + return 0; +} + +static int bcm2835_isp_node_enum_fmt(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + struct bcm2835_isp_node *node = video_drvdata(file); + + if (f->type != node->queue.type) + return -EINVAL; + + if (f->index < node->num_supported_fmts) { + /* Format found */ + f->pixelformat = node->supported_fmts[f->index]->fourcc; + f->flags = 0; + return 0; + } + + return -EINVAL; +} + +static int bcm2835_isp_enum_framesizes(struct file *file, void *priv, + struct v4l2_frmsizeenum *fsize) +{ + struct bcm2835_isp_node *node = video_drvdata(file); + struct bcm2835_isp_dev *dev = node_get_dev(node); + const struct bcm2835_isp_fmt *fmt; + + if (node_is_stats(node) || fsize->index) + return -EINVAL; + + fmt = find_format_by_fourcc(fsize->pixel_format, node); + if (!fmt) { + v4l2_err(&dev->v4l2_dev, "Invalid pixel code: %x\n", + fsize->pixel_format); + return -EINVAL; + } + + fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; + fsize->stepwise.min_width = MIN_DIM; + fsize->stepwise.max_width = MAX_DIM; + fsize->stepwise.step_width = fmt->step_size; + + fsize->stepwise.min_height = MIN_DIM; + fsize->stepwise.max_height = MAX_DIM; + fsize->stepwise.step_height = fmt->step_size; + + return 0; +} + +static int bcm2835_isp_node_try_fmt(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct bcm2835_isp_node *node = video_drvdata(file); + const struct bcm2835_isp_fmt *fmt; + + if (f->type != node->queue.type) + return -EINVAL; + + fmt = find_format(f, node); + if (!fmt) + fmt = get_default_format(node); + + if (!node_is_stats(node)) { + int is_rgb; + + f->fmt.pix.width = max(min(f->fmt.pix.width, MAX_DIM), + MIN_DIM); + f->fmt.pix.height = max(min(f->fmt.pix.height, MAX_DIM), + MIN_DIM); + + f->fmt.pix.pixelformat = fmt->fourcc; + + /* + * Fill in the actual colour space when the requested one was + * not supported. This also catches the case when the "default" + * colour space was requested (as that's never in the mask). + */ + if (!(V4L2_COLORSPACE_MASK(f->fmt.pix.colorspace) & fmt->colorspace_mask)) + f->fmt.pix.colorspace = fmt->colorspace_default; + /* In all cases, we only support the defaults for these: */ + f->fmt.pix.ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(f->fmt.pix.colorspace); + f->fmt.pix.xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(f->fmt.pix.colorspace); + /* RAW counts as sRGB here so that we get full range. */ + is_rgb = f->fmt.pix.colorspace == V4L2_COLORSPACE_SRGB || + f->fmt.pix.colorspace == V4L2_COLORSPACE_RAW; + f->fmt.pix.quantization = V4L2_MAP_QUANTIZATION_DEFAULT(is_rgb, f->fmt.pix.colorspace, + f->fmt.pix.ycbcr_enc); + + /* Respect any stride value (suitably aligned) that was requested. */ + f->fmt.pix.bytesperline = max(get_bytesperline(f->fmt.pix.width, fmt), + ALIGN(f->fmt.pix.bytesperline, + fmt->bytesperline_align)); + f->fmt.pix.field = V4L2_FIELD_NONE; + f->fmt.pix.sizeimage = + get_sizeimage(f->fmt.pix.bytesperline, f->fmt.pix.width, + f->fmt.pix.height, fmt); + } else { + f->fmt.meta.dataformat = fmt->fourcc; + f->fmt.meta.buffersize = node->port->minimum_buffer.size; + } + + return 0; +} + +static int bcm2835_isp_node_s_fmt(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct bcm2835_isp_node *node = video_drvdata(file); + int ret; + + if (f->type != node->queue.type) + return -EINVAL; + + ret = bcm2835_isp_node_try_fmt(file, priv, f); + if (ret) + return ret; + + v4l2_dbg(1, debug, &node_get_dev(node)->v4l2_dev, + "%s: Set format for node %s[%d]\n", + __func__, node->name, node->id); + + return populate_qdata_fmt(f, node); +} + +static int bcm2835_isp_node_s_selection(struct file *file, void *fh, + struct v4l2_selection *s) +{ + struct mmal_parameter_crop crop; + struct bcm2835_isp_node *node = video_drvdata(file); + struct bcm2835_isp_dev *dev = node_get_dev(node); + + /* This return value is required fro V4L2 compliance. */ + if (node_is_stats(node)) + return -ENOTTY; + + if (!s->r.width || !s->r.height) + return -EINVAL; + + /* We can only set crop on the input. */ + switch (s->target) { + case V4L2_SEL_TGT_CROP: + /* + * Adjust the crop window if it goes outside of the frame + * dimensions. + */ + s->r.left = min((unsigned int)max(s->r.left, 0), + node->q_data.width - MIN_DIM); + s->r.top = min((unsigned int)max(s->r.top, 0), + node->q_data.height - MIN_DIM); + s->r.width = max(min(s->r.width, + node->q_data.width - s->r.left), MIN_DIM); + s->r.height = max(min(s->r.height, + node->q_data.height - s->r.top), MIN_DIM); + break; + case V4L2_SEL_TGT_CROP_DEFAULT: + /* Default (i.e. no) crop window. */ + s->r.left = 0; + s->r.top = 0; + s->r.width = node->q_data.width; + s->r.height = node->q_data.height; + break; + default: + return -EINVAL; + } + + crop.rect.x = s->r.left; + crop.rect.y = s->r.top; + crop.rect.width = s->r.width; + crop.rect.height = s->r.height; + + return vchiq_mmal_port_parameter_set(dev->mmal_instance, node->port, + MMAL_PARAMETER_CROP, + &crop, sizeof(crop)); +} + +static int bcm2835_isp_node_g_selection(struct file *file, void *fh, + struct v4l2_selection *s) +{ + struct mmal_parameter_crop crop; + struct bcm2835_isp_node *node = video_drvdata(file); + struct bcm2835_isp_dev *dev = node_get_dev(node); + u32 crop_size = sizeof(crop); + int ret; + + /* We can only return out an input crop. */ + switch (s->target) { + case V4L2_SEL_TGT_CROP: + ret = vchiq_mmal_port_parameter_get(dev->mmal_instance, + node->port, + MMAL_PARAMETER_CROP, + &crop, &crop_size); + if (!ret) { + s->r.left = crop.rect.x; + s->r.top = crop.rect.y; + s->r.width = crop.rect.width; + s->r.height = crop.rect.height; + } + break; + case V4L2_SEL_TGT_CROP_DEFAULT: + case V4L2_SEL_TGT_CROP_BOUNDS: + /* Default (i.e. no) crop window. */ + s->r.left = 0; + s->r.top = 0; + s->r.width = node->q_data.width; + s->r.height = node->q_data.height; + ret = 0; + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static int bcm3285_isp_subscribe_event(struct v4l2_fh *fh, + const struct v4l2_event_subscription *s) +{ + switch (s->type) { + /* Cannot change source parameters dynamically at runtime. */ + case V4L2_EVENT_SOURCE_CHANGE: + return -EINVAL; + case V4L2_EVENT_CTRL: + return v4l2_ctrl_subscribe_event(fh, s); + default: + return v4l2_event_subscribe(fh, s, 4, NULL); + } +} + +static const struct v4l2_ioctl_ops bcm2835_isp_node_ioctl_ops = { + .vidioc_querycap = bcm2835_isp_node_querycap, + .vidioc_g_fmt_vid_cap = bcm2835_isp_node_g_fmt, + .vidioc_g_fmt_vid_out = bcm2835_isp_node_g_fmt, + .vidioc_g_fmt_meta_cap = bcm2835_isp_node_g_fmt, + .vidioc_s_fmt_vid_cap = bcm2835_isp_node_s_fmt, + .vidioc_s_fmt_vid_out = bcm2835_isp_node_s_fmt, + .vidioc_s_fmt_meta_cap = bcm2835_isp_node_s_fmt, + .vidioc_try_fmt_vid_cap = bcm2835_isp_node_try_fmt, + .vidioc_try_fmt_vid_out = bcm2835_isp_node_try_fmt, + .vidioc_try_fmt_meta_cap = bcm2835_isp_node_try_fmt, + .vidioc_s_selection = bcm2835_isp_node_s_selection, + .vidioc_g_selection = bcm2835_isp_node_g_selection, + + .vidioc_enum_fmt_vid_cap = bcm2835_isp_node_enum_fmt, + .vidioc_enum_fmt_vid_out = bcm2835_isp_node_enum_fmt, + .vidioc_enum_fmt_meta_cap = bcm2835_isp_node_enum_fmt, + .vidioc_enum_framesizes = bcm2835_isp_enum_framesizes, + + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_expbuf = vb2_ioctl_expbuf, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_prepare_buf = vb2_ioctl_prepare_buf, + + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, + + .vidioc_subscribe_event = bcm3285_isp_subscribe_event, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, +}; + +/* + * Size of the array to provide to the VPU when asking for the list of supported + * formats. + * + * The ISP component currently advertises 62 input formats, so add a small + * overhead on that. Should the component advertise more formats then the excess + * will be dropped and a warning logged. + */ +#define MAX_SUPPORTED_ENCODINGS 70 + +/* Populate node->supported_fmts with the formats supported by those ports. */ +static int bcm2835_isp_get_supported_fmts(struct bcm2835_isp_node *node) +{ + struct bcm2835_isp_dev *dev = node_get_dev(node); + struct bcm2835_isp_fmt const **list; + unsigned int i, j, num_encodings; + u32 fourccs[MAX_SUPPORTED_ENCODINGS]; + u32 param_size = sizeof(fourccs); + int ret; + + ret = vchiq_mmal_port_parameter_get(dev->mmal_instance, node->port, + MMAL_PARAMETER_SUPPORTED_ENCODINGS, + &fourccs, ¶m_size); + + if (ret) { + if (ret == MMAL_MSG_STATUS_ENOSPC) { + v4l2_err(&dev->v4l2_dev, + "%s: port has more encodings than we provided space for. Some are dropped (%zu vs %u).\n", + __func__, param_size / sizeof(u32), + MAX_SUPPORTED_ENCODINGS); + num_encodings = MAX_SUPPORTED_ENCODINGS; + } else { + v4l2_err(&dev->v4l2_dev, "%s: get_param ret %u.\n", + __func__, ret); + return -EINVAL; + } + } else { + num_encodings = param_size / sizeof(u32); + } + + /* + * Assume at this stage that all encodings will be supported in V4L2. + * Any that aren't supported will waste a very small amount of memory. + */ + list = devm_kzalloc(dev->dev, + sizeof(struct bcm2835_isp_fmt *) * num_encodings, + GFP_KERNEL); + if (!list) + return -ENOMEM; + node->supported_fmts = list; + + for (i = 0, j = 0; i < num_encodings; i++) { + const struct bcm2835_isp_fmt *fmt = get_fmt(fourccs[i]); + + if (fmt) { + list[j] = fmt; + j++; + } + } + node->num_supported_fmts = j; + + return 0; +} + +/* + * Register a device node /dev/video to go along with one of the ISP's input + * or output nodes. + */ +static int bcm2835_register_node(struct bcm2835_isp_dev *dev, + unsigned int instance, + struct bcm2835_isp_node *node, + int index) +{ + struct video_device *vfd; + struct vb2_queue *queue; + int ret; + + mutex_init(&node->lock); + mutex_init(&node->queue_lock); + + node->dev = dev; + vfd = &node->vfd; + queue = &node->queue; + queue->type = index_to_queue_type(index); + /* + * Setup the node type-specific params. + * + * Only the OUTPUT node can set controls and crop windows. However, + * we must allow the s/g_selection ioctl on the stats node as v4l2 + * compliance expects it to return a -ENOTTY, and the framework + * does not handle it if the ioctl is disabled. + */ + switch (queue->type) { + case V4L2_BUF_TYPE_VIDEO_OUTPUT: + vfd->device_caps = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING; + node->id = index; + node->vfl_dir = VFL_DIR_TX; + node->name = "output"; + node->port = &dev->component->input[node->id]; + break; + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + vfd->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; + /* First Capture node starts at id 0, etc. */ + node->id = index - BCM2835_ISP_NUM_OUTPUTS; + node->vfl_dir = VFL_DIR_RX; + node->name = "capture"; + node->port = &dev->component->output[node->id]; + v4l2_disable_ioctl(&node->vfd, VIDIOC_S_CTRL); + v4l2_disable_ioctl(&node->vfd, VIDIOC_S_SELECTION); + v4l2_disable_ioctl(&node->vfd, VIDIOC_G_SELECTION); + break; + case V4L2_BUF_TYPE_META_CAPTURE: + vfd->device_caps = V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING; + node->id = index - BCM2835_ISP_NUM_OUTPUTS; + node->vfl_dir = VFL_DIR_RX; + node->name = "stats"; + node->port = &dev->component->output[node->id]; + v4l2_disable_ioctl(&node->vfd, VIDIOC_S_CTRL); + v4l2_disable_ioctl(&node->vfd, VIDIOC_S_SELECTION); + v4l2_disable_ioctl(&node->vfd, VIDIOC_G_SELECTION); + break; + } + + /* We use the selection API instead of the old crop API. */ + v4l2_disable_ioctl(vfd, VIDIOC_CROPCAP); + v4l2_disable_ioctl(vfd, VIDIOC_G_CROP); + v4l2_disable_ioctl(vfd, VIDIOC_S_CROP); + + ret = bcm2835_isp_get_supported_fmts(node); + if (ret) + return ret; + + /* Initialise the video node. */ + vfd->vfl_type = VFL_TYPE_VIDEO; + vfd->fops = &bcm2835_isp_fops, + vfd->ioctl_ops = &bcm2835_isp_node_ioctl_ops, + vfd->minor = -1, + vfd->release = video_device_release_empty, + vfd->queue = &node->queue; + vfd->lock = &node->lock; + vfd->v4l2_dev = &dev->v4l2_dev; + vfd->vfl_dir = node->vfl_dir; + + node->q_data.fmt = get_default_format(node); + node->q_data.width = DEFAULT_DIM; + node->q_data.height = DEFAULT_DIM; + node->q_data.bytesperline = + get_bytesperline(DEFAULT_DIM, node->q_data.fmt); + node->q_data.sizeimage = node_is_stats(node) ? + node->port->recommended_buffer.size : + get_sizeimage(node->q_data.bytesperline, + node->q_data.width, + node->q_data.height, + node->q_data.fmt); + node->q_data.colorspace = node->q_data.fmt->colorspace_default; + + queue->io_modes = VB2_MMAP | VB2_DMABUF; + queue->drv_priv = node; + queue->ops = &bcm2835_isp_node_queue_ops; + queue->mem_ops = &vb2_dma_contig_memops; + queue->buf_struct_size = sizeof(struct bcm2835_isp_buffer); + queue->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + queue->dev = dev->dev; + queue->lock = &node->queue_lock; + + ret = vb2_queue_init(queue); + if (ret < 0) { + v4l2_info(&dev->v4l2_dev, "vb2_queue_init failed\n"); + return ret; + } + + /* Set some controls and defaults, but only on the VIDEO_OUTPUT node. */ + if (node_is_output(node)) { + unsigned int i; + + /* Use this ctrl template to assign custom ISP ctrls. */ + struct v4l2_ctrl_config ctrl_template = { + .ops = &bcm2835_isp_ctrl_ops, + .type = V4L2_CTRL_TYPE_U8, + .def = 0, + .min = 0x00, + .max = 0xff, + .step = 1, + }; + + /* 3 standard controls, and an array of custom controls */ + ret = v4l2_ctrl_handler_init(&dev->ctrl_handler, + 3 + ARRAY_SIZE(custom_ctrls)); + if (ret) { + v4l2_err(&dev->v4l2_dev, "ctrl_handler init failed (%d)\n", + ret); + goto queue_cleanup; + } + + dev->r_gain = 1000; + dev->b_gain = 1000; + + v4l2_ctrl_new_std(&dev->ctrl_handler, &bcm2835_isp_ctrl_ops, + V4L2_CID_RED_BALANCE, 1, 0xffff, 1, + dev->r_gain); + + v4l2_ctrl_new_std(&dev->ctrl_handler, &bcm2835_isp_ctrl_ops, + V4L2_CID_BLUE_BALANCE, 1, 0xffff, 1, + dev->b_gain); + + v4l2_ctrl_new_std(&dev->ctrl_handler, &bcm2835_isp_ctrl_ops, + V4L2_CID_DIGITAL_GAIN, 1, 0xffff, 1, 1000); + + for (i = 0; i < ARRAY_SIZE(custom_ctrls); i++) { + ctrl_template.name = custom_ctrls[i].name; + ctrl_template.id = custom_ctrls[i].id; + ctrl_template.dims[0] = custom_ctrls[i].size; + ctrl_template.flags = custom_ctrls[i].flags; + v4l2_ctrl_new_custom(&dev->ctrl_handler, + &ctrl_template, NULL); + } + + node->vfd.ctrl_handler = &dev->ctrl_handler; + if (dev->ctrl_handler.error) { + ret = dev->ctrl_handler.error; + v4l2_err(&dev->v4l2_dev, "controls init failed (%d)\n", + ret); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + goto ctrl_cleanup; + } + } + + /* Define the device names */ + snprintf(vfd->name, sizeof(node->vfd.name), "%s-%s%d", BCM2835_ISP_NAME, + node->name, node->id); + + ret = video_register_device(vfd, VFL_TYPE_VIDEO, video_nr[instance]); + if (ret) { + v4l2_err(&dev->v4l2_dev, + "Failed to register video %s[%d] device node\n", + node->name, node->id); + goto ctrl_cleanup; + } + + node->registered = true; + video_set_drvdata(vfd, node); + + v4l2_info(&dev->v4l2_dev, + "Device node %s[%d] registered as /dev/video%d\n", + node->name, node->id, vfd->num); + + return 0; + +ctrl_cleanup: + if (node_is_output(node)) + v4l2_ctrl_handler_free(&dev->ctrl_handler); +queue_cleanup: + vb2_queue_release(&node->queue); + return ret; +} + +/* Unregister one of the /dev/video nodes associated with the ISP. */ +static void bcm2835_unregister_node(struct bcm2835_isp_node *node) +{ + struct bcm2835_isp_dev *dev = node_get_dev(node); + + v4l2_info(&dev->v4l2_dev, + "Unregistering node %s[%d] device node /dev/video%d\n", + node->name, node->id, node->vfd.num); + + if (node->registered) { + video_unregister_device(&node->vfd); + if (node_is_output(node)) + v4l2_ctrl_handler_free(&dev->ctrl_handler); + vb2_queue_release(&node->queue); + } + + /* + * node->supported_fmts.list is free'd automatically + * as a managed resource. + */ + node->supported_fmts = NULL; + node->num_supported_fmts = 0; + node->vfd.ctrl_handler = NULL; + node->registered = false; +} + +static void media_controller_unregister(struct bcm2835_isp_dev *dev) +{ + unsigned int i; + + v4l2_info(&dev->v4l2_dev, "Unregister from media controller\n"); + + if (dev->media_device_registered) { + media_device_unregister(&dev->mdev); + media_device_cleanup(&dev->mdev); + dev->media_device_registered = false; + } + + kfree(dev->entity.name); + dev->entity.name = NULL; + + if (dev->media_entity_registered) { + media_device_unregister_entity(&dev->entity); + dev->media_entity_registered = false; + } + + for (i = 0; i < BCM2835_ISP_NUM_NODES; i++) { + struct bcm2835_isp_node *node = &dev->node[i]; + + if (node->media_node_registered) { + media_remove_intf_links(node->intf_link->intf); + media_entity_remove_links(&dev->node[i].vfd.entity); + media_devnode_remove(node->intf_devnode); + media_device_unregister_entity(&node->vfd.entity); + kfree(node->vfd.entity.name); + } + node->media_node_registered = false; + } + + dev->v4l2_dev.mdev = NULL; +} + +static int media_controller_register_node(struct bcm2835_isp_dev *dev, int num) +{ + struct bcm2835_isp_node *node = &dev->node[num]; + struct media_entity *entity = &node->vfd.entity; + int output = node_is_output(node); + char *name; + int ret; + + v4l2_info(&dev->v4l2_dev, + "Register %s node %d with media controller\n", + output ? "output" : "capture", num); + entity->obj_type = MEDIA_ENTITY_TYPE_VIDEO_DEVICE; + entity->function = MEDIA_ENT_F_IO_V4L; + entity->info.dev.major = VIDEO_MAJOR; + entity->info.dev.minor = node->vfd.minor; + name = kmalloc(BCM2835_ISP_ENTITY_NAME_LEN, GFP_KERNEL); + if (!name) { + ret = -ENOMEM; + goto error_no_mem; + } + snprintf(name, BCM2835_ISP_ENTITY_NAME_LEN, "%s0-%s%d", + BCM2835_ISP_NAME, output ? "output" : "capture", num); + entity->name = name; + node->pad.flags = output ? MEDIA_PAD_FL_SOURCE : MEDIA_PAD_FL_SINK; + ret = media_entity_pads_init(entity, 1, &node->pad); + if (ret) + goto error_pads_init; + ret = media_device_register_entity(&dev->mdev, entity); + if (ret) + goto error_register_entity; + + node->intf_devnode = media_devnode_create(&dev->mdev, + MEDIA_INTF_T_V4L_VIDEO, 0, + VIDEO_MAJOR, node->vfd.minor); + if (!node->intf_devnode) { + ret = -ENOMEM; + goto error_devnode_create; + } + + node->intf_link = media_create_intf_link(entity, + &node->intf_devnode->intf, + MEDIA_LNK_FL_IMMUTABLE | + MEDIA_LNK_FL_ENABLED); + if (!node->intf_link) { + ret = -ENOMEM; + goto error_create_intf_link; + } + + if (output) + ret = media_create_pad_link(entity, 0, &dev->entity, num, + MEDIA_LNK_FL_IMMUTABLE | + MEDIA_LNK_FL_ENABLED); + else + ret = media_create_pad_link(&dev->entity, num, entity, 0, + MEDIA_LNK_FL_IMMUTABLE | + MEDIA_LNK_FL_ENABLED); + if (ret) + goto error_create_pad_link; + + dev->node[num].media_node_registered = true; + return 0; + +error_create_pad_link: + media_remove_intf_links(&node->intf_devnode->intf); +error_create_intf_link: + media_devnode_remove(node->intf_devnode); +error_devnode_create: + media_device_unregister_entity(&node->vfd.entity); +error_register_entity: +error_pads_init: + kfree(entity->name); + entity->name = NULL; +error_no_mem: + if (ret) + v4l2_info(&dev->v4l2_dev, "Error registering node\n"); + + return ret; +} + +static int media_controller_register(struct bcm2835_isp_dev *dev) +{ + char *name; + unsigned int i; + int ret; + + v4l2_dbg(2, debug, &dev->v4l2_dev, "Registering with media controller\n"); + dev->mdev.dev = dev->dev; + strscpy(dev->mdev.model, "bcm2835-isp", + sizeof(dev->mdev.model)); + strscpy(dev->mdev.bus_info, "platform:bcm2835-isp", + sizeof(dev->mdev.bus_info)); + media_device_init(&dev->mdev); + dev->v4l2_dev.mdev = &dev->mdev; + + v4l2_dbg(2, debug, &dev->v4l2_dev, "Register entity for nodes\n"); + + name = kmalloc(BCM2835_ISP_ENTITY_NAME_LEN, GFP_KERNEL); + if (!name) { + ret = -ENOMEM; + goto done; + } + snprintf(name, BCM2835_ISP_ENTITY_NAME_LEN, "bcm2835_isp0"); + dev->entity.name = name; + dev->entity.obj_type = MEDIA_ENTITY_TYPE_BASE; + dev->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER; + + for (i = 0; i < BCM2835_ISP_NUM_NODES; i++) { + dev->pad[i].flags = node_is_output(&dev->node[i]) ? + MEDIA_PAD_FL_SINK : MEDIA_PAD_FL_SOURCE; + } + + ret = media_entity_pads_init(&dev->entity, BCM2835_ISP_NUM_NODES, + dev->pad); + if (ret) + goto done; + + ret = media_device_register_entity(&dev->mdev, &dev->entity); + if (ret) + goto done; + + dev->media_entity_registered = true; + for (i = 0; i < BCM2835_ISP_NUM_NODES; i++) { + ret = media_controller_register_node(dev, i); + if (ret) + goto done; + } + + ret = media_device_register(&dev->mdev); + if (!ret) + dev->media_device_registered = true; +done: + return ret; +} + +static void bcm2835_isp_remove_instance(struct bcm2835_isp_dev *dev) +{ + unsigned int i; + + media_controller_unregister(dev); + + for (i = 0; i < BCM2835_ISP_NUM_NODES; i++) + bcm2835_unregister_node(&dev->node[i]); + + v4l2_device_unregister(&dev->v4l2_dev); + + if (dev->component) + vchiq_mmal_component_finalise(dev->mmal_instance, + dev->component); + + vchiq_mmal_finalise(dev->mmal_instance); +} + +static int bcm2835_isp_probe_instance(struct vchiq_device *device, + struct bcm2835_isp_dev **dev_int, + unsigned int instance) +{ + struct bcm2835_isp_dev *dev; + unsigned int i; + int ret; + + dev = devm_kzalloc(&device->dev, sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + *dev_int = dev; + dev->dev = &device->dev; + + ret = v4l2_device_register(&device->dev, &dev->v4l2_dev); + if (ret) + return ret; + + ret = vchiq_mmal_init(&device->dev, &dev->mmal_instance); + if (ret) { + v4l2_device_unregister(&dev->v4l2_dev); + return ret; + } + + ret = vchiq_mmal_component_init(dev->mmal_instance, "ril.isp", + &dev->component); + if (ret) { + v4l2_err(&dev->v4l2_dev, + "%s: failed to create ril.isp component\n", __func__); + return ret; + } + + if (dev->component->inputs < BCM2835_ISP_NUM_OUTPUTS || + dev->component->outputs < BCM2835_ISP_NUM_CAPTURES + + BCM2835_ISP_NUM_METADATA) { + v4l2_err(&dev->v4l2_dev, + "%s: ril.isp returned %d i/p (%d expected), %d o/p (%d expected) ports\n", + __func__, dev->component->inputs, + BCM2835_ISP_NUM_OUTPUTS, + dev->component->outputs, + BCM2835_ISP_NUM_CAPTURES + BCM2835_ISP_NUM_METADATA); + return -EINVAL; + } + + atomic_set(&dev->num_streaming, 0); + + for (i = 0; i < BCM2835_ISP_NUM_NODES; i++) { + struct bcm2835_isp_node *node = &dev->node[i]; + + ret = bcm2835_register_node(dev, instance, node, i); + if (ret) + return ret; + } + + ret = media_controller_register(dev); + if (ret) + return ret; + + return 0; +} + +static void bcm2835_isp_remove(struct vchiq_device *device) +{ + struct bcm2835_isp_dev **bcm2835_isp_instances; + unsigned int i; + + bcm2835_isp_instances = vchiq_get_drvdata(device); + for (i = 0; i < BCM2835_ISP_NUM_INSTANCES; i++) { + if (bcm2835_isp_instances[i]) + bcm2835_isp_remove_instance(bcm2835_isp_instances[i]); + } +} + +static int bcm2835_isp_probe(struct vchiq_device *device) +{ + struct bcm2835_isp_dev **bcm2835_isp_instances; + unsigned int i; + int ret; + + ret = dma_set_mask_and_coherent(&device->dev, DMA_BIT_MASK(32)); + if (ret) { + dev_err(&device->dev, "dma_set_mask_and_coherent failed: %d\n", + ret); + return ret; + } + + bcm2835_isp_instances = devm_kzalloc(&device->dev, + sizeof(bcm2835_isp_instances) * + BCM2835_ISP_NUM_INSTANCES, + GFP_KERNEL); + if (!bcm2835_isp_instances) + return -ENOMEM; + + vchiq_set_drvdata(device, bcm2835_isp_instances); + + for (i = 0; i < BCM2835_ISP_NUM_INSTANCES; i++) { + ret = bcm2835_isp_probe_instance(device, + &bcm2835_isp_instances[i], i); + if (ret) + goto error; + } + + dev_info(&device->dev, "Loaded V4L2 %s\n", BCM2835_ISP_NAME); + return 0; + +error: + bcm2835_isp_remove(device); + + return ret; +} + +static struct vchiq_driver bcm2835_isp_drv = { + .probe = bcm2835_isp_probe, + .remove = bcm2835_isp_remove, + .driver = { + .name = BCM2835_ISP_NAME, + }, +}; + +module_vchiq_driver(bcm2835_isp_drv); + +MODULE_DESCRIPTION("BCM2835 ISP driver"); +MODULE_AUTHOR("Naushir Patuck "); +MODULE_LICENSE("GPL"); +MODULE_VERSION("1.0"); +MODULE_ALIAS("vchiq:bcm2835-isp"); diff --git a/include/uapi/linux/bcm2835-isp.h b/include/uapi/linux/bcm2835-isp.h new file mode 100644 index 00000000000000..c50e3ca8156577 --- /dev/null +++ b/include/uapi/linux/bcm2835-isp.h @@ -0,0 +1,347 @@ +/* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) */ +/* + * bcm2835-isp.h + * + * BCM2835 ISP driver - user space header file. + * + * Copyright © 2019-2020 Raspberry Pi (Trading) Ltd. + * + * Author: Naushir Patuck (naush@raspberrypi.com) + * + */ + +#ifndef __BCM2835_ISP_H_ +#define __BCM2835_ISP_H_ + +#include + +#define V4L2_CID_USER_BCM2835_ISP_CC_MATRIX \ + (V4L2_CID_USER_BCM2835_ISP_BASE + 0x0001) +#define V4L2_CID_USER_BCM2835_ISP_LENS_SHADING \ + (V4L2_CID_USER_BCM2835_ISP_BASE + 0x0002) +#define V4L2_CID_USER_BCM2835_ISP_BLACK_LEVEL \ + (V4L2_CID_USER_BCM2835_ISP_BASE + 0x0003) +#define V4L2_CID_USER_BCM2835_ISP_GEQ \ + (V4L2_CID_USER_BCM2835_ISP_BASE + 0x0004) +#define V4L2_CID_USER_BCM2835_ISP_GAMMA \ + (V4L2_CID_USER_BCM2835_ISP_BASE + 0x0005) +#define V4L2_CID_USER_BCM2835_ISP_DENOISE \ + (V4L2_CID_USER_BCM2835_ISP_BASE + 0x0006) +#define V4L2_CID_USER_BCM2835_ISP_SHARPEN \ + (V4L2_CID_USER_BCM2835_ISP_BASE + 0x0007) +#define V4L2_CID_USER_BCM2835_ISP_DPC \ + (V4L2_CID_USER_BCM2835_ISP_BASE + 0x0008) +#define V4L2_CID_USER_BCM2835_ISP_CDN \ + (V4L2_CID_USER_BCM2835_ISP_BASE + 0x0009) + +/* + * All structs below are directly mapped onto the equivalent structs in + * drivers/staging/vc04_services/vchiq-mmal/mmal-parameters.h + * for convenience. + */ + +/** + * struct bcm2835_isp_rational - Rational value type. + * + * @num: Numerator. + * @den: Denominator. + */ +struct bcm2835_isp_rational { + __s32 num; + __u32 den; +}; + +/** + * struct bcm2835_isp_ccm - Colour correction matrix. + * + * @ccm: 3x3 correction matrix coefficients. + * @offsets: 1x3 correction offsets. + */ +struct bcm2835_isp_ccm { + struct bcm2835_isp_rational ccm[3][3]; + __s32 offsets[3]; +}; + +/** + * struct bcm2835_isp_custom_ccm - Custom CCM applied with the + * V4L2_CID_USER_BCM2835_ISP_CC_MATRIX ctrl. + * + * @enabled: Enable custom CCM. + * @ccm: Custom CCM coefficients and offsets. + */ +struct bcm2835_isp_custom_ccm { + __u32 enabled; + struct bcm2835_isp_ccm ccm; +}; + +/** + * enum bcm2835_isp_gain_format - format of the gains in the lens shading + * tables used with the + * V4L2_CID_USER_BCM2835_ISP_LENS_SHADING ctrl. + * + * @GAIN_FORMAT_U0P8_1: Gains are u0.8 format, starting at 1.0 + * @GAIN_FORMAT_U1P7_0: Gains are u1.7 format, starting at 0.0 + * @GAIN_FORMAT_U1P7_1: Gains are u1.7 format, starting at 1.0 + * @GAIN_FORMAT_U2P6_0: Gains are u2.6 format, starting at 0.0 + * @GAIN_FORMAT_U2P6_1: Gains are u2.6 format, starting at 1.0 + * @GAIN_FORMAT_U3P5_0: Gains are u3.5 format, starting at 0.0 + * @GAIN_FORMAT_U3P5_1: Gains are u3.5 format, starting at 1.0 + * @GAIN_FORMAT_U4P10: Gains are u4.10 format, starting at 0.0 + */ +enum bcm2835_isp_gain_format { + GAIN_FORMAT_U0P8_1 = 0, + GAIN_FORMAT_U1P7_0 = 1, + GAIN_FORMAT_U1P7_1 = 2, + GAIN_FORMAT_U2P6_0 = 3, + GAIN_FORMAT_U2P6_1 = 4, + GAIN_FORMAT_U3P5_0 = 5, + GAIN_FORMAT_U3P5_1 = 6, + GAIN_FORMAT_U4P10 = 7, +}; + +/** + * struct bcm2835_isp_lens_shading - Lens shading tables supplied with the + * V4L2_CID_USER_BCM2835_ISP_LENS_SHADING + * ctrl. + * + * @enabled: Enable lens shading. + * @grid_cell_size: Size of grid cells in samples (16, 32, 64, 128 or 256). + * @grid_width: Width of lens shading tables in grid cells. + * @grid_stride: Row to row distance (in grid cells) between grid cells + * in the same horizontal location. + * @grid_height: Height of lens shading tables in grid cells. + * @dmabuf: dmabuf file handle containing the table. + * @ref_transform: Reference transform - unsupported, please pass zero. + * @corner_sampled: Whether the gains are sampled at the corner points + * of the grid cells or in the cell centres. + * @gain_format: Format of the gains (see enum &bcm2835_isp_gain_format). + */ +struct bcm2835_isp_lens_shading { + __u32 enabled; + __u32 grid_cell_size; + __u32 grid_width; + __u32 grid_stride; + __u32 grid_height; + __s32 dmabuf; + __u32 ref_transform; + __u32 corner_sampled; + __u32 gain_format; +}; + +/** + * struct bcm2835_isp_black_level - Sensor black level set with the + * V4L2_CID_USER_BCM2835_ISP_BLACK_LEVEL ctrl. + * + * @enabled: Enable black level. + * @black_level_r: Black level for red channel. + * @black_level_g: Black level for green channels. + * @black_level_b: Black level for blue channel. + */ +struct bcm2835_isp_black_level { + __u32 enabled; + __u16 black_level_r; + __u16 black_level_g; + __u16 black_level_b; + __u8 padding[2]; /* Unused */ +}; + +/** + * struct bcm2835_isp_geq - Green equalisation parameters set with the + * V4L2_CID_USER_BCM2835_ISP_GEQ ctrl. + * + * @enabled: Enable green equalisation. + * @offset: Fixed offset of the green equalisation threshold. + * @slope: Slope of the green equalisation threshold. + */ +struct bcm2835_isp_geq { + __u32 enabled; + __u32 offset; + struct bcm2835_isp_rational slope; +}; + +#define BCM2835_NUM_GAMMA_PTS 33 + +/** + * struct bcm2835_isp_gamma - Gamma parameters set with the + * V4L2_CID_USER_BCM2835_ISP_GAMMA ctrl. + * + * @enabled: Enable gamma adjustment. + * @X: X values of the points defining the gamma curve. + * Values should be scaled to 16 bits. + * @Y: Y values of the points defining the gamma curve. + * Values should be scaled to 16 bits. + */ +struct bcm2835_isp_gamma { + __u32 enabled; + __u16 x[BCM2835_NUM_GAMMA_PTS]; + __u16 y[BCM2835_NUM_GAMMA_PTS]; +}; + +/** + * enum bcm2835_isp_cdn_mode - Mode of operation for colour denoise. + * + * @CDN_MODE_FAST: Fast (but lower quality) colour denoise + * algorithm, typically used for video recording. + * @CDN_HIGH_QUALITY: High quality (but slower) colour denoise + * algorithm, typically used for stills capture. + */ +enum bcm2835_isp_cdn_mode { + CDN_MODE_FAST = 0, + CDN_MODE_HIGH_QUALITY = 1, +}; + +/** + * struct bcm2835_isp_cdn - Colour denoise parameters set with the + * V4L2_CID_USER_BCM2835_ISP_CDN ctrl. + * + * @enabled: Enable colour denoise. + * @mode: Colour denoise operating mode (see enum &bcm2835_isp_cdn_mode) + */ +struct bcm2835_isp_cdn { + __u32 enabled; + __u32 mode; +}; + +/** + * struct bcm2835_isp_denoise - Denoise parameters set with the + * V4L2_CID_USER_BCM2835_ISP_DENOISE ctrl. + * + * @enabled: Enable denoise. + * @constant: Fixed offset of the noise threshold. + * @slope: Slope of the noise threshold. + * @strength: Denoise strength between 0.0 (off) and 1.0 (maximum). + */ +struct bcm2835_isp_denoise { + __u32 enabled; + __u32 constant; + struct bcm2835_isp_rational slope; + struct bcm2835_isp_rational strength; +}; + +/** + * struct bcm2835_isp_sharpen - Sharpen parameters set with the + * V4L2_CID_USER_BCM2835_ISP_SHARPEN ctrl. + * + * @enabled: Enable sharpening. + * @threshold: Threshold at which to start sharpening pixels. + * @strength: Strength with which pixel sharpening increases. + * @limit: Limit to the amount of sharpening applied. + */ +struct bcm2835_isp_sharpen { + __u32 enabled; + struct bcm2835_isp_rational threshold; + struct bcm2835_isp_rational strength; + struct bcm2835_isp_rational limit; +}; + +/** + * enum bcm2835_isp_dpc_mode - defective pixel correction (DPC) strength. + * + * @DPC_MODE_OFF: No DPC. + * @DPC_MODE_NORMAL: Normal DPC. + * @DPC_MODE_STRONG: Strong DPC. + */ +enum bcm2835_isp_dpc_mode { + DPC_MODE_OFF = 0, + DPC_MODE_NORMAL = 1, + DPC_MODE_STRONG = 2, +}; + +/** + * struct bcm2835_isp_dpc - Defective pixel correction (DPC) parameters set + * with the V4L2_CID_USER_BCM2835_ISP_DPC ctrl. + * + * @enabled: Enable DPC. + * @strength: DPC strength (see enum &bcm2835_isp_dpc_mode). + */ +struct bcm2835_isp_dpc { + __u32 enabled; + __u32 strength; +}; + +/* + * ISP statistics structures. + * + * The bcm2835_isp_stats structure is generated at the output of the + * statistics node. Note that this does not directly map onto the statistics + * output of the ISP HW. Instead, the MMAL firmware code maps the HW statistics + * to the bcm2835_isp_stats structure. + */ +#define DEFAULT_AWB_REGIONS_X 16 +#define DEFAULT_AWB_REGIONS_Y 12 + +#define NUM_HISTOGRAMS 2 +#define NUM_HISTOGRAM_BINS 128 +#define AWB_REGIONS (DEFAULT_AWB_REGIONS_X * DEFAULT_AWB_REGIONS_Y) +#define FLOATING_REGIONS 16 +#define AGC_REGIONS 16 +#define FOCUS_REGIONS 12 + +/** + * struct bcm2835_isp_stats_hist - Histogram statistics + * + * @r_hist: Red channel histogram. + * @g_hist: Combined green channel histogram. + * @b_hist: Blue channel histogram. + */ +struct bcm2835_isp_stats_hist { + __u32 r_hist[NUM_HISTOGRAM_BINS]; + __u32 g_hist[NUM_HISTOGRAM_BINS]; + __u32 b_hist[NUM_HISTOGRAM_BINS]; +}; + +/** + * struct bcm2835_isp_stats_region - Region sums. + * + * @counted: The number of 2x2 bayer tiles accumulated. + * @notcounted: The number of 2x2 bayer tiles not accumulated. + * @r_sum: Total sum of counted pixels in the red channel for a region. + * @g_sum: Total sum of counted pixels in the green channel for a region. + * @b_sum: Total sum of counted pixels in the blue channel for a region. + */ +struct bcm2835_isp_stats_region { + __u32 counted; + __u32 notcounted; + __u64 r_sum; + __u64 g_sum; + __u64 b_sum; +}; + +/** + * struct bcm2835_isp_stats_focus - Focus statistics. + * + * @contrast_val: Focus measure - accumulated output of the focus filter. + * In the first dimension, index [0] counts pixels below a + * preset threshold, and index [1] counts pixels above the + * threshold. In the second dimension, index [0] uses the + * first predefined filter, and index [1] uses the second + * predefined filter. + * @contrast_val_num: The number of counted pixels in the above accumulation. + */ +struct bcm2835_isp_stats_focus { + __u64 contrast_val[2][2]; + __u32 contrast_val_num[2][2]; +}; + +/** + * struct bcm2835_isp_stats - ISP statistics. + * + * @version: Version of the bcm2835_isp_stats structure. + * @size: Size of the bcm2835_isp_stats structure. + * @hist: Histogram statistics for the entire image. + * @awb_stats: Statistics for the regions defined for AWB calculations. + * @floating_stats: Statistics for arbitrarily placed (floating) regions. + * @agc_stats: Statistics for the regions defined for AGC calculations. + * @focus_stats: Focus filter statistics for the focus regions. + */ +struct bcm2835_isp_stats { + __u32 version; + __u32 size; + struct bcm2835_isp_stats_hist hist[NUM_HISTOGRAMS]; + struct bcm2835_isp_stats_region awb_stats[AWB_REGIONS]; + struct bcm2835_isp_stats_region floating_stats[FLOATING_REGIONS]; + struct bcm2835_isp_stats_region agc_stats[AGC_REGIONS]; + struct bcm2835_isp_stats_focus focus_stats[FOCUS_REGIONS]; +}; + +#endif /* __BCM2835_ISP_H_ */ From 7450002cb4d58027c7877f7ecc73dc796a78f2fc Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Tue, 21 Apr 2020 15:06:19 +0100 Subject: [PATCH 031/625] media: uapi: v4l-ctrls: Add CID base for the bcm2835-isp driver We are reserving controls for the new bcm2835-isp driver. Signed-off-by: Naushir Patuck --- .../admin-guide/media/bcm2835-isp.rst | 127 ++++++++++++++++++ .../userspace-api/media/drivers/index.rst | 1 + include/uapi/linux/v4l2-controls.h | 5 + 3 files changed, 133 insertions(+) create mode 100644 Documentation/admin-guide/media/bcm2835-isp.rst diff --git a/Documentation/admin-guide/media/bcm2835-isp.rst b/Documentation/admin-guide/media/bcm2835-isp.rst new file mode 100644 index 00000000000000..e1c19f78435e6b --- /dev/null +++ b/Documentation/admin-guide/media/bcm2835-isp.rst @@ -0,0 +1,127 @@ +.. SPDX-License-Identifier: GPL-2.0 + +BCM2835 ISP Driver +================== + +Introduction +------------ + +The BCM2835 Image Sensor Pipeline (ISP) is a fixed function hardware pipeline +for performing image processing operations. Images are fed to the input +of the ISP through memory frame buffers. These images may be in various YUV, +RGB, or Bayer formats. A typical use case would have Bayer images obtained from +an image sensor by the BCM2835 Unicam peripheral, written to a memory +frame buffer, and finally fed into the input of the ISP. Two concurrent output +images may be generated in YUV or RGB format at different resolutions. +Statistics output is also generated for Bayer input images. + +The bcm2835-isp driver exposes the following media pads as V4L2 device nodes: + +.. tabularcolumns:: |l|l|l|l| + +.. cssclass: longtable + +.. flat-table:: + + * - *Pad* + - *Direction* + - *Purpose* + - *Formats* + + * - "bcm2835-isp0-output0" + - sink + - Accepts Bayer, RGB or YUV format frame buffers as input to the ISP HW + pipeline. + - :ref:`RAW8 `, + :ref:`RAW10P `, + :ref:`RAW12P `, + :ref:`RAW14P `, + :ref:`RAW16 `, + :ref:`RGB24/BGR24 `, + :ref:`YUYV `, + :ref:`YVYU `, + :ref:`UYVY `, + :ref:`VYUY `, + :ref:`YUV420/YVU420 ` + + * - "bcm2835-isp0-capture1" + - source + - High resolution YUV or RGB processed output from the ISP. + - :ref:`RGB565 `, + :ref:`RGB24/BGR24 `, + :ref:`ABGR32 `, + :ref:`YUYV `, + :ref:`YVYU `, + :ref:`UYVY `, + :ref:`VYUY `. + :ref:`YUV420/YVU420 `, + :ref:`NV12/NV21 `, + + * - "bcm2835-isp0-capture2" + - source + - Low resolution YUV processed output from the ISP. The output of + this pad cannot have a resolution larger than the "bcm2835-isp0-capture1" pad in any dimension. + - :ref:`YUYV `, + :ref:`YVYU `, + :ref:`UYVY `, + :ref:`VYUY `. + :ref:`YUV420/YVU420 `, + :ref:`NV12/NV21 `, + + * - "bcm2835-isp0-capture1" + - source + - Image statistics calculated from the input image provided on the + "bcm2835-isp0-output0" pad. Statistics are only available for Bayer + format input images. + - :ref:`v4l2-meta-fmt-bcm2835-isp-stats`. + +Pipeline Configuration +---------------------- + +The ISP pipeline can be configure through user-space by calling +:ref:`VIDIOC_S_EXT_CTRLS ` on the “bcm2835-isp0-output0” +node with the appropriate parameters as shown in the table below. + +.. tabularcolumns:: |p{2cm}|p{5.0cm}| + +.. cssclass: longtable + +.. flat-table:: + + * - *id* + - *Parameter* + + * - ``V4L2_CID_USER_BCM2835_ISP_CC_MATRIX`` + - struct :c:type:`bcm2835_isp_custom_ccm` + + * - ``V4L2_CID_USER_BCM2835_ISP_LENS_SHADING`` + - struct :c:type:`bcm2835_isp_lens_shading` + + * - ``V4L2_CID_USER_BCM2835_ISP_BLACK_LEVEL`` + - struct :c:type:`bcm2835_isp_black_level` + + * - ``V4L2_CID_USER_BCM2835_ISP_GEQ`` + - struct :c:type:`bcm2835_isp_geq` + + * - ``V4L2_CID_USER_BCM2835_ISP_GAMMA`` + - struct :c:type:`bcm2835_isp_gamma` + + * - ``V4L2_CID_USER_BCM2835_ISP_DENOISE`` + - struct :c:type:`bcm2835_isp_denoise` + + * - ``V4L2_CID_USER_BCM2835_ISP_SHARPEN`` + - struct :c:type:`bcm2835_isp_sharpen` + + * - ``V4L2_CID_USER_BCM2835_ISP_DPC`` + - struct :c:type:`bcm2835_isp_dpc` + +++++++++++++++++++++++++ +Configuration Parameters +++++++++++++++++++++++++ + +.. kernel-doc:: include/uapi/linux/bcm2835-isp.h + :functions: bcm2835_isp_rational bcm2835_isp_ccm bcm2835_isp_custom_ccm + bcm2835_isp_gain_format bcm2835_isp_lens_shading + bcm2835_isp_black_level bcm2835_isp_geq bcm2835_isp_gamma + bcm2835_isp_denoise bcm2835_isp_sharpen + bcm2835_isp_dpc_mode bcm2835_isp_dpc diff --git a/Documentation/userspace-api/media/drivers/index.rst b/Documentation/userspace-api/media/drivers/index.rst index 02967c9b18d6e9..c4166be86ae9ff 100644 --- a/Documentation/userspace-api/media/drivers/index.rst +++ b/Documentation/userspace-api/media/drivers/index.rst @@ -27,6 +27,7 @@ For more details see the file COPYING in the source distribution of Linux. :numbered: aspeed-video + bcm2835-isp camera-sensor ccs cx2341x-uapi diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index 68dd0c4e47b2d7..37ff3350633a81 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -234,6 +234,11 @@ enum v4l2_colorfx { */ #define V4L2_CID_USER_MALI_C55_BASE (V4L2_CID_USER_BASE + 0x1230) +/* The base for the bcm2835-isp driver controls. + * We reserve 16 controls for this driver. */ +/* FIXME: Use 0x1230 instead */ +#define V4L2_CID_USER_BCM2835_ISP_BASE (V4L2_CID_USER_BASE + 0x10f0) + /* MPEG-class control IDs */ /* The MPEG controls are applicable to all codec controls * and the 'MPEG' part of the define is historical */ From 8b87f2bf3898d7a81a720c7c74201806867f2ef9 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 4 Jan 2022 13:56:42 +0000 Subject: [PATCH 032/625] uapi/v4l2-controls: Reset V4L2_CID_USER_BCM2835_ISP_BASE to same as 5.10 https://github.com/raspberrypi/linux/issues/4440 Upstream has added additional device specific controls, so the V4L2_CID_USER_BASE + 0x10e0 value that had been defined for use with the ISP has been taken by something else (and +0x10f0 has been used as well) Duplicate the use on V4L2_CID_USER_BASE + 0x10e0 so that userspace (libcamera) doesn't need to change. Once the driver is upstream, then we'll update libcamera to adopt the new value as it then won't change. Signed-off-by: Dave Stevenson --- include/uapi/linux/v4l2-controls.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index 37ff3350633a81..5ff7d4cbfd3553 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -237,7 +237,7 @@ enum v4l2_colorfx { /* The base for the bcm2835-isp driver controls. * We reserve 16 controls for this driver. */ /* FIXME: Use 0x1230 instead */ -#define V4L2_CID_USER_BCM2835_ISP_BASE (V4L2_CID_USER_BASE + 0x10f0) +#define V4L2_CID_USER_BCM2835_ISP_BASE (V4L2_CID_USER_BASE + 0x10e0) /* MPEG-class control IDs */ /* The MPEG controls are applicable to all codec controls From 0d2755a6d54488b5dbe972c004ecd0cac155b53e Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Wed, 1 Apr 2020 08:46:29 +0100 Subject: [PATCH 033/625] media: uapi: v4l2-core: Add sensor ancillary data V4L2 foucc type. Add V4L2_META_FMT_SENSOR_DATA format 4CC. This new format will be used by the BCM2835 Unicam device to return out camera sensor embedded data. Signed-off-by: Naushir Patuck --- .../userspace-api/media/v4l/meta-formats.rst | 1 + .../media/v4l/pixfmt-meta-sensor-data.rst | 32 +++++++++++++++++++ drivers/media/v4l2-core/v4l2-ioctl.c | 1 + include/uapi/linux/videodev2.h | 1 + 4 files changed, 35 insertions(+) create mode 100644 Documentation/userspace-api/media/v4l/pixfmt-meta-sensor-data.rst diff --git a/Documentation/userspace-api/media/v4l/meta-formats.rst b/Documentation/userspace-api/media/v4l/meta-formats.rst index 3e0cab153f0ac5..5486d2c51c9bac 100644 --- a/Documentation/userspace-api/media/v4l/meta-formats.rst +++ b/Documentation/userspace-api/media/v4l/meta-formats.rst @@ -21,6 +21,7 @@ These formats are used for the :ref:`metadata` interface only. metafmt-pisp-be metafmt-pisp-fe metafmt-rkisp1 + metafmt-sensor-data metafmt-uvc metafmt-uvc-msxu-1-5 metafmt-vivid diff --git a/Documentation/userspace-api/media/v4l/pixfmt-meta-sensor-data.rst b/Documentation/userspace-api/media/v4l/pixfmt-meta-sensor-data.rst new file mode 100644 index 00000000000000..4a67e204d08a30 --- /dev/null +++ b/Documentation/userspace-api/media/v4l/pixfmt-meta-sensor-data.rst @@ -0,0 +1,32 @@ +.. Permission is granted to copy, distribute and/or modify this +.. document under the terms of the GNU Free Documentation License, +.. Version 1.1 or any later version published by the Free Software +.. Foundation, with no Invariant Sections, no Front-Cover Texts +.. and no Back-Cover Texts. A copy of the license is included at +.. Documentation/media/uapi/fdl-appendix.rst. +.. +.. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections + +.. _v4l2-meta-fmt-sensor-data: + +*********************************** +V4L2_META_FMT_SENSOR_DATA ('SENS') +*********************************** + +Sensor Ancillary Metadata + +Description +=========== + +This format describes ancillary data generated by a camera sensor and +transmitted over a stream on the camera bus. Sensor vendors generally have their +own custom format for this ancillary data. Some vendors follow a generic +CSI-2/SMIA embedded data format as described in the `CSI-2 specification. +`_ + +The size of the embedded buffer is defined as a single line with a pixel width +width specified in bytes. This is obtained by a call to the +:c:type:`VIDIOC_SUBDEV_G_FMT` ioctl on the sensor subdevice where the ``pad`` +field in :c:type:`v4l2_subdev_format` is set to 1. Note that this size is fixed +and cannot be modified with a call to :c:type:`VIDIOC_SUBDEV_S_FMT`. + diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index a2b650f4ec3c32..d9a3afa99d00cf 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1488,6 +1488,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_META_FMT_GENERIC_CSI2_16: descr = "8-bit Generic Meta, 16b CSI-2"; break; case V4L2_META_FMT_GENERIC_CSI2_20: descr = "8-bit Generic Meta, 20b CSI-2"; break; case V4L2_META_FMT_GENERIC_CSI2_24: descr = "8-bit Generic Meta, 24b CSI-2"; break; + case V4L2_META_FMT_SENSOR_DATA: descr = "Sensor Ancillary Metadata"; break; default: /* Compressed formats */ diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index eda4492e40dc14..c436988591cdef 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -870,6 +870,7 @@ struct v4l2_pix_format { #define V4L2_META_FMT_D4XX v4l2_fourcc('D', '4', 'X', 'X') /* D4XX Payload Header metadata */ #define V4L2_META_FMT_UVC_MSXU_1_5 v4l2_fourcc('U', 'V', 'C', 'M') /* UVC MSXU metadata */ #define V4L2_META_FMT_VIVID v4l2_fourcc('V', 'I', 'V', 'D') /* Vivid Metadata */ +#define V4L2_META_FMT_SENSOR_DATA v4l2_fourcc('S', 'E', 'N', 'S') /* Sensor Ancillary metadata */ /* Vendor specific - used for RK_ISP1 camera sub-system */ #define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /* Rockchip ISP1 3A Parameters */ From 3c9f946b1cfb7b2c70a855cc9f6c40d9291c59c6 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Thu, 23 Apr 2020 10:20:26 +0100 Subject: [PATCH 034/625] media: uapi: v4l2-core: Add ISP statistics output V4L2 fourcc type Add V4L2_META_FMT_BCM2835_ISP_STATS V4L2 format type. This new format will be used by the BCM2835 ISP device to return out ISP statistics for 3A. Signed-off-by: Naushir Patuck --- .../userspace-api/media/v4l/meta-formats.rst | 1 + .../v4l/pixfmt-meta-bcm2835-isp-stats.rst | 41 +++++++++++++++++++ drivers/media/v4l2-core/v4l2-ioctl.c | 1 + include/uapi/linux/videodev2.h | 1 + 4 files changed, 44 insertions(+) create mode 100644 Documentation/userspace-api/media/v4l/pixfmt-meta-bcm2835-isp-stats.rst diff --git a/Documentation/userspace-api/media/v4l/meta-formats.rst b/Documentation/userspace-api/media/v4l/meta-formats.rst index 5486d2c51c9bac..252b4f92b32419 100644 --- a/Documentation/userspace-api/media/v4l/meta-formats.rst +++ b/Documentation/userspace-api/media/v4l/meta-formats.rst @@ -14,6 +14,7 @@ These formats are used for the :ref:`metadata` interface only. :maxdepth: 1 metafmt-arm-mali-c55 + metafmt-bcm2835-isp-stats metafmt-c3-isp metafmt-d4xx metafmt-generic diff --git a/Documentation/userspace-api/media/v4l/pixfmt-meta-bcm2835-isp-stats.rst b/Documentation/userspace-api/media/v4l/pixfmt-meta-bcm2835-isp-stats.rst new file mode 100644 index 00000000000000..f974774c825277 --- /dev/null +++ b/Documentation/userspace-api/media/v4l/pixfmt-meta-bcm2835-isp-stats.rst @@ -0,0 +1,41 @@ +.. Permission is granted to copy, distribute and/or modify this +.. document under the terms of the GNU Free Documentation License, +.. Version 1.1 or any later version published by the Free Software +.. Foundation, with no Invariant Sections, no Front-Cover Texts +.. and no Back-Cover Texts. A copy of the license is included at +.. Documentation/media/uapi/fdl-appendix.rst. +.. +.. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections + +.. _v4l2-meta-fmt-bcm2835-isp-stats: + +***************************************** +V4L2_META_FMT_BCM2835_ISP_STATS ('BSTA') +***************************************** + +BCM2835 ISP Statistics + +Description +=========== + +The BCM2835 ISP hardware calculate image statistics for an input Bayer frame. +These statistics are obtained from the "bcm2835-isp0-capture3" device node +using the :c:type:`v4l2_meta_format` interface. They are formatted as described +by the :c:type:`bcm2835_isp_stats` structure below. + +.. code-block:: c + + #define DEFAULT_AWB_REGIONS_X 16 + #define DEFAULT_AWB_REGIONS_Y 12 + + #define NUM_HISTOGRAMS 2 + #define NUM_HISTOGRAM_BINS 128 + #define AWB_REGIONS (DEFAULT_AWB_REGIONS_X * DEFAULT_AWB_REGIONS_Y) + #define FLOATING_REGIONS 16 + #define AGC_REGIONS 16 + #define FOCUS_REGIONS 12 + +.. kernel-doc:: include/uapi/linux/bcm2835-isp.h + :functions: bcm2835_isp_stats_hist bcm2835_isp_stats_region + bcm2835_isp_stats_focus bcm2835_isp_stats + diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index d9a3afa99d00cf..ed2ee1756f36d6 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1489,6 +1489,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_META_FMT_GENERIC_CSI2_20: descr = "8-bit Generic Meta, 20b CSI-2"; break; case V4L2_META_FMT_GENERIC_CSI2_24: descr = "8-bit Generic Meta, 24b CSI-2"; break; case V4L2_META_FMT_SENSOR_DATA: descr = "Sensor Ancillary Metadata"; break; + case V4L2_META_FMT_BCM2835_ISP_STATS: descr = "BCM2835 ISP Image Statistics"; break; default: /* Compressed formats */ diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index c436988591cdef..d78f6aa190358c 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -871,6 +871,7 @@ struct v4l2_pix_format { #define V4L2_META_FMT_UVC_MSXU_1_5 v4l2_fourcc('U', 'V', 'C', 'M') /* UVC MSXU metadata */ #define V4L2_META_FMT_VIVID v4l2_fourcc('V', 'I', 'V', 'D') /* Vivid Metadata */ #define V4L2_META_FMT_SENSOR_DATA v4l2_fourcc('S', 'E', 'N', 'S') /* Sensor Ancillary metadata */ +#define V4L2_META_FMT_BCM2835_ISP_STATS v4l2_fourcc('B', 'S', 'T', 'A') /* BCM2835 ISP image statistics output */ /* Vendor specific - used for RK_ISP1 camera sub-system */ #define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /* Rockchip ISP1 3A Parameters */ From eee531374c6dfa5637fc96f0ebb4cf21a7c7019f Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 29 Oct 2018 17:57:45 +0000 Subject: [PATCH 035/625] media: videobuf2: Allow exporting of a struct dmabuf videobuf2 only allowed exporting a dmabuf as a file descriptor, but there are instances where having the struct dma_buf is useful within the kernel. Split the current implementation into two, one step which exports a struct dma_buf, and the second which converts that into an fd. Signed-off-by: Dave Stevenson --- .../media/common/videobuf2/videobuf2-core.c | 21 ++++++++++++++++--- include/media/videobuf2-core.h | 15 +++++++++++++ 2 files changed, 33 insertions(+), 3 deletions(-) diff --git a/drivers/media/common/videobuf2/videobuf2-core.c b/drivers/media/common/videobuf2/videobuf2-core.c index adf668b213c2e8..723b92f93b9bb1 100644 --- a/drivers/media/common/videobuf2/videobuf2-core.c +++ b/drivers/media/common/videobuf2/videobuf2-core.c @@ -2419,11 +2419,11 @@ static int __find_plane_by_offset(struct vb2_queue *q, unsigned long offset, return 0; } -int vb2_core_expbuf(struct vb2_queue *q, int *fd, unsigned int type, - struct vb2_buffer *vb, unsigned int plane, unsigned int flags) +int vb2_core_expbuf_dmabuf(struct vb2_queue *q, unsigned int type, + struct vb2_buffer *vb, unsigned int plane, + unsigned int flags, struct dma_buf **dmabuf) { struct vb2_plane *vb_plane; - int ret; struct dma_buf *dbuf; if (q->memory != VB2_MEMORY_MMAP) { @@ -2468,6 +2468,21 @@ int vb2_core_expbuf(struct vb2_queue *q, int *fd, unsigned int type, return -EINVAL; } + *dmabuf = dbuf; + return 0; +} +EXPORT_SYMBOL_GPL(vb2_core_expbuf_dmabuf); + +int vb2_core_expbuf(struct vb2_queue *q, int *fd, unsigned int type, + struct vb2_buffer *vb, unsigned int plane, unsigned int flags) +{ + struct dma_buf *dbuf; + int ret; + + ret = vb2_core_expbuf_dmabuf(q, type, vb, plane, flags, &dbuf); + if (ret) + return ret; + ret = dma_buf_fd(dbuf, flags & ~O_ACCMODE); if (ret < 0) { dprintk(q, 3, "buffer %d, plane %d failed to export (%d)\n", diff --git a/include/media/videobuf2-core.h b/include/media/videobuf2-core.h index 4424d481d7f746..db25c24abc962b 100644 --- a/include/media/videobuf2-core.h +++ b/include/media/videobuf2-core.h @@ -954,6 +954,21 @@ int vb2_core_streamon(struct vb2_queue *q, unsigned int type); */ int vb2_core_streamoff(struct vb2_queue *q, unsigned int type); +/** + * vb2_core_expbuf_dmabuf() - Export a buffer as a dma_buf structure + * @q: videobuf2 queue + * @type: buffer type + * @index: id number of the buffer + * @plane: index of the plane to be exported, 0 for single plane queues + * @flags: flags for newly created file, currently only O_CLOEXEC is + * supported, refer to manual of open syscall for more details + * @dmabuf: Returns the dmabuf pointer + * + */ +int vb2_core_expbuf_dmabuf(struct vb2_queue *q, unsigned int type, + struct vb2_buffer *vb, unsigned int plane, + unsigned int flags, struct dma_buf **dmabuf); + /** * vb2_core_expbuf() - Export a buffer as a file descriptor. * @q: pointer to &struct vb2_queue with videobuf2 queue. From 4e5f4308293e5abb6d0e88908afaf8848caaf811 Mon Sep 17 00:00:00 2001 From: Umang Jain Date: Thu, 9 Nov 2023 16:03:01 -0500 Subject: [PATCH 036/625] staging: vc04_services: Add helpers for vchiq driver data Add helpers to set and get vchiq driver data. vchiq_set_drvdata() and vchiq_get_drvdata() wraps dev_set_drvdata() and dev_get_drvdata() respectively. Signed-off-by: Umang Jain Signed-off-by: Kieran Bingham --- include/linux/raspberrypi/vchiq_bus.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/include/linux/raspberrypi/vchiq_bus.h b/include/linux/raspberrypi/vchiq_bus.h index 9de179b39f85e5..6eff6b0bf59956 100644 --- a/include/linux/raspberrypi/vchiq_bus.h +++ b/include/linux/raspberrypi/vchiq_bus.h @@ -37,6 +37,16 @@ static inline struct vchiq_driver *to_vchiq_driver(struct device_driver *d) return container_of(d, struct vchiq_driver, driver); } +static inline void *vchiq_get_drvdata(const struct vchiq_device *device) +{ + return dev_get_drvdata(&device->dev); +} + +static inline void vchiq_set_drvdata(struct vchiq_device *device, void *data) +{ + dev_set_drvdata(&device->dev, data); +} + extern const struct bus_type vchiq_bus_type; struct vchiq_device * From d6a5a9d7f0718a59133b86fbe2787671fddc9a41 Mon Sep 17 00:00:00 2001 From: Naushir Patuck Date: Wed, 22 Apr 2020 08:32:32 +0100 Subject: [PATCH 037/625] platform/raspberrypi: vchiq: Load bcm2835_isp driver from vchiq bcmn2835_isp is a platform driver dependent on vchiq, therefore add the load/unload functions for it to vchiq. Signed-off-by: Naushir Patuck --- drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c b/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c index 6affe6d37ace14..6c2e5c5f919698 100644 --- a/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c +++ b/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c @@ -63,6 +63,7 @@ * the interface. */ static struct vchiq_device *bcm2835_audio; +static struct vchiq_device *bcm2835_isp; static struct vchiq_device *vcsm_cma; static const struct vchiq_platform_info bcm2835_info = { @@ -1423,6 +1424,7 @@ static int vchiq_probe(struct platform_device *pdev) vcsm_cma = vchiq_device_register(&pdev->dev, "vcsm-cma"); bcm2835_audio = vchiq_device_register(&pdev->dev, "bcm2835-audio"); + bcm2835_isp = vchiq_device_register(&pdev->dev, "bcm2835-isp"); return 0; } @@ -1431,6 +1433,7 @@ static void vchiq_remove(struct platform_device *pdev) { struct vchiq_drv_mgmt *mgmt = dev_get_drvdata(&pdev->dev); + vchiq_device_unregister(bcm2835_isp); vchiq_device_unregister(bcm2835_audio); vchiq_device_unregister(vcsm_cma); vchiq_debugfs_deinit(); From e8409df0df6fd9b32d26f2d7cc5756dd0ee4c5f7 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 21 Oct 2025 13:55:12 +0530 Subject: [PATCH 038/625] staging: vchiq_arm: Set up dma ranges on child devices The VCHIQ driver now loads the audio, camera, codec, and vc-sm drivers as platform drivers. However they were not being given the correct DMA configuration. Call of_dma_configure with the parent (VCHIQ) parameters to be inherited by the child. Signed-off-by: Dave Stevenson staging: vchiq: Use the old dma controller for OF config on platform devices vchiq on Pi4 is no longer under the soc node, therefore it doesn't get the dma-ranges for the VPU. Switch to using the configuration of the old dma controller as that will set the dma-ranges correctly. Signed-off-by: Dave Stevenson staging: vchiq_arm: Give vchiq children DT nodes vchiq kernel clients are now instantiated as platform drivers rather than using DT, but the children of the vchiq interface may still benefit from access to DT properties. Give them the option of a a sub-node of the vchiq parent for configuration and to allow them to be disabled. Signed-off-by: Phil Elwell staging: vchiq_arm: Add 36-bit address support Conditional on a new compatible string, change the pagelist encoding such that the top 24 bits are the pfn, leaving 8 bits for run length (-1), giving a 36-bit address range. Manage the split between addresses for the VPU and addresses for the 40-bit DMA controller with a dedicated DMA device pointer that on non- BCM2711 platforms is the same as the main VCHIQ device. This allows the VCHIQ node to stay in the usual place in the DT. Signed-off-by: Phil Elwell staging: vchiq_arm: children inherit DMA config Although it is no longer necessary for vchiq's children to have a different DMA configuration to the parent, they do still need to explicitly to have their DMA configuration set - to be that of the parent. Signed-off-by: Phil Elwell --- .../raspberrypi/vchiq-interface/vchiq_arm.c | 357 ++++++++++++++++++ .../raspberrypi/vchiq-interface/vchiq_core.c | 4 - include/linux/raspberrypi/vchiq_arm.h | 1 + include/linux/raspberrypi/vchiq_core.h | 4 + 4 files changed, 362 insertions(+), 4 deletions(-) diff --git a/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c b/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c index 6c2e5c5f919698..0452fa4fdf0166 100644 --- a/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c +++ b/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -74,6 +75,11 @@ static const struct vchiq_platform_info bcm2836_info = { .cache_line_size = 64, }; +static const struct vchiq_platform_info bcm2711_info = { + .cache_line_size = 64, + .use_36bit_addrs = true, +}; + struct vchiq_arm_state { /* * Keepalive-related data @@ -139,6 +145,35 @@ vchiq_doorbell_irq(int irq, void *dev_id) return ret; } +static void +cleanup_pagelistinfo(struct vchiq_instance *instance, struct vchiq_pagelist_info *pagelistinfo) +{ + if (pagelistinfo->scatterlist_mapped) { + dma_unmap_sg(g_dma_dev, pagelistinfo->scatterlist, + pagelistinfo->num_pages, pagelistinfo->dma_dir); + } + + if (pagelistinfo->pages_need_release) + unpin_user_pages(pagelistinfo->pages, pagelistinfo->num_pages); + + dma_free_coherent(instance->state->dev, pagelistinfo->pagelist_buffer_size, + pagelistinfo->pagelist, pagelistinfo->dma_addr); +} + +static inline bool +is_adjacent_block(u32 *addrs, dma_addr_t addr, unsigned int k) +{ + u32 tmp; + + if (!k) + return false; + + tmp = (addrs[k - 1] & PAGE_MASK) + + (((addrs[k - 1] & ~PAGE_MASK) + 1) << PAGE_SHIFT); + + return tmp == (addr & PAGE_MASK); +} + /* * This function is called by the vchiq stack once it has been connected to * the videocore and clients can start to use the stack. @@ -189,9 +224,310 @@ void vchiq_add_connected_callback(struct vchiq_device *device, void (*callback)( } EXPORT_SYMBOL(vchiq_add_connected_callback); +/* There is a potential problem with partial cache lines (pages?) + * at the ends of the block when reading. If the CPU accessed anything in + * the same line (page?) then it may have pulled old data into the cache, + * obscuring the new data underneath. We can solve this by transferring the + * partial cache lines separately, and allowing the ARM to copy into the + * cached area. + */ + +static struct vchiq_pagelist_info * +create_pagelist(struct vchiq_instance *instance, char *buf, char __user *ubuf, + size_t count, unsigned short type) +{ + struct vchiq_drv_mgmt *drv_mgmt; + struct pagelist *pagelist; + struct vchiq_pagelist_info *pagelistinfo; + struct page **pages; + u32 *addrs; + unsigned int num_pages, offset, i, k; + int actual_pages; + size_t pagelist_size; + struct scatterlist *scatterlist, *sg; + int dma_buffers; + dma_addr_t dma_addr; + + if (count >= INT_MAX - PAGE_SIZE) + return NULL; + + drv_mgmt = dev_get_drvdata(instance->state->dev); + + if (buf) + offset = (uintptr_t)buf & (PAGE_SIZE - 1); + else + offset = (uintptr_t)ubuf & (PAGE_SIZE - 1); + num_pages = DIV_ROUND_UP(count + offset, PAGE_SIZE); + + if ((size_t)num_pages > (SIZE_MAX - sizeof(struct pagelist) - + sizeof(struct vchiq_pagelist_info)) / + (sizeof(u32) + sizeof(pages[0]) + + sizeof(struct scatterlist))) + return NULL; + + pagelist_size = sizeof(struct pagelist) + + (num_pages * sizeof(u32)) + + (num_pages * sizeof(pages[0]) + + (num_pages * sizeof(struct scatterlist))) + + sizeof(struct vchiq_pagelist_info); + + /* Allocate enough storage to hold the page pointers and the page + * list + */ + pagelist = dma_alloc_coherent(instance->state->dev, pagelist_size, &dma_addr, + GFP_KERNEL); + + dev_dbg(instance->state->dev, "arm: %pK\n", pagelist); + + if (!pagelist) + return NULL; + + addrs = pagelist->addrs; + pages = (struct page **)(addrs + num_pages); + scatterlist = (struct scatterlist *)(pages + num_pages); + pagelistinfo = (struct vchiq_pagelist_info *) + (scatterlist + num_pages); + + pagelist->length = count; + pagelist->type = type; + pagelist->offset = offset; + + /* Populate the fields of the pagelistinfo structure */ + pagelistinfo->pagelist = pagelist; + pagelistinfo->pagelist_buffer_size = pagelist_size; + pagelistinfo->dma_addr = dma_addr; + pagelistinfo->dma_dir = (type == PAGELIST_WRITE) ? + DMA_TO_DEVICE : DMA_FROM_DEVICE; + pagelistinfo->num_pages = num_pages; + pagelistinfo->pages_need_release = 0; + pagelistinfo->pages = pages; + pagelistinfo->scatterlist = scatterlist; + pagelistinfo->scatterlist_mapped = 0; + + if (buf) { + unsigned long length = count; + unsigned int off = offset; + + for (actual_pages = 0; actual_pages < num_pages; + actual_pages++) { + struct page *pg = + vmalloc_to_page((buf + + (actual_pages * PAGE_SIZE))); + size_t bytes = PAGE_SIZE - off; + + if (!pg) { + cleanup_pagelistinfo(instance, pagelistinfo); + return NULL; + } + + if (bytes > length) + bytes = length; + pages[actual_pages] = pg; + length -= bytes; + off = 0; + } + /* do not try and release vmalloc pages */ + } else { + actual_pages = pin_user_pages_fast((unsigned long)ubuf & PAGE_MASK, num_pages, + type == PAGELIST_READ, pages); + + if (actual_pages != num_pages) { + dev_dbg(instance->state->dev, "arm: Only %d/%d pages locked\n", + actual_pages, num_pages); + + /* This is probably due to the process being killed */ + if (actual_pages > 0) + unpin_user_pages(pages, actual_pages); + cleanup_pagelistinfo(instance, pagelistinfo); + return NULL; + } + /* release user pages */ + pagelistinfo->pages_need_release = 1; + } + + /* + * Initialize the scatterlist so that the magic cookie + * is filled if debugging is enabled + */ + sg_init_table(scatterlist, num_pages); + /* Now set the pages for each scatterlist */ + for (i = 0; i < num_pages; i++) { + unsigned int len = PAGE_SIZE - offset; + + if (len > count) + len = count; + sg_set_page(scatterlist + i, pages[i], len, offset); + offset = 0; + count -= len; + } + + dma_buffers = dma_map_sg(g_dma_dev, + scatterlist, + num_pages, + pagelistinfo->dma_dir); + + if (dma_buffers == 0) { + cleanup_pagelistinfo(instance, pagelistinfo); + return NULL; + } + + pagelistinfo->scatterlist_mapped = 1; + + /* Combine adjacent blocks for performance */ + k = 0; + if (g_use_36bit_addrs) { + for_each_sg(scatterlist, sg, dma_buffers, i) { + unsigned int len = sg_dma_len(sg); + dma_addr_t addr = sg_dma_address(sg); + u32 page_id = (u32)((addr >> 4) & ~0xff); + u32 sg_pages = (len + PAGE_SIZE - 1) >> PAGE_SHIFT; + + /* Note: addrs is the address + page_count - 1 + * The firmware expects blocks after the first to be page- + * aligned and a multiple of the page size + */ + WARN_ON(len == 0); + WARN_ON(i && + (i != (dma_buffers - 1)) && (len & ~PAGE_MASK)); + WARN_ON(i && (addr & ~PAGE_MASK)); + WARN_ON(upper_32_bits(addr) > 0xf); + + if (k > 0 && + ((addrs[k - 1] & ~0xff) + + (((addrs[k - 1] & 0xff) + 1) << 8) + == page_id)) { + u32 inc_pages = min(sg_pages, + 0xff - (addrs[k - 1] & 0xff)); + addrs[k - 1] += inc_pages; + page_id += inc_pages << 8; + sg_pages -= inc_pages; + } + while (sg_pages) { + u32 inc_pages = min(sg_pages, 0x100u); + addrs[k++] = page_id | (inc_pages - 1); + page_id += inc_pages << 8; + sg_pages -= inc_pages; + } + } + } else { + for_each_sg(scatterlist, sg, dma_buffers, i) { + unsigned int len = sg_dma_len(sg); + dma_addr_t addr = sg_dma_address(sg); + + /* Note: addrs is the address + page_count - 1 + * The firmware expects blocks after the first to be page- + * aligned and a multiple of the page size + */ + WARN_ON(len == 0); + WARN_ON(i && (i != (dma_buffers - 1)) && (len & ~PAGE_MASK)); + WARN_ON(i && (addr & ~PAGE_MASK)); + if (is_adjacent_block(addrs, addr, k)) + addrs[k - 1] += ((len + PAGE_SIZE - 1) >> PAGE_SHIFT); + else + addrs[k++] = (addr & PAGE_MASK) | + (((len + PAGE_SIZE - 1) >> PAGE_SHIFT) - 1); + } + } + + /* Partial cache lines (fragments) require special measures */ + if ((type == PAGELIST_READ) && + ((pagelist->offset & (drv_mgmt->info->cache_line_size - 1)) || + ((pagelist->offset + pagelist->length) & + (drv_mgmt->info->cache_line_size - 1)))) { + char *fragments; + + if (down_interruptible(&drv_mgmt->free_fragments_sema)) { + cleanup_pagelistinfo(instance, pagelistinfo); + return NULL; + } + + WARN_ON(!drv_mgmt->free_fragments); + + down(&drv_mgmt->free_fragments_mutex); + fragments = drv_mgmt->free_fragments; + WARN_ON(!fragments); + drv_mgmt->free_fragments = *(char **)drv_mgmt->free_fragments; + up(&drv_mgmt->free_fragments_mutex); + pagelist->type = PAGELIST_READ_WITH_FRAGMENTS + + (fragments - drv_mgmt->fragments_base) / drv_mgmt->fragments_size; + } + + return pagelistinfo; +} + +static void +free_pagelist(struct vchiq_instance *instance, struct vchiq_pagelist_info *pagelistinfo, + int actual) +{ + struct vchiq_drv_mgmt *drv_mgmt; + struct pagelist *pagelist = pagelistinfo->pagelist; + struct page **pages = pagelistinfo->pages; + unsigned int num_pages = pagelistinfo->num_pages; + + dev_dbg(instance->state->dev, "arm: %pK, %d\n", pagelistinfo->pagelist, actual); + + drv_mgmt = dev_get_drvdata(instance->state->dev); + + /* + * NOTE: dma_unmap_sg must be called before the + * cpu can touch any of the data/pages. + */ + dma_unmap_sg(g_dma_dev, pagelistinfo->scatterlist, + pagelistinfo->num_pages, pagelistinfo->dma_dir); + pagelistinfo->scatterlist_mapped = 0; + + /* Deal with any partial cache lines (fragments) */ + if (pagelist->type >= PAGELIST_READ_WITH_FRAGMENTS && drv_mgmt->fragments_base) { + char *fragments = drv_mgmt->fragments_base + + (pagelist->type - PAGELIST_READ_WITH_FRAGMENTS) * + drv_mgmt->fragments_size; + int head_bytes, tail_bytes; + + head_bytes = (drv_mgmt->info->cache_line_size - pagelist->offset) & + (drv_mgmt->info->cache_line_size - 1); + tail_bytes = (pagelist->offset + actual) & + (drv_mgmt->info->cache_line_size - 1); + + if ((actual >= 0) && (head_bytes != 0)) { + if (head_bytes > actual) + head_bytes = actual; + + memcpy_to_page(pages[0], + pagelist->offset, + fragments, + head_bytes); + } + if ((actual >= 0) && (head_bytes < actual) && + (tail_bytes != 0)) + memcpy_to_page(pages[num_pages - 1], + (pagelist->offset + actual) & + (PAGE_SIZE - 1) & ~(drv_mgmt->info->cache_line_size - 1), + fragments + drv_mgmt->info->cache_line_size, + tail_bytes); + + down(&drv_mgmt->free_fragments_mutex); + *(char **)fragments = drv_mgmt->free_fragments; + drv_mgmt->free_fragments = fragments; + up(&drv_mgmt->free_fragments_mutex); + up(&drv_mgmt->free_fragments_sema); + } + + /* Need to mark all the pages dirty. */ + if (pagelist->type != PAGELIST_WRITE && + pagelistinfo->pages_need_release) { + unsigned int i; + + for (i = 0; i < num_pages; i++) + set_page_dirty(pages[i]); + } + + cleanup_pagelistinfo(instance, pagelistinfo); +} + static int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state *state) { struct device *dev = &pdev->dev; + struct device *dma_dev = NULL; struct vchiq_drv_mgmt *drv_mgmt = platform_get_drvdata(pdev); struct rpi_firmware *fw = drv_mgmt->fw; struct vchiq_slot_zero *vchiq_slot_zero; @@ -212,6 +548,24 @@ static int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state drv_mgmt->fragments_size = 2 * drv_mgmt->info->cache_line_size; + if (drv_mgmt->info->use_36bit_addrs) { + struct device_node *dma_node = + of_find_compatible_node(NULL, NULL, "brcm,bcm2711-dma"); + + if (dma_node) { + struct platform_device *pdev; + + pdev = of_find_device_by_node(dma_node); + if (pdev) + dma_dev = &pdev->dev; + of_node_put(dma_node); + g_use_36bit_addrs = true; + } else { + dev_err(dev, "40-bit DMA controller not found\n"); + return -EINVAL; + } + } + /* Allocate space for the channels in coherent memory */ slot_mem_size = PAGE_ALIGN(TOTAL_SLOTS * VCHIQ_SLOT_SIZE); frag_mem_size = PAGE_ALIGN(drv_mgmt->fragments_size * MAX_FRAGMENTS); @@ -279,6 +633,8 @@ static int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state return -ENXIO; } + g_dma_dev = dma_dev ?: dev; + dev_dbg(&pdev->dev, "arm: vchiq_init - done (slots %p, phys %pad)\n", vchiq_slot_zero, &slot_phys); @@ -1368,6 +1724,7 @@ void vchiq_platform_conn_state_changed(struct vchiq_state *state, static const struct of_device_id vchiq_of_match[] = { { .compatible = "brcm,bcm2835-vchiq", .data = &bcm2835_info }, { .compatible = "brcm,bcm2836-vchiq", .data = &bcm2836_info }, + { .compatible = "brcm,bcm2711-vchiq", .data = &bcm2711_info }, {}, }; MODULE_DEVICE_TABLE(of, vchiq_of_match); diff --git a/drivers/platform/raspberrypi/vchiq-interface/vchiq_core.c b/drivers/platform/raspberrypi/vchiq-interface/vchiq_core.c index 48d6b1d743293e..391f382318c98c 100644 --- a/drivers/platform/raspberrypi/vchiq-interface/vchiq_core.c +++ b/drivers/platform/raspberrypi/vchiq-interface/vchiq_core.c @@ -63,10 +63,6 @@ #define MAKE_REMOTE_USE (VCHIQ_MSG_REMOTE_USE << TYPE_SHIFT) #define MAKE_REMOTE_USE_ACTIVE (VCHIQ_MSG_REMOTE_USE_ACTIVE << TYPE_SHIFT) -#define PAGELIST_WRITE 0 -#define PAGELIST_READ 1 -#define PAGELIST_READ_WITH_FRAGMENTS 2 - #define BELL2 0x08 /* Ensure the fields are wide enough */ diff --git a/include/linux/raspberrypi/vchiq_arm.h b/include/linux/raspberrypi/vchiq_arm.h index e32b02f990244b..60d0c422a464f9 100644 --- a/include/linux/raspberrypi/vchiq_arm.h +++ b/include/linux/raspberrypi/vchiq_arm.h @@ -32,6 +32,7 @@ enum USE_TYPE_E { struct vchiq_platform_info { unsigned int cache_line_size; + bool use_36bit_addrs; }; struct vchiq_drv_mgmt { diff --git a/include/linux/raspberrypi/vchiq_core.h b/include/linux/raspberrypi/vchiq_core.h index e7bf7a114985a5..b39c3f01c1d2c1 100644 --- a/include/linux/raspberrypi/vchiq_core.h +++ b/include/linux/raspberrypi/vchiq_core.h @@ -45,6 +45,10 @@ #define BITSET_IS_SET(bs, b) (bs[BITSET_WORD(b)] & BITSET_BIT(b)) #define BITSET_SET(bs, b) (bs[BITSET_WORD(b)] |= BITSET_BIT(b)) +#define PAGELIST_WRITE 0 +#define PAGELIST_READ 1 +#define PAGELIST_READ_WITH_FRAGMENTS 2 + enum { DEBUG_ENTRIES, #if VCHIQ_ENABLE_DEBUG From 7948cb94c6a1f0d9a1bfe47900de4684d4bc9345 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Tue, 16 Dec 2025 13:07:04 +0000 Subject: [PATCH 039/625] fixup:staging: vchiq_arm: Set up dma ranges on child devices --- drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c b/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c index 0452fa4fdf0166..b8a6f2c112bd6b 100644 --- a/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c +++ b/drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c @@ -145,6 +145,7 @@ vchiq_doorbell_irq(int irq, void *dev_id) return ret; } +#if 0 static void cleanup_pagelistinfo(struct vchiq_instance *instance, struct vchiq_pagelist_info *pagelistinfo) { @@ -159,6 +160,7 @@ cleanup_pagelistinfo(struct vchiq_instance *instance, struct vchiq_pagelist_info dma_free_coherent(instance->state->dev, pagelistinfo->pagelist_buffer_size, pagelistinfo->pagelist, pagelistinfo->dma_addr); } +#endif static inline bool is_adjacent_block(u32 *addrs, dma_addr_t addr, unsigned int k) @@ -232,6 +234,7 @@ EXPORT_SYMBOL(vchiq_add_connected_callback); * cached area. */ +#if 0 static struct vchiq_pagelist_info * create_pagelist(struct vchiq_instance *instance, char *buf, char __user *ubuf, size_t count, unsigned short type) @@ -523,6 +526,7 @@ free_pagelist(struct vchiq_instance *instance, struct vchiq_pagelist_info *pagel cleanup_pagelistinfo(instance, pagelistinfo); } +#endif static int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state *state) { From 3153716ff802dc755a1e026f3303800aef9802b1 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 12 Dec 2024 17:01:56 +0000 Subject: [PATCH 040/625] docs: uapi: media: Document Raspberry Pi NV12 column format The Raspberry Pi HEVC decoder uses a tiled format based on columns for 8 and 10 bit YUV images, so document them as NV12MT_COL128 and NV12MT_10_COL128. Signed-off-by: Dave Stevenson --- .../media/v4l/pixfmt-yuv-planar.rst | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst index 0631919bd667b1..1e7146230f09ec 100644 --- a/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst @@ -956,6 +956,48 @@ Data in the 12 high bits, zeros in the 4 low bits, arranged in little endian ord - Cb\ :sub:`11` - Cr\ :sub:`11` +V4L2_PIX_FMT_NV12MT_COL128 and V4L2_PIX_FMT_NV12MT_10_COL128 +------------------------------------------------------------ + +``V4L2_PIX_FMT_NV12MT_COL128`` is a tiled version of +``V4L2_PIX_FMT_NV12M`` where the two planes are split into 128 byte wide columns +of Y or interleaved CbCr. The height is always aligned to a multiple of 8 lines. + +V4L2_PIX_FMT_NV12MT_10_COL128 expands that as a 10 bit format where 3 10 bit +values are packed into a 32bit word. A 128 byte wide column therefore holds 96 +samples (either Y or interleaved CrCb). That effectively makes it 6 values in a +64 bit word for the CbCr plane, as the values always go in pairs. + +Bit-packed representation. + +.. tabularcolumns:: |p{1.2cm}||p{1.2cm}||p{1.2cm}||p{1.2cm}|p{3.2cm}|p{3.2cm}| + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 8 8 8 8 + + * - Y'\ :sub:`00[7:0]` + - Y'\ :sub:`01[5:0] (bits 7--2)` Y'\ :sub:`00[9:8]`\ (bits 1--0) + - Y'\ :sub:`02[3:0] (bits 7--4)` Y'\ :sub:`01[9:6]`\ (bits 3--0) + - unused (bits 7--6)` Y'\ :sub:`02[9:4]`\ (bits 5--0) + +.. tabularcolumns:: |p{1.2cm}||p{1.2cm}||p{1.2cm}||p{1.2cm}|p{3.2cm}|p{3.2cm}| + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 12 12 12 12 12 12 12 12 + + * - Cb\ :sub:`00[7:0]` + - Cr\ :sub:`00[5:0]`\ (bits 7--2) Cb\ :sub:`00[9:8]`\ (bits 1--0) + - Cb\ :sub:`01[3:0]`\ (bits 7--4) Cr\ :sub:`00[9:6]`\ (bits 3--0) + - unused (bits 7--6) Cb\ :sub:`02[9:4]`\ (bits 5--0) + - Cr\ :sub:`01[7:0]` + - Cb\ :sub:`02[5:0]`\ (bits 7--2) Cr\ :sub:`01[9:8]`\ (bits 1--0) + - Cr\ :sub:`02[3:0]`\ (bits 7--4) Cb\ :sub:`02[9:6]`\ (bits 3--0) + - unused (bits 7--6) Cr\ :sub:`02[9:4]`\ (bits 5--0) + Fully Planar YUV Formats ======================== From b899dc8bca107ca90d990e6766312a75a1e0fcc9 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 12 Dec 2024 17:09:55 +0000 Subject: [PATCH 041/625] media: ioctl: Add pixel formats NV12MT_COL128 and NV12MT_10_COL128 Add V4L2_PIXFMT_NV12MT_COL128 and V4L2_PIXFMT_NV12MT_10_COL128 to describe the Raspberry Pi HEVC decoder NV12 multiplanar formats. Signed-off-by: Dave Stevenson --- drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++ include/uapi/linux/videodev2.h | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index ed2ee1756f36d6..1fb6a86e7e926e 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1379,7 +1379,9 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_NV16M: descr = "Y/UV 4:2:2 (N-C)"; break; case V4L2_PIX_FMT_NV61M: descr = "Y/VU 4:2:2 (N-C)"; break; case V4L2_PIX_FMT_NV12MT: descr = "Y/UV 4:2:0 (64x32 MB, N-C)"; break; + case V4L2_PIX_FMT_NV12MT_COL128: descr = "Y/CbCr 4:2:0 (128b cols)"; break; case V4L2_PIX_FMT_NV12MT_16X16: descr = "Y/UV 4:2:0 (16x16 MB, N-C)"; break; + case V4L2_PIX_FMT_NV12MT_10_COL128: descr = "10-bit Y/CbCr 4:2:0 (128b cols)"; break; case V4L2_PIX_FMT_P012M: descr = "12-bit Y/UV 4:2:0 (N-C)"; break; case V4L2_PIX_FMT_YUV420M: descr = "Planar YUV 4:2:0 (N-C)"; break; case V4L2_PIX_FMT_YVU420M: descr = "Planar YVU 4:2:0 (N-C)"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index d78f6aa190358c..b7001442cb91bf 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -697,6 +697,10 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 tiles */ #define V4L2_PIX_FMT_NV12M_8L128 v4l2_fourcc('N', 'A', '1', '2') /* Y/CbCr 4:2:0 8x128 tiles */ #define V4L2_PIX_FMT_NV12M_10BE_8L128 v4l2_fourcc_be('N', 'T', '1', '2') /* Y/CbCr 4:2:0 10-bit 8x128 tiles */ +#define V4L2_PIX_FMT_NV12MT_COL128 v4l2_fourcc('N', 'c', '1', '2') /* 12 Y/CbCr 4:2:0 128 pixel wide column */ +#define V4L2_PIX_FMT_NV12MT_10_COL128 v4l2_fourcc('N', 'c', '3', '0') + /* Y/CbCr 4:2:0 10bpc, 3x10 packed as 4 bytes in a 128 bytes / 96 pixel wide column */ + /* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */ #define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ From 4c81a4e688e0e943575ecf66552ce2bd5ce8e05f Mon Sep 17 00:00:00 2001 From: John Cox Date: Fri, 14 Nov 2025 16:27:14 +0000 Subject: [PATCH 042/625] media: v4l2-common: Add pixel formats NV12MT_COL128 and NV12MT_10_COL128 Add V4L2_PIXFMT_NV12MT_COL128 and V4L2_PIXFMT_NV12MT_10_COL128 as used by the Raspberry Pi HEVC decoder. Signed-off-by: John Cox --- drivers/media/v4l2-core/v4l2-common.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c index 554c591e111331..532663b3d89e0a 100644 --- a/drivers/media/v4l2-core/v4l2-common.c +++ b/drivers/media/v4l2-core/v4l2-common.c @@ -331,6 +331,10 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) .block_w = { 64, 32, 0, 0 }, .block_h = { 32, 16, 0, 0 }}, { .format = V4L2_PIX_FMT_NV12MT_16X16, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 2, .comp_planes = 2, .bpp = { 1, 2, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 2, .vdiv = 2, .block_w = { 16, 8, 0, 0 }, .block_h = { 16, 8, 0, 0 }}, + { .format = V4L2_PIX_FMT_NV12MT_COL128, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 2, .comp_planes = 2, .bpp = { 1, 2, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 2, .vdiv = 2, + .block_w = { 128, 64, 0, 0 }}, + { .format = V4L2_PIX_FMT_NV12MT_10_COL128, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 2, .comp_planes = 2, .bpp = { 4, 8, 0, 0 }, .bpp_div = { 3, 3, 1, 1 }, .hdiv = 2, .vdiv = 2, + .block_w = { 96, 48, 0, 0 }}, /* Bayer RGB formats */ { .format = V4L2_PIX_FMT_SBGGR8, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, From 9bc37fe7e4718dc8e5d00e7d36669f84e7255d37 Mon Sep 17 00:00:00 2001 From: John Cox Date: Fri, 14 Nov 2025 17:14:50 +0000 Subject: [PATCH 043/625] docs: uapi: media: Clarify HEVC slice_param bit_size, data_byte_offset Clarify exactly what bit_size and data_byte_offset mean when there are multiple slices in the bitstream data. Signed-off-by: John Cox --- .../userspace-api/media/v4l/ext-ctrls-codec-stateless.rst | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst index 3b1e05c6eb1395..a54e8ea29440f3 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst @@ -2399,10 +2399,12 @@ This structure contains all loop filter related parameters. See sections * - __u32 - ``bit_size`` - - Size (in bits) of the current slice data. + - Size in bits of the slice_segment_data for the current slice including + any emulation prevention bytes. * - __u32 - ``data_byte_offset`` - - Offset (in byte) to the video data in the current slice data. + - Offset in bytes from the start of the current v4l2_buffer to the start + of the slice_segment_data for the current slice. * - __u32 - ``num_entry_point_offsets`` - Specifies the number of entry point offset syntax elements in the slice header. From 66daf8492573037a36a8ba64740e9d16f38f4729 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 17 Mar 2020 10:53:16 +0000 Subject: [PATCH 044/625] dt-bindings: media: Add the Raspberry Pi HEVC decoder Adds a binding for the HEVC decoder IP owned by Raspberry Pi. Instantiations of the decoder IP can currently be found in the Broadcom BCM2711 and BCM2712 SoCs. Signed-off-by: Dave Stevenson --- Updated based on the thread in v3 [1] with Krzystof to drop to only SoC specific compatible strings. This still feels wrong to me as this is NOT Broadcom IP - it is solely owned by Raspberry Pi. It is the same situation as for the Raspberry Pi ISP Backend where it was proposed to have compatible = "brcm,pispbe-bcm2712", "raspberrypi,pispbe"; in [2]. That proposal was viewed as acceptable by both Rob[3] and Conor[4], and the binding given a Reviewed-by by Rob[5]. Yes it is found as a block inside an SoC, but the same could be said for a Synopsys I2C controller ("snps,designware-i2c"), Cadence ethernet MAC ("cdns,macb"), ARM CPU (eg "arm,cortex-a53"), or any number of other examples. They are all 3rd party IP blocks found in SoCs, have an SoC specific compatible defined, but acknowledge the IP owner and use a common fallback compatible where possible. Please could we have confirmation that this really is what is required by device tree? Thanks Dave [1] https://lore.kernel.org/linux-media/20250423-media-rpi-hevc-dec-v3-3-8fd3fad1d6fb@raspberrypi.com/ [2] https://lore.kernel.org/linux-media/20240213104405.GB5012@pendragon.ideasonboard.com/ [3] https://lore.kernel.org/linux-media/20240215140058.GA4147262-robh@kernel.org/ [4] https://lore.kernel.org/linux-media/20240213-landlady-backstab-6e7da824c99a@spud/ [5] https://lore.kernel.org/linux-media/170932821578.3062059.18150159256247255021.robh@kernel.org/ --- .../bindings/media/raspberrypi,hevc-dec.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/raspberrypi,hevc-dec.yaml diff --git a/Documentation/devicetree/bindings/media/raspberrypi,hevc-dec.yaml b/Documentation/devicetree/bindings/media/raspberrypi,hevc-dec.yaml new file mode 100644 index 00000000000000..fe3361bddd1f01 --- /dev/null +++ b/Documentation/devicetree/bindings/media/raspberrypi,hevc-dec.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/raspberrypi,hevc-dec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Raspberry Pi HEVC Decoder + +maintainers: + - John Cox + - Dom Cobley + - Dave Stevenson + +description: + The Raspberry Pi HEVC decoder is a hardware video decode accelerator IP block + developed and owned by Raspberry Pi. + + Currently it can be found in the Broadcom BCM2711 and BCM2712 processors used + on Raspberry Pi 4 and 5 boards respectively. + +properties: + compatible: + oneOf: + - const: brcm,bcm2711-hevc-dec + - items: + - enum: + - brcm,bcm2712-hevc-dec + - const: brcm,bcm2711-hevc-dec + + reg: + items: + - description: The HEVC main register region + - description: The Interrupt control register region + + reg-names: + items: + - const: hevc + - const: intc + + interrupts: + maxItems: 1 + + clocks: + items: + - description: The HEVC block clock + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include + + video-codec@7eb10000 { + compatible = "brcm,bcm2711-hevc-dec"; + reg = <0x7eb00000 0x10000>, /* HEVC */ + <0x7eb10000 0x1000>; /* INTC */ + reg-names = "hevc", + "intc"; + + interrupts = ; + + clocks = <&clk 0>; + }; + +... From 4758b8d118e70f24e509decd8a3b43f179e5d9cd Mon Sep 17 00:00:00 2001 From: John Cox Date: Mon, 4 Nov 2024 17:57:30 +0000 Subject: [PATCH 045/625] media: platform: Add Raspberry Pi HEVC decoder driver The BCM2711 and BCM2712 SoCs used on Rapsberry Pi 4 and Raspberry Pi 5 boards include an HEVC decoder block. Add a driver for it. Signed-off-by: John Cox Signed-off-by: Dave Stevenson --- MAINTAINERS | 10 + drivers/media/platform/raspberrypi/Kconfig | 1 + drivers/media/platform/raspberrypi/Makefile | 1 + .../platform/raspberrypi/hevc_dec/Kconfig | 17 + .../platform/raspberrypi/hevc_dec/Makefile | 5 + .../platform/raspberrypi/hevc_dec/hevc_d.c | 328 +++ .../platform/raspberrypi/hevc_dec/hevc_d.h | 195 ++ .../raspberrypi/hevc_dec/hevc_d_h265.c | 2436 +++++++++++++++++ .../raspberrypi/hevc_dec/hevc_d_h265.h | 22 + .../platform/raspberrypi/hevc_dec/hevc_d_hw.c | 429 +++ .../platform/raspberrypi/hevc_dec/hevc_d_hw.h | 317 +++ .../raspberrypi/hevc_dec/hevc_d_video.c | 636 +++++ .../raspberrypi/hevc_dec/hevc_d_video.h | 38 + 13 files changed, 4435 insertions(+) create mode 100644 drivers/media/platform/raspberrypi/hevc_dec/Kconfig create mode 100644 drivers/media/platform/raspberrypi/hevc_dec/Makefile create mode 100644 drivers/media/platform/raspberrypi/hevc_dec/hevc_d.c create mode 100644 drivers/media/platform/raspberrypi/hevc_dec/hevc_d.h create mode 100644 drivers/media/platform/raspberrypi/hevc_dec/hevc_d_h265.c create mode 100644 drivers/media/platform/raspberrypi/hevc_dec/hevc_d_h265.h create mode 100644 drivers/media/platform/raspberrypi/hevc_dec/hevc_d_hw.c create mode 100644 drivers/media/platform/raspberrypi/hevc_dec/hevc_d_hw.h create mode 100644 drivers/media/platform/raspberrypi/hevc_dec/hevc_d_video.c create mode 100644 drivers/media/platform/raspberrypi/hevc_dec/hevc_d_video.h diff --git a/MAINTAINERS b/MAINTAINERS index 4856a91251a888..c885b3bf3c5177 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22043,6 +22043,16 @@ L: linux-edac@vger.kernel.org S: Maintained F: drivers/ras/amd/fmpm.c +RASPBERRY PI HEVC DECODER +M: John Cox +M: Dom Cobley +M: Dave Stevenson +M: Raspberry Pi Internal Kernel List +L: linux-media@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/media/raspberrypi,rpi_hevc_dec.yaml +F: drivers/media/platform/raspberrypi/hevc_dec + RASPBERRY PI PISP BACK END M: Jacopo Mondi R: Raspberry Pi Kernel Maintenance diff --git a/drivers/media/platform/raspberrypi/Kconfig b/drivers/media/platform/raspberrypi/Kconfig index bd5101ffefb5bc..fbe2edd24f8eea 100644 --- a/drivers/media/platform/raspberrypi/Kconfig +++ b/drivers/media/platform/raspberrypi/Kconfig @@ -2,5 +2,6 @@ comment "Raspberry Pi media platform drivers" +source "drivers/media/platform/raspberrypi/hevc_dec/Kconfig" source "drivers/media/platform/raspberrypi/pisp_be/Kconfig" source "drivers/media/platform/raspberrypi/rp1-cfe/Kconfig" diff --git a/drivers/media/platform/raspberrypi/Makefile b/drivers/media/platform/raspberrypi/Makefile index af7fde84eefe23..c63985cd8d17d1 100644 --- a/drivers/media/platform/raspberrypi/Makefile +++ b/drivers/media/platform/raspberrypi/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +obj-y += hevc_dec/ obj-y += pisp_be/ obj-y += rp1-cfe/ diff --git a/drivers/media/platform/raspberrypi/hevc_dec/Kconfig b/drivers/media/platform/raspberrypi/hevc_dec/Kconfig new file mode 100644 index 00000000000000..ae1fd079e5c91d --- /dev/null +++ b/drivers/media/platform/raspberrypi/hevc_dec/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0 + +config VIDEO_RPI_HEVC_DEC + tristate "Rasperry Pi HEVC decoder" + depends on VIDEO_DEV && VIDEO_DEV + depends on OF + select MEDIA_CONTROLLER + select MEDIA_CONTROLLER_REQUEST_API + select VIDEOBUF2_DMA_CONTIG + select V4L2_MEM2MEM_DEV + help + Support for the Raspberry Pi HEVC / H265 H/W decoder as a stateless + V4L2 decoder device. + + To compile this driver as a module, choose M here: the module + will be called rpi-hevc-dec. + diff --git a/drivers/media/platform/raspberrypi/hevc_dec/Makefile b/drivers/media/platform/raspberrypi/hevc_dec/Makefile new file mode 100644 index 00000000000000..b6506bf2e00d15 --- /dev/null +++ b/drivers/media/platform/raspberrypi/hevc_dec/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_VIDEO_RPI_HEVC_DEC) += rpi-hevc-dec.o + +rpi-hevc-dec-y = hevc_d.o hevc_d_video.o hevc_d_hw.o\ + hevc_d_h265.o diff --git a/drivers/media/platform/raspberrypi/hevc_dec/hevc_d.c b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d.c new file mode 100644 index 00000000000000..fcd45e6f8d08a2 --- /dev/null +++ b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d.c @@ -0,0 +1,328 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Raspberry Pi HEVC driver + * + * Copyright (C) 2025 Raspberry Pi Ltd + * + * Based on the Cedrus VPU driver, that is: + * + * Copyright (C) 2016 Florent Revest + * Copyright (C) 2018 Paul Kocialkowski + * Copyright (C) 2018 Bootlin + */ + +#include +#include +#include + +#include +#include +#include +#include + +#include "hevc_d.h" +#include "hevc_d_h265.h" +#include "hevc_d_video.h" +#include "hevc_d_hw.h" + +int hevc_d_v4l2_debug; +module_param_named(debug, hevc_d_v4l2_debug, int, 0644); +MODULE_PARM_DESC(debug, "Debug level 0-2"); + +static const struct v4l2_ctrl_config hevc_d_ctrls[] = { + { + .id = V4L2_CID_STATELESS_HEVC_SPS, + .ops = &hevc_d_hevc_sps_ctrl_ops, + }, { + .id = V4L2_CID_STATELESS_HEVC_PPS, + .ops = &hevc_d_hevc_pps_ctrl_ops, + }, { + .id = V4L2_CID_STATELESS_HEVC_SCALING_MATRIX, + }, { + .id = V4L2_CID_STATELESS_HEVC_DECODE_PARAMS, + }, { + .name = "Slice param array", + .id = V4L2_CID_STATELESS_HEVC_SLICE_PARAMS, + .type = V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS, + .flags = V4L2_CTRL_FLAG_DYNAMIC_ARRAY, + .dims = { 600 }, + }, { + .id = V4L2_CID_STATELESS_HEVC_DECODE_MODE, + .min = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, + .max = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, + .def = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, + }, { + .id = V4L2_CID_STATELESS_HEVC_START_CODE, + .min = V4L2_STATELESS_HEVC_START_CODE_NONE, + .max = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, + .def = V4L2_STATELESS_HEVC_START_CODE_NONE, + }, +}; + +void *hevc_d_find_control_data(struct hevc_d_ctx *ctx, u32 id) +{ + struct v4l2_ctrl *const ctrl = v4l2_ctrl_find(ctx->fh.ctrl_handler, id); + + return ctrl ? ctrl->p_cur.p : NULL; +} + +static int hevc_d_init_ctrls(struct hevc_d_dev *dev, struct hevc_d_ctx *ctx) +{ + struct v4l2_ctrl_handler *hdl = &ctx->hdl; + struct v4l2_ctrl *ctrl; + unsigned int i; + + v4l2_ctrl_handler_init(hdl, ARRAY_SIZE(hevc_d_ctrls)); + if (hdl->error) { + v4l2_err(&dev->v4l2_dev, + "Failed to initialize control handler\n"); + return hdl->error; + } + + for (i = 0; i < ARRAY_SIZE(hevc_d_ctrls); i++) { + ctrl = v4l2_ctrl_new_custom(hdl, &hevc_d_ctrls[i], ctx); + if (hdl->error) { + v4l2_err(&dev->v4l2_dev, + "Failed to create new custom control id=%#x\n", + hevc_d_ctrls[i].id); + + v4l2_ctrl_handler_free(hdl); + return hdl->error; + } + } + + ctx->fh.ctrl_handler = hdl; + v4l2_ctrl_handler_setup(hdl); + + return 0; +} + +static int hevc_d_open(struct file *file) +{ + struct hevc_d_dev *dev = video_drvdata(file); + struct hevc_d_ctx *ctx = NULL; + int ret; + + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + + mutex_init(&ctx->ctx_mutex); + + v4l2_fh_init(&ctx->fh, video_devdata(file)); + file->private_data = &ctx->fh; + ctx->dev = dev; + + ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx, + &hevc_d_queue_init); + if (IS_ERR(ctx->fh.m2m_ctx)) { + ret = PTR_ERR(ctx->fh.m2m_ctx); + goto err_free; + } + + /* The only bit of format info that we can guess now is H265 src + * Everything else we need more info for + */ + hevc_d_prepare_src_format(&ctx->src_fmt); + + ret = hevc_d_init_ctrls(dev, ctx); + if (ret) + goto err_ctx; + + v4l2_fh_add(&ctx->fh, file); + return 0; + +err_ctx: + v4l2_m2m_ctx_release(ctx->fh.m2m_ctx); +err_free: + mutex_destroy(&ctx->ctx_mutex); + kfree(ctx); + return ret; +} + +static int hevc_d_release(struct file *file) +{ + struct hevc_d_ctx *ctx = container_of(file->private_data, + struct hevc_d_ctx, fh); + + v4l2_fh_del(&ctx->fh, file); + + v4l2_ctrl_handler_free(&ctx->hdl); + + v4l2_m2m_ctx_release(ctx->fh.m2m_ctx); + + v4l2_fh_exit(&ctx->fh); + mutex_destroy(&ctx->ctx_mutex); + + kfree(ctx); + return 0; +} + +static void hevc_d_media_req_queue(struct media_request *req) +{ + media_request_mark_manual_completion(req); + v4l2_m2m_request_queue(req); +} + +static const struct v4l2_file_operations hevc_d_fops = { + .owner = THIS_MODULE, + .open = hevc_d_open, + .release = hevc_d_release, + .poll = v4l2_m2m_fop_poll, + .unlocked_ioctl = video_ioctl2, + .mmap = v4l2_m2m_fop_mmap, +}; + +static const struct video_device hevc_d_video_device = { + .name = HEVC_D_NAME, + .vfl_dir = VFL_DIR_M2M, + .fops = &hevc_d_fops, + .ioctl_ops = &hevc_d_ioctl_ops, + .minor = -1, + .release = video_device_release_empty, + .device_caps = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING, +}; + +static const struct v4l2_m2m_ops hevc_d_m2m_ops = { + .device_run = hevc_d_device_run, +}; + +static const struct media_device_ops hevc_d_m2m_media_ops = { + .req_validate = vb2_request_validate, + .req_queue = hevc_d_media_req_queue, +}; + +static int hevc_d_probe(struct platform_device *pdev) +{ + struct hevc_d_dev *dev; + struct video_device *vfd; + int ret; + + dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + dev->vfd = hevc_d_video_device; + dev->dev = &pdev->dev; + dev->pdev = pdev; + + ret = hevc_d_hw_probe(dev); + if (ret) { + dev_err(&pdev->dev, "Failed to probe hardware - %d\n", ret); + return ret; + } + + mutex_init(&dev->dev_mutex); + + ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); + if (ret) { + dev_err(&pdev->dev, "Failed to register V4L2 device\n"); + return ret; + } + + vfd = &dev->vfd; + vfd->lock = &dev->dev_mutex; + vfd->v4l2_dev = &dev->v4l2_dev; + + snprintf(vfd->name, sizeof(vfd->name), "%s", hevc_d_video_device.name); + video_set_drvdata(vfd, dev); + + ret = dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(36)); + if (ret) { + v4l2_err(&dev->v4l2_dev, + "Failed dma_set_mask_and_coherent\n"); + goto err_v4l2; + } + + dev->m2m_dev = v4l2_m2m_init(&hevc_d_m2m_ops); + if (IS_ERR(dev->m2m_dev)) { + v4l2_err(&dev->v4l2_dev, + "Failed to initialize V4L2 M2M device\n"); + ret = PTR_ERR(dev->m2m_dev); + + goto err_v4l2; + } + + dev->mdev.dev = &pdev->dev; + strscpy(dev->mdev.model, HEVC_D_NAME, sizeof(dev->mdev.model)); + strscpy(dev->mdev.bus_info, "platform:" HEVC_D_NAME, + sizeof(dev->mdev.bus_info)); + + media_device_init(&dev->mdev); + dev->mdev.ops = &hevc_d_m2m_media_ops; + dev->v4l2_dev.mdev = &dev->mdev; + + ret = video_register_device(vfd, VFL_TYPE_VIDEO, -1); + if (ret) { + v4l2_err(&dev->v4l2_dev, "Failed to register video device\n"); + goto err_m2m; + } + + v4l2_info(&dev->v4l2_dev, + "Device registered as /dev/video%d\n", vfd->num); + + ret = v4l2_m2m_register_media_controller(dev->m2m_dev, vfd, + MEDIA_ENT_F_PROC_VIDEO_DECODER); + if (ret) { + v4l2_err(&dev->v4l2_dev, + "Failed to initialize V4L2 M2M media controller\n"); + goto err_video; + } + + ret = media_device_register(&dev->mdev); + if (ret) { + v4l2_err(&dev->v4l2_dev, "Failed to register media device\n"); + goto err_m2m_mc; + } + + platform_set_drvdata(pdev, dev); + + return 0; + +err_m2m_mc: + v4l2_m2m_unregister_media_controller(dev->m2m_dev); +err_video: + video_unregister_device(&dev->vfd); +err_m2m: + v4l2_m2m_release(dev->m2m_dev); +err_v4l2: + v4l2_device_unregister(&dev->v4l2_dev); + + return ret; +} + +static void hevc_d_remove(struct platform_device *pdev) +{ + struct hevc_d_dev *dev = platform_get_drvdata(pdev); + + media_device_unregister(&dev->mdev); + v4l2_m2m_unregister_media_controller(dev->m2m_dev); + media_device_cleanup(&dev->mdev); + + v4l2_m2m_release(dev->m2m_dev); + video_unregister_device(&dev->vfd); + v4l2_device_unregister(&dev->v4l2_dev); + + hevc_d_hw_remove(dev); +} + +static const struct of_device_id hevc_d_dt_match[] = { + { .compatible = "brcm,bcm2711-hevc-dec", }, + { .compatible = "brcm,bcm2712-hevc-dec", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, hevc_d_dt_match); + +static struct platform_driver hevc_d_driver = { + .probe = hevc_d_probe, + .remove = hevc_d_remove, + .driver = { + .name = HEVC_D_NAME, + .of_match_table = of_match_ptr(hevc_d_dt_match), + }, +}; +module_platform_driver(hevc_d_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("John Cox "); +MODULE_DESCRIPTION("Raspberry Pi HEVC V4L2 driver"); diff --git a/drivers/media/platform/raspberrypi/hevc_dec/hevc_d.h b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d.h new file mode 100644 index 00000000000000..61446165d5e58e --- /dev/null +++ b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d.h @@ -0,0 +1,195 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Raspberry Pi HEVC driver + * + * Copyright (C) 2025 Raspberry Pi Ltd + * + * Based on the Cedrus VPU driver, that is: + * + * Copyright (C) 2016 Florent Revest + * Copyright (C) 2018 Paul Kocialkowski + * Copyright (C) 2018 Bootlin + */ + +#ifndef _HEVC_D_H_ +#define _HEVC_D_H_ + +#include +#include +#include +#include +#include +#include +#include + +/* Decoder limits */ +#define HEVC_D_MIN_WIDTH 16U +#define HEVC_D_MIN_HEIGHT 16U +#define HEVC_D_DEFAULT_WIDTH 1920U +#define HEVC_D_DEFAULT_HEIGHT 1088U +#define HEVC_D_MAX_WIDTH 4096U +#define HEVC_D_MAX_HEIGHT 4096U + +/* + * Q sizes of 3 give one entry being prepared, one waiting and + * one processing. Testing shows no advantage to greater Q depths + */ + +/* + * Max processing Q size Phase 0 -> Phase 1 + * This is per open context + */ +#define HEVC_D_P1BUF_COUNT 3 +/* + * Max processing Q size Phase 1 -> Phase 2 + * This is per device + */ +#define HEVC_D_P2BUF_COUNT 3 +/* + * Number of decode environments a context has + * There is no independent flow control on this number so it must be + * capable of holding P1 + P2 entries. + */ +#define HEVC_D_DEC_ENV_COUNT (HEVC_D_P1BUF_COUNT + HEVC_D_P2BUF_COUNT) + +#define HEVC_D_NAME "rpi-hevc-dec" + +enum hevc_d_irq_status { + HEVC_D_IRQ_NONE, + HEVC_D_IRQ_ERROR, + HEVC_D_IRQ_OK, +}; + +struct hevc_d_h265_run { + u32 slice_ents; + const struct v4l2_ctrl_hevc_sps *sps; + const struct v4l2_ctrl_hevc_pps *pps; + const struct v4l2_ctrl_hevc_decode_params *dec; + const struct v4l2_ctrl_hevc_slice_params *slice_params; + const struct v4l2_ctrl_hevc_scaling_matrix *scaling_matrix; +}; + +struct hevc_d_run { + struct vb2_v4l2_buffer *src; + struct vb2_v4l2_buffer *dst; + + struct hevc_d_h265_run h265; +}; + +struct hevc_d_buffer { + struct v4l2_m2m_buffer m2m_buf; +}; + +struct hevc_d_dec_state; +struct hevc_d_dec_env; + +struct hevc_d_hwbuf { + size_t size; + u8 *ptr; + dma_addr_t addr; + unsigned long attrs; +}; + +struct hevc_d_dev; +typedef void (*hevc_d_irq_callback)(struct hevc_d_dev *dev, void *ctx); + +struct hevc_d_q_aux; +#define HEVC_D_AUX_ENT_COUNT VB2_MAX_FRAME + +struct hevc_d_ctx { + struct v4l2_fh fh; + struct hevc_d_dev *dev; + + struct v4l2_pix_format_mplane src_fmt; + struct v4l2_pix_format_mplane dst_fmt; + int dst_fmt_set; + + /* + * fatal_err is set if an error has occurred s.t. decode cannot + * continue (such as running out of CMA) + */ + int fatal_err; + + /* Lock for queue operations */ + struct mutex ctx_mutex; + + struct v4l2_ctrl_handler hdl; + + /* + * state contains stuff that is only needed in phase0 + * it could be held in dec_env but that would be wasteful + */ + struct hevc_d_dec_state *state; + struct hevc_d_dec_env *dec0; + + /* Spinlock protecting dec_free */ + spinlock_t dec_lock; + struct hevc_d_dec_env *dec_free; + + struct hevc_d_dec_env *dec_pool; + + atomic_t p1out; + + unsigned int p2idx; + struct hevc_d_hwbuf pu_bufs[HEVC_D_P2BUF_COUNT]; + struct hevc_d_hwbuf coeff_bufs[HEVC_D_P2BUF_COUNT]; + + /* Spinlock protecting aux_free */ + spinlock_t aux_lock; + struct hevc_d_q_aux *aux_free; + + struct hevc_d_q_aux *aux_ents[HEVC_D_AUX_ENT_COUNT]; + + unsigned int colmv_stride; + unsigned int colmv_picsize; +}; + +struct hevc_d_hw_irq_ent; + +#define HEVC_D_ICTL_ENABLE_UNLIMITED (-1) + +struct hevc_d_hw_irq_ctrl { + /* Spinlock protecting claim and tail */ + spinlock_t lock; + struct hevc_d_hw_irq_ent *claim; + struct hevc_d_hw_irq_ent *tail; + + /* Ent for pending irq - also prevents sched */ + struct hevc_d_hw_irq_ent *irq; + /* Non-zero => do not start a new job - outer layer sched pending */ + int no_sched; + /* Enable count. -1 always OK, 0 do not sched, +ve shed & count down */ + int enable; + /* Thread CB requested */ + bool thread_reqed; +}; + +struct hevc_d_dev { + struct v4l2_device v4l2_dev; + struct video_device vfd; + struct media_device mdev; + struct platform_device *pdev; + struct device *dev; + struct v4l2_m2m_dev *m2m_dev; + + /* Video device file (vfd) mutex */ + struct mutex dev_mutex; + + void __iomem *base_irq; + void __iomem *base_h265; + + struct clk *clock; + unsigned long max_clock_rate; + + struct hevc_d_hw_irq_ctrl ic_active1; + struct hevc_d_hw_irq_ctrl ic_active2; +}; + +extern int hevc_d_v4l2_debug; +#define hevc_d_dbg(level, dev, fmt, arg...)\ + v4l2_dbg((level), hevc_d_v4l2_debug, (dev), fmt, ## arg) + +struct v4l2_ctrl *hevc_d_find_ctrl(struct hevc_d_ctx *ctx, u32 id); +void *hevc_d_find_control_data(struct hevc_d_ctx *ctx, u32 id); + +#endif diff --git a/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_h265.c b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_h265.c new file mode 100644 index 00000000000000..d2ea87f136c1a0 --- /dev/null +++ b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_h265.c @@ -0,0 +1,2436 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Raspberry Pi HEVC driver + * + * Copyright (C) 2025 Raspberry Pi Ltd + * + * Based on the Cedrus VPU driver, that is: + * + * Copyright (C) 2016 Florent Revest + * Copyright (C) 2018 Paul Kocialkowski + * Copyright (C) 2018 Bootlin + */ + +#include +#include + +#include + +#include "hevc_d.h" +#include "hevc_d_h265.h" +#include "hevc_d_hw.h" +#include "hevc_d_video.h" + +/* Maximum length of command buffer before we rate it an error */ +#define CMD_BUFFER_SIZE_MAX 0x100000 + +/* Initial size of command FIFO in commands. + * The FIFO will be extended if this value is exceeded but 8192 seems to + * deal with all streams found in the wild. + */ +#define CMD_BUFFER_SIZE_INIT 8192 + +enum hevc_slice_type { + HEVC_SLICE_B = 0, + HEVC_SLICE_P = 1, + HEVC_SLICE_I = 2, +}; + +enum hevc_layer { L0 = 0, L1 = 1 }; + +static int hwbuf_alloc(struct hevc_d_dev *const dev, struct hevc_d_hwbuf *hwbuf, + size_t size, unsigned long attrs) +{ + hwbuf->size = size; + hwbuf->attrs = attrs; + hwbuf->addr = 0; + hwbuf->ptr = dma_alloc_attrs(dev->dev, hwbuf->size, &hwbuf->addr, + GFP_KERNEL, hwbuf->attrs); + return !hwbuf->ptr ? -ENOMEM : 0; +} + +static void hwbuf_free(struct hevc_d_dev *const dev, + struct hevc_d_hwbuf *const hwbuf) +{ + if (hwbuf->ptr) + dma_free_attrs(dev->dev, hwbuf->size, hwbuf->ptr, hwbuf->addr, + hwbuf->attrs); + hwbuf->size = 0; + hwbuf->ptr = NULL; + hwbuf->addr = 0; + hwbuf->attrs = 0; +} + +/* Realloc but do not copy + * + * Frees then allocs. + * If the alloc fails then it attempts to re-allocate the old size + * On error check hwbuf->ptr to determine if anything is currently + * allocated. + */ +static int hwbuf_realloc_new(struct hevc_d_dev * const dev, + struct hevc_d_hwbuf * const hwbuf, size_t size) +{ + const size_t old_size = hwbuf->size; + + if (size == hwbuf->size) + return 0; + + if (hwbuf->ptr) + dma_free_attrs(dev->dev, hwbuf->size, hwbuf->ptr, + hwbuf->addr, hwbuf->attrs); + + hwbuf->addr = 0; + hwbuf->size = size; + hwbuf->ptr = dma_alloc_attrs(dev->dev, hwbuf->size, + &hwbuf->addr, GFP_KERNEL, hwbuf->attrs); + + if (!hwbuf->ptr) { + hwbuf->addr = 0; + hwbuf->size = old_size; + hwbuf->ptr = dma_alloc_attrs(dev->dev, hwbuf->size, + &hwbuf->addr, GFP_KERNEL, hwbuf->attrs); + if (!hwbuf->ptr) { + hwbuf->size = 0; + hwbuf->addr = 0; + hwbuf->attrs = 0; + } + return -ENOMEM; + } + + return 0; +} + +/* Realloc with copy */ +static int hwbuf_realloc_copy(struct hevc_d_dev * const dev, + struct hevc_d_hwbuf * const hwbuf, size_t newsize) +{ + struct hevc_d_hwbuf bnew; + + if (newsize <= hwbuf->size) + return 0; + + if (hwbuf_alloc(dev, &bnew, newsize, hwbuf->attrs)) + return -ENOMEM; + + memcpy(bnew.ptr, hwbuf->ptr, hwbuf->size); + hwbuf_free(dev, hwbuf); + *hwbuf = bnew; + return 0; +} + +static size_t next_size(const size_t x) +{ + return hevc_d_round_up_size(x + 1); +} + +#define NUM_SCALING_FACTORS 4064 /* Not a typo = 0xbe0 + 0x400 */ + +#define AXI_BASE64 0 + +#define PROB_BACKUP ((20 << 12) + (20 << 6) + (0 << 0)) +#define PROB_RELOAD ((20 << 12) + (20 << 0) + (0 << 6)) + +#define HEVC_MAX_REFS V4L2_HEVC_DPB_ENTRIES_NUM_MAX + +struct hevc_d_q_aux { + unsigned int refcount; + unsigned int q_index; + struct hevc_d_q_aux *next; + struct hevc_d_hwbuf col; +}; + +enum hevc_d_decode_state { + HEVC_D_DECODE_SLICE_START, + HEVC_D_DECODE_ERROR_DONE, + HEVC_D_DECODE_PHASE1, + HEVC_D_DECODE_END, +}; + +/* + * Decode environment + * One dec_env is allocated per active frame decode and holds state that + * needs to persist between decode phases or callbacks + */ +struct hevc_d_dec_env { + struct hevc_d_ctx *ctx; + struct hevc_d_dec_env *next; + + enum hevc_d_decode_state state; + unsigned int decode_order; + int p1_status; /* Phase 1 status - what to realloc */ + + struct hevc_d_hwbuf cmd; + unsigned int cmd_len; + unsigned int cmd_max; + unsigned int num_slice_msgs; + unsigned int pic_width_in_ctbs_y; + unsigned int pic_height_in_ctbs_y; + unsigned int dpbno_col; + u32 reg_slicestart; + int collocated_from_l0_flag; + /* + * Last CTB/Tile X,Y processed by (wpp_)entry_point + * Could be in _state as P0 only but needs updating where _state + * is const + */ + unsigned int entry_ctb_x; + unsigned int entry_ctb_y; + unsigned int entry_tile_x; + unsigned int entry_tile_y; + unsigned int entry_qp; + u32 entry_slice; + + u32 rpi_config2; + u32 rpi_framesize; + u32 rpi_currpoc; + + struct vb2_v4l2_buffer *frame_buf; + struct vb2_v4l2_buffer *src_buf; + dma_addr_t frame_luma_addr; + unsigned int luma_stride; + dma_addr_t frame_chroma_addr; + unsigned int chroma_stride; + dma_addr_t ref_addrs[16][2]; + struct hevc_d_q_aux *frame_aux; + struct hevc_d_q_aux *col_aux; + + dma_addr_t pu_base_vc; + dma_addr_t coeff_base_vc; + u32 pu_stride; + u32 coeff_stride; + +#define SLICE_MSGS_MAX (2 * HEVC_MAX_REFS * 8 + 3) + u16 slice_msgs[SLICE_MSGS_MAX]; + u8 scaling_factors[NUM_SCALING_FACTORS]; + + struct media_request *request; + struct hevc_d_hw_irq_ent irq_ent; +}; + +/* + * Decode state + * Decode information that persists between frame decodes but is only + * used or changed in phase 0 (setup) + */ +struct hevc_d_dec_state { + struct v4l2_ctrl_hevc_sps sps; + struct v4l2_ctrl_hevc_pps pps; + + /* Helper vars & tables derived from sps/pps */ + unsigned int log2_ctb_size; /* log2 width of a CTB */ + unsigned int ctb_width; /* Width in CTBs */ + unsigned int ctb_height; /* Height in CTBs */ + unsigned int ctb_size; /* Pic area in CTBs */ + unsigned int tile_width; /* Width in tiles */ + unsigned int tile_height; /* Height in tiles */ + + int *col_bd; + int *row_bd; + int *ctb_addr_rs_to_ts; + int *ctb_addr_ts_to_rs; + + /* Aux storage for DPB */ + struct hevc_d_q_aux *ref_aux[HEVC_MAX_REFS]; + struct hevc_d_q_aux *frame_aux; + + /* Slice vars */ + unsigned int slice_idx; + unsigned int idx_inuse; + bool slice_temporal_mvp; /* Slice flag but constant for frame */ + bool use_aux; + bool mk_aux; + + /* Temp vars per run - don't actually need to persist */ + dma_addr_t src_addr; + const struct v4l2_ctrl_hevc_slice_params *sh; + const struct v4l2_ctrl_hevc_decode_params *dec; + unsigned int nb_refs[2]; + unsigned int slice_qp; + unsigned int max_num_merge_cand; /* 0 if I-slice */ + bool dependent_slice_segment_flag; + u32 data_len; + + unsigned int start_ts; /* slice_segment_addr -> ts */ + unsigned int start_ctb_x; /* CTB X,Y of start_ts */ + unsigned int start_ctb_y; + unsigned int prev_ctb_x; /* CTB X,Y of start_ts - 1 */ + unsigned int prev_ctb_y; +}; + +/* Phase 1 command and bit FIFOs */ +static int cmds_check_space(struct hevc_d_dec_env *const de, unsigned int n) +{ + unsigned int newmax; + + if (de->cmd_len + n <= de->cmd_max) + return 0; + + newmax = roundup_pow_of_two(de->cmd_len + n); + if (newmax > CMD_BUFFER_SIZE_MAX) { + v4l2_err(&de->ctx->dev->v4l2_dev, + "%s: n %u implausible\n", __func__, newmax); + return -ENOMEM; + } + + if (hwbuf_realloc_copy(de->ctx->dev, &de->cmd, newmax * sizeof(u64))) { + v4l2_err(&de->ctx->dev->v4l2_dev, + "Failed cmd buffer realloc from %u to %u\n", + de->cmd_max, newmax); + return -ENOMEM; + } + hevc_d_dbg(1, &de->ctx->dev->v4l2_dev, + "cmd buffer realloc from %u to %u\n", de->cmd_max, newmax); + + de->cmd_max = newmax; + return 0; +} + +static void p1_apb_write(struct hevc_d_dec_env *const de, const u16 addr, + const u32 data) +{ + WRITE_ONCE(((u64 *)de->cmd.ptr)[de->cmd_len], addr | ((u64)data << 32)); + de->cmd_len++; +} + +static int ctb_to_tile(unsigned int ctb, unsigned int *bd, int num) +{ + int i; + + for (i = 1; ctb >= bd[i]; i++) + ; /* bd[] has num+1 elements; bd[0]=0; */ + + return i - 1; +} + +static unsigned int ctb_to_tile_x(const struct hevc_d_dec_state *const s, + const unsigned int ctb_x) +{ + return ctb_to_tile(ctb_x, s->col_bd, s->tile_width); +} + +static unsigned int ctb_to_tile_y(const struct hevc_d_dec_state *const s, + const unsigned int ctb_y) +{ + return ctb_to_tile(ctb_y, s->row_bd, s->tile_height); +} + +static void aux_q_free(struct hevc_d_ctx *const ctx, + struct hevc_d_q_aux *const aq) +{ + struct hevc_d_dev *const dev = ctx->dev; + + hwbuf_free(dev, &aq->col); + kfree(aq); +} + +static struct hevc_d_q_aux *aux_q_alloc(struct hevc_d_ctx *const ctx, + const unsigned int q_index) +{ + struct hevc_d_dev *const dev = ctx->dev; + struct hevc_d_q_aux *const aq = kzalloc(sizeof(*aq), GFP_KERNEL); + + if (!aq) + return NULL; + + if (hwbuf_alloc(dev, &aq->col, ctx->colmv_picsize, + DMA_ATTR_FORCE_CONTIGUOUS | DMA_ATTR_NO_KERNEL_MAPPING)) + goto fail; + + /* + * Spinlock not required as called in P0 only and + * aux checks done by _new + */ + aq->refcount = 1; + aq->q_index = q_index; + ctx->aux_ents[q_index] = aq; + return aq; + +fail: + kfree(aq); + return NULL; +} + +static struct hevc_d_q_aux *aux_q_new(struct hevc_d_ctx *const ctx, + const unsigned int q_index) +{ + struct hevc_d_q_aux *aq; + unsigned long lockflags; + + spin_lock_irqsave(&ctx->aux_lock, lockflags); + /* + * If we already have this allocated to a slot then use that + * and assume that it will all work itself out in the pipeline + */ + aq = ctx->aux_ents[q_index]; + if (aq) { + ++aq->refcount; + } else { + aq = ctx->aux_free; + if (aq) { + ctx->aux_free = aq->next; + aq->next = NULL; + aq->refcount = 1; + aq->q_index = q_index; + ctx->aux_ents[q_index] = aq; + } + } + spin_unlock_irqrestore(&ctx->aux_lock, lockflags); + + if (!aq) + aq = aux_q_alloc(ctx, q_index); + + return aq; +} + +static struct hevc_d_q_aux *aux_q_ref_idx(struct hevc_d_ctx *const ctx, + const int q_index) +{ + unsigned long lockflags; + struct hevc_d_q_aux *aq; + + spin_lock_irqsave(&ctx->aux_lock, lockflags); + aq = ctx->aux_ents[q_index]; + if (aq) + ++aq->refcount; + spin_unlock_irqrestore(&ctx->aux_lock, lockflags); + + return aq; +} + +static struct hevc_d_q_aux *aux_q_ref(struct hevc_d_ctx *const ctx, + struct hevc_d_q_aux *const aq) +{ + unsigned long lockflags; + + if (aq) { + spin_lock_irqsave(&ctx->aux_lock, lockflags); + ++aq->refcount; + spin_unlock_irqrestore(&ctx->aux_lock, lockflags); + } + return aq; +} + +static void aux_q_release(struct hevc_d_ctx *const ctx, + struct hevc_d_q_aux **const paq) +{ + struct hevc_d_q_aux *const aq = *paq; + unsigned long lockflags; + + if (!aq) + return; + + *paq = NULL; + + spin_lock_irqsave(&ctx->aux_lock, lockflags); + if (--aq->refcount == 0) { + aq->next = ctx->aux_free; + ctx->aux_free = aq; + ctx->aux_ents[aq->q_index] = NULL; + aq->q_index = ~0U; + } + spin_unlock_irqrestore(&ctx->aux_lock, lockflags); +} + +static void aux_q_init(struct hevc_d_ctx *const ctx) +{ + spin_lock_init(&ctx->aux_lock); + ctx->aux_free = NULL; +} + +static void aux_q_uninit(struct hevc_d_ctx *const ctx) +{ + struct hevc_d_q_aux *aq; + + ctx->colmv_picsize = 0; + ctx->colmv_stride = 0; + while ((aq = ctx->aux_free) != NULL) { + ctx->aux_free = aq->next; + aux_q_free(ctx, aq); + } +} + +/* + * Initialisation process for context variables (CABAC init) + * see H.265 9.3.2.2 + * + * N.B. If comparing with FFmpeg note that this h/w uses slightly different + * offsets to FFmpegs array + */ + +/* Actual number of values */ +#define RPI_PROB_VALS 154U +/* Rounded up as we copy words */ +#define RPI_PROB_ARRAY_SIZE ((154 + 3) & ~3) + +/* Initialiser values - see tables H.265 9-4 through 9-42 */ +static const u8 prob_init[3][156] = { + { + 153, 200, 139, 141, 157, 154, 154, 154, 154, 154, 184, 154, 154, + 154, 184, 63, 154, 154, 154, 154, 154, 154, 154, 154, 154, 154, + 154, 154, 154, 153, 138, 138, 111, 141, 94, 138, 182, 154, 154, + 154, 140, 92, 137, 138, 140, 152, 138, 139, 153, 74, 149, 92, + 139, 107, 122, 152, 140, 179, 166, 182, 140, 227, 122, 197, 110, + 110, 124, 125, 140, 153, 125, 127, 140, 109, 111, 143, 127, 111, + 79, 108, 123, 63, 110, 110, 124, 125, 140, 153, 125, 127, 140, + 109, 111, 143, 127, 111, 79, 108, 123, 63, 91, 171, 134, 141, + 138, 153, 136, 167, 152, 152, 139, 139, 111, 111, 125, 110, 110, + 94, 124, 108, 124, 107, 125, 141, 179, 153, 125, 107, 125, 141, + 179, 153, 125, 107, 125, 141, 179, 153, 125, 140, 139, 182, 182, + 152, 136, 152, 136, 153, 136, 139, 111, 136, 139, 111, 0, 0, + }, + { + 153, 185, 107, 139, 126, 197, 185, 201, 154, 149, 154, 139, 154, + 154, 154, 152, 110, 122, 95, 79, 63, 31, 31, 153, 153, 168, + 140, 198, 79, 124, 138, 94, 153, 111, 149, 107, 167, 154, 154, + 154, 154, 196, 196, 167, 154, 152, 167, 182, 182, 134, 149, 136, + 153, 121, 136, 137, 169, 194, 166, 167, 154, 167, 137, 182, 125, + 110, 94, 110, 95, 79, 125, 111, 110, 78, 110, 111, 111, 95, + 94, 108, 123, 108, 125, 110, 94, 110, 95, 79, 125, 111, 110, + 78, 110, 111, 111, 95, 94, 108, 123, 108, 121, 140, 61, 154, + 107, 167, 91, 122, 107, 167, 139, 139, 155, 154, 139, 153, 139, + 123, 123, 63, 153, 166, 183, 140, 136, 153, 154, 166, 183, 140, + 136, 153, 154, 166, 183, 140, 136, 153, 154, 170, 153, 123, 123, + 107, 121, 107, 121, 167, 151, 183, 140, 151, 183, 140, 0, 0, + }, + { + 153, 160, 107, 139, 126, 197, 185, 201, 154, 134, 154, 139, 154, + 154, 183, 152, 154, 137, 95, 79, 63, 31, 31, 153, 153, 168, + 169, 198, 79, 224, 167, 122, 153, 111, 149, 92, 167, 154, 154, + 154, 154, 196, 167, 167, 154, 152, 167, 182, 182, 134, 149, 136, + 153, 121, 136, 122, 169, 208, 166, 167, 154, 152, 167, 182, 125, + 110, 124, 110, 95, 94, 125, 111, 111, 79, 125, 126, 111, 111, + 79, 108, 123, 93, 125, 110, 124, 110, 95, 94, 125, 111, 111, + 79, 125, 126, 111, 111, 79, 108, 123, 93, 121, 140, 61, 154, + 107, 167, 91, 107, 107, 167, 139, 139, 170, 154, 139, 153, 139, + 123, 123, 63, 124, 166, 183, 140, 136, 153, 154, 166, 183, 140, + 136, 153, 154, 166, 183, 140, 136, 153, 154, 170, 153, 138, 138, + 122, 121, 122, 121, 167, 151, 183, 140, 151, 183, 140, 0, 0, + }, +}; + +#define CMDS_WRITE_PROB ((RPI_PROB_ARRAY_SIZE / 4) + 1) + +static void write_prob(struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s) +{ + const unsigned int init_type = + ((s->sh->flags & V4L2_HEVC_SLICE_PARAMS_FLAG_CABAC_INIT) != 0 && + s->sh->slice_type != HEVC_SLICE_I) ? + s->sh->slice_type + 1 : + 2 - s->sh->slice_type; + const int q = clamp((int)s->slice_qp, 0, 51); + const u8 *p = prob_init[init_type]; + u8 dst[RPI_PROB_ARRAY_SIZE]; + unsigned int i; + + for (i = 0; i < RPI_PROB_VALS; i++) { + int init_value = p[i]; + int m = (init_value >> 4) * 5 - 45; + int n = ((init_value & 15) << 3) - 16; + int pre = 2 * (((m * q) >> 4) + n) - 127; + + pre ^= pre >> 31; + if (pre > 124) + pre = 124 + (pre & 1); + dst[i] = pre; + } + for (i = RPI_PROB_VALS; i != RPI_PROB_ARRAY_SIZE; ++i) + dst[i] = 0; + + for (i = 0; i < RPI_PROB_ARRAY_SIZE; i += 4) + p1_apb_write(de, 0x1000 + i, + dst[i] + (dst[i + 1] << 8) + (dst[i + 2] << 16) + + (dst[i + 3] << 24)); + + /* + * Having written the prob array back it up + * This is not always needed but is a small overhead that simplifies + * (and speeds up) some multi-tile & WPP scenarios + * There are no scenarios where having written a prob we ever want + * a previous (non-initial) state back + */ + p1_apb_write(de, RPI_TRANSFER, PROB_BACKUP); +} + +#define CMDS_WRITE_SCALING_FACTORS NUM_SCALING_FACTORS +static void write_scaling_factors(struct hevc_d_dec_env *const de) +{ + const u8 *p = (u8 *)de->scaling_factors; + int i; + + for (i = 0; i < NUM_SCALING_FACTORS; i += 4, p += 4) + p1_apb_write(de, 0x2000 + i, + p[0] + (p[1] << 8) + (p[2] << 16) + (p[3] << 24)); +} + +static inline __u32 dma_to_axi_addr(dma_addr_t a) +{ + return (__u32)(a >> 6); +} + +#define CMDS_WRITE_BITSTREAM 4 +static int write_bitstream(struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s) +{ + /* V4L2 always has emulation prevention bytes in the stream */ + const int rpi_use_emu = 1; + const unsigned int len = s->data_len; + const dma_addr_t addr = s->src_addr + s->sh->data_byte_offset; + const unsigned int offset = addr & 63; + + p1_apb_write(de, RPI_BFBASE, dma_to_axi_addr(addr)); + p1_apb_write(de, RPI_BFNUM, len); + p1_apb_write(de, RPI_BFCONTROL, offset + (1 << 7)); /* Stop */ + p1_apb_write(de, RPI_BFCONTROL, offset + (rpi_use_emu << 6)); + return 0; +} + +/* + * The slice constant part of the slice register - width and height need to + * be ORed in later as they are per-tile / WPP-row + */ +static u32 slice_reg_const(const struct hevc_d_dec_state *const s) +{ + u32 x = (s->max_num_merge_cand << 0) | + (s->nb_refs[L0] << 4) | + (s->nb_refs[L1] << 8) | + (s->sh->slice_type << 12); + + if (s->sh->flags & V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_LUMA) + x |= BIT(14); + if (s->sh->flags & V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_CHROMA) + x |= BIT(15); + if (s->sh->slice_type == HEVC_SLICE_B && + (s->sh->flags & V4L2_HEVC_SLICE_PARAMS_FLAG_MVD_L1_ZERO)) + x |= BIT(16); + + return x; +} + +#define CMDS_NEW_SLICE_SEGMENT (4 + CMDS_WRITE_SCALING_FACTORS) + +static void new_slice_segment(struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s) +{ + const struct v4l2_ctrl_hevc_sps *const sps = &s->sps; + const struct v4l2_ctrl_hevc_pps *const pps = &s->pps; + + p1_apb_write(de, + RPI_SPS0, + ((sps->log2_min_luma_coding_block_size_minus3 + 3) << 0) | + (s->log2_ctb_size << 4) | + ((sps->log2_min_luma_transform_block_size_minus2 + 2) + << 8) | + ((sps->log2_min_luma_transform_block_size_minus2 + 2 + + sps->log2_diff_max_min_luma_transform_block_size) + << 12) | + ((sps->bit_depth_luma_minus8 + 8) << 16) | + ((sps->bit_depth_chroma_minus8 + 8) << 20) | + (sps->max_transform_hierarchy_depth_intra << 24) | + (sps->max_transform_hierarchy_depth_inter << 28)); + + p1_apb_write(de, + RPI_SPS1, + ((sps->pcm_sample_bit_depth_luma_minus1 + 1) << 0) | + ((sps->pcm_sample_bit_depth_chroma_minus1 + 1) << 4) | + ((sps->log2_min_pcm_luma_coding_block_size_minus3 + 3) + << 8) | + ((sps->log2_min_pcm_luma_coding_block_size_minus3 + 3 + + sps->log2_diff_max_min_pcm_luma_coding_block_size) + << 12) | + (((sps->flags & V4L2_HEVC_SPS_FLAG_SEPARATE_COLOUR_PLANE) ? + 0 : sps->chroma_format_idc) << 16) | + ((!!(sps->flags & V4L2_HEVC_SPS_FLAG_AMP_ENABLED)) << 18) | + ((!!(sps->flags & V4L2_HEVC_SPS_FLAG_PCM_ENABLED)) << 19) | + ((!!(sps->flags & V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED)) + << 20) | + ((!!(sps->flags & + V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED)) + << 21)); + + p1_apb_write(de, + RPI_PPS, + ((s->log2_ctb_size - pps->diff_cu_qp_delta_depth) << 0) | + ((!!(pps->flags & V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED)) + << 4) | + ((!!(pps->flags & + V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED)) + << 5) | + ((!!(pps->flags & V4L2_HEVC_PPS_FLAG_TRANSFORM_SKIP_ENABLED)) + << 6) | + ((!!(pps->flags & + V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED)) + << 7) | + (((pps->pps_cb_qp_offset + s->sh->slice_cb_qp_offset) & 255) + << 8) | + (((pps->pps_cr_qp_offset + s->sh->slice_cr_qp_offset) & 255) + << 16) | + ((!!(pps->flags & + V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED)) + << 24)); + + if (!s->start_ts && + (sps->flags & V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED) != 0) + write_scaling_factors(de); + + if (!s->dependent_slice_segment_flag) { + int ctb_col = s->sh->slice_segment_addr % + de->pic_width_in_ctbs_y; + int ctb_row = s->sh->slice_segment_addr / + de->pic_width_in_ctbs_y; + + de->reg_slicestart = (ctb_col << 0) + (ctb_row << 16); + } + + p1_apb_write(de, RPI_SLICESTART, de->reg_slicestart); +} + +/* Slice messages */ + +static void msg_slice(struct hevc_d_dec_env *const de, const u16 msg) +{ + de->slice_msgs[de->num_slice_msgs++] = msg; +} + +#define CMDS_PROGRAM_SLICECMDS (1 + SLICE_MSGS_MAX) +static void program_slicecmds(struct hevc_d_dec_env *const de, + const int sliceid) +{ + int i; + + p1_apb_write(de, RPI_SLICECMDS, de->num_slice_msgs + (sliceid << 8)); + + for (i = 0; i < de->num_slice_msgs; i++) + p1_apb_write(de, 0x4000 + 4 * i, de->slice_msgs[i] & 0xffff); +} + +/* NoBackwardPredictionFlag 8.3.5 - Simply checks POCs of the frames referenced + * by the idx array against cur_poc. Needs to be called twice (with L0 & L1) to + * get NoBackwardPredictionFlag. + */ +static int has_backward(const struct v4l2_hevc_dpb_entry *const dpb, + const __u8 *const idx, const unsigned int n, + const s32 cur_poc) +{ + unsigned int i; + + for (i = 0; i < n; ++i) { + if (cur_poc < dpb[idx[i]].pic_order_cnt_val) + return 0; + } + return 1; +} + +static void pre_slice_decode(struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s) +{ + const struct v4l2_ctrl_hevc_slice_params *const sh = s->sh; + const struct v4l2_ctrl_hevc_decode_params *const dec = s->dec; + int weighted_pred_flag, idx; + u16 cmd_slice; + unsigned int collocated_from_l0_flag; + + de->num_slice_msgs = 0; + + cmd_slice = 0; + if (sh->slice_type == HEVC_SLICE_I) + cmd_slice = 1; + if (sh->slice_type == HEVC_SLICE_P) + cmd_slice = 2; + if (sh->slice_type == HEVC_SLICE_B) + cmd_slice = 3; + + cmd_slice |= (s->nb_refs[L0] << 2) | (s->nb_refs[L1] << 6) | + (s->max_num_merge_cand << 11); + + collocated_from_l0_flag = + !s->slice_temporal_mvp || + sh->slice_type != HEVC_SLICE_B || + (sh->flags & V4L2_HEVC_SLICE_PARAMS_FLAG_COLLOCATED_FROM_L0); + cmd_slice |= collocated_from_l0_flag << 14; + + if (sh->slice_type == HEVC_SLICE_P || sh->slice_type == HEVC_SLICE_B) { + /* Flag to say all reference pictures are from the past */ + const int no_backward_pred_flag = + has_backward(dec->dpb, sh->ref_idx_l0, s->nb_refs[L0], + sh->slice_pic_order_cnt) && + has_backward(dec->dpb, sh->ref_idx_l1, s->nb_refs[L1], + sh->slice_pic_order_cnt); + cmd_slice |= no_backward_pred_flag << 10; + msg_slice(de, cmd_slice); + + if (s->slice_temporal_mvp) { + const __u8 *const rpl = collocated_from_l0_flag ? + sh->ref_idx_l0 : sh->ref_idx_l1; + de->dpbno_col = rpl[sh->collocated_ref_idx]; + } + + /* Write reference picture descriptions */ + weighted_pred_flag = + sh->slice_type == HEVC_SLICE_P ? + !!(s->pps.flags & V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED) : + !!(s->pps.flags & V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED); + + for (idx = 0; idx < s->nb_refs[L0]; ++idx) { + unsigned int dpb_no = sh->ref_idx_l0[idx]; + + msg_slice(de, + dpb_no | + ((dec->dpb[dpb_no].flags & + V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE) ? + (1 << 4) : 0) | + (weighted_pred_flag ? (3 << 5) : 0)); + msg_slice(de, dec->dpb[dpb_no].pic_order_cnt_val & 0xffff); + + if (weighted_pred_flag) { + const struct v4l2_hevc_pred_weight_table + *const w = &sh->pred_weight_table; + const int luma_weight_denom = + (1 << w->luma_log2_weight_denom); + const unsigned int chroma_log2_weight_denom = + (w->luma_log2_weight_denom + + w->delta_chroma_log2_weight_denom); + const int chroma_weight_denom = + (1 << chroma_log2_weight_denom); + + msg_slice(de, + w->luma_log2_weight_denom | + (((w->delta_luma_weight_l0[idx] + + luma_weight_denom) & 0x1ff) + << 3)); + msg_slice(de, w->luma_offset_l0[idx] & 0xff); + msg_slice(de, + chroma_log2_weight_denom | + (((w->delta_chroma_weight_l0[idx][0] + + chroma_weight_denom) & 0x1ff) + << 3)); + msg_slice(de, + w->chroma_offset_l0[idx][0] & 0xff); + msg_slice(de, + chroma_log2_weight_denom | + (((w->delta_chroma_weight_l0[idx][1] + + chroma_weight_denom) & 0x1ff) + << 3)); + msg_slice(de, + w->chroma_offset_l0[idx][1] & 0xff); + } + } + + for (idx = 0; idx < s->nb_refs[L1]; ++idx) { + unsigned int dpb_no = sh->ref_idx_l1[idx]; + + msg_slice(de, + dpb_no | + ((dec->dpb[dpb_no].flags & + V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE) ? + (1 << 4) : 0) | + (weighted_pred_flag ? (3 << 5) : 0)); + msg_slice(de, dec->dpb[dpb_no].pic_order_cnt_val & 0xffff); + if (weighted_pred_flag) { + const struct v4l2_hevc_pred_weight_table + *const w = &sh->pred_weight_table; + const int luma_weight_denom = + (1 << w->luma_log2_weight_denom); + const unsigned int chroma_log2_weight_denom = + (w->luma_log2_weight_denom + + w->delta_chroma_log2_weight_denom); + const int chroma_weight_denom = + (1 << chroma_log2_weight_denom); + + msg_slice(de, + w->luma_log2_weight_denom | + (((w->delta_luma_weight_l1[idx] + + luma_weight_denom) & 0x1ff) << 3)); + msg_slice(de, w->luma_offset_l1[idx] & 0xff); + msg_slice(de, + chroma_log2_weight_denom | + (((w->delta_chroma_weight_l1[idx][0] + + chroma_weight_denom) & 0x1ff) + << 3)); + msg_slice(de, + w->chroma_offset_l1[idx][0] & 0xff); + msg_slice(de, + chroma_log2_weight_denom | + (((w->delta_chroma_weight_l1[idx][1] + + chroma_weight_denom) & 0x1ff) + << 3)); + msg_slice(de, + w->chroma_offset_l1[idx][1] & 0xff); + } + } + } else { + msg_slice(de, cmd_slice); + } + + msg_slice(de, + (sh->slice_beta_offset_div2 & 15) | + ((sh->slice_tc_offset_div2 & 15) << 4) | + ((sh->flags & + V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_DEBLOCKING_FILTER_DISABLED) ? + 1 << 8 : 0) | + ((sh->flags & + V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED) ? + 1 << 9 : 0) | + ((s->pps.flags & + V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED) ? + 1 << 10 : 0)); + + msg_slice(de, ((sh->slice_cr_qp_offset & 31) << 5) + + (sh->slice_cb_qp_offset & 31)); /* CMD_QPOFF */ +} + +#define CMDS_WRITE_SLICE 1 +static void write_slice(struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s, + const u32 slice_const, + const unsigned int ctb_col, + const unsigned int ctb_row) +{ + const unsigned int cs = (1 << s->log2_ctb_size); + const unsigned int w_last = s->sps.pic_width_in_luma_samples & (cs - 1); + const unsigned int h_last = s->sps.pic_height_in_luma_samples & (cs - 1); + + p1_apb_write(de, RPI_SLICE, + slice_const | + ((ctb_col + 1 < s->ctb_width || !w_last ? + cs : w_last) << 17) | + ((ctb_row + 1 < s->ctb_height || !h_last ? + cs : h_last) << 24)); +} + +#define PAUSE_MODE_WPP 1 +#define PAUSE_MODE_TILE 0xffff + +/* + * N.B. This can be called to fill in data from the previous slice so must not + * use any state data that may change from slice to slice (e.g. qp) + */ +#define CMDS_NEW_ENTRY_POINT (6 + CMDS_WRITE_SLICE) + +static void new_entry_point(struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s, + const bool do_bte, + const bool reset_qp_y, + const u32 pause_mode, + const unsigned int tile_x, + const unsigned int tile_y, + const unsigned int ctb_col, + const unsigned int ctb_row, + const unsigned int slice_qp, + const u32 slice_const) +{ + const unsigned int endx = s->col_bd[tile_x + 1] - 1; + const unsigned int endy = (pause_mode == PAUSE_MODE_WPP) ? + ctb_row : s->row_bd[tile_y + 1] - 1; + + p1_apb_write(de, RPI_TILESTART, + s->col_bd[tile_x] | (s->row_bd[tile_y] << 16)); + p1_apb_write(de, RPI_TILEEND, endx | (endy << 16)); + + if (do_bte) + p1_apb_write(de, RPI_BEGINTILEEND, endx | (endy << 16)); + + write_slice(de, s, slice_const, endx, endy); + + if (reset_qp_y) { + unsigned int sps_qp_bd_offset = + 6 * s->sps.bit_depth_luma_minus8; + + p1_apb_write(de, RPI_QP, sps_qp_bd_offset + slice_qp); + } + + p1_apb_write(de, RPI_MODE, + pause_mode | + ((endx == s->ctb_width - 1) << 17) | + ((endy == s->ctb_height - 1) << 18)); + + p1_apb_write(de, RPI_CONTROL, (ctb_col << 0) | (ctb_row << 16)); + + de->entry_tile_x = tile_x; + de->entry_tile_y = tile_y; + de->entry_ctb_x = ctb_col; + de->entry_ctb_y = ctb_row; + de->entry_qp = slice_qp; + de->entry_slice = slice_const; +} + +/* Wavefront mode */ + +#define CMDS_WPP_PAUSE 4 +static void wpp_pause(struct hevc_d_dec_env *const de, int ctb_row) +{ + p1_apb_write(de, RPI_STATUS, (ctb_row << 18) | 0x25); + p1_apb_write(de, RPI_TRANSFER, PROB_BACKUP); + p1_apb_write(de, RPI_MODE, + ctb_row == de->pic_height_in_ctbs_y - 1 ? + 0x70000 : 0x30000); + p1_apb_write(de, RPI_CONTROL, (ctb_row << 16) + 2); +} + +#define CMDS_WPP_ENTRY_FILL_1 (CMDS_WPP_PAUSE + 2 + CMDS_NEW_ENTRY_POINT) +static int wpp_entry_fill(struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s, + const unsigned int last_y) +{ + int rv; + const unsigned int last_x = s->ctb_width - 1; + + rv = cmds_check_space(de, CMDS_WPP_ENTRY_FILL_1 * + (last_y - de->entry_ctb_y)); + if (rv) + return rv; + + while (de->entry_ctb_y < last_y) { + /* wpp_entry_x/y set by wpp_entry_point */ + if (s->ctb_width > 2) + wpp_pause(de, de->entry_ctb_y); + p1_apb_write(de, RPI_STATUS, + (de->entry_ctb_y << 18) | (last_x << 5) | 2); + + /* if width == 1 then the saved state is the init one */ + if (s->ctb_width == 2) + p1_apb_write(de, RPI_TRANSFER, PROB_BACKUP); + else + p1_apb_write(de, RPI_TRANSFER, PROB_RELOAD); + + new_entry_point(de, s, false, true, PAUSE_MODE_WPP, + 0, 0, 0, de->entry_ctb_y + 1, + de->entry_qp, de->entry_slice); + } + return 0; +} + +static int wpp_end_previous_slice(struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s) +{ + int rv; + + rv = wpp_entry_fill(de, s, s->prev_ctb_y); + if (rv) + return rv; + + rv = cmds_check_space(de, CMDS_WPP_PAUSE + 2); + if (rv) + return rv; + + if (de->entry_ctb_x < 2 && + (de->entry_ctb_y < s->start_ctb_y || s->start_ctb_x > 2) && + s->ctb_width > 2) + wpp_pause(de, s->prev_ctb_y); + p1_apb_write(de, RPI_STATUS, + 1 | (s->prev_ctb_x << 5) | (s->prev_ctb_y << 18)); + if (s->start_ctb_x == 2 || + (s->ctb_width == 2 && de->entry_ctb_y < s->start_ctb_y)) + p1_apb_write(de, RPI_TRANSFER, PROB_BACKUP); + return 0; +} + +/* + * Only main profile supported so WPP => !Tiles which makes some of the + * next chunk code simpler + */ +static int wpp_decode_slice(struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s, + bool last_slice) +{ + bool reset_qp_y = true; + const bool indep = !s->dependent_slice_segment_flag; + int rv; + + if (s->start_ts) { + rv = wpp_end_previous_slice(de, s); + if (rv) + return rv; + } + pre_slice_decode(de, s); + + rv = cmds_check_space(de, + CMDS_WRITE_BITSTREAM + + CMDS_WRITE_PROB + + CMDS_PROGRAM_SLICECMDS + + CMDS_NEW_SLICE_SEGMENT + + CMDS_NEW_ENTRY_POINT); + if (rv) + return rv; + + rv = write_bitstream(de, s); + if (rv) + return rv; + + if (!s->start_ts || indep || s->ctb_width == 1) + write_prob(de, s); + else if (!s->start_ctb_x) + p1_apb_write(de, RPI_TRANSFER, PROB_RELOAD); + else + reset_qp_y = false; + + program_slicecmds(de, s->slice_idx); + new_slice_segment(de, s); + new_entry_point(de, s, indep, reset_qp_y, PAUSE_MODE_WPP, + 0, 0, s->start_ctb_x, s->start_ctb_y, + s->slice_qp, slice_reg_const(s)); + + if (last_slice) { + rv = wpp_entry_fill(de, s, s->ctb_height - 1); + if (rv) + return rv; + + rv = cmds_check_space(de, CMDS_WPP_PAUSE + 1); + if (rv) + return rv; + + if (de->entry_ctb_x < 2 && s->ctb_width > 2) + wpp_pause(de, s->ctb_height - 1); + + p1_apb_write(de, RPI_STATUS, + 1 | ((s->ctb_width - 1) << 5) | + ((s->ctb_height - 1) << 18)); + } + return 0; +} + +/* Tiles mode */ + +/* Guarantees 1 cmd entry free on exit */ +static int tile_entry_fill(struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s, + const unsigned int last_tile_x, + const unsigned int last_tile_y) +{ + while (de->entry_tile_y < last_tile_y || + (de->entry_tile_y == last_tile_y && + de->entry_tile_x < last_tile_x)) { + int rv; + unsigned int t_x = de->entry_tile_x; + unsigned int t_y = de->entry_tile_y; + const unsigned int last_x = s->col_bd[t_x + 1] - 1; + const unsigned int last_y = s->row_bd[t_y + 1] - 1; + + /* One more than needed here */ + rv = cmds_check_space(de, CMDS_NEW_ENTRY_POINT + 3); + if (rv) + return rv; + + p1_apb_write(de, RPI_STATUS, + 2 | (last_x << 5) | (last_y << 18)); + p1_apb_write(de, RPI_TRANSFER, PROB_RELOAD); + + /* Inc tile */ + if (++t_x >= s->tile_width) { + t_x = 0; + ++t_y; + } + + new_entry_point(de, s, false, true, PAUSE_MODE_TILE, + t_x, t_y, s->col_bd[t_x], s->row_bd[t_y], + de->entry_qp, de->entry_slice); + } + return 0; +} + +/* Write STATUS register with expected end CTU address of previous slice */ +static int end_previous_slice(struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s) +{ + int rv; + + rv = tile_entry_fill(de, s, + ctb_to_tile_x(s, s->prev_ctb_x), + ctb_to_tile_y(s, s->prev_ctb_y)); + if (rv) + return rv; + + p1_apb_write(de, RPI_STATUS, + 1 | (s->prev_ctb_x << 5) | (s->prev_ctb_y << 18)); + return 0; +} + +static int decode_slice(struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s, + bool last_slice) +{ + bool reset_qp_y; + unsigned int tile_x = ctb_to_tile_x(s, s->start_ctb_x); + unsigned int tile_y = ctb_to_tile_y(s, s->start_ctb_y); + int rv; + + if (s->start_ts) { + rv = end_previous_slice(de, s); + if (rv) + return rv; + } + + rv = cmds_check_space(de, + CMDS_WRITE_BITSTREAM + + CMDS_WRITE_PROB + + CMDS_PROGRAM_SLICECMDS + + CMDS_NEW_SLICE_SEGMENT + + CMDS_NEW_ENTRY_POINT); + if (rv) + return rv; + + pre_slice_decode(de, s); + rv = write_bitstream(de, s); + if (rv) + return rv; + + reset_qp_y = !s->start_ts || + !s->dependent_slice_segment_flag || + tile_x != ctb_to_tile_x(s, s->prev_ctb_x) || + tile_y != ctb_to_tile_y(s, s->prev_ctb_y); + if (reset_qp_y) + write_prob(de, s); + + program_slicecmds(de, s->slice_idx); + new_slice_segment(de, s); + new_entry_point(de, s, !s->dependent_slice_segment_flag, reset_qp_y, + PAUSE_MODE_TILE, + tile_x, tile_y, s->start_ctb_x, s->start_ctb_y, + s->slice_qp, slice_reg_const(s)); + + /* + * If this is the last slice then fill in the other tile entries + * now, otherwise this will be done at the start of the next slice + * when it will be known where this slice finishes + */ + if (last_slice) { + rv = tile_entry_fill(de, s, + s->tile_width - 1, + s->tile_height - 1); + if (rv) + return rv; + p1_apb_write(de, RPI_STATUS, + 1 | ((s->ctb_width - 1) << 5) | + ((s->ctb_height - 1) << 18)); + } + return 0; +} + +/* Scaling factors */ + +static void expand_scaling_list(const unsigned int size_id, + u8 *const dst0, + const u8 *const src0, uint8_t dc) +{ + u8 *d; + unsigned int x, y; + + switch (size_id) { + case 0: + memcpy(dst0, src0, 16); + break; + case 1: + memcpy(dst0, src0, 64); + break; + case 2: + d = dst0; + + for (y = 0; y != 16; y++) { + const u8 *s = src0 + (y >> 1) * 8; + + for (x = 0; x != 8; ++x) { + *d++ = *s; + *d++ = *s++; + } + } + dst0[0] = dc; + break; + default: + d = dst0; + + for (y = 0; y != 32; y++) { + const u8 *s = src0 + (y >> 2) * 8; + + for (x = 0; x != 8; ++x) { + *d++ = *s; + *d++ = *s; + *d++ = *s; + *d++ = *s++; + } + } + dst0[0] = dc; + break; + } +} + +static void populate_scaling_factors(const struct hevc_d_run *const run, + struct hevc_d_dec_env *const de, + const struct hevc_d_dec_state *const s) +{ + const struct v4l2_ctrl_hevc_scaling_matrix *const sl = + run->h265.scaling_matrix; + /* Array of constants for scaling factors */ + static const u32 scaling_factor_offsets[4][6] = { + /* + * MID0 MID1 MID2 MID3 MID4 MID5 + */ + /* SID0 (4x4) */ + { 0x0000, 0x0010, 0x0020, 0x0030, 0x0040, 0x0050 }, + /* SID1 (8x8) */ + { 0x0060, 0x00A0, 0x00E0, 0x0120, 0x0160, 0x01A0 }, + /* SID2 (16x16) */ + { 0x01E0, 0x02E0, 0x03E0, 0x04E0, 0x05E0, 0x06E0 }, + /* SID3 (32x32) */ + { 0x07E0, 0x0BE0, 0x0000, 0x0000, 0x0000, 0x0000 } + }; + unsigned int mid; + + for (mid = 0; mid < 6; mid++) + expand_scaling_list(0, de->scaling_factors + + scaling_factor_offsets[0][mid], + sl->scaling_list_4x4[mid], 0); + for (mid = 0; mid < 6; mid++) + expand_scaling_list(1, de->scaling_factors + + scaling_factor_offsets[1][mid], + sl->scaling_list_8x8[mid], 0); + for (mid = 0; mid < 6; mid++) + expand_scaling_list(2, de->scaling_factors + + scaling_factor_offsets[2][mid], + sl->scaling_list_16x16[mid], + sl->scaling_list_dc_coef_16x16[mid]); + for (mid = 0; mid < 2; mid++) + expand_scaling_list(3, de->scaling_factors + + scaling_factor_offsets[3][mid], + sl->scaling_list_32x32[mid], + sl->scaling_list_dc_coef_32x32[mid]); +} + +static void free_ps_info(struct hevc_d_dec_state *const s) +{ + kfree(s->ctb_addr_rs_to_ts); + s->ctb_addr_rs_to_ts = NULL; + kfree(s->ctb_addr_ts_to_rs); + s->ctb_addr_ts_to_rs = NULL; + + kfree(s->col_bd); + s->col_bd = NULL; + kfree(s->row_bd); + s->row_bd = NULL; +} + +static unsigned int tile_width(const struct hevc_d_dec_state *const s, + const unsigned int t_x) +{ + return s->col_bd[t_x + 1] - s->col_bd[t_x]; +} + +static unsigned int tile_height(const struct hevc_d_dec_state *const s, + const unsigned int t_y) +{ + return s->row_bd[t_y + 1] - s->row_bd[t_y]; +} + +static void fill_rs_to_ts(struct hevc_d_dec_state *const s) +{ + unsigned int ts = 0; + unsigned int t_y; + unsigned int tr_rs = 0; + + for (t_y = 0; t_y != s->tile_height; ++t_y) { + const unsigned int t_h = tile_height(s, t_y); + unsigned int t_x; + unsigned int tc_rs = tr_rs; + + for (t_x = 0; t_x != s->tile_width; ++t_x) { + const unsigned int t_w = tile_width(s, t_x); + unsigned int y; + unsigned int rs = tc_rs; + + for (y = 0; y != t_h; ++y) { + unsigned int x; + + for (x = 0; x != t_w; ++x) { + s->ctb_addr_rs_to_ts[rs + x] = ts; + s->ctb_addr_ts_to_rs[ts] = rs + x; + ++ts; + } + rs += s->ctb_width; + } + tc_rs += t_w; + } + tr_rs += t_h * s->ctb_width; + } +} + +static int updated_ps(struct hevc_d_dec_state *const s) +{ + unsigned int i; + + free_ps_info(s); + + /* Inferred parameters */ + s->log2_ctb_size = s->sps.log2_min_luma_coding_block_size_minus3 + 3 + + s->sps.log2_diff_max_min_luma_coding_block_size; + + s->ctb_width = (s->sps.pic_width_in_luma_samples + + (1 << s->log2_ctb_size) - 1) >> + s->log2_ctb_size; + s->ctb_height = (s->sps.pic_height_in_luma_samples + + (1 << s->log2_ctb_size) - 1) >> + s->log2_ctb_size; + s->ctb_size = s->ctb_width * s->ctb_height; + + s->ctb_addr_rs_to_ts = kmalloc_array(s->ctb_size, + sizeof(*s->ctb_addr_rs_to_ts), + GFP_KERNEL); + if (!s->ctb_addr_rs_to_ts) + goto fail; + s->ctb_addr_ts_to_rs = kmalloc_array(s->ctb_size, + sizeof(*s->ctb_addr_ts_to_rs), + GFP_KERNEL); + if (!s->ctb_addr_ts_to_rs) + goto fail; + + if (!(s->pps.flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED)) { + s->tile_width = 1; + s->tile_height = 1; + } else { + s->tile_width = s->pps.num_tile_columns_minus1 + 1; + s->tile_height = s->pps.num_tile_rows_minus1 + 1; + } + + s->col_bd = kmalloc_array((s->tile_width + 1), sizeof(*s->col_bd), + GFP_KERNEL); + if (!s->col_bd) + goto fail; + s->row_bd = kmalloc_array((s->tile_height + 1), sizeof(*s->row_bd), + GFP_KERNEL); + if (!s->row_bd) + goto fail; + + s->col_bd[0] = 0; + for (i = 1; i < s->tile_width; i++) + s->col_bd[i] = s->col_bd[i - 1] + + s->pps.column_width_minus1[i - 1] + 1; + s->col_bd[s->tile_width] = s->ctb_width; + + s->row_bd[0] = 0; + for (i = 1; i < s->tile_height; i++) + s->row_bd[i] = s->row_bd[i - 1] + + s->pps.row_height_minus1[i - 1] + 1; + s->row_bd[s->tile_height] = s->ctb_height; + + fill_rs_to_ts(s); + return 0; + +fail: + free_ps_info(s); + /* Set invalid to force reload */ + s->sps.pic_width_in_luma_samples = 0; + return -ENOMEM; +} + +static void setup_colmv(struct hevc_d_ctx *const ctx, struct hevc_d_run *run, + struct hevc_d_dec_state *const s) +{ + ctx->colmv_stride = ALIGN(s->sps.pic_width_in_luma_samples, 64); + ctx->colmv_picsize = ctx->colmv_stride * + (ALIGN(s->sps.pic_height_in_luma_samples, 64) >> 4); +} + +static struct hevc_d_dec_env *dec_env_new(struct hevc_d_ctx *const ctx) +{ + struct hevc_d_dec_env *de; + unsigned long lock_flags; + + spin_lock_irqsave(&ctx->dec_lock, lock_flags); + + de = ctx->dec_free; + if (de) { + ctx->dec_free = de->next; + de->next = NULL; + de->state = HEVC_D_DECODE_SLICE_START; + } + + spin_unlock_irqrestore(&ctx->dec_lock, lock_flags); + return de; +} + +/* Can be called from irq context */ +static void dec_env_delete(struct hevc_d_dec_env *const de) +{ + struct hevc_d_ctx * const ctx = de->ctx; + unsigned long lock_flags; + + aux_q_release(ctx, &de->frame_aux); + aux_q_release(ctx, &de->col_aux); + + spin_lock_irqsave(&ctx->dec_lock, lock_flags); + + de->state = HEVC_D_DECODE_END; + de->next = ctx->dec_free; + ctx->dec_free = de; + + spin_unlock_irqrestore(&ctx->dec_lock, lock_flags); +} + +static void dec_env_uninit(struct hevc_d_ctx *const ctx) +{ + unsigned int i; + + if (ctx->dec_pool) { + for (i = 0; i != HEVC_D_DEC_ENV_COUNT; ++i) + hwbuf_free(ctx->dev, &ctx->dec_pool[i].cmd); + + kfree(ctx->dec_pool); + } + + ctx->dec_pool = NULL; + ctx->dec_free = NULL; +} + +static int dec_env_init(struct hevc_d_ctx *const ctx) +{ + unsigned int i; + + ctx->dec_pool = kzalloc(sizeof(*ctx->dec_pool) * HEVC_D_DEC_ENV_COUNT, + GFP_KERNEL); + if (!ctx->dec_pool) + return -1; + + spin_lock_init(&ctx->dec_lock); + + ctx->dec_free = ctx->dec_pool; + for (i = 0; i != HEVC_D_DEC_ENV_COUNT - 1; ++i) + ctx->dec_pool[i].next = ctx->dec_pool + i + 1; + + for (i = 0; i != HEVC_D_DEC_ENV_COUNT; ++i) { + struct hevc_d_dec_env *const de = ctx->dec_pool + i; + + de->ctx = ctx; + de->decode_order = i; + de->cmd_max = CMD_BUFFER_SIZE_INIT; + if (hwbuf_alloc(ctx->dev, &de->cmd, + de->cmd_max * sizeof(u64), 0)) + goto fail; + } + + return 0; + +fail: + dec_env_uninit(ctx); + return -1; +} + +/* + * Assume that we get exactly the same DPB for every slice it makes no real + * sense otherwise. + */ +#if V4L2_HEVC_DPB_ENTRIES_NUM_MAX > 16 +#error HEVC_DPB_ENTRIES > h/w slots +#endif + +static u32 mk_config2(const struct hevc_d_dec_state *const s) +{ + const struct v4l2_ctrl_hevc_sps *const sps = &s->sps; + const struct v4l2_ctrl_hevc_pps *const pps = &s->pps; + u32 c; + + c = (sps->bit_depth_luma_minus8 + 8) << 0; /* BitDepthY */ + c |= (sps->bit_depth_chroma_minus8 + 8) << 4; /* BitDepthC */ + if (sps->bit_depth_luma_minus8) /* BitDepthY */ + c |= BIT(8); + if (sps->bit_depth_chroma_minus8) /* BitDepthC */ + c |= BIT(9); + c |= s->log2_ctb_size << 10; + if (pps->flags & V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED) + c |= BIT(13); + if (sps->flags & V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED) + c |= BIT(14); + if (s->mk_aux) + c |= BIT(15); /* Write motion vectors to external memory */ + c |= (pps->log2_parallel_merge_level_minus2 + 2) << 16; + if (s->slice_temporal_mvp) + c |= BIT(19); + if (sps->flags & V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED) + c |= BIT(20); + c |= (pps->pps_cb_qp_offset & 31) << 21; + c |= (pps->pps_cr_qp_offset & 31) << 26; + return c; +} + +static inline bool is_ref_unit_type(const unsigned int nal_unit_type) +{ + /* From Table 7-1 + * True for 1, 3, 5, 7, 9, 11, 13, 15 + */ + return (nal_unit_type & ~0xe) != 0; +} + +static int hevc_d_h265_setup(struct hevc_d_ctx *ctx, struct hevc_d_run *run) +{ + struct hevc_d_dev *const dev = ctx->dev; + const struct v4l2_ctrl_hevc_decode_params *const dec = + run->h265.dec; + /* sh0 used where slice header contents should be constant over all + * slices, or first slice of frame + */ + const struct v4l2_ctrl_hevc_slice_params *const sh0 = + run->h265.slice_params; + struct hevc_d_q_aux *dpb_q_aux[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; + struct hevc_d_dec_state *const s = ctx->state; + struct vb2_queue *vq; + struct hevc_d_dec_env *de = ctx->dec0; + unsigned int prev_rs; + unsigned int i; + int rv; + bool slice_temporal_mvp; + unsigned int ctb_size_y; + bool sps_changed = false; + + de = dec_env_new(ctx); + if (!de) { + v4l2_err(&dev->v4l2_dev, "Failed to find free decode env\n"); + return -1; + } + ctx->dec0 = de; + + s->sh = NULL; /* Avoid use until in the slice loop */ + + slice_temporal_mvp = (sh0->flags & + V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_TEMPORAL_MVP_ENABLED); + + /* Frame start */ + + if (!is_sps_set(run->h265.sps)) { + v4l2_warn(&dev->v4l2_dev, "SPS never set\n"); + goto fail; + } + /* Can't check for PPS easily as all 0's looks valid */ + + if (memcmp(&s->sps, run->h265.sps, sizeof(s->sps)) != 0) { + /* SPS changed */ + memcpy(&s->sps, run->h265.sps, sizeof(s->sps)); + sps_changed = true; + } + if (sps_changed || + memcmp(&s->pps, run->h265.pps, sizeof(s->pps)) != 0) { + /* SPS changed */ + memcpy(&s->pps, run->h265.pps, sizeof(s->pps)); + + /* Recalc stuff as required */ + rv = updated_ps(s); + if (rv) + goto fail; + } + + ctb_size_y = + 1U << (s->sps.log2_min_luma_coding_block_size_minus3 + + 3 + s->sps.log2_diff_max_min_luma_coding_block_size); + + de->pic_width_in_ctbs_y = + (s->sps.pic_width_in_luma_samples + ctb_size_y - 1) / + ctb_size_y; /* 7-15 */ + de->pic_height_in_ctbs_y = + (s->sps.pic_height_in_luma_samples + ctb_size_y - 1) / + ctb_size_y; /* 7-17 */ + de->cmd_len = 0; + de->dpbno_col = ~0U; + + de->luma_stride = ctx->dst_fmt.height * 128; + de->frame_luma_addr = + vb2_dma_contig_plane_dma_addr(&run->dst->vb2_buf, 0); + de->chroma_stride = de->luma_stride / 2; + de->frame_chroma_addr = + vb2_dma_contig_plane_dma_addr(&run->dst->vb2_buf, 1); + de->frame_aux = NULL; + + if (s->sps.bit_depth_luma_minus8 == 0) { + if (ctx->dst_fmt.pixelformat != V4L2_PIX_FMT_NV12MT_COL128) { + v4l2_err(&dev->v4l2_dev, + "Pixel format %#x != NV12MT_COL128 for 8-bit output", + ctx->dst_fmt.pixelformat); + goto fail; + } + } else { + if (ctx->dst_fmt.pixelformat != + V4L2_PIX_FMT_NV12MT_10_COL128) { + v4l2_err(&dev->v4l2_dev, + "Pixel format %#x != NV12MT_10_COL128 for 10-bit output", + ctx->dst_fmt.pixelformat); + goto fail; + } + } + + if (s->sps.pic_width_in_luma_samples > ctx->dst_fmt.width || + s->sps.pic_height_in_luma_samples > ctx->dst_fmt.height) { + v4l2_warn(&dev->v4l2_dev, + "SPS size (%dx%d) > capture size (%d,%d)\n", + s->sps.pic_width_in_luma_samples, + s->sps.pic_height_in_luma_samples, + ctx->dst_fmt.width, + ctx->dst_fmt.height); + goto fail; + } + + /* + * Fill in ref planes with our address s.t. if we mess up refs + * somehow then we still have a valid address entry + */ + for (i = 0; i != 16; ++i) { + de->ref_addrs[i][0] = de->frame_luma_addr; + de->ref_addrs[i][1] = de->frame_chroma_addr; + } + + /* + * Stash initial temporal_mvp flag + * This must be the same for all pic slices (7.4.7.1) + */ + s->slice_temporal_mvp = slice_temporal_mvp; + + /* + * Need Aux ents for all (ref) DPB ents if temporal MV could + * be enabled for any pic + */ + s->use_aux = ((s->sps.flags & + V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED) != 0); + s->mk_aux = s->use_aux && + (s->sps.sps_max_sub_layers_minus1 >= sh0->nuh_temporal_id_plus1 || + is_ref_unit_type(sh0->nal_unit_type)); + + /* Phase 2 reg pre-calc */ + de->rpi_config2 = mk_config2(s); + de->rpi_framesize = (s->sps.pic_height_in_luma_samples << 16) | + s->sps.pic_width_in_luma_samples; + de->rpi_currpoc = sh0->slice_pic_order_cnt; + + if (s->sps.flags & + V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED) { + setup_colmv(ctx, run, s); + } + + s->slice_idx = 0; + + if (sh0->slice_segment_addr != 0) { + v4l2_warn(&dev->v4l2_dev, + "New frame but segment_addr=%d\n", + sh0->slice_segment_addr); + goto fail; + } + + /* Either map src buffer or use directly */ + s->src_addr = 0; + + s->src_addr = vb2_dma_contig_plane_dma_addr(&run->src->vb2_buf, 0); + if (!s->src_addr) { + v4l2_err(&dev->v4l2_dev, "Failed to map src buffer\n"); + goto fail; + } + + /* Pre calc parameters */ + s->dec = dec; + s->idx_inuse = 0; + for (i = 0; i != run->h265.slice_ents; ++i) { + const struct v4l2_ctrl_hevc_slice_params *const sh = sh0 + i; + const bool last_slice = i + 1 == run->h265.slice_ents; + const u32 byte_size = DIV_ROUND_UP(sh->bit_size, 8); + unsigned int j; + + s->sh = sh; + + if (sh->data_byte_offset + byte_size > run->src->planes[0].bytesused) { + v4l2_warn(&dev->v4l2_dev, + "data_byte_offset %d + bits %d (= %d bytes) > bytesused %d\n", + sh->data_byte_offset, sh->bit_size, byte_size, + run->src->planes[0].bytesused); + goto fail; + } + /* BFNUM (data_len) includes the byte with rbsp_stop_one_bit which is not + * part of slice_segment_data but is all but certain to be in the input + * stream so add that when calulating the value we need, but limit to the + * actual size of the buffer (which may well be what is used to set + * bit_size if the caller isn't being very pedantic). + */ + s->data_len = min(sh->bit_size / 8 + 1, + run->src->planes[0].bytesused - sh->data_byte_offset); + + s->slice_qp = 26 + s->pps.init_qp_minus26 + sh->slice_qp_delta; + s->max_num_merge_cand = sh->slice_type == HEVC_SLICE_I ? + 0 : + (5 - sh->five_minus_max_num_merge_cand); + s->dependent_slice_segment_flag = + ((sh->flags & + V4L2_HEVC_SLICE_PARAMS_FLAG_DEPENDENT_SLICE_SEGMENT) != 0); + + s->nb_refs[0] = (sh->slice_type == HEVC_SLICE_I) ? + 0 : + sh->num_ref_idx_l0_active_minus1 + 1; + s->nb_refs[1] = (sh->slice_type != HEVC_SLICE_B) ? + 0 : + sh->num_ref_idx_l1_active_minus1 + 1; + + for (j = 0; j != s->nb_refs[0]; ++j) + s->idx_inuse |= 1 << sh->ref_idx_l0[j]; + for (j = 0; j != s->nb_refs[1]; ++j) + s->idx_inuse |= 1 << sh->ref_idx_l1[j]; + + if (s->sps.flags & V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED) + populate_scaling_factors(run, de, s); + + /* Calc all the random coord info to avoid repeated conversion in/out */ + s->start_ts = s->ctb_addr_rs_to_ts[sh->slice_segment_addr]; + s->start_ctb_x = sh->slice_segment_addr % de->pic_width_in_ctbs_y; + s->start_ctb_y = sh->slice_segment_addr / de->pic_width_in_ctbs_y; + /* Last CTB of previous slice */ + prev_rs = !s->start_ts ? 0 : s->ctb_addr_ts_to_rs[s->start_ts - 1]; + s->prev_ctb_x = prev_rs % de->pic_width_in_ctbs_y; + s->prev_ctb_y = prev_rs / de->pic_width_in_ctbs_y; + + if ((s->pps.flags & V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED)) + rv = wpp_decode_slice(de, s, last_slice); + else + rv = decode_slice(de, s, last_slice); + if (rv) + goto fail; + + ++s->slice_idx; + } + + /* Frame end */ + memset(dpb_q_aux, 0, + sizeof(*dpb_q_aux) * V4L2_HEVC_DPB_ENTRIES_NUM_MAX); + + /* + * Locate ref frames + * At least in the current implementation this is constant across all + * slices. If this changes we will need idx mapping code. + */ + + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, + V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE); + + if (!vq) { + v4l2_err(&dev->v4l2_dev, "VQ gone!\n"); + goto fail; + } + + for (i = 0; i < dec->num_active_dpb_entries; ++i) { + struct vb2_buffer *buf = vb2_find_buffer(vq, dec->dpb[i].timestamp); + + if (!buf) { + if (!(s->idx_inuse & (1 << i))) + hevc_d_dbg(2, &dev->v4l2_dev, + "Missing unused DPB ent %d, timestamp=%lld\n", + i, (long long)dec->dpb[i].timestamp); + else + v4l2_warn(&dev->v4l2_dev, + "Missing inuse DPB ent %d, timestamp=%lld\n", + i, (long long)dec->dpb[i].timestamp); + continue; + } + + if (s->use_aux) { + int buffer_index = buf->index; + + dpb_q_aux[i] = aux_q_ref_idx(ctx, buffer_index); + if (!dpb_q_aux[i]) + v4l2_warn(&dev->v4l2_dev, + "Missing DPB AUX ent %d, timestamp=%lld, index=%d\n", + i, (long long)dec->dpb[i].timestamp, + buffer_index); + } + + de->ref_addrs[i][0] = + vb2_dma_contig_plane_dma_addr(buf, 0); + de->ref_addrs[i][1] = + vb2_dma_contig_plane_dma_addr(buf, 1); + } + + /* Move DPB from temp */ + for (i = 0; i != V4L2_HEVC_DPB_ENTRIES_NUM_MAX; ++i) { + aux_q_release(ctx, &s->ref_aux[i]); + s->ref_aux[i] = dpb_q_aux[i]; + } + + /* Unref the old frame aux too - it is either in the DPB or not now */ + aux_q_release(ctx, &s->frame_aux); + + if (s->mk_aux) { + s->frame_aux = aux_q_new(ctx, run->dst->vb2_buf.index); + + if (!s->frame_aux) { + v4l2_err(&dev->v4l2_dev, + "Failed to obtain aux storage for frame\n"); + goto fail; + } + + de->frame_aux = aux_q_ref(ctx, s->frame_aux); + } + + if (de->dpbno_col != ~0U) { + if (de->dpbno_col >= dec->num_active_dpb_entries) { + v4l2_err(&dev->v4l2_dev, + "Col ref index %d >= %d\n", + de->dpbno_col, + dec->num_active_dpb_entries); + } else { + /* Standard requires that the col pic is constant for + * the duration of the pic (text of collocated_ref_idx + * in H265-2 2018 7.4.7.1) + */ + + /* Spot the collocated ref in passing */ + de->col_aux = aux_q_ref(ctx, + dpb_q_aux[de->dpbno_col]); + + if (!de->col_aux) { + v4l2_warn(&dev->v4l2_dev, + "Missing DPB ent for col\n"); + /* Need to abort if this fails as P2 may + * explode on bad data + */ + goto fail; + } + } + } + + de->state = HEVC_D_DECODE_PHASE1; + return 0; + +fail: + /* Actual error reporting happens in Trigger */ + de->state = HEVC_D_DECODE_ERROR_DONE; + return 0; +} + +/* Handle PU and COEFF stream overflow + * + * Returns: + * -1 Phase 1 decode error + * 0 OK + * >0 Out of space (bitmask) + */ + +#define STATUS_COEFF_EXHAUSTED 8 +#define STATUS_PU_EXHAUSTED 16 + +static int check_status(const struct hevc_d_dev *const dev) +{ + const u32 cfstatus = apb_read(dev, RPI_CFSTATUS); + const u32 cfnum = apb_read(dev, RPI_CFNUM); + u32 status = apb_read(dev, RPI_STATUS); + + /* + * Handle PU and COEFF stream overflow + * This is the definition of successful completion of phase 1. + * It assures that status register is zero and all blocks in each tile + * have completed + */ + if (cfstatus == cfnum) + return 0; + + status &= (STATUS_PU_EXHAUSTED | STATUS_COEFF_EXHAUSTED); + if (status) + return status; + + return -1; +} + +static void phase2_done(struct hevc_d_dev *const dev, + struct hevc_d_dec_env *const de, + enum vb2_buffer_state state) +{ + v4l2_m2m_buf_done(de->frame_buf, state); + de->frame_buf = NULL; + + media_request_manual_complete(de->request); + de->request = NULL; + + dec_env_delete(de); + + /* Finally allow new P1. Avoids possibility of race with de alloc */ + hevc_d_hw_irq_active1_enable_claim(dev, 1); +} + +static void phase2_cb(struct hevc_d_dev *const dev, void *v) +{ + phase2_done(dev, v, VB2_BUF_STATE_DONE); +} + +static void phase2_claimed(struct hevc_d_dev *const dev, void *v) +{ + struct hevc_d_dec_env *const de = v; + unsigned int i; + + apb_write_vc_addr(dev, RPI_PURBASE, de->pu_base_vc); + apb_write_vc_len(dev, RPI_PURSTRIDE, de->pu_stride); + apb_write_vc_addr(dev, RPI_COEFFRBASE, de->coeff_base_vc); + apb_write_vc_len(dev, RPI_COEFFRSTRIDE, de->coeff_stride); + + apb_write_vc_addr(dev, RPI_OUTYBASE, de->frame_luma_addr); + apb_write_vc_addr(dev, RPI_OUTCBASE, de->frame_chroma_addr); + apb_write_vc_len(dev, RPI_OUTYSTRIDE, de->luma_stride); + apb_write_vc_len(dev, RPI_OUTCSTRIDE, de->chroma_stride); + + for (i = 0; i < 16; i++) { + /* Strides are in fact unused but fill in anyway */ + unsigned int roff = i * RPI_REFREGS_SIZE; + + apb_write_vc_addr(dev, RPI_REFYBASE0 + roff, + de->ref_addrs[i][0]); + apb_write_vc_len(dev, RPI_REFYSTRIDE0 + roff, + de->luma_stride); + apb_write_vc_addr(dev, RPI_REFCBASE0 + roff, + de->ref_addrs[i][1]); + apb_write_vc_len(dev, RPI_REFCSTRIDE0 + roff, + de->chroma_stride); + } + + apb_write(dev, RPI_CONFIG2, de->rpi_config2); + apb_write(dev, RPI_FRAMESIZE, de->rpi_framesize); + apb_write(dev, RPI_CURRPOC, de->rpi_currpoc); + + /* collocated reads/writes */ + apb_write_vc_len(dev, RPI_COLSTRIDE, + de->ctx->colmv_stride); + apb_write_vc_len(dev, RPI_MVSTRIDE, + de->ctx->colmv_stride); + apb_write_vc_addr(dev, RPI_MVBASE, + !de->frame_aux ? 0 : de->frame_aux->col.addr); + apb_write_vc_addr(dev, RPI_COLBASE, + !de->col_aux ? 0 : de->col_aux->col.addr); + + hevc_d_hw_irq_active2_irq(dev, &de->irq_ent, phase2_cb, de); + + apb_write_final(dev, RPI_NUMROWS, de->pic_height_in_ctbs_y); +} + +static void phase2_err_claimed(struct hevc_d_dev *const dev, void *v) +{ + phase2_done(dev, v, VB2_BUF_STATE_ERROR); +} + +static void phase1_claimed(struct hevc_d_dev *const dev, void *v); + +static void phase1_done(struct hevc_d_dev *const dev, + struct hevc_d_dec_env *const de, + enum vb2_buffer_state state) +{ + struct hevc_d_ctx *const ctx = de->ctx; + hevc_d_irq_callback p2_cb; + + p2_cb = (state == VB2_BUF_STATE_DONE) ? phase2_claimed : + phase2_err_claimed; + v4l2_m2m_buf_done(de->src_buf, state); + de->src_buf = NULL; + + /* All phase1 error paths done - it is safe to inc p2idx */ + ctx->p2idx = (ctx->p2idx + 1 >= HEVC_D_P2BUF_COUNT) ? 0 : ctx->p2idx + 1; + + /* Renable the next setup if we were blocking */ + if (atomic_add_return(-1, &ctx->p1out) >= HEVC_D_P1BUF_COUNT - 1) + v4l2_m2m_job_finish(dev->m2m_dev, ctx->fh.m2m_ctx); + + hevc_d_hw_irq_active2_claim(dev, &de->irq_ent, p2_cb, de); +} + +static void phase1_thread(struct hevc_d_dev *const dev, void *v) +{ + struct hevc_d_dec_env *const de = v; + struct hevc_d_ctx *const ctx = de->ctx; + + struct hevc_d_hwbuf *const pu_hwbuf = ctx->pu_bufs + ctx->p2idx; + struct hevc_d_hwbuf *const coeff_hwbuf = ctx->coeff_bufs + ctx->p2idx; + + if (de->p1_status & STATUS_PU_EXHAUSTED) { + if (hwbuf_realloc_new(dev, pu_hwbuf, next_size(pu_hwbuf->size))) { + v4l2_err(&dev->v4l2_dev, + "%s: PU realloc (%zx) failed\n", + __func__, pu_hwbuf->size); + goto fail; + } + hevc_d_dbg(1, &dev->v4l2_dev, "%s: PU realloc (%zx) OK\n", + __func__, pu_hwbuf->size); + } + + if (de->p1_status & STATUS_COEFF_EXHAUSTED) { + if (hwbuf_realloc_new(dev, coeff_hwbuf, + next_size(coeff_hwbuf->size))) { + v4l2_err(&dev->v4l2_dev, + "%s: Coeff realloc (%zx) failed\n", + __func__, coeff_hwbuf->size); + goto fail; + } + hevc_d_dbg(1, &dev->v4l2_dev, "%s: Coeff realloc (%zx) OK\n", + __func__, coeff_hwbuf->size); + } + + phase1_claimed(dev, de); + return; + +fail: + if (!pu_hwbuf->addr || !coeff_hwbuf->addr) { + v4l2_err(&dev->v4l2_dev, + "%s: Fatal: failed to reclaim old alloc\n", + __func__); + ctx->fatal_err = 1; + } + phase1_done(dev, de, VB2_BUF_STATE_ERROR); +} + +/* Always called in irq context (this is good) */ +static void phase1_cb(struct hevc_d_dev *const dev, void *v) +{ + struct hevc_d_dec_env *const de = v; + + de->p1_status = check_status(dev); + + if (de->p1_status != 0) { + hevc_d_dbg(2, &dev->v4l2_dev, "%s: Post wait: %#x\n", + __func__, de->p1_status); + + if (de->p1_status < 0) + goto fail; + + /* Need to realloc - push onto a thread rather than IRQ */ + hevc_d_hw_irq_active1_thread(dev, &de->irq_ent, + phase1_thread, de); + return; + } + + phase1_done(dev, de, VB2_BUF_STATE_DONE); + return; + +fail: + phase1_done(dev, de, VB2_BUF_STATE_ERROR); +} + +static void phase1_claimed(struct hevc_d_dev *const dev, void *v) +{ + struct hevc_d_dec_env *const de = v; + struct hevc_d_ctx *const ctx = de->ctx; + + const struct hevc_d_hwbuf * const pu_hwbuf = ctx->pu_bufs + ctx->p2idx; + const struct hevc_d_hwbuf * const coeff_hwbuf = ctx->coeff_bufs + + ctx->p2idx; + + if (ctx->fatal_err) + goto fail; + + de->pu_base_vc = pu_hwbuf->addr; + de->pu_stride = + ALIGN_DOWN(pu_hwbuf->size / de->pic_height_in_ctbs_y, 64); + + de->coeff_base_vc = coeff_hwbuf->addr; + de->coeff_stride = + ALIGN_DOWN(coeff_hwbuf->size / de->pic_height_in_ctbs_y, 64); + + /* phase1_claimed blocked until cb_phase1 completed so p2idx inc + * in cb_phase1 after error detection + */ + + apb_write_vc_addr(dev, RPI_PUWBASE, de->pu_base_vc); + apb_write_vc_len(dev, RPI_PUWSTRIDE, de->pu_stride); + apb_write_vc_addr(dev, RPI_COEFFWBASE, de->coeff_base_vc); + apb_write_vc_len(dev, RPI_COEFFWSTRIDE, de->coeff_stride); + + /* Trigger command FIFO */ + apb_write(dev, RPI_CFNUM, de->cmd_len); + + /* Claim irq */ + hevc_d_hw_irq_active1_irq(dev, &de->irq_ent, phase1_cb, de); + + /* Start the h/w */ + apb_write_vc_addr_final(dev, RPI_CFBASE, de->cmd.addr); + return; + +fail: + phase1_done(dev, de, VB2_BUF_STATE_ERROR); +} + +static void phase1_err_claimed(struct hevc_d_dev *const dev, void *v) +{ + phase1_done(dev, v, VB2_BUF_STATE_ERROR); +} + +static void dec_state_delete(struct hevc_d_ctx *const ctx) +{ + unsigned int i; + struct hevc_d_dec_state *const s = ctx->state; + + if (!s) + return; + ctx->state = NULL; + + free_ps_info(s); + + for (i = 0; i != HEVC_MAX_REFS; ++i) + aux_q_release(ctx, &s->ref_aux[i]); + aux_q_release(ctx, &s->frame_aux); + + kfree(s); +} + +struct irq_sync { + atomic_t done; + wait_queue_head_t wq; + struct hevc_d_hw_irq_ent irq_ent; +}; + +static void phase2_sync_claimed(struct hevc_d_dev *const dev, void *v) +{ + struct irq_sync *const sync = v; + + atomic_set(&sync->done, 1); + wake_up(&sync->wq); +} + +static void phase1_sync_claimed(struct hevc_d_dev *const dev, void *v) +{ + struct irq_sync *const sync = v; + + hevc_d_hw_irq_active1_enable_claim(dev, 1); + hevc_d_hw_irq_active2_claim(dev, &sync->irq_ent, phase2_sync_claimed, sync); +} + +/* Sync with IRQ operations + * + * Claims phase1 and phase2 in turn and waits for the phase2 claim so any + * pending IRQ ops will have completed by the time this returns + * + * phase1 has counted enables so must reenable once claimed + * phase2 has unlimited enables + */ +static void irq_sync(struct hevc_d_dev *const dev) +{ + struct irq_sync sync; + + atomic_set(&sync.done, 0); + init_waitqueue_head(&sync.wq); + + hevc_d_hw_irq_active1_claim(dev, &sync.irq_ent, phase1_sync_claimed, &sync); + wait_event(sync.wq, atomic_read(&sync.done)); +} + +static void h265_ctx_uninit(struct hevc_d_dev *const dev, struct hevc_d_ctx *ctx) +{ + unsigned int i; + + dec_env_uninit(ctx); + dec_state_delete(ctx); + + /* + * dec_env & state must be killed before this to release the buffer to + * the free pool + */ + aux_q_uninit(ctx); + + for (i = 0; i != ARRAY_SIZE(ctx->pu_bufs); ++i) + hwbuf_free(dev, ctx->pu_bufs + i); + for (i = 0; i != ARRAY_SIZE(ctx->coeff_bufs); ++i) + hwbuf_free(dev, ctx->coeff_bufs + i); +} + +void hevc_d_h265_stop(struct hevc_d_ctx *ctx) +{ + struct hevc_d_dev *const dev = ctx->dev; + + irq_sync(dev); + h265_ctx_uninit(dev, ctx); +} + +int hevc_d_h265_start(struct hevc_d_ctx *ctx) +{ + struct hevc_d_dev *const dev = ctx->dev; + unsigned int i; + + const unsigned int wxh = ctx->dst_fmt.width * ctx->dst_fmt.height; + size_t pu_size; + size_t coeff_size; + + ctx->fatal_err = 0; + ctx->dec0 = NULL; + ctx->state = kzalloc(sizeof(*ctx->state), GFP_KERNEL); + if (!ctx->state) { + v4l2_err(&dev->v4l2_dev, "Failed to allocate decode state\n"); + goto fail; + } + + if (dec_env_init(ctx) != 0) { + v4l2_err(&dev->v4l2_dev, "Failed to allocate decode envs\n"); + goto fail; + } + + coeff_size = hevc_d_round_up_size(wxh); + pu_size = hevc_d_round_up_size(wxh / 4); + for (i = 0; i != ARRAY_SIZE(ctx->pu_bufs); ++i) { + /* Don't actually need a kernel mapping here */ + if (hwbuf_alloc(dev, ctx->pu_bufs + i, pu_size, + DMA_ATTR_NO_KERNEL_MAPPING)) { + v4l2_err(&dev->v4l2_dev, + "Failed to alloc %#zx PU%d buffer\n", + pu_size, i); + goto fail; + } + if (hwbuf_alloc(dev, ctx->coeff_bufs + i, coeff_size, + DMA_ATTR_NO_KERNEL_MAPPING)) { + v4l2_err(&dev->v4l2_dev, + "Failed to alloc %#zx Coeff%d buffer\n", + pu_size, i); + goto fail; + } + } + aux_q_init(ctx); + + return 0; + +fail: + h265_ctx_uninit(dev, ctx); + return -ENOMEM; +} + +void hevc_d_h265_trigger(struct hevc_d_ctx *ctx) +{ + struct hevc_d_dev *const dev = ctx->dev; + struct hevc_d_dec_env *const de = ctx->dec0; + struct vb2_v4l2_buffer *src_buf; + struct media_request *req; + hevc_d_irq_callback p1_cb; + + p1_cb = (de->state == HEVC_D_DECODE_PHASE1) ? phase1_claimed : + phase1_err_claimed; + + src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + req = src_buf->vb2_buf.req_obj.req; + ctx->dec0 = NULL; + + /* We know we have src & dst so no need to test */ + de->src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + de->frame_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + de->request = req; + + /* Enable the next setup if our Q isn't too big */ + if (atomic_add_return(1, &ctx->p1out) < HEVC_D_P1BUF_COUNT) + v4l2_m2m_job_finish(dev->m2m_dev, ctx->fh.m2m_ctx); + + hevc_d_hw_irq_active1_claim(dev, &de->irq_ent, p1_cb, de); +} + +static int try_ctrl_sps(struct v4l2_ctrl *ctrl) +{ + const struct v4l2_ctrl_hevc_sps *const sps = ctrl->p_new.p_hevc_sps; + struct hevc_d_ctx *const ctx = ctrl->priv; + struct hevc_d_dev *const dev = ctx->dev; + + if (sps->chroma_format_idc != 1) { + v4l2_warn(&dev->v4l2_dev, + "Chroma format (%d) unsupported\n", + sps->chroma_format_idc); + return -EINVAL; + } + + if (sps->bit_depth_luma_minus8 != 0 && + sps->bit_depth_luma_minus8 != 2) { + v4l2_warn(&dev->v4l2_dev, + "Luma depth (%d) unsupported\n", + sps->bit_depth_luma_minus8 + 8); + return -EINVAL; + } + + if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) { + v4l2_warn(&dev->v4l2_dev, + "Chroma depth (%d) != Luma depth (%d)\n", + sps->bit_depth_chroma_minus8 + 8, + sps->bit_depth_luma_minus8 + 8); + return -EINVAL; + } + + if (sps->pic_width_in_luma_samples < HEVC_D_MIN_WIDTH || + sps->pic_height_in_luma_samples < HEVC_D_MIN_HEIGHT || + sps->pic_width_in_luma_samples > HEVC_D_MAX_WIDTH || + sps->pic_height_in_luma_samples > HEVC_D_MAX_HEIGHT) { + v4l2_warn(&dev->v4l2_dev, + "Bad sps width (%u) x height (%u)\n", + sps->pic_width_in_luma_samples, + sps->pic_height_in_luma_samples); + return -EINVAL; + } + + return 0; +} + +const struct v4l2_ctrl_ops hevc_d_hevc_sps_ctrl_ops = { + .try_ctrl = try_ctrl_sps, +}; + +static int try_ctrl_pps(struct v4l2_ctrl *ctrl) +{ + const struct v4l2_ctrl_hevc_pps *const pps = ctrl->p_new.p_hevc_pps; + struct hevc_d_ctx *const ctx = ctrl->priv; + struct hevc_d_dev *const dev = ctx->dev; + + if ((pps->flags & + V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED) && + (pps->flags & + V4L2_HEVC_PPS_FLAG_TILES_ENABLED) && + (pps->num_tile_columns_minus1 || pps->num_tile_rows_minus1)) { + v4l2_warn(&dev->v4l2_dev, + "WPP + Tiles not supported\n"); + return -EINVAL; + } + + return 0; +} + +const struct v4l2_ctrl_ops hevc_d_hevc_pps_ctrl_ops = { + .try_ctrl = try_ctrl_pps, +}; + +void hevc_d_device_run(void *priv) +{ + struct hevc_d_ctx *const ctx = priv; + struct hevc_d_dev *const dev = ctx->dev; + struct hevc_d_run run = {}; + struct media_request *src_req; + const struct v4l2_ctrl *ctrl; + + run.src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + run.dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); + + /* Apply request(s) controls */ + src_req = run.src->vb2_buf.req_obj.req; + if (v4l2_ctrl_request_setup(src_req, &ctx->hdl)) + goto fail; + + run.h265.sps = + hevc_d_find_control_data(ctx, + V4L2_CID_STATELESS_HEVC_SPS); + run.h265.pps = + hevc_d_find_control_data(ctx, + V4L2_CID_STATELESS_HEVC_PPS); + run.h265.dec = + hevc_d_find_control_data(ctx, + V4L2_CID_STATELESS_HEVC_DECODE_PARAMS); + + ctrl = v4l2_ctrl_find(ctx->fh.ctrl_handler, + V4L2_CID_STATELESS_HEVC_SLICE_PARAMS); + if (!ctrl || !ctrl->elems) { + v4l2_err(&dev->v4l2_dev, "%s: Missing slice params\n", + __func__); + goto fail; + } + run.h265.slice_ents = ctrl->elems; + run.h265.slice_params = ctrl->p_cur.p; + + run.h265.scaling_matrix = + hevc_d_find_control_data(ctx, + V4L2_CID_STATELESS_HEVC_SCALING_MATRIX); + + v4l2_m2m_buf_copy_metadata(run.src, run.dst); + + if (hevc_d_h265_setup(ctx, &run) == -1) + goto fail; + + /* Complete request(s) controls */ + v4l2_ctrl_request_complete(src_req, &ctx->hdl); + + hevc_d_h265_trigger(ctx); + return; + +fail: + /* We really shouldn't get here but tidy up what we can */ + v4l2_m2m_buf_done_and_job_finish(dev->m2m_dev, ctx->fh.m2m_ctx, + VB2_BUF_STATE_ERROR); + media_request_manual_complete(src_req); +} diff --git a/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_h265.h b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_h265.h new file mode 100644 index 00000000000000..48f08d37362b19 --- /dev/null +++ b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_h265.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Raspberry Pi HEVC driver + * + * Copyright (C) 2025 Raspberry Pi Ltd + * + */ + +#ifndef _HEVC_D_H265_H_ +#define _HEVC_D_H265_H_ +#include "hevc_d.h" + +extern const struct v4l2_ctrl_ops hevc_d_hevc_sps_ctrl_ops; +extern const struct v4l2_ctrl_ops hevc_d_hevc_pps_ctrl_ops; + +int hevc_d_h265_start(struct hevc_d_ctx *ctx); +void hevc_d_h265_stop(struct hevc_d_ctx *ctx); +void hevc_d_h265_trigger(struct hevc_d_ctx *ctx); + +void hevc_d_device_run(void *priv); + +#endif diff --git a/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_hw.c b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_hw.c new file mode 100644 index 00000000000000..1b9ffcd4df3d81 --- /dev/null +++ b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_hw.c @@ -0,0 +1,429 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Raspberry Pi HEVC driver + * + * Copyright (C) 2025 Raspberry Pi Ltd + * + * Based on the Cedrus VPU driver, that is: + * + * Copyright (C) 2016 Florent Revest + * Copyright (C) 2018 Paul Kocialkowski + * Copyright (C) 2018 Bootlin + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include "hevc_d.h" +#include "hevc_d_hw.h" + +static void pre_irq(struct hevc_d_dev *dev, struct hevc_d_hw_irq_ent *ient, + hevc_d_irq_callback cb, void *v, + struct hevc_d_hw_irq_ctrl *ictl) +{ + unsigned long flags; + + if (ictl->irq) { + v4l2_err(&dev->v4l2_dev, "Attempt to claim IRQ when already claimed\n"); + return; + } + + ient->cb = cb; + ient->v = v; + + spin_lock_irqsave(&ictl->lock, flags); + ictl->irq = ient; + ictl->no_sched++; + spin_unlock_irqrestore(&ictl->lock, flags); +} + +/* Should be called from inside ictl->lock */ +static inline bool sched_enabled(const struct hevc_d_hw_irq_ctrl * const ictl) +{ + return ictl->no_sched <= 0 && ictl->enable; +} + +/* Should be called from inside ictl->lock & after checking sched_enabled() */ +static inline void set_claimed(struct hevc_d_hw_irq_ctrl * const ictl) +{ + if (ictl->enable > 0) + --ictl->enable; + ictl->no_sched = 1; +} + +/* Should be called from inside ictl->lock */ +static struct hevc_d_hw_irq_ent *get_sched(struct hevc_d_hw_irq_ctrl * const ictl) +{ + struct hevc_d_hw_irq_ent *ient; + + if (!sched_enabled(ictl)) + return NULL; + + ient = ictl->claim; + if (!ient) + return NULL; + ictl->claim = ient->next; + + set_claimed(ictl); + return ient; +} + +/* Run a callback & check to see if there is anything else to run */ +static void sched_cb(struct hevc_d_dev * const dev, + struct hevc_d_hw_irq_ctrl * const ictl, + struct hevc_d_hw_irq_ent *ient) +{ + while (ient) { + unsigned long flags; + + ient->cb(dev, ient->v); + + spin_lock_irqsave(&ictl->lock, flags); + + /* + * Always dec no_sched after cb exec - must have been set + * on entry to cb + */ + --ictl->no_sched; + ient = get_sched(ictl); + + spin_unlock_irqrestore(&ictl->lock, flags); + } +} + +/* Should only ever be called from its own IRQ cb so no lock required */ +static void pre_thread(struct hevc_d_dev *dev, + struct hevc_d_hw_irq_ent *ient, + hevc_d_irq_callback cb, void *v, + struct hevc_d_hw_irq_ctrl *ictl) +{ + ient->cb = cb; + ient->v = v; + ictl->irq = ient; + ictl->thread_reqed = true; + ictl->no_sched++; /* This is unwound in do_thread */ +} + +/* Called in irq context */ +static void do_irq(struct hevc_d_dev * const dev, + struct hevc_d_hw_irq_ctrl * const ictl) +{ + struct hevc_d_hw_irq_ent *ient; + unsigned long flags; + + spin_lock_irqsave(&ictl->lock, flags); + ient = ictl->irq; + ictl->irq = NULL; + spin_unlock_irqrestore(&ictl->lock, flags); + + sched_cb(dev, ictl, ient); +} + +static void do_claim(struct hevc_d_dev * const dev, + struct hevc_d_hw_irq_ent *ient, + const hevc_d_irq_callback cb, void * const v, + struct hevc_d_hw_irq_ctrl * const ictl) +{ + unsigned long flags; + + ient->next = NULL; + ient->cb = cb; + ient->v = v; + + spin_lock_irqsave(&ictl->lock, flags); + + if (ictl->claim) { + /* If we have a Q then add to end */ + ictl->tail->next = ient; + ictl->tail = ient; + ient = NULL; + } else if (!sched_enabled(ictl)) { + /* Empty Q but other activity in progress so Q */ + ictl->claim = ient; + ictl->tail = ient; + ient = NULL; + } else { + /* + * Nothing else going on - schedule immediately and + * prevent anything else scheduling claims + */ + set_claimed(ictl); + } + + spin_unlock_irqrestore(&ictl->lock, flags); + + sched_cb(dev, ictl, ient); +} + +/* Enable n claims. + * n < 0 set to unlimited (default on init) + * n = 0 if previously unlimited then disable otherwise nop + * n > 0 if previously unlimited then set to n enables + * otherwise add n enables + * The enable count is automatically decremented every time a claim is run + */ +static void do_enable_claim(struct hevc_d_dev * const dev, + int n, + struct hevc_d_hw_irq_ctrl * const ictl) +{ + unsigned long flags; + struct hevc_d_hw_irq_ent *ient; + + spin_lock_irqsave(&ictl->lock, flags); + ictl->enable = n < 0 ? -1 : ictl->enable <= 0 ? n : ictl->enable + n; + ient = get_sched(ictl); + spin_unlock_irqrestore(&ictl->lock, flags); + + sched_cb(dev, ictl, ient); +} + +static void ictl_init(struct hevc_d_hw_irq_ctrl * const ictl, int enables) +{ + spin_lock_init(&ictl->lock); + ictl->claim = NULL; + ictl->tail = NULL; + ictl->irq = NULL; + ictl->no_sched = 0; + ictl->enable = enables; + ictl->thread_reqed = false; +} + +static void ictl_uninit(struct hevc_d_hw_irq_ctrl * const ictl) +{ + /* Nothing to do */ +} + +static irqreturn_t hevc_d_irq_irq(int irq, void *data) +{ + struct hevc_d_dev * const dev = data; + __u32 ictrl; + + ictrl = irq_read(dev, ARG_IC_ICTRL); + if (!(ictrl & ARG_IC_ICTRL_ALL_IRQ_MASK)) { + v4l2_warn(&dev->v4l2_dev, "IRQ but no IRQ bits set\n"); + return IRQ_NONE; + } + + /* Cancel any/all irqs */ + irq_write(dev, ARG_IC_ICTRL, ictrl & ~ARG_IC_ICTRL_SET_ZERO_MASK); + + /* + * Service Active2 before Active1 so Phase 1 can transition to Phase 2 + * without delay + */ + if (ictrl & ARG_IC_ICTRL_ACTIVE2_INT_SET) + do_irq(dev, &dev->ic_active2); + if (ictrl & ARG_IC_ICTRL_ACTIVE1_INT_SET) + do_irq(dev, &dev->ic_active1); + + return dev->ic_active1.thread_reqed || dev->ic_active2.thread_reqed ? + IRQ_WAKE_THREAD : IRQ_HANDLED; +} + +static void do_thread(struct hevc_d_dev * const dev, + struct hevc_d_hw_irq_ctrl *const ictl) +{ + unsigned long flags; + struct hevc_d_hw_irq_ent *ient = NULL; + + spin_lock_irqsave(&ictl->lock, flags); + + if (ictl->thread_reqed) { + ient = ictl->irq; + ictl->thread_reqed = false; + ictl->irq = NULL; + } + + spin_unlock_irqrestore(&ictl->lock, flags); + + sched_cb(dev, ictl, ient); +} + +static irqreturn_t hevc_d_irq_thread(int irq, void *data) +{ + struct hevc_d_dev * const dev = data; + + do_thread(dev, &dev->ic_active1); + do_thread(dev, &dev->ic_active2); + + return IRQ_HANDLED; +} + +/* + * May only be called from Active1 CB + * IRQs should not be expected until execution continues in the cb + */ +void hevc_d_hw_irq_active1_thread(struct hevc_d_dev *dev, + struct hevc_d_hw_irq_ent *ient, + hevc_d_irq_callback thread_cb, void *ctx) +{ + pre_thread(dev, ient, thread_cb, ctx, &dev->ic_active1); +} + +void hevc_d_hw_irq_active1_enable_claim(struct hevc_d_dev *dev, + int n) +{ + do_enable_claim(dev, n, &dev->ic_active1); +} + +void hevc_d_hw_irq_active1_claim(struct hevc_d_dev *dev, + struct hevc_d_hw_irq_ent *ient, + hevc_d_irq_callback ready_cb, void *ctx) +{ + do_claim(dev, ient, ready_cb, ctx, &dev->ic_active1); +} + +void hevc_d_hw_irq_active1_irq(struct hevc_d_dev *dev, + struct hevc_d_hw_irq_ent *ient, + hevc_d_irq_callback irq_cb, void *ctx) +{ + pre_irq(dev, ient, irq_cb, ctx, &dev->ic_active1); +} + +void hevc_d_hw_irq_active2_claim(struct hevc_d_dev *dev, + struct hevc_d_hw_irq_ent *ient, + hevc_d_irq_callback ready_cb, void *ctx) +{ + do_claim(dev, ient, ready_cb, ctx, &dev->ic_active2); +} + +void hevc_d_hw_irq_active2_irq(struct hevc_d_dev *dev, + struct hevc_d_hw_irq_ent *ient, + hevc_d_irq_callback irq_cb, void *ctx) +{ + pre_irq(dev, ient, irq_cb, ctx, &dev->ic_active2); +} + +/* + * Stop the clock for this context + * clk_disable_unprepare does ref counting so this will not actually + * disable the clock if there are other running contexts + */ +void hevc_d_hw_stop_clock(struct hevc_d_dev *dev) +{ + clk_disable_unprepare(dev->clock); +} + +/* Always starts the clock if it isn't already on this ctx */ +int hevc_d_hw_start_clock(struct hevc_d_dev *dev) +{ + int rv; + + rv = clk_set_min_rate(dev->clock, dev->max_clock_rate); + if (rv) { + dev_err(dev->dev, "Failed to set clock rate\n"); + return rv; + } + + rv = clk_prepare_enable(dev->clock); + if (rv) { + dev_err(dev->dev, "Failed to enable clock\n"); + return rv; + } + return 0; +} + +static int hw_setup(struct hevc_d_dev *dev) +{ + struct device_node *node; + u32 ver; + u32 irq_stat; + struct rpi_firmware *firmware; + + ver = apb_read(dev, RPI_VERSION); + if (ver != 0x202) { + dev_err(dev->dev, "Unexpected version %#x only 0x202 supported\n", ver); + return -ENODEV; + } + + node = rpi_firmware_find_node(); + if (!node) + return -EINVAL; + + firmware = rpi_firmware_get(node); + of_node_put(node); + if (!firmware) + return -EPROBE_DEFER; + + dev->max_clock_rate = rpi_firmware_clk_get_max_rate(firmware, + RPI_FIRMWARE_HEVC_CLK_ID); + rpi_firmware_put(firmware); + + /* + * Enable IRQs & reset anything pending + * Whilst this seems the wrong way round the h/w doesn't actually + * set the IRQ status bits till the IRQs are enabled. As we haven't + * got the IRQ yet this should still be safe. + */ + irq_write(dev, ARG_IC_ICTRL, + ARG_IC_ICTRL_ACTIVE1_EN_SET | ARG_IC_ICTRL_ACTIVE2_EN_SET); + irq_stat = irq_read(dev, ARG_IC_ICTRL); + irq_write(dev, ARG_IC_ICTRL, irq_stat); + + return 0; +} + +int hevc_d_hw_probe(struct hevc_d_dev *dev) +{ + int irq_dec; + int ret; + + ictl_init(&dev->ic_active1, HEVC_D_P2BUF_COUNT); + ictl_init(&dev->ic_active2, HEVC_D_ICTL_ENABLE_UNLIMITED); + + dev->base_irq = devm_platform_ioremap_resource_byname(dev->pdev, "intc"); + if (IS_ERR(dev->base_irq)) + return PTR_ERR(dev->base_irq); + + dev->base_h265 = devm_platform_ioremap_resource_byname(dev->pdev, "hevc"); + if (IS_ERR(dev->base_h265)) + return PTR_ERR(dev->base_h265); + + dev->clock = devm_clk_get(&dev->pdev->dev, NULL); + if (IS_ERR(dev->clock)) + return PTR_ERR(dev->clock); + + ret = clk_prepare_enable(dev->clock); + if (ret) + return ret; + ret = hw_setup(dev); + clk_disable_unprepare(dev->clock); + if (ret) + return ret; + + irq_dec = platform_get_irq(dev->pdev, 0); + if (irq_dec <= 0) + return irq_dec; + ret = devm_request_threaded_irq(dev->dev, irq_dec, + hevc_d_irq_irq, + hevc_d_irq_thread, + 0, dev_name(dev->dev), dev); + if (ret) + dev_err(dev->dev, "Failed to request IRQ - %d\n", ret); + + return ret; +} + +void hevc_d_hw_remove(struct hevc_d_dev *dev) +{ + /* + * IRQ auto freed on unload so no need to do it here + * ioremap auto freed on unload + */ + ictl_uninit(&dev->ic_active1); + ictl_uninit(&dev->ic_active2); +} + diff --git a/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_hw.h b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_hw.h new file mode 100644 index 00000000000000..765b27ab161bad --- /dev/null +++ b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_hw.h @@ -0,0 +1,317 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Raspberry Pi HEVC driver + * + * Copyright (C) 2025 Raspberry Pi Ltd + * + * Based on the Cedrus VPU driver, that is: + * + * Copyright (C) 2016 Florent Revest + * Copyright (C) 2018 Paul Kocialkowski + * Copyright (C) 2018 Bootlin + */ + +#ifndef _HEVC_D_HW_H_ +#define _HEVC_D_HW_H_ + +struct hevc_d_hw_irq_ent { + struct hevc_d_hw_irq_ent *next; + hevc_d_irq_callback cb; + void *v; +}; + +/* Phase 1 Register offsets */ + +#define RPI_SPS0 0 +#define RPI_SPS1 4 +#define RPI_PPS 8 +#define RPI_SLICE 12 +#define RPI_TILESTART 16 +#define RPI_TILEEND 20 +#define RPI_SLICESTART 24 +#define RPI_MODE 28 +#define RPI_LEFT0 32 +#define RPI_LEFT1 36 +#define RPI_LEFT2 40 +#define RPI_LEFT3 44 +#define RPI_QP 48 +#define RPI_CONTROL 52 +#define RPI_STATUS 56 +#define RPI_VERSION 60 +#define RPI_BFBASE 64 +#define RPI_BFNUM 68 +#define RPI_BFCONTROL 72 +#define RPI_BFSTATUS 76 +#define RPI_PUWBASE 80 +#define RPI_PUWSTRIDE 84 +#define RPI_COEFFWBASE 88 +#define RPI_COEFFWSTRIDE 92 +#define RPI_SLICECMDS 96 +#define RPI_BEGINTILEEND 100 +#define RPI_TRANSFER 104 +#define RPI_CFBASE 108 +#define RPI_CFNUM 112 +#define RPI_CFSTATUS 116 + +/* Phase 2 Register offsets */ + +#define RPI_PURBASE 0x8000 +#define RPI_PURSTRIDE 0x8004 +#define RPI_COEFFRBASE 0x8008 +#define RPI_COEFFRSTRIDE 0x800C +#define RPI_NUMROWS 0x8010 +#define RPI_CONFIG2 0x8014 +#define RPI_OUTYBASE 0x8018 +#define RPI_OUTYSTRIDE 0x801C +#define RPI_OUTCBASE 0x8020 +#define RPI_OUTCSTRIDE 0x8024 +#define RPI_STATUS2 0x8028 +#define RPI_FRAMESIZE 0x802C +#define RPI_MVBASE 0x8030 +#define RPI_MVSTRIDE 0x8034 +#define RPI_COLBASE 0x8038 +#define RPI_COLSTRIDE 0x803C +#define RPI_CURRPOC 0x8040 + +/* + * Reference frame register values + * There are 16 of these arranged sequentially + */ +#define RPI_REFYBASE0 0x9000 +#define RPI_REFYSTRIDE0 0x9004 +#define RPI_REFCBASE0 0x9008 +#define RPI_REFCSTRIDE0 0x900c +/* Offset to get from REFYBASEn to REFYBASEn+1 */ +#define RPI_REFREGS_SIZE 16 + +/* + * Write a general register value + * Order is unimportant + */ +static inline void apb_write(const struct hevc_d_dev * const dev, + const unsigned int offset, const u32 val) +{ + writel_relaxed(val, dev->base_h265 + offset); +} + +/* Write the final register value that actually starts the phase */ +static inline void apb_write_final(const struct hevc_d_dev * const dev, + const unsigned int offset, const u32 val) +{ + writel(val, dev->base_h265 + offset); +} + +static inline u32 apb_read(const struct hevc_d_dev * const dev, + const unsigned int offset) +{ + return readl(dev->base_h265 + offset); +} + +static inline void irq_write(const struct hevc_d_dev * const dev, + const unsigned int offset, const u32 val) +{ + writel(val, dev->base_irq + offset); +} + +static inline u32 irq_read(const struct hevc_d_dev * const dev, + const unsigned int offset) +{ + return readl(dev->base_irq + offset); +} + +static inline void apb_write_vc_addr(const struct hevc_d_dev * const dev, + const unsigned int offset, + const dma_addr_t a) +{ + apb_write(dev, offset, (u32)(a >> 6)); +} + +static inline void apb_write_vc_addr_final(const struct hevc_d_dev * const dev, + const unsigned int offset, + const dma_addr_t a) +{ + apb_write_final(dev, offset, (u32)(a >> 6)); +} + +static inline void apb_write_vc_len(const struct hevc_d_dev * const dev, + const unsigned int offset, + const unsigned int x) +{ + apb_write(dev, offset, (x + 63) >> 6); +} + +/* *ARG_IC_ICTRL - Interrupt control for ARGON Core* + * Offset (byte space) = 40'h2b10000 + * Physical Address (byte space) = 40'h7eb10000 + * Verilog Macro Address = `ARG_IC_REG_START + `ARGON_INTCTRL_ICTRL + * Reset Value = 32'b100x100x_100xxxxx_xxxxxxx0_x100x100 + * Access = RW (32-bit only) + * Interrupt control logic for ARGON Core. + */ +#define ARG_IC_ICTRL 0 + +/* acc=LWC ACTIVE1_INT FIELD ACCESS: LWC + * + * Interrupt 1 + * This is set and held when an hevc_active1 interrupt edge is detected + * The polarity of the edge is set by the ACTIVE1_EDGE field + * Write a 1 to this bit to clear down the latched interrupt + * The latched interrupt is only enabled out onto the interrupt line if + * ACTIVE1_EN is set + * Reset value is *0* decimal. + */ +#define ARG_IC_ICTRL_ACTIVE1_INT_SET BIT(0) + +/* ACTIVE1_EDGE Sets the polarity of the interrupt edge detection logic + * This logic detects edges of the hevc_active1 line from the argon core + * 0 = negedge, 1 = posedge + * Reset value is *0* decimal. + */ +#define ARG_IC_ICTRL_ACTIVE1_EDGE_SET BIT(1) + +/* ACTIVE1_EN Enables ACTIVE1_INT out onto the argon interrupt line. + * If this isn't set, the interrupt logic will work but no interrupt will be + * set to the interrupt controller + * Reset value is *1* decimal. + * + * [JC] The above appears to be a lie - if unset then b0 is never set + */ +#define ARG_IC_ICTRL_ACTIVE1_EN_SET BIT(2) + +/* acc=RO ACTIVE1_STATUS FIELD ACCESS: RO + * + * The current status of the hevc_active1 signal + */ +#define ARG_IC_ICTRL_ACTIVE1_STATUS_SET BIT(3) + +/* acc=LWC ACTIVE2_INT FIELD ACCESS: LWC + * + * Interrupt 2 + * This is set and held when an hevc_active2 interrupt edge is detected + * The polarity of the edge is set by the ACTIVE2_EDGE field + * Write a 1 to this bit to clear down the latched interrupt + * The latched interrupt is only enabled out onto the interrupt line if + * ACTIVE2_EN is set + * Reset value is *0* decimal. + */ +#define ARG_IC_ICTRL_ACTIVE2_INT_SET BIT(4) + +/* ACTIVE2_EDGE Sets the polarity of the interrupt edge detection logic + * This logic detects edges of the hevc_active2 line from the argon core + * 0 = negedge, 1 = posedge + * Reset value is *0* decimal. + */ +#define ARG_IC_ICTRL_ACTIVE2_EDGE_SET BIT(5) + +/* ACTIVE2_EN Enables ACTIVE2_INT out onto the argon interrupt line. + * If this isn't set, the interrupt logic will work but no interrupt will be + * set to the interrupt controller + * Reset value is *1* decimal. + */ +#define ARG_IC_ICTRL_ACTIVE2_EN_SET BIT(6) + +/* acc=RO ACTIVE2_STATUS FIELD ACCESS: RO + * + * The current status of the hevc_active2 signal + */ +#define ARG_IC_ICTRL_ACTIVE2_STATUS_SET BIT(7) + +/* TEST_INT Forces the argon int high for test purposes. + * Reset value is *0* decimal. + */ +#define ARG_IC_ICTRL_TEST_INT BIT(8) +#define ARG_IC_ICTRL_SPARE BIT(9) + +/* acc=RO VP9_INTERRUPT_STATUS FIELD ACCESS: RO + * + * The current status of the vp9_interrupt signal + */ +#define ARG_IC_ICTRL_VP9_INTERRUPT_STATUS BIT(10) + +/* AIO_INT_ENABLE 1 = Or the AIO int in with the Argon int so the VPU can see + * it + * 0 = the AIO int is masked. (It should still be connected to the GIC though). + */ +#define ARG_IC_ICTRL_AIO_INT_ENABLE BIT(20) +#define ARG_IC_ICTRL_H264_ACTIVE_INT BIT(21) +#define ARG_IC_ICTRL_H264_ACTIVE_EDGE BIT(22) +#define ARG_IC_ICTRL_H264_ACTIVE_EN BIT(23) +#define ARG_IC_ICTRL_H264_ACTIVE_STATUS BIT(24) +#define ARG_IC_ICTRL_H264_INTERRUPT_INT BIT(25) +#define ARG_IC_ICTRL_H264_INTERRUPT_EDGE BIT(26) +#define ARG_IC_ICTRL_H264_INTERRUPT_EN BIT(27) + +/* acc=RO H264_INTERRUPT_STATUS FIELD ACCESS: RO + * + * The current status of the h264_interrupt signal + */ +#define ARG_IC_ICTRL_H264_INTERRUPT_STATUS BIT(28) + +/* acc=LWC VP9_INTERRUPT_INT FIELD ACCESS: LWC + * + * Interrupt 1 + * This is set and held when an vp9_interrupt interrupt edge is detected + * The polarity of the edge is set by the VP9_INTERRUPT_EDGE field + * Write a 1 to this bit to clear down the latched interrupt + * The latched interrupt is only enabled out onto the interrupt line if + * VP9_INTERRUPT_EN is set + * Reset value is *0* decimal. + */ +#define ARG_IC_ICTRL_VP9_INTERRUPT_INT BIT(29) + +/* VP9_INTERRUPT_EDGE Sets the polarity of the interrupt edge detection logic + * This logic detects edges of the vp9_interrupt line from the argon h264 core + * 0 = negedge, 1 = posedge + * Reset value is *0* decimal. + */ +#define ARG_IC_ICTRL_VP9_INTERRUPT_EDGE BIT(30) + +/* VP9_INTERRUPT_EN Enables VP9_INTERRUPT_INT out onto the argon interrupt line. + * If this isn't set, the interrupt logic will work but no interrupt will be + * set to the interrupt controller + * Reset value is *1* decimal. + */ +#define ARG_IC_ICTRL_VP9_INTERRUPT_EN BIT(31) + +/* Bits 19:12, 11 reserved - read ?, write 0 */ +#define ARG_IC_ICTRL_SET_ZERO_MASK ((0xff << 12) | BIT(11)) + +/* All IRQ bits */ +#define ARG_IC_ICTRL_ALL_IRQ_MASK (\ + ARG_IC_ICTRL_VP9_INTERRUPT_INT |\ + ARG_IC_ICTRL_H264_INTERRUPT_INT |\ + ARG_IC_ICTRL_ACTIVE1_INT_SET |\ + ARG_IC_ICTRL_ACTIVE2_INT_SET) + +/* Regulate claim Q */ +void hevc_d_hw_irq_active1_enable_claim(struct hevc_d_dev *dev, + int n); +/* Auto release once all CBs called */ +void hevc_d_hw_irq_active1_claim(struct hevc_d_dev *dev, + struct hevc_d_hw_irq_ent *ient, + hevc_d_irq_callback ready_cb, void *ctx); +/* May only be called in claim cb */ +void hevc_d_hw_irq_active1_irq(struct hevc_d_dev *dev, + struct hevc_d_hw_irq_ent *ient, + hevc_d_irq_callback irq_cb, void *ctx); +/* May only be called in irq cb */ +void hevc_d_hw_irq_active1_thread(struct hevc_d_dev *dev, + struct hevc_d_hw_irq_ent *ient, + hevc_d_irq_callback thread_cb, void *ctx); + +/* Auto release once all CBs called */ +void hevc_d_hw_irq_active2_claim(struct hevc_d_dev *dev, + struct hevc_d_hw_irq_ent *ient, + hevc_d_irq_callback ready_cb, void *ctx); +/* May only be called in claim cb */ +void hevc_d_hw_irq_active2_irq(struct hevc_d_dev *dev, + struct hevc_d_hw_irq_ent *ient, + hevc_d_irq_callback irq_cb, void *ctx); + +int hevc_d_hw_start_clock(struct hevc_d_dev *dev); +void hevc_d_hw_stop_clock(struct hevc_d_dev *dev); + +int hevc_d_hw_probe(struct hevc_d_dev *dev); +void hevc_d_hw_remove(struct hevc_d_dev *dev); + +#endif diff --git a/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_video.c b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_video.c new file mode 100644 index 00000000000000..8c5aa64df93c77 --- /dev/null +++ b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_video.c @@ -0,0 +1,636 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Raspberry Pi HEVC driver + * + * Copyright (C) 2025 Raspberry Pi Ltd + * + * Based on the Cedrus VPU driver, that is: + * + * Copyright (C) 2016 Florent Revest + * Copyright (C) 2018 Paul Kocialkowski + * Copyright (C) 2018 Bootlin + */ + +#include +#include +#include +#include +#include + +#include "hevc_d.h" +#include "hevc_d_h265.h" +#include "hevc_d_hw.h" +#include "hevc_d_video.h" + +static inline struct hevc_d_ctx *hevc_d_file2ctx(struct file *file) +{ + return container_of(file->private_data, struct hevc_d_ctx, fh); +} + +/* constrain x to y,y*2 */ +static inline unsigned int constrain2x(unsigned int x, unsigned int y) +{ + return (x < y) ? + y : + (x > y * 2) ? y : x; +} + +size_t hevc_d_round_up_size(const size_t x) +{ + /* Admit no size < 256 */ + const unsigned int n = x < 256 ? 8 : ilog2(x); + + return x >= (3 << n) ? 4 << n : (3 << n); +} + +size_t hevc_d_bit_buf_size(unsigned int w, unsigned int h, unsigned int bits_minus8) +{ + const size_t wxh = w * h; + size_t bits_alloc; + + /* Annex A gives a min compression of 2 @ lvl 3.1 + * (wxh <= 983040) and min 4 thereafter but avoid + * the odity of 983041 having a lower limit than + * 983040. + * Multiply by 3/2 for 4:2:0 + */ + bits_alloc = wxh < 983040 ? wxh * 3 / 4 : + wxh < 983040 * 2 ? 983040 * 3 / 4 : + wxh * 3 / 8; + /* Allow for bit depth */ + bits_alloc += (bits_alloc * bits_minus8) / 8; + return hevc_d_round_up_size(bits_alloc); +} + +void hevc_d_prepare_src_format(struct v4l2_pix_format_mplane *pix_fmt) +{ + size_t size; + u32 w; + u32 h; + + w = pix_fmt->width; + h = pix_fmt->height; + if (!w || !h) { + w = HEVC_D_DEFAULT_WIDTH; + h = HEVC_D_DEFAULT_HEIGHT; + } + if (w > HEVC_D_MAX_WIDTH) + w = HEVC_D_MAX_WIDTH; + if (h > HEVC_D_MAX_HEIGHT) + h = HEVC_D_MAX_HEIGHT; + + if (!pix_fmt->plane_fmt[0].sizeimage || + pix_fmt->plane_fmt[0].sizeimage > SZ_32M) { + /* Unspecified or way too big - pick max for size */ + size = hevc_d_bit_buf_size(w, h, 2); + } + /* Set a minimum */ + size = max_t(u32, SZ_4K, pix_fmt->plane_fmt[0].sizeimage); + + pix_fmt->pixelformat = V4L2_PIX_FMT_HEVC_SLICE; + pix_fmt->width = w; + pix_fmt->height = h; + pix_fmt->num_planes = 1; + pix_fmt->field = V4L2_FIELD_NONE; + /* Zero bytes per line for encoded source. */ + pix_fmt->plane_fmt[0].bytesperline = 0; + pix_fmt->plane_fmt[0].sizeimage = size; +} + +/* Take any pix_format and make it valid */ +static void hevc_d_prepare_dst_format(struct v4l2_pix_format_mplane *pix_fmt) +{ + unsigned int width = pix_fmt->width; + unsigned int height = pix_fmt->height; + unsigned int sizeimage = pix_fmt->plane_fmt[0].sizeimage; + unsigned int bytesperline = pix_fmt->plane_fmt[0].bytesperline; + + if (!width) + width = HEVC_D_DEFAULT_WIDTH; + else + width = clamp(width, HEVC_D_MIN_WIDTH, HEVC_D_MAX_WIDTH); + if (!height) + height = HEVC_D_DEFAULT_HEIGHT; + else + height = clamp(height, HEVC_D_MIN_HEIGHT, HEVC_D_MAX_HEIGHT); + + /* For column formats set bytesperline to column height (stride2) */ + switch (pix_fmt->pixelformat) { + default: + pix_fmt->pixelformat = V4L2_PIX_FMT_NV12MT_COL128; + fallthrough; + case V4L2_PIX_FMT_NV12MT_COL128: + /* Width rounds up to columns */ + width = ALIGN(width, 128); + height = ALIGN(height, 8); + + /* column height is sizeimage / bytesperline */ + bytesperline = width; + sizeimage = bytesperline * height; + break; + + case V4L2_PIX_FMT_NV12MT_10_COL128: + /* width in pixels (3 pels = 4 bytes) rounded to 128 byte + * columns + */ + width = ALIGN(((width + 2) / 3), 32) * 3; + height = ALIGN(height, 8); + + /* column height is sizeimage / bytesperline */ + bytesperline = width * 4 / 3; + sizeimage = bytesperline * height; + break; + } + + pix_fmt->width = width; + pix_fmt->height = height; + + pix_fmt->field = V4L2_FIELD_NONE; + pix_fmt->plane_fmt[0].bytesperline = bytesperline; + pix_fmt->plane_fmt[0].sizeimage = sizeimage; + pix_fmt->plane_fmt[1].bytesperline = bytesperline; + pix_fmt->plane_fmt[1].sizeimage = sizeimage / 2; + pix_fmt->num_planes = 2; +} + +static int hevc_d_querycap(struct file *file, void *priv, + struct v4l2_capability *cap) +{ + strscpy(cap->driver, HEVC_D_NAME, sizeof(cap->driver)); + strscpy(cap->card, HEVC_D_NAME, sizeof(cap->card)); + snprintf(cap->bus_info, sizeof(cap->bus_info), + "platform:%s", HEVC_D_NAME); + + return 0; +} + +static int hevc_d_enum_fmt_vid_out(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + /* + * Input formats + * H.265 Slice only + */ + if (f->index == 0) { + f->pixelformat = V4L2_PIX_FMT_HEVC_SLICE; + return 0; + } + + return -EINVAL; +} + +static int hevc_d_hevc_validate_sps(const struct v4l2_ctrl_hevc_sps * const sps) +{ + const unsigned int ctb_log2_size_y = + sps->log2_min_luma_coding_block_size_minus3 + 3 + + sps->log2_diff_max_min_luma_coding_block_size; + const unsigned int min_tb_log2_size_y = + sps->log2_min_luma_transform_block_size_minus2 + 2; + const unsigned int max_tb_log2_size_y = min_tb_log2_size_y + + sps->log2_diff_max_min_luma_transform_block_size; + + /* Local limitations */ + if (sps->pic_width_in_luma_samples < 32 || + sps->pic_width_in_luma_samples > 4096) + return 0; + if (sps->pic_height_in_luma_samples < 32 || + sps->pic_height_in_luma_samples > 4096) + return 0; + if (!(sps->bit_depth_luma_minus8 == 0 || + sps->bit_depth_luma_minus8 == 2)) + return 0; + if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) + return 0; + if (sps->chroma_format_idc != 1) + return 0; + + /* Limits from H.265 7.4.3.2.1 */ + if (sps->log2_max_pic_order_cnt_lsb_minus4 > 12) + return 0; + if (sps->sps_max_dec_pic_buffering_minus1 > 15) + return 0; + if (sps->sps_max_num_reorder_pics > + sps->sps_max_dec_pic_buffering_minus1) + return 0; + if (ctb_log2_size_y > 6) + return 0; + if (max_tb_log2_size_y > 5) + return 0; + if (max_tb_log2_size_y > ctb_log2_size_y) + return 0; + if (sps->max_transform_hierarchy_depth_inter > + (ctb_log2_size_y - min_tb_log2_size_y)) + return 0; + if (sps->max_transform_hierarchy_depth_intra > + (ctb_log2_size_y - min_tb_log2_size_y)) + return 0; + /* Check pcm stuff */ + if (sps->num_short_term_ref_pic_sets > 64) + return 0; + if (sps->num_long_term_ref_pics_sps > 32) + return 0; + return 1; +} + +static u32 pixelformat_from_sps(const struct v4l2_ctrl_hevc_sps * const sps, + const int index) +{ + u32 pf = 0; + + if (!is_sps_set(sps) || !hevc_d_hevc_validate_sps(sps)) { + /* Treat this as an error? For now return both */ + if (index == 0) + pf = V4L2_PIX_FMT_NV12MT_COL128; + else if (index == 1) + pf = V4L2_PIX_FMT_NV12MT_10_COL128; + } else if (index == 0) { + if (sps->bit_depth_luma_minus8 == 0) + pf = V4L2_PIX_FMT_NV12MT_COL128; + else if (sps->bit_depth_luma_minus8 == 2) + pf = V4L2_PIX_FMT_NV12MT_10_COL128; + } + + return pf; +} + +static void copy_color(struct v4l2_pix_format_mplane *d, + const struct v4l2_pix_format_mplane *s) +{ + d->colorspace = s->colorspace; + d->xfer_func = s->xfer_func; + d->ycbcr_enc = s->ycbcr_enc; + d->quantization = s->quantization; +} + +static struct v4l2_pix_format_mplane +hevc_d_hevc_default_dst_fmt(struct hevc_d_ctx * const ctx) +{ + const struct v4l2_ctrl_hevc_sps * const sps = + hevc_d_find_control_data(ctx, V4L2_CID_STATELESS_HEVC_SPS); + struct v4l2_pix_format_mplane pix_fmt; + + memset(&pix_fmt, 0, sizeof(pix_fmt)); + if (is_sps_set(sps)) { + pix_fmt.width = sps->pic_width_in_luma_samples; + pix_fmt.height = sps->pic_height_in_luma_samples; + pix_fmt.pixelformat = pixelformat_from_sps(sps, 0); + } + + hevc_d_prepare_dst_format(&pix_fmt); + copy_color(&pix_fmt, &ctx->src_fmt); + + return pix_fmt; +} + +static u32 hevc_d_hevc_get_dst_pixelformat(struct hevc_d_ctx * const ctx, + const int index) +{ + const struct v4l2_ctrl_hevc_sps * const sps = + hevc_d_find_control_data(ctx, V4L2_CID_STATELESS_HEVC_SPS); + + return pixelformat_from_sps(sps, index); +} + +static int hevc_d_enum_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + struct hevc_d_ctx * const ctx = hevc_d_file2ctx(file); + + const u32 pf = hevc_d_hevc_get_dst_pixelformat(ctx, f->index); + + if (pf == 0) + return -EINVAL; + + f->pixelformat = pf; + return 0; +} + +/* + * get dst format - sets it to default if otherwise unset + * returns a pointer to the struct as a convienience + */ +static struct v4l2_pix_format_mplane *get_dst_fmt(struct hevc_d_ctx *const ctx) +{ + if (!ctx->dst_fmt_set) + ctx->dst_fmt = hevc_d_hevc_default_dst_fmt(ctx); + return &ctx->dst_fmt; +} + +static int hevc_d_g_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct hevc_d_ctx *ctx = hevc_d_file2ctx(file); + + f->fmt.pix_mp = *get_dst_fmt(ctx); + return 0; +} + +static int hevc_d_g_fmt_vid_out(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct hevc_d_ctx *ctx = hevc_d_file2ctx(file); + + f->fmt.pix_mp = ctx->src_fmt; + return 0; +} + +static int hevc_d_try_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct hevc_d_ctx *ctx = hevc_d_file2ctx(file); + const struct v4l2_ctrl_hevc_sps * const sps = + hevc_d_find_control_data(ctx, V4L2_CID_STATELESS_HEVC_SPS); + u32 pixelformat; + int i; + + for (i = 0; (pixelformat = pixelformat_from_sps(sps, i)) != 0; i++) { + if (f->fmt.pix_mp.pixelformat == pixelformat) + break; + } + + /* + * We don't have any way of finding out colourspace so believe + * anything we are told - take anything set in src as a default + */ + if (f->fmt.pix_mp.colorspace == V4L2_COLORSPACE_DEFAULT) + copy_color(&f->fmt.pix_mp, &ctx->src_fmt); + + f->fmt.pix_mp.pixelformat = pixelformat; + hevc_d_prepare_dst_format(&f->fmt.pix_mp); + return 0; +} + +static int hevc_d_try_fmt_vid_out(struct file *file, void *priv, + struct v4l2_format *f) +{ + hevc_d_prepare_src_format(&f->fmt.pix_mp); + return 0; +} + +static int hevc_d_s_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct hevc_d_ctx *ctx = hevc_d_file2ctx(file); + struct vb2_queue *vq; + int ret; + + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); + if (vb2_is_busy(vq)) + return -EBUSY; + + ret = hevc_d_try_fmt_vid_cap(file, priv, f); + if (ret) + return ret; + + ctx->dst_fmt = f->fmt.pix_mp; + ctx->dst_fmt_set = 1; + + return 0; +} + +static int hevc_d_s_fmt_vid_out(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct hevc_d_ctx *ctx = hevc_d_file2ctx(file); + struct vb2_queue *vq; + int ret; + + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); + if (vb2_is_busy(vq)) + return -EBUSY; + + ret = hevc_d_try_fmt_vid_out(file, priv, f); + if (ret) + return ret; + + ctx->src_fmt = f->fmt.pix_mp; + ctx->dst_fmt_set = 0; /* Setting src invalidates dst */ + + /* Propagate colorspace information to capture. */ + copy_color(&ctx->dst_fmt, &f->fmt.pix_mp); + return 0; +} + +const struct v4l2_ioctl_ops hevc_d_ioctl_ops = { + .vidioc_querycap = hevc_d_querycap, + + .vidioc_enum_fmt_vid_cap = hevc_d_enum_fmt_vid_cap, + .vidioc_g_fmt_vid_cap_mplane = hevc_d_g_fmt_vid_cap, + .vidioc_try_fmt_vid_cap_mplane = hevc_d_try_fmt_vid_cap, + .vidioc_s_fmt_vid_cap_mplane = hevc_d_s_fmt_vid_cap, + + .vidioc_enum_fmt_vid_out = hevc_d_enum_fmt_vid_out, + .vidioc_g_fmt_vid_out_mplane = hevc_d_g_fmt_vid_out, + .vidioc_try_fmt_vid_out_mplane = hevc_d_try_fmt_vid_out, + .vidioc_s_fmt_vid_out_mplane = hevc_d_s_fmt_vid_out, + + .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, + .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, + .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, + .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, + .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, + .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs, + .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, + + .vidioc_streamon = v4l2_m2m_ioctl_streamon, + .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, + + .vidioc_try_decoder_cmd = v4l2_m2m_ioctl_stateless_try_decoder_cmd, + .vidioc_decoder_cmd = v4l2_m2m_ioctl_stateless_decoder_cmd, + + .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, +}; + +static int hevc_d_queue_setup(struct vb2_queue *vq, unsigned int *nbufs, + unsigned int *nplanes, unsigned int sizes[], + struct device *alloc_devs[]) +{ + struct hevc_d_ctx *ctx = vb2_get_drv_priv(vq); + struct v4l2_pix_format_mplane *pix_fmt; + int expected_nplanes; + + if (V4L2_TYPE_IS_OUTPUT(vq->type)) { + pix_fmt = &ctx->src_fmt; + expected_nplanes = 1; + } else { + pix_fmt = get_dst_fmt(ctx); + expected_nplanes = 2; + } + + if (*nplanes) { + if (*nplanes != expected_nplanes || + sizes[0] < pix_fmt->plane_fmt[0].sizeimage || + sizes[1] < pix_fmt->plane_fmt[1].sizeimage) + return -EINVAL; + } else { + sizes[0] = pix_fmt->plane_fmt[0].sizeimage; + if (V4L2_TYPE_IS_OUTPUT(vq->type)) { + *nplanes = 1; + } else { + sizes[1] = pix_fmt->plane_fmt[1].sizeimage; + *nplanes = 2; + } + } + + return 0; +} + +static void hevc_d_queue_cleanup(struct vb2_queue *vq, u32 state) +{ + struct hevc_d_ctx *ctx = vb2_get_drv_priv(vq); + struct vb2_v4l2_buffer *vbuf; + + for (;;) { + if (V4L2_TYPE_IS_OUTPUT(vq->type)) + vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + else + vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + + if (!vbuf) + return; + + v4l2_ctrl_request_complete(vbuf->vb2_buf.req_obj.req, + &ctx->hdl); + v4l2_m2m_buf_done(vbuf, state); + } +} + +static int hevc_d_buf_out_validate(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + + vbuf->field = V4L2_FIELD_NONE; + return 0; +} + +static int hevc_d_buf_prepare(struct vb2_buffer *vb) +{ + struct vb2_queue *vq = vb->vb2_queue; + struct hevc_d_ctx *ctx = vb2_get_drv_priv(vq); + struct v4l2_pix_format_mplane *pix_fmt; + + if (V4L2_TYPE_IS_OUTPUT(vq->type)) + pix_fmt = &ctx->src_fmt; + else + pix_fmt = &ctx->dst_fmt; + + if (vb2_plane_size(vb, 0) < pix_fmt->plane_fmt[0].sizeimage || + vb2_plane_size(vb, 1) < pix_fmt->plane_fmt[1].sizeimage) + return -EINVAL; + + vb2_set_plane_payload(vb, 0, pix_fmt->plane_fmt[0].sizeimage); + vb2_set_plane_payload(vb, 1, pix_fmt->plane_fmt[1].sizeimage); + + return 0; +} + +static int hevc_d_start_streaming(struct vb2_queue *vq, unsigned int count) +{ + struct hevc_d_ctx *ctx = vb2_get_drv_priv(vq); + struct hevc_d_dev *dev = ctx->dev; + int ret = 0; + + v4l2_m2m_update_start_streaming_state(ctx->fh.m2m_ctx, vq); + + if (V4L2_TYPE_IS_OUTPUT(vq->type)) { + ret = hevc_d_hw_start_clock(dev); + if (ret) + goto fail_cleanup; + + ret = hevc_d_h265_start(ctx); + if (ret) + goto fail_stop_clock; + } + + return 0; + +fail_stop_clock: + hevc_d_hw_stop_clock(dev); +fail_cleanup: + v4l2_err(&dev->v4l2_dev, "%s: qtype=%d: FAIL\n", __func__, vq->type); + hevc_d_queue_cleanup(vq, VB2_BUF_STATE_QUEUED); + return ret; +} + +static void hevc_d_stop_streaming(struct vb2_queue *vq) +{ + struct hevc_d_ctx *ctx = vb2_get_drv_priv(vq); + struct hevc_d_dev *dev = ctx->dev; + + if (V4L2_TYPE_IS_OUTPUT(vq->type)) { + hevc_d_h265_stop(ctx); + hevc_d_hw_stop_clock(dev); + } + + hevc_d_queue_cleanup(vq, VB2_BUF_STATE_ERROR); + + vb2_wait_for_all_buffers(vq); + + v4l2_m2m_update_stop_streaming_state(ctx->fh.m2m_ctx, vq); +} + +static void hevc_d_buf_queue(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct hevc_d_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); + + v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); +} + +static void hevc_d_buf_request_complete(struct vb2_buffer *vb) +{ + struct hevc_d_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); + + v4l2_ctrl_request_complete(vb->req_obj.req, &ctx->hdl); +} + +static const struct vb2_ops hevc_d_qops = { + .queue_setup = hevc_d_queue_setup, + .buf_prepare = hevc_d_buf_prepare, + .buf_queue = hevc_d_buf_queue, + .buf_out_validate = hevc_d_buf_out_validate, + .buf_request_complete = hevc_d_buf_request_complete, + .start_streaming = hevc_d_start_streaming, + .stop_streaming = hevc_d_stop_streaming, + .wait_prepare = vb2_ops_wait_prepare, + .wait_finish = vb2_ops_wait_finish, +}; + +int hevc_d_queue_init(void *priv, struct vb2_queue *src_vq, + struct vb2_queue *dst_vq) +{ + struct hevc_d_ctx *ctx = priv; + int ret; + + src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; + src_vq->io_modes = VB2_MMAP | VB2_DMABUF; + src_vq->dma_attrs = DMA_ATTR_NO_KERNEL_MAPPING; + src_vq->drv_priv = ctx; + src_vq->buf_struct_size = sizeof(struct hevc_d_buffer); + src_vq->ops = &hevc_d_qops; + src_vq->mem_ops = &vb2_dma_contig_memops; + src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + src_vq->lock = &ctx->ctx_mutex; + src_vq->dev = ctx->dev->dev; + src_vq->supports_requests = true; + src_vq->requires_requests = true; + + ret = vb2_queue_init(src_vq); + if (ret) + return ret; + + dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; + dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; + dst_vq->dma_attrs = DMA_ATTR_NO_KERNEL_MAPPING; + dst_vq->drv_priv = ctx; + dst_vq->buf_struct_size = sizeof(struct hevc_d_buffer); + dst_vq->min_queued_buffers = 1; + dst_vq->ops = &hevc_d_qops; + dst_vq->mem_ops = &vb2_dma_contig_memops; + dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + dst_vq->lock = &ctx->ctx_mutex; + dst_vq->dev = ctx->dev->dev; + + return vb2_queue_init(dst_vq); +} diff --git a/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_video.h b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_video.h new file mode 100644 index 00000000000000..fb894bc9c813c2 --- /dev/null +++ b/drivers/media/platform/raspberrypi/hevc_dec/hevc_d_video.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Raspberry Pi HEVC driver + * + * Copyright (C) 2025 Raspberry Pi Ltd + * + * Based on the Cedrus VPU driver, that is: + * + * Copyright (C) 2016 Florent Revest + * Copyright (C) 2018 Paul Kocialkowski + * Copyright (C) 2018 Bootlin + */ + +#ifndef _HEVC_D_VIDEO_H_ +#define _HEVC_D_VIDEO_H_ + +struct hevc_d_format { + u32 pixelformat; + u32 directions; + unsigned int capabilities; +}; + +static inline int is_sps_set(const struct v4l2_ctrl_hevc_sps * const sps) +{ + return sps && sps->pic_width_in_luma_samples; +} + +extern const struct v4l2_ioctl_ops hevc_d_ioctl_ops; + +int hevc_d_queue_init(void *priv, struct vb2_queue *src_vq, + struct vb2_queue *dst_vq); + +size_t hevc_d_bit_buf_size(unsigned int w, unsigned int h, unsigned int bits_minus8); +size_t hevc_d_round_up_size(const size_t x); + +void hevc_d_prepare_src_format(struct v4l2_pix_format_mplane *pix_fmt); + +#endif From 0df0fb093cbed79a9cfcf3f7b78d38e5036b634b Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 12 Dec 2024 17:27:32 +0000 Subject: [PATCH 046/625] media: v4l2: Add single planar NV12 column formats For downstream only, add back in the legacy single planar SAND formats. Signed-off-by: Dave Stevenson --- drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++ include/uapi/linux/videodev2.h | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index 1fb6a86e7e926e..244da208d76b43 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1372,6 +1372,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_NV12_4L4: descr = "Y/UV 4:2:0 (4x4 Linear)"; break; case V4L2_PIX_FMT_NV12_16L16: descr = "Y/UV 4:2:0 (16x16 Linear)"; break; case V4L2_PIX_FMT_NV12_32L32: descr = "Y/UV 4:2:0 (32x32 Linear)"; break; + case V4L2_PIX_FMT_NV12_COL128: descr = "Y/CbCr 4:2:0 (128b cols)"; break; + case V4L2_PIX_FMT_NV12_10_COL128: descr = "10-bit Y/CbCr 4:2:0 (128b cols)"; break; case V4L2_PIX_FMT_NV15_4L4: descr = "10-bit Y/UV 4:2:0 (4x4 Linear)"; break; case V4L2_PIX_FMT_P010_4L4: descr = "10-bit Y/UV 4:2:0 (4x4 Linear)"; break; case V4L2_PIX_FMT_NV12M: descr = "Y/UV 4:2:0 (N-C)"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index b7001442cb91bf..6e17e43bf41065 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -691,6 +691,10 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_P010_4L4 v4l2_fourcc('T', '0', '1', '0') /* 12 Y/CbCr 4:2:0 10-bit 4x4 macroblocks */ #define V4L2_PIX_FMT_NV12_8L128 v4l2_fourcc('A', 'T', '1', '2') /* Y/CbCr 4:2:0 8x128 tiles */ #define V4L2_PIX_FMT_NV12_10BE_8L128 v4l2_fourcc_be('A', 'X', '1', '2') /* Y/CbCr 4:2:0 10-bit 8x128 tiles */ +#define V4L2_PIX_FMT_NV12_COL128 v4l2_fourcc('N', 'C', '1', '2') /* 12 Y/CbCr 4:2:0 128 pixel wide column */ +#define V4L2_PIX_FMT_NV12_10_COL128 v4l2_fourcc('N', 'C', '3', '0') + /* Y/CbCr 4:2:0 10bpc, 3x10 packed as 4 bytes in + * a 128 bytes / 96 pixel wide column */ /* Tiled YUV formats, non contiguous planes */ #define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 tiles */ From 7f1f12587788c87a0101534268cbfb2b1d16400c Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 8 Mar 2023 15:28:19 +0000 Subject: [PATCH 047/625] workflows: We all love checkpatch, so add it to the CI workflows This is currently running on defaults, so the --strict desired for media drivers and similar won't be observed. That may be possible to add later. Signed-off-by: Dave Stevenson .github: Add Github Workflow for KUnit Now that we have some KUnit coverage, let's add a github actions file to run them on each push or pull request. Signed-off-by: Maxime Ripard .github/workflows: Add dtoverlaycheck workflow Signed-off-by: Dave Stevenson .github/workflows: Create workflow to CI kernel builds Builds the bcmrpi, bcm2709, bcm2711, and bcm2835 32 bit kernels, and defconfig and bcm2711 64bit kernels, saving the artifacts for 7 days. Signed-off-by: Dave Stevenson .github: Skip broken Generic DRM/KMS Unit Tests Signed-off-by: Phil Elwell .github/workflows: Set warnings-as-errors for builds To avoid code with build warnings being introduced into the tree, force CONFIG_WERROR=y in the build workflow. Signed-off-by: Phil Elwell .github/workflows: Correct kernel builds artifacts Modify the kernel build workflow to create artifacts with the correct names and structure, both as an example of what we expect and in case anyone wants to use the output. Signed-off-by: Phil Elwell .github/workflows: Switch to a matrix build Remove the per-build duplication by putting build parameters in a matrix. Signed-off-by: Phil Elwell .github/workflows: Retain artifacts for 90 days Signed-off-by: Phil Elwell .github/workflows: Add a bcm2712 build configuration Signed-off-by: Phil Elwell Update kernel-build.yml to use node.js 20 Upgrade the actions to v4 to get rid of the warning about migrating from node.js 16. Update kunit.yml to use node.js 20 Bump actions/checkout to v4. Update dtoverlaycheck.yml to node.js 20 .github/workflows: More jobs for kernel builds Using the "cores * 1.5" heuristic, configure the kernel builds for the 4-core GitHub-hosted runners. Signed-off-by: Phil Elwell workflows: Add arm64 bcm2711_rt build Add a Github CI workflow bcm2711_rt_defconfig Signed-off-by: Tim Gover workflows: Remove the ARCH=arm bcm2711 build As we will be moving Pi 4 support to kernel8.img only and dropping kernel7l.img, the ARCH=arm bcm2711 defconfig has been deleted. Remove the corresponding autobuild. Signed-off-by: Phil Elwell workflows: Use bcm2709_defconfig for dtoverlaycheck Now that ARCH=arm bcm2711_defconfig has been deleted, update dtoverlaycheck to use bcm2709_defconfig. Signed-off-by: Phil Elwell kunit: Use ubuntu-22.04 for arm64 There's a bug in the version of qemu used by Ubuntu 24.04 that kills the arm64 KUnit test. Revert to Ubuntu 22.04 just for that test, until ubuntu-latest updates to qemu 9.2.0+. Link: https://bugzilla.suse.com/show_bug.cgi?id=1236310 Signed-off-by: Phil Elwell workflows: Switch to overlaycheck's thorough mode Now that the current trees are passing the thorough/try-all mode of overlaycheck (mainly by excluding trying to apply the vl805 overlay on a CM4S), use it in the build checks. Signed-off-by: Phil Elwell workflows: Ignore checkpatch UNKNOWN_COMMIT_ID As we do a shallow clone of the repo, Fixes: tags generally don't have the matching commit available to lookup, and checkpatch logs it. Ignore this error. Signed-off-by: Dave Stevenson workflows: dtoverlaycheck: Update the dependencies Signed-off-by: Phil Elwell workflows: Increase timeout for toolchain install 5 minutes seems to be failing on a regular basis, so increase it. Signed-off-by: Dave Stevenson workflows: Increase DT tools installation timeout Increase the timeout for the toolchain installation in the dtoverlaycheck workflow, to match that for the kernel. Signed-off-by: Phil Elwell workflows: Use native arm64 runners Use native arm64 runners to speed up build process. Cross compile is still used for arm targets, but also benefit from the arm64 runner architecture. Overall build time will be reduced by 25 to 30 minutes by this. Signed-off-by: Nicolai Buchwitz --- .github/workflows/checkpatch.yml | 18 +++++ .github/workflows/ci_checkpatch.conf | 5 ++ .github/workflows/dtoverlaycheck.yml | 48 +++++++++++++ .github/workflows/kernel-build.yml | 103 +++++++++++++++++++++++++++ .github/workflows/kunit.yml | 57 +++++++++++++++ 5 files changed, 231 insertions(+) create mode 100644 .github/workflows/checkpatch.yml create mode 100644 .github/workflows/ci_checkpatch.conf create mode 100644 .github/workflows/dtoverlaycheck.yml create mode 100644 .github/workflows/kernel-build.yml create mode 100644 .github/workflows/kunit.yml diff --git a/.github/workflows/checkpatch.yml b/.github/workflows/checkpatch.yml new file mode 100644 index 00000000000000..c214226654dc1b --- /dev/null +++ b/.github/workflows/checkpatch.yml @@ -0,0 +1,18 @@ +name: Advisory checkpatch review +on: [pull_request] + +jobs: + review: + name: checkpatch review + runs-on: ubuntu-latest + steps: + - name: 'Calculate PR commits + 1' + run: echo "PR_FETCH_DEPTH=$(( ${{ github.event.pull_request.commits }} + 1 ))" >> $GITHUB_ENV + - uses: actions/checkout@v4 + with: + ref: ${{ github.event.pull_request.head.sha }} + fetch-depth: ${{ env.PR_FETCH_DEPTH }} + - name: Copy checkpatch.conf + run: cp ${{github.workspace}}/.github/workflows/ci_checkpatch.conf ${{github.workspace}}/.checkpatch.conf + - name: Run checkpatch review + uses: webispy/checkpatch-action@v9 diff --git a/.github/workflows/ci_checkpatch.conf b/.github/workflows/ci_checkpatch.conf new file mode 100644 index 00000000000000..d048d5d0fdb948 --- /dev/null +++ b/.github/workflows/ci_checkpatch.conf @@ -0,0 +1,5 @@ +--no-tree +--ignore FILE_PATH_CHANGES +--ignore GIT_COMMIT_ID +--ignore SPDX_LICENSE_TAG +--ignore UNKNOWN_COMMIT_ID diff --git a/.github/workflows/dtoverlaycheck.yml b/.github/workflows/dtoverlaycheck.yml new file mode 100644 index 00000000000000..15e8818bb57c1c --- /dev/null +++ b/.github/workflows/dtoverlaycheck.yml @@ -0,0 +1,48 @@ +name: Pi dtoverlay checks + +on: + pull_request: + paths-ignore: + - '.github/**' + branches: [ "rpi-*" ] + push: + paths-ignore: + - '.github/**' + branches: [ "rpi-*" ] + workflow_dispatch: + +env: + UTILS_DIR: "${{github.workspace}}/utils" + +jobs: + dtoverlaycheck: + runs-on: ubuntu-latest + + steps: + - name: Install toolchain + run: | + sudo apt update + sudo apt-get install gcc-arm-linux-gnueabihf libfdt-dev device-tree-compiler gnutls-dev + timeout-minutes: 15 + + - uses: actions/checkout@v4 + with: + fetch-depth: 1 + clean: true + + - name: overlaycheck + run: | + git clone https://github.com/raspberrypi/utils ${{env.UTILS_DIR}} + cd ${{env.UTILS_DIR}} + pwd + mkdir build + cd build + pwd + cmake .. + make -j4 + sudo make install + cd ${{github.workspace}} + pwd + make ARCH=arm KERNEL=kernel CROSS_COMPILE=arm-linux-gnueabihf- bcm2709_defconfig + make ARCH=arm KERNEL=kernel CROSS_COMPILE=arm-linux-gnueabihf- dtbs + ${{env.UTILS_DIR}}/overlaycheck/overlaycheck -t diff --git a/.github/workflows/kernel-build.yml b/.github/workflows/kernel-build.yml new file mode 100644 index 00000000000000..558486e26341b1 --- /dev/null +++ b/.github/workflows/kernel-build.yml @@ -0,0 +1,103 @@ +name: Pi kernel build tests + +on: + pull_request: + paths-ignore: + - '.github/**' + branches: [ "rpi-*" ] + push: + paths-ignore: + - '.github/**' + branches: [ "rpi-*" ] + workflow_dispatch: + +env: + NUM_JOBS: 6 + +jobs: + build: + runs-on: ubuntu-24.04-arm + strategy: + matrix: + include: + - name: bcm2835 + arch: arm + defconfig: bcm2835_defconfig + kernel: kernel + + - name: arm64 + arch: arm64 + defconfig: defconfig + kernel: kernel8 + + - name: bcmrpi + arch: arm + defconfig: bcmrpi_defconfig + kernel: kernel + + - name: bcm2709 + arch: arm + defconfig: bcm2709_defconfig + kernel: kernel7 + + - name: bcm2711 + arch: arm64 + defconfig: bcm2711_defconfig + kernel: kernel8 + + - name: bcm2711_rt + arch: arm64 + defconfig: bcm2711_rt_defconfig + kernel: kernel8_rt + + - name: bcm2712 + arch: arm64 + defconfig: bcm2712_defconfig + kernel: kernel_2712 + + steps: + - name: Install armhf crossbuild toolchain + if: matrix.arch == 'arm' + env: + DEBIAN_FRONTEND: noninteractive + run: | + sudo apt-get update + sudo apt-get install -y gcc-arm-linux-gnueabihf + timeout-minutes: 15 + + - uses: actions/checkout@v4 + with: + fetch-depth: 1 + clean: true + + - name: Build kernel ${{matrix.name}} + run: | + mkdir ${{github.workspace}}/build + export ARCH=${{matrix.arch}} + if [[ "$ARCH" == "arm64" ]]; then + export DTS_SUBDIR=broadcom + export IMAGE=Image.gz + else + export CROSS_COMPILE=arm-linux-gnueabihf- + export DTS_SUBDIR=broadcom + export IMAGE=zImage + fi + make O=${{github.workspace}}/build ${{matrix.defconfig}} + scripts/config --file ${{github.workspace}}/build/.config --set-val CONFIG_WERROR y + make O=${{github.workspace}}/build -j ${{env.NUM_JOBS}} $IMAGE modules dtbs + mkdir -p ${{github.workspace}}/install/boot/overlays + make O=${{github.workspace}}/build INSTALL_MOD_PATH=${{github.workspace}}/install modules_install + cp ${{github.workspace}}/build/arch/${ARCH}/boot/dts/${DTS_SUBDIR}/*.dtb ${{github.workspace}}/install/boot/ + cp ${{github.workspace}}/build/arch/${ARCH}/boot/dts/overlays/*.dtb* ${{github.workspace}}/install/boot/overlays/ + cp ${{github.workspace}}/arch/${ARCH}/boot/dts/overlays/README ${{github.workspace}}/install/boot/overlays/ + cp ${{github.workspace}}/build/arch/${ARCH}/boot/$IMAGE ${{github.workspace}}/install/boot/${{matrix.kernel}}.img + + - name: Tar build + run: tar -cvf ${{matrix.name}}_build.tar -C ${{github.workspace}}/install . + + - name: Upload results + uses: actions/upload-artifact@v4 + with: + name: ${{matrix.name}}_build + path: ${{matrix.name}}_build.tar + retention-days: 90 diff --git a/.github/workflows/kunit.yml b/.github/workflows/kunit.yml new file mode 100644 index 00000000000000..1244d728974069 --- /dev/null +++ b/.github/workflows/kunit.yml @@ -0,0 +1,57 @@ +name: KUnit Tests + +on: + pull_request: + branches: [ "rpi-*"] + + push: + branches: [ "rpi-*"] + +jobs: + core: + name: Generic DRM/KMS Unit Tests + runs-on: ubuntu-latest + + steps: + - uses: actions/checkout@v4 + + - name: Run Generic DRM Tests + run: | + echo Skipping ./tools/testing/kunit/kunit.py run \ + --kunitconfig=drivers/gpu/drm/tests + + vc4-arm: + name: VC4 Unit Tests on ARM + runs-on: ubuntu-latest + + steps: + - uses: actions/checkout@v4 + + - name: Install Dependencies + run: | + sudo apt-get update + sudo apt-get install -y gcc-arm-linux-gnueabihf qemu-system-arm + + - name: Run VC4 Tests + run: | + ./tools/testing/kunit/kunit.py run \ + --kunitconfig=drivers/gpu/drm/vc4/tests \ + --cross_compile=arm-linux-gnueabihf- --arch=arm + + vc4-arm64: + name: VC4 Unit Tests on ARM64 + runs-on: ubuntu-22.04 + + steps: + - uses: actions/checkout@v4 + + - name: Install Dependencies + run: | + sudo apt-get update + sudo apt-get install -y gcc-aarch64-linux-gnu qemu-system-arm + + - name: Run VC4 Tests + run: | + ./tools/testing/kunit/kunit.py run \ + --kunitconfig=drivers/gpu/drm/vc4/tests \ + --cross_compile=aarch64-linux-gnu- --arch=arm64 From c48f19b56f0b8a3e78ce0f517e1f3ac737b27482 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 14 Nov 2022 17:14:15 +0000 Subject: [PATCH 048/625] README: Add README.md with CI kernel build status tags This is a copy of README with the tags added. You can not delete the file README as then checkpatch complains you aren't in a kernel tree. Signed-off-by: Dave Stevenson README: Show rpi-6.5.y build status Signed-off-by: Phil Elwell README: show rpi-6.6.y build status Replace rpi-6.5.y with rpi-6.6.y in the build status list. README: show rpi-6.12.y build status Remove rpi-5.15.y build status since it doesn't appear to be built anymore, and add rpi-6.12.y build status. --- README.md | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 README.md diff --git a/README.md b/README.md new file mode 100644 index 00000000000000..e26e19b0262727 --- /dev/null +++ b/README.md @@ -0,0 +1,30 @@ +Linux kernel +============ + +There are several guides for kernel developers and users. These guides can +be rendered in a number of formats, like HTML and PDF. Please read +Documentation/admin-guide/README.rst first. + +In order to build the documentation, use ``make htmldocs`` or +``make pdfdocs``. The formatted documentation can also be read online at: + + https://www.kernel.org/doc/html/latest/ + +There are various text files in the Documentation/ subdirectory, +several of them using the Restructured Text markup notation. + +Please read the Documentation/process/changes.rst file, as it contains the +requirements for building and running the kernel, and information about +the problems which may result by upgrading your kernel. + +Build status for rpi-6.1.y: +[![Pi kernel build tests](https://github.com/raspberrypi/linux/actions/workflows/kernel-build.yml/badge.svg?branch=rpi-6.1.y)](https://github.com/raspberrypi/linux/actions/workflows/kernel-build.yml) +[![dtoverlaycheck](https://github.com/raspberrypi/linux/actions/workflows/dtoverlaycheck.yml/badge.svg?branch=rpi-6.1.y)](https://github.com/raspberrypi/linux/actions/workflows/dtoverlaycheck.yml) + +Build status for rpi-6.6.y: +[![Pi kernel build tests](https://github.com/raspberrypi/linux/actions/workflows/kernel-build.yml/badge.svg?branch=rpi-6.6.y)](https://github.com/raspberrypi/linux/actions/workflows/kernel-build.yml) +[![dtoverlaycheck](https://github.com/raspberrypi/linux/actions/workflows/dtoverlaycheck.yml/badge.svg?branch=rpi-6.6.y)](https://github.com/raspberrypi/linux/actions/workflows/dtoverlaycheck.yml) + +Build status for rpi-6.12.y: +[![Pi kernel build tests](https://github.com/raspberrypi/linux/actions/workflows/kernel-build.yml/badge.svg?branch=rpi-6.12.y)](https://github.com/raspberrypi/linux/actions/workflows/kernel-build.yml) +[![dtoverlaycheck](https://github.com/raspberrypi/linux/actions/workflows/dtoverlaycheck.yml/badge.svg?branch=rpi-6.12.y)](https://github.com/raspberrypi/linux/actions/workflows/dtoverlaycheck.yml) From 8f925080e92605089781b63f051e5222cb2a9c95 Mon Sep 17 00:00:00 2001 From: Andreas Blaesius Date: Wed, 5 Jan 2022 20:38:39 +0100 Subject: [PATCH 049/625] Use GitHubs issue form for bug reports Use GitHubs issue form for bug reports. - modern look - user don't need to mess with given markdown parts while filling the issue template Setup config.yml for general questions and problems with the Raspbian distribution packages. Update issue templates (#2736) Adding Pi 5 as a device to bug_report.yml Update the Issue template * Update config.yml - Raspbian -> Raspberry Pi OS * Update config.yml * .org to .com * Update forum URL Add Pi 500 and CM5 as a device to bug_report.yml Signed-off-by: Nicolai Buchwitz Suggest 'raspinfo | pastebinit' in bug_report.yml Output of raspinfo is now over 65,000 characters, which is more than GitHub allows in a single form field! Also adds Pi 500+ and CM0 to the list of models. --- .github/ISSUE_TEMPLATE/bug_report.yml | 97 +++++++++++++++++++++++++++ .github/ISSUE_TEMPLATE/config.yml | 9 +++ 2 files changed, 106 insertions(+) create mode 100644 .github/ISSUE_TEMPLATE/bug_report.yml create mode 100644 .github/ISSUE_TEMPLATE/config.yml diff --git a/.github/ISSUE_TEMPLATE/bug_report.yml b/.github/ISSUE_TEMPLATE/bug_report.yml new file mode 100644 index 00000000000000..cdaf4fcf48968c --- /dev/null +++ b/.github/ISSUE_TEMPLATE/bug_report.yml @@ -0,0 +1,97 @@ +name: "Bug report" +description: Create a report to help us fix your issue +body: +- type: markdown + attributes: + value: | + **Is this the right place for my bug report?** + This repository contains the Linux kernel used on the Raspberry Pi. + If you believe that the issue you are seeing is kernel-related, this is the right place. + If not, we have other repositories for the GPU firmware at [github.com/raspberrypi/firmware](https://github.com/raspberrypi/firmware) and Raspberry Pi userland applications at [github.com/raspberrypi/userland](https://github.com/raspberrypi/userland). + + If you have problems with the Raspbian distribution packages, report them in the [github.com/RPi-Distro/repo](https://github.com/RPi-Distro/repo). + If you simply have a question, then [the Raspberry Pi forums](https://www.raspberrypi.org/forums) are the best place to ask it. + +- type: textarea + id: description + attributes: + label: Describe the bug + description: | + Add a clear and concise description of what you think the bug is. + validations: + required: true + +- type: textarea + id: reproduce + attributes: + label: Steps to reproduce the behaviour + description: | + List the steps required to reproduce the issue. + validations: + required: true + +- type: dropdown + id: model + attributes: + label: Device (s) + description: On which device you are facing the bug? + multiple: true + options: + - Raspberry Pi Zero + - Raspberry Pi Zero W / WH + - Raspberry Pi Zero 2 W + - Raspberry Pi 1 Mod. A + - Raspberry Pi 1 Mod. A+ + - Raspberry Pi 1 Mod. B + - Raspberry Pi 1 Mod. B+ + - Raspberry Pi 2 Mod. B + - Raspberry Pi 2 Mod. B v1.2 + - Raspberry Pi 3 Mod. A+ + - Raspberry Pi 3 Mod. B + - Raspberry Pi 3 Mod. B+ + - Raspberry Pi 4 Mod. B + - Raspberry Pi 400 + - Raspberry Pi 5 + - Raspberry Pi 500 + - Raspberry Pi 500+ + - Raspberry Pi CM0 + - Raspberry Pi CM1 + - Raspberry Pi CM3 + - Raspberry Pi CM3 Lite + - Raspberry Pi CM3+ + - Raspberry Pi CM3+ Lite + - Raspberry Pi CM4 + - Raspberry Pi CM4 Lite + - Raspberry Pi CM5 + - Raspberry Pi CM5 Lite + - Other + validations: + required: true + +- type: textarea + id: system + attributes: + label: System + description: | + Copy and paste the URL returned from `raspinfo | pastebinit` into this section. + Alternatively, add answers to the following questions: + * Which OS and version (`cat /etc/rpi-issue`)? + * Which firmware version (`vcgencmd version`)? + * Which kernel version (`uname -a`)? + validations: + required: true + +- type: textarea + id: logs + attributes: + label: Logs + description: | + If applicable, add the relevant output from `dmesg` or similar. + +- type: textarea + id: additional + attributes: + label: Additional context + description: | + Add any other relevant context for the problem. + diff --git a/.github/ISSUE_TEMPLATE/config.yml b/.github/ISSUE_TEMPLATE/config.yml new file mode 100644 index 00000000000000..a2dc0b737233e4 --- /dev/null +++ b/.github/ISSUE_TEMPLATE/config.yml @@ -0,0 +1,9 @@ +blank_issues_enabled: false +contact_links: + - name: "⛔ Question" + url: https://forums.raspberrypi.com + about: "Please do not use GitHub for asking questions. If you simply have a question, then the Raspberry Pi forums are the best place to ask it. Thanks in advance for helping us keep the issue tracker clean!" + - name: "⛔ Problems with Raspberry Pi OS packages" + url: https://github.com/RPi-Distro/repo + about: "If you have problems with a Raspberry Pi OS package, please report them at https://github.com/RPi-Distro/repo." + From ddd011e45685ac24d363b245b93a9eb4d629ef37 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 20 Apr 2020 13:41:10 +0100 Subject: [PATCH 050/625] Revert "spi: spidev: Fix CS polarity if GPIO descriptors are used" This reverts commit 83b2a8fe43bda0c11981ad6afa5dd0104d78be28. --- drivers/spi/spidev.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c index 638221178384dc..e815a1ad320d3b 100644 --- a/drivers/spi/spidev.c +++ b/drivers/spi/spidev.c @@ -415,7 +415,7 @@ spidev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) } if (ctlr->use_gpio_descriptors && spi_get_csgpiod(spi, 0)) - tmp |= SPI_CS_HIGH; + { /*tmp |= SPI_CS_HIGH;*/ } tmp |= spi->mode & ~SPI_MODE_MASK; spi->mode = tmp & SPI_MODE_USER_MASK; From 5e6968ec3b6b40083c1070288ab3c8efea743c26 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Wed, 31 Jan 2024 19:47:39 +0000 Subject: [PATCH 051/625] Revert "ARM: dts: bcm2711: Add BCM2711 xHCI support" This reverts commit 522c35e08b53f157ad3e51848caa861b258001e4. --- arch/arm/boot/dts/broadcom/bcm2711.dtsi | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/arch/arm/boot/dts/broadcom/bcm2711.dtsi b/arch/arm/boot/dts/broadcom/bcm2711.dtsi index 5e3b4bb3939670..9986472f61c445 100644 --- a/arch/arm/boot/dts/broadcom/bcm2711.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm2711.dtsi @@ -602,21 +602,6 @@ }; }; - xhci: usb@7e9c0000 { - compatible = "brcm,bcm2711-xhci", "brcm,xhci-brcm-v2"; - reg = <0x0 0x7e9c0000 0x100000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = ; - power-domains = <&pm BCM2835_POWER_DOMAIN_USB>; - /* DWC2 and this IP block share the same USB PHY, - * enabling both at the same time results in lockups. - * So keep this node disabled and let the bootloader - * decide which interface should be enabled. - */ - status = "disabled"; - }; - v3d: gpu@7ec00000 { compatible = "brcm,2711-v3d"; reg = <0x0 0x7ec00000 0x4000>, From 070f6e2a0a738448abb7529432f6d88de7d93b29 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 28 Mar 2024 16:16:37 +0000 Subject: [PATCH 052/625] Revert "usb: phy: generic: Get the vbus supply" This reverts commit 03e607cbb2931374db1825f371e9c7f28526d3f4. --- drivers/usb/phy/phy-generic.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/usb/phy/phy-generic.c b/drivers/usb/phy/phy-generic.c index de26b302334de9..e8b2b920f5c7d9 100644 --- a/drivers/usb/phy/phy-generic.c +++ b/drivers/usb/phy/phy-generic.c @@ -238,13 +238,6 @@ int usb_phy_gen_create_phy(struct device *dev, struct usb_phy_generic *nop) return dev_err_probe(dev, PTR_ERR(nop->vcc), "could not get vcc regulator\n"); - nop->vbus_draw = devm_regulator_get_exclusive(dev, "vbus"); - if (PTR_ERR(nop->vbus_draw) == -ENODEV) - nop->vbus_draw = NULL; - if (IS_ERR(nop->vbus_draw)) - return dev_err_probe(dev, PTR_ERR(nop->vbus_draw), - "could not get vbus regulator\n"); - nop->dev = dev; nop->phy.dev = nop->dev; nop->phy.label = "nop-xceiv"; From cde6e6ed305ce42f25bf3a44db6ff11fc7972aaa Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 1 Jan 2025 12:47:30 +0000 Subject: [PATCH 053/625] Revert "PCI: Warn if no host bridge NUMA node info" This reverts commit ad5086108b9f0361929aa9a79cf959ab5681d249. Signed-off-by: Phil Elwell --- drivers/pci/probe.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index bccc7a4bdd7943..cb5753ae4a36c8 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1076,9 +1076,6 @@ static int pci_register_host_bridge(struct pci_host_bridge *bridge) else pr_info("PCI host bridge to bus %s\n", name); - if (nr_node_ids > 1 && pcibus_to_node(bus) == NUMA_NO_NODE) - dev_warn(&bus->dev, "Unknown NUMA node; performance will be reduced\n"); - /* Check if the boot configuration by FW needs to be preserved */ bridge->preserve_config = pci_preserve_config(bridge); From e74d2d77266cb9fae994752849a72830e1da6f6d Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 6 Feb 2020 12:23:15 +0000 Subject: [PATCH 054/625] of: overlay: Correct symbol path fixups When symbols from overlays are added to the live tree their paths must be rebased. The translated symbol is normally the result of joining the fragment-relative path (with a leading "/") to the target path (either copied directly from the "target-path" property or resolved from the phandle). This translation fails when the target is the root node (a common case for Raspberry Pi overlays) because the resulting path starts with a double slash. For example, if target-path is "/" and the fragment adds a node called "newnode", the label associated with that node will be assigned the path "//newnode", which can't be found in the tree. Fix the failure case by explicitly replacing a target path of "/" with an empty string. Fixes: d1651b03c2df ("of: overlay: add overlay symbols to live device tree") Signed-off-by: Phil Elwell --- drivers/of/overlay.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c index c1c5686fc7b19e..00b34340a4a8bc 100644 --- a/drivers/of/overlay.c +++ b/drivers/of/overlay.c @@ -247,6 +247,8 @@ static struct property *dup_and_fixup_symbol_prop( if (!target_path) return NULL; target_path_len = strlen(target_path); + if (!strcmp(target_path, "/")) + target_path_len = 0; new_prop = kzalloc_obj(*new_prop); if (!new_prop) From 59a2ab92834ff70e00fcf466c033c095241d6471 Mon Sep 17 00:00:00 2001 From: Ben Hutchings Date: Fri, 13 May 2022 21:08:08 +0200 Subject: [PATCH 055/625] module: Avoid ABI changes when debug info is disabled CI builds are done with debug info disabled, but this removes some members from struct module. This causes builds to fail if there is an ABI reference for the current ABI. Define these members unconditionally, so that there is no ABI change. --- include/linux/module.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/module.h b/include/linux/module.h index 14f391b186c6d9..17c61712f1fa2c 100644 --- a/include/linux/module.h +++ b/include/linux/module.h @@ -502,7 +502,7 @@ struct module { unsigned int num_bpf_raw_events; struct bpf_raw_event_map *bpf_raw_events; #endif -#ifdef CONFIG_DEBUG_INFO_BTF_MODULES +#if 1 unsigned int btf_data_size; unsigned int btf_base_data_size; void *btf_data; From b9b73b7c7535cdcd7810c63a526a845349b0fd0e Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 17 Nov 2025 17:11:54 +0000 Subject: [PATCH 056/625] dma-mapping: Use any dma_range_map for phys to DMA Device Tree properties ranges and dma-ranges describe address mappings required when moving between buses. Ensure this translation happens when mapping MMIO addresses for DMA accesses. This commit replaces another downstream commit that no longer applies as of 6.18: dma-direct: take dma-ranges/offsets into account in resource mapping Signed-off-by: Phil Elwell --- kernel/dma/direct.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/dma/direct.h b/kernel/dma/direct.h index 6184ff303f0809..770cc02ce4bf51 100644 --- a/kernel/dma/direct.h +++ b/kernel/dma/direct.h @@ -91,7 +91,7 @@ static inline dma_addr_t dma_direct_map_phys(struct device *dev, } if (attrs & DMA_ATTR_MMIO) { - dma_addr = phys; + dma_addr = phys_to_dma(dev, phys); if (unlikely(!dma_capable(dev, dma_addr, size, false))) goto err_overflow; } else { From b9cc7135da38ed20b60ca32c81470b79e606d78c Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Thu, 7 Apr 2022 18:23:07 +0100 Subject: [PATCH 057/625] raspberrypi-firmware: Update mailbox commands Signed-off-by: Dom Cobley --- include/soc/bcm2835/raspberrypi-firmware.h | 30 +++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/include/soc/bcm2835/raspberrypi-firmware.h b/include/soc/bcm2835/raspberrypi-firmware.h index e1f87fbfe5542b..3e71d45477a422 100644 --- a/include/soc/bcm2835/raspberrypi-firmware.h +++ b/include/soc/bcm2835/raspberrypi-firmware.h @@ -36,6 +36,8 @@ struct rpi_firmware_property_tag_header { enum rpi_firmware_property_tag { RPI_FIRMWARE_PROPERTY_END = 0, RPI_FIRMWARE_GET_FIRMWARE_REVISION = 0x00000001, + RPI_FIRMWARE_GET_FIRMWARE_VARIANT = 0x00000002, + RPI_FIRMWARE_GET_FIRMWARE_HASH = 0x00000003, RPI_FIRMWARE_SET_CURSOR_INFO = 0x00008010, RPI_FIRMWARE_SET_CURSOR_STATE = 0x00008011, @@ -71,6 +73,7 @@ enum rpi_firmware_property_tag { RPI_FIRMWARE_GET_DISPMANX_RESOURCE_MEM_HANDLE = 0x00030014, RPI_FIRMWARE_GET_EDID_BLOCK = 0x00030020, RPI_FIRMWARE_GET_CUSTOMER_OTP = 0x00030021, + RPI_FIRMWARE_GET_EDID_BLOCK_DISPLAY = 0x00030023, RPI_FIRMWARE_GET_DOMAIN_STATE = 0x00030030, RPI_FIRMWARE_GET_THROTTLED = 0x00030046, RPI_FIRMWARE_GET_CLOCK_MEASURED = 0x00030047, @@ -89,9 +92,14 @@ enum rpi_firmware_property_tag { RPI_FIRMWARE_GET_PERIPH_REG = 0x00030045, RPI_FIRMWARE_SET_PERIPH_REG = 0x00038045, RPI_FIRMWARE_GET_POE_HAT_VAL = 0x00030049, - RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00030050, + RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00038049, + RPI_FIRMWARE_SET_POE_HAT_VAL_OLD = 0x00030050, RPI_FIRMWARE_NOTIFY_XHCI_RESET = 0x00030058, + RPI_FIRMWARE_GET_REBOOT_FLAGS = 0x00030064, + RPI_FIRMWARE_SET_REBOOT_FLAGS = 0x00038064, RPI_FIRMWARE_NOTIFY_DISPLAY_DONE = 0x00030066, + RPI_FIRMWARE_GET_SW_UART = 0x0003008a, + RPI_FIRMWARE_SET_SW_UART = 0x0003808a, /* Dispmanx TAGS */ RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE = 0x00040001, @@ -105,9 +113,16 @@ enum rpi_firmware_property_tag { RPI_FIRMWARE_FRAMEBUFFER_GET_VIRTUAL_OFFSET = 0x00040009, RPI_FIRMWARE_FRAMEBUFFER_GET_OVERSCAN = 0x0004000a, RPI_FIRMWARE_FRAMEBUFFER_GET_PALETTE = 0x0004000b, + RPI_FIRMWARE_FRAMEBUFFER_GET_LAYER = 0x0004000c, + RPI_FIRMWARE_FRAMEBUFFER_GET_TRANSFORM = 0x0004000d, + RPI_FIRMWARE_FRAMEBUFFER_GET_VSYNC = 0x0004000e, RPI_FIRMWARE_FRAMEBUFFER_GET_TOUCHBUF = 0x0004000f, RPI_FIRMWARE_FRAMEBUFFER_GET_GPIOVIRTBUF = 0x00040010, RPI_FIRMWARE_FRAMEBUFFER_RELEASE = 0x00048001, + RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_ID = 0x00040016, + RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM = 0x00048013, + RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS = 0x00040013, + RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_SETTINGS = 0x00040014, RPI_FIRMWARE_FRAMEBUFFER_TEST_PHYSICAL_WIDTH_HEIGHT = 0x00044003, RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_WIDTH_HEIGHT = 0x00044004, RPI_FIRMWARE_FRAMEBUFFER_TEST_DEPTH = 0x00044005, @@ -116,22 +131,33 @@ enum rpi_firmware_property_tag { RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_OFFSET = 0x00044009, RPI_FIRMWARE_FRAMEBUFFER_TEST_OVERSCAN = 0x0004400a, RPI_FIRMWARE_FRAMEBUFFER_TEST_PALETTE = 0x0004400b, + RPI_FIRMWARE_FRAMEBUFFER_TEST_LAYER = 0x0004400c, + RPI_FIRMWARE_FRAMEBUFFER_TEST_TRANSFORM = 0x0004400d, RPI_FIRMWARE_FRAMEBUFFER_TEST_VSYNC = 0x0004400e, RPI_FIRMWARE_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT = 0x00048003, RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT = 0x00048004, RPI_FIRMWARE_FRAMEBUFFER_SET_DEPTH = 0x00048005, RPI_FIRMWARE_FRAMEBUFFER_SET_PIXEL_ORDER = 0x00048006, RPI_FIRMWARE_FRAMEBUFFER_SET_ALPHA_MODE = 0x00048007, + RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH = 0x00048008, RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009, RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a, RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b, + RPI_FIRMWARE_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f, RPI_FIRMWARE_FRAMEBUFFER_SET_GPIOVIRTBUF = 0x00048020, RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC = 0x0004800e, + RPI_FIRMWARE_FRAMEBUFFER_SET_LAYER = 0x0004800c, + RPI_FIRMWARE_FRAMEBUFFER_SET_TRANSFORM = 0x0004800d, RPI_FIRMWARE_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f, RPI_FIRMWARE_VCHIQ_INIT = 0x00048010, + RPI_FIRMWARE_SET_PLANE = 0x00048015, + RPI_FIRMWARE_GET_DISPLAY_TIMING = 0x00040017, + RPI_FIRMWARE_SET_TIMING = 0x00048017, + RPI_FIRMWARE_GET_DISPLAY_CFG = 0x00040018, + RPI_FIRMWARE_SET_DISPLAY_POWER = 0x00048019, RPI_FIRMWARE_GET_COMMAND_LINE = 0x00050001, RPI_FIRMWARE_GET_DMA_CHANNELS = 0x00060001, }; @@ -156,6 +182,8 @@ enum rpi_firmware_clk_id { RPI_FIRMWARE_NUM_CLK_ID, }; +#define GET_DISPLAY_SETTINGS_PAYLOAD_SIZE 64 + /** * struct rpi_firmware_clk_rate_request - Firmware Request for a rate * @id: ID of the clock being queried From 0fb1290057583919355ef70d71834d0c11c20e23 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 7 Jan 2021 16:30:55 +0000 Subject: [PATCH 058/625] drm/atomic: Don't fixup modes that haven't been reset Signed-off-by: Dave Stevenson --- drivers/gpu/drm/drm_atomic_helper.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index af02c409c2f60b..b154026b95ec19 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -446,6 +446,11 @@ mode_fixup(struct drm_atomic_state *state) new_crtc_state = drm_atomic_get_new_crtc_state(state, new_conn_state->crtc); + if (!new_crtc_state->mode_changed && + !new_crtc_state->connectors_changed) { + continue; + } + /* * Each encoder has at most one connector (since we always steal * it away), so we won't call ->mode_fixup twice. From 7b196e9d6f9fead3192a76e4f2cfbb191f22f6a9 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 2 Nov 2021 16:01:36 +0000 Subject: [PATCH 059/625] drm: Check whether the gamma lut has changed before updating drm_crtc_legacy_gamma_set updates the gamma_lut blob unconditionally, which leads to unnecessary reprogramming of hardware. Check whether the blob contents has actually changed before signalling that it has been updated. Signed-off-by: Dave Stevenson --- drivers/gpu/drm/drm_color_mgmt.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index c598b99673fc15..babc1f2e783d34 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -332,7 +332,9 @@ static int drm_crtc_legacy_gamma_set(struct drm_crtc *crtc, replaced = drm_property_replace_blob(&crtc_state->degamma_lut, use_gamma_lut ? NULL : blob); replaced |= drm_property_replace_blob(&crtc_state->ctm, NULL); - replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, + if (!crtc_state->gamma_lut || !crtc_state->gamma_lut->data || + memcmp(crtc_state->gamma_lut->data, blob_data, blob->length)) + replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, use_gamma_lut ? blob : NULL); crtc_state->color_mgmt_changed |= replaced; From 2791fc92a0eada1ca55c9fc648a38bb2811aaf98 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 17 Dec 2021 13:36:52 +0000 Subject: [PATCH 060/625] drm/dsi: Document the meaning and spec references for MIPI_DSI_MODE_* The MIPI_DSI_MODE_* flags have fairly terse descriptions and no reference to the DSI specification as to their exact meaning. Usage has therefore been rather fluid. Extend the descriptions and provide references to the part of the MIPI DSI specification regarding what they mean. Signed-off-by: Dave Stevenson --- include/drm/drm_mipi_dsi.h | 36 +++++++++++++++++++++++++----------- 1 file changed, 25 insertions(+), 11 deletions(-) diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 3aba7b380c8d6a..d7588f189a5920 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -114,27 +114,41 @@ struct mipi_dsi_host *of_find_mipi_dsi_host_by_node(struct device_node *node); /* DSI mode flags */ -/* video mode */ +/* Video mode display. + * Not set denotes a command mode display. + */ #define MIPI_DSI_MODE_VIDEO BIT(0) -/* video burst mode */ +/* Video burst mode. + * Link frequency to be configured via platform configuration. + * This should always be set in conjunction with MIPI_DSI_MODE_VIDEO. + * (DSI spec V1.1 8.11.4) + */ #define MIPI_DSI_MODE_VIDEO_BURST BIT(1) -/* video pulse mode */ +/* Video pulse mode. + * Not set denotes sync event mode. (DSI spec V1.1 8.11.2) + */ #define MIPI_DSI_MODE_VIDEO_SYNC_PULSE BIT(2) -/* enable auto vertical count mode */ +/* Enable auto vertical count mode */ #define MIPI_DSI_MODE_VIDEO_AUTO_VERT BIT(3) -/* enable hsync-end packets in vsync-pulse and v-porch area */ +/* Enable hsync-end packets in vsync-pulse and v-porch area */ #define MIPI_DSI_MODE_VIDEO_HSE BIT(4) -/* disable hfront-porch area */ +/* Transmit NULL packets or LP mode during hfront-porch area. + * Not set denotes sending a blanking packet instead. (DSI spec V1.1 8.11.1) + */ #define MIPI_DSI_MODE_VIDEO_NO_HFP BIT(5) -/* disable hback-porch area */ +/* Transmit NULL packets or LP mode during hback-porch area. + * Not set denotes sending a blanking packet instead. (DSI spec V1.1 8.11.1) + */ #define MIPI_DSI_MODE_VIDEO_NO_HBP BIT(6) -/* disable hsync-active area */ +/* Transmit NULL packets or LP mode during hsync-active area. + * Not set denotes sending a blanking packet instead. (DSI spec V1.1 8.11.1) + */ #define MIPI_DSI_MODE_VIDEO_NO_HSA BIT(7) -/* disable EoT packets in HS mode */ +/* Disable EoT packets in HS mode. (DSI spec V1.1 8.1) */ #define MIPI_DSI_MODE_NO_EOT_PACKET BIT(9) -/* device supports non-continuous clock behavior (DSI spec 5.6.1) */ +/* Device supports non-continuous clock behavior (DSI spec V1.1 5.6.1) */ #define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10) -/* transmit data in low power */ +/* Transmit data in low power */ #define MIPI_DSI_MODE_LPM BIT(11) /* transmit data ending at the same time for all lanes within one hsync */ #define MIPI_DSI_HS_PKT_END_ALIGNED BIT(12) From d3dce922a3aeb6df31f07fced7a9cf522516a1a5 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 20 Jan 2022 17:29:36 +0000 Subject: [PATCH 061/625] drm/bridge: tc358762: Ignore EPROBE_DEFER when logging errors mipi_dsi_attach can fail due to resources not being available yet, therefore do not log error messages should they occur. Signed-off-by: Dave Stevenson --- drivers/gpu/drm/bridge/tc358762.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c index 98df3e667d4aac..68eec971859596 100644 --- a/drivers/gpu/drm/bridge/tc358762.c +++ b/drivers/gpu/drm/bridge/tc358762.c @@ -298,7 +298,7 @@ static int tc358762_probe(struct mipi_dsi_device *dsi) ret = mipi_dsi_attach(dsi); if (ret < 0) { drm_bridge_remove(&ctx->bridge); - dev_err(dev, "failed to attach dsi\n"); + dev_err_probe(dev, ret, "failed to attach dsi\n"); } return ret; From 2650630dd8cb25d783c95380af3cb69fd2eee7ab Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Wed, 26 Jan 2022 15:58:13 +0000 Subject: [PATCH 062/625] drm: Add chroma siting properties Signed-off-by: Dom Cobley --- drivers/gpu/drm/drm_atomic_state_helper.c | 14 +++++++++ drivers/gpu/drm/drm_atomic_uapi.c | 8 +++++ drivers/gpu/drm/drm_color_mgmt.c | 36 +++++++++++++++++++++++ include/drm/drm_color_mgmt.h | 3 ++ include/drm/drm_plane.h | 36 +++++++++++++++++++++++ 5 files changed, 97 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c index 41f916f11a766b..154affaf500d30 100644 --- a/drivers/gpu/drm/drm_atomic_state_helper.c +++ b/drivers/gpu/drm/drm_atomic_state_helper.c @@ -273,6 +273,20 @@ void __drm_atomic_helper_plane_state_reset(struct drm_plane_state *plane_state, plane_state->color_pipeline = NULL; } + if (plane->chroma_siting_h_property) { + if (!drm_object_property_get_default_value(&plane->base, + plane->chroma_siting_h_property, + &val)) + plane_state->chroma_siting_h = val; + } + + if (plane->chroma_siting_v_property) { + if (!drm_object_property_get_default_value(&plane->base, + plane->chroma_siting_v_property, + &val)) + plane_state->chroma_siting_v = val; + } + if (plane->zpos_property) { if (!drm_object_property_get_default_value(&plane->base, plane->zpos_property, diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 87de41fb445931..2c2bf32cd0808b 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -601,6 +601,10 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane, return -EACCES; drm_atomic_set_colorop_for_plane(state, colorop); + } else if (property == plane->chroma_siting_h_property) { + state->chroma_siting_h = val; + } else if (property == plane->chroma_siting_v_property) { + state->chroma_siting_v = val; } else if (property == config->prop_fb_damage_clips) { ret = drm_property_replace_blob_from_id(dev, &state->fb_damage_clips, @@ -684,6 +688,10 @@ drm_atomic_plane_get_property(struct drm_plane *plane, *val = state->color_range; } else if (property == plane->color_pipeline_property) { *val = (state->color_pipeline) ? state->color_pipeline->base.id : 0; + } else if (property == plane->chroma_siting_h_property) { + *val = state->chroma_siting_h; + } else if (property == plane->chroma_siting_v_property) { + *val = state->chroma_siting_v; } else if (property == config->prop_fb_damage_clips) { *val = (state->fb_damage_clips) ? state->fb_damage_clips->base.id : 0; diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index babc1f2e783d34..c93dc3b6142399 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -594,6 +594,42 @@ int drm_plane_create_color_properties(struct drm_plane *plane, } EXPORT_SYMBOL(drm_plane_create_color_properties); +/** + * drm_plane_create_chroma_siting_properties - chroma siting related plane properties + * @plane: plane object + * + * Create and attach plane specific CHROMA_SITING + * properties to @plane. + */ +int drm_plane_create_chroma_siting_properties(struct drm_plane *plane, + int32_t default_chroma_siting_h, + int32_t default_chroma_siting_v) +{ + struct drm_device *dev = plane->dev; + struct drm_property *prop; + + prop = drm_property_create_range(dev, 0, "CHROMA_SITING_H", + 0, 1<<16); + if (!prop) + return -ENOMEM; + plane->chroma_siting_h_property = prop; + drm_object_attach_property(&plane->base, prop, default_chroma_siting_h); + + prop = drm_property_create_range(dev, 0, "CHROMA_SITING_V", + 0, 1<<16); + if (!prop) + return -ENOMEM; + plane->chroma_siting_v_property = prop; + drm_object_attach_property(&plane->base, prop, default_chroma_siting_v); + + if (plane->state) { + plane->state->chroma_siting_h = default_chroma_siting_h; + plane->state->chroma_siting_v = default_chroma_siting_v; + } + return 0; +} +EXPORT_SYMBOL(drm_plane_create_chroma_siting_properties); + /** * drm_color_lut_check - check validity of lookup table * @lut: property blob containing LUT to check diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h index 5140691f476a9a..5b37cd7e7e04ee 100644 --- a/include/drm/drm_color_mgmt.h +++ b/include/drm/drm_color_mgmt.h @@ -119,6 +119,9 @@ int drm_plane_create_color_properties(struct drm_plane *plane, enum drm_color_encoding default_encoding, enum drm_color_range default_range); +int drm_plane_create_chroma_siting_properties(struct drm_plane *plane, + int32_t default_chroma_siting_h, int32_t default_chroma_siting_v); + /** * enum drm_color_lut_tests - hw-specific LUT tests to perform * diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index 703ef4d1bbbcf0..e4fd8c5a4016b6 100644 --- a/include/drm/drm_plane.h +++ b/include/drm/drm_plane.h @@ -183,6 +183,24 @@ struct drm_plane_state { */ enum drm_color_range color_range; + /** + * @chroma_siting_h: + * + * Location of chroma samples horizontally compared to luma + * 0 means chroma is sited with left luma + * 0x8000 is interstitial. 0x10000 is sited with right luma + */ + int32_t chroma_siting_h; + + /** + * @chroma_siting_v: + * + * Location of chroma samples vertically compared to luma + * 0 means chroma is sited with top luma + * 0x8000 is interstitial. 0x10000 is sited with bottom luma + */ + int32_t chroma_siting_v; + /** * @fb_damage_clips: * @@ -819,6 +837,24 @@ struct drm_plane { * @kmsg_panic: Used to register a panic notifier for this plane */ struct kmsg_dumper kmsg_panic; + + /** + * @chroma_siting_h_property: + * + * Optional "CHROMA_SITING_H" property for specifying + * chroma siting for YUV formats. + * See drm_plane_create_chroma_siting_properties(). + */ + struct drm_property *chroma_siting_h_property; + + /** + * @chroma_siting_v_property: + * + * Optional "CHROMA_SITING_V" property for specifying + * chroma siting for YUV formats. + * See drm_plane_create_chroma_siting_properties(). + */ + struct drm_property *chroma_siting_v_property; }; #define obj_to_plane(x) container_of(x, struct drm_plane, base) From 219343e332201c2735d4ed191fcac60e5a907d26 Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Fri, 23 Oct 2020 14:39:23 +0200 Subject: [PATCH 063/625] drm/atomic-helpers: remove legacy_cursor_update hacks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The stuff never really worked, and leads to lots of fun because it out-of-order frees atomic states. Which upsets KASAN, among other things. For async updates we now have a more solid solution with the ->atomic_async_check and ->atomic_async_commit hooks. Support for that for msm and vc4 landed. nouveau and i915 have their own commit routines, doing something similar. For everyone else it's probably better to remove the use-after-free bug, and encourage folks to use the async support instead. The affected drivers which register a legacy cursor plane and don't either use the new async stuff or their own commit routine are: amdgpu, atmel, mediatek, qxl, rockchip, sti, sun4i, tegra, virtio, and vmwgfx. Inspired by an amdgpu bug report. v2: Drop RFC, I think with amdgpu converted over to use atomic_async_check/commit done in commit 674e78acae0dfb4beb56132e41cbae5b60f7d662 Author: Nicholas Kazlauskas Date: Wed Dec 5 14:59:07 2018 -0500 drm/amd/display: Add fast path for cursor plane updates we don't have any driver anymore where we have userspace expecting solid legacy cursor support _and_ they are using the atomic helpers in their fully glory. So we can retire this. v3: Paper over msm and i915 regression. The complete_all is the only thing missing afaict. v4: Rebased on recent kernel, added extra link for vc4 bug. Link: https://bugzilla.kernel.org/show_bug.cgi?id=199425 Link: https://lore.kernel.org/all/20220221134155.125447-9-maxime@cerno.tech/ Cc: mikita.lipski@amd.com Cc: Michel Dänzer Cc: harry.wentland@amd.com Cc: Rob Clark Cc: "Kazlauskas, Nicholas" Tested-by: Maxime Ripard Signed-off-by: Daniel Vetter Signed-off-by: Maxime Ripard --- drivers/gpu/drm/drm_atomic_helper.c | 13 ------------- drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++ drivers/gpu/drm/msm/msm_atomic.c | 2 ++ 3 files changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index b154026b95ec19..2caf50a2daec9e 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -1893,13 +1893,6 @@ drm_atomic_helper_wait_for_vblanks(struct drm_device *dev, int i, ret; unsigned int crtc_mask = 0; - /* - * Legacy cursor ioctls are completely unsynced, and userspace - * relies on that (by doing tons of cursor updates). - */ - if (state->legacy_cursor_update) - return; - for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { if (!new_crtc_state->active) continue; @@ -2551,12 +2544,6 @@ int drm_atomic_helper_setup_commit(struct drm_atomic_state *state, continue; } - /* Legacy cursor updates are fully unsynced. */ - if (state->legacy_cursor_update) { - complete_all(&commit->flip_done); - continue; - } - if (!new_crtc_state->event) { commit->event = kzalloc_obj(*commit->event); if (!commit->event) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 0f82bf771a92da..3519157bb1046f 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7735,6 +7735,19 @@ int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state, state->base.legacy_cursor_update = false; } + /* + * FIXME: Cut over to (async) commit helpers instead of hand-rolling + * everything. + */ + if (state->base.legacy_cursor_update) { + struct intel_crtc_state *new_crtc_state; + struct intel_crtc *crtc; + int i; + + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) + complete_all(&new_crtc_state->uapi.commit->flip_done); + } + ret = intel_atomic_prepare_commit(state); if (ret) { drm_dbg_atomic(display->drm, diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c index 87a91148a731dc..26841fd080b13b 100644 --- a/drivers/gpu/drm/msm/msm_atomic.c +++ b/drivers/gpu/drm/msm/msm_atomic.c @@ -255,6 +255,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state) /* async updates are limited to single-crtc updates: */ WARN_ON(crtc_mask != drm_crtc_mask(async_crtc)); + complete_all(&async_crtc->state->commit->flip_done); + /* * Start timer if we don't already have an update pending * on this crtc: From a1214df6fc0deec17312626f97b4ea256a49b534 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 1 Apr 2022 17:10:37 +0100 Subject: [PATCH 064/625] drm/atomic: If margins are updated, update all planes. Margins may be implemented by scaling the planes, but as there is no way of intercepting the set_property for a standard property, and all planes are checked in drm_atomic_check_only before the connectors, there's now way to add the planes into the state from the driver. If the margin properties change, add all corresponding planes to the state. Signed-off-by: Dave Stevenson --- drivers/gpu/drm/drm_atomic_uapi.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 2c2bf32cd0808b..cb69f122ae2bd7 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -832,6 +832,7 @@ static int drm_atomic_connector_set_property(struct drm_connector *connector, { struct drm_device *dev = connector->dev; struct drm_mode_config *config = &dev->mode_config; + bool margins_updated = false; bool replaced = false; int ret; @@ -860,12 +861,16 @@ static int drm_atomic_connector_set_property(struct drm_connector *connector, state->tv.subconnector = val; } else if (property == config->tv_left_margin_property) { state->tv.margins.left = val; + margins_updated = true; } else if (property == config->tv_right_margin_property) { state->tv.margins.right = val; + margins_updated = true; } else if (property == config->tv_top_margin_property) { state->tv.margins.top = val; + margins_updated = true; } else if (property == config->tv_bottom_margin_property) { state->tv.margins.bottom = val; + margins_updated = true; } else if (property == config->legacy_tv_mode_property) { state->tv.legacy_mode = val; } else if (property == config->tv_mode_property) { @@ -950,6 +955,12 @@ static int drm_atomic_connector_set_property(struct drm_connector *connector, return -EINVAL; } + if (margins_updated && state->crtc) { + ret = drm_atomic_add_affected_planes(state->state, state->crtc); + + return ret; + } + return 0; } From 532e075d9e4881290fbb959f1ede555afb0a1463 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 6 Jun 2022 11:02:16 +0200 Subject: [PATCH 065/625] arm64: setup: Fix build warning Signed-off-by: Maxime Ripard --- arch/arm64/kernel/setup.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 23c05dc7a8f2ac..25644f0c0fe5f2 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -215,9 +215,9 @@ static void __init request_standard_resources(void) size_t res_size; kernel_code.start = __pa_symbol(_text); - kernel_code.end = __pa_symbol(__init_begin - 1); + kernel_code.end = __pa_symbol(__init_begin) - 1; kernel_data.start = __pa_symbol(_sdata); - kernel_data.end = __pa_symbol(_end - 1); + kernel_data.end = __pa_symbol(_end) - 1; insert_resource(&iomem_resource, &kernel_code); insert_resource(&iomem_resource, &kernel_data); From 8528c01b01e1d1ef6a9b7e6985892f26baabcaf9 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Thu, 14 Aug 2025 11:31:10 +0100 Subject: [PATCH 066/625] BCM2708: Add core Device Tree support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add the bare minimum needed to boot BCM2708 from a Device Tree. Signed-off-by: Noralf Tronnes BCM2708: DT: change 'axi' nodename to 'soc' Change DT node named 'axi' to 'soc' so it matches ARCH_BCM2835. The VC4 bootloader fills in certain properties in the 'axi' subtree, but since this is part of an upstreaming effort, the name is changed. Signed-off-by: Noralf Tronnes notro@tronnes.org BCM2708_DT: Correct length of the peripheral space Use dts-dirs feature for overlays. The kernel makefiles have a dts-dirs target that is for vendor subdirectories. Using this fixes the install_dtbs target, which previously did not install the overlays. BCM270X_DT: configure I2S DMA channels Signed-off-by: Matthias Reichl BCM270X_DT: switch to bcm2835-i2s I2S soundcard drivers with proper devicetree support (i.e. not linking to the cpu_dai/platform via name but to cpu/platform via of_node) will work out of the box without any modifications. When the kernel is compiled without devicetree support the platform code will instantiate the bcm2708-i2s driver and I2S soundcard drivers will link to it via name, as before. Signed-off-by: Matthias Reichl SDIO-overlay: add poll_once-boolean parameter Add paramter to toggle sdio-device-polling done every second or once at boot-time. Signed-off-by: Patrick Boettcher BCM270X_DT: Make mmc overlay compatible with current firmware The original DT overlay logic followed a merge-then-patch procedure, i.e. parameters are applied to the loaded overlay before the overlay is merged into the base DTB. This sequence has been changed to patch-then-merge, in order to support parameterised node names, and to protect against bad overlays. As a result, overrides (parameters) must only target labels in the overlay, but the overlay can obviously target nodes in the base DTB. mmc-overlay.dts (that switches back to the original mmc sdcard driver) is the only overlay violating that rule, and this patch fixes it. bcm270x_dt: Use the sdhost MMC controller by default The "mmc" overlay reverts to using the other controller. squash: Add cprman to dt BCM270X_DT: Use clk_core for I2C interfaces BCM270X_DT: Use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi The mainline Device Tree files are quite close to downstream now. Let's use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi as base files for our dts files. Mainline dts files are based on these files: bcm2835-rpi.dtsi bcm2835.dtsi bcm2836.dtsi bcm283x.dtsi Current downstream are based on these: bcm2708.dtsi bcm2709.dtsi bcm2710.dtsi bcm2708_common.dtsi This patch introduces this dependency: bcm2708.dtsi bcm2709.dtsi bcm2708-rpi.dtsi bcm270x.dtsi bcm2835.dtsi bcm2836.dtsi bcm283x.dtsi And: bcm2710.dtsi bcm2708-rpi.dtsi bcm270x.dtsi bcm283x.dtsi bcm270x.dtsi contains the downstream bcm283x.dtsi diff. bcm2708-rpi.dtsi is the downstream version of bcm2835-rpi.dtsi. Other changes: - The led node has moved from /soc/leds to /leds. This is not a problem since the label is used to reference it. - The clk_osc reg property changes from 6 to 3. - The gpu nodes has their interrupt property set in the base file. - the clocks label does not point to the /clocks node anymore, but points to the cprman node. This is not a problem since the overlays that use the clock node refer to it directly: target-path = "/clocks"; - some nodes now have 2 labels since mainline and downstream differs in this respect: cprman/clocks, spi0/spi, gpu/vc4. - some nodes doesn't have an explicit status = "okay" since they're not disabled in the base file: watchdog and random. - gpiomem doesn't need an explicit status = "okay". - bcm2708-rpi-cm.dts got the hpd-gpios property from bcm2708_common.dtsi, it's now set directly in that file. - bcm2709-rpi-2-b.dts has the timer node moved from /soc/timer to /timer. - Removed clock-frequency property on the bcm{2709,2710}.dtsi timer nodes. Signed-off-by: Noralf Trønnes BCM270X_DT: Use raspberrypi-power to turn on USB power Use the raspberrypi-power driver to turn on USB power. Signed-off-by: Noralf Trønnes BCM270X_DT: Add a .dtbo target, use for overlays Change the filenames and extensions to keep the pre-DDT style of overlay (-overlay.dtb) distinct from new ones that use a different style of local fixups (.dtbo), and to match other platforms. The RPi firmware uses the DDTK trailer atom to choose which type of overlay to use for each kernel. Signed-off-by: Phil Elwell BCM270X_DT: Don't generate "linux,phandle" props The EPAPR standard says to use "phandle" properties to store phandles, rather than the deprecated "linux,phandle" version. By default, dtc generates both, but adding "-H epapr" causes it to only generate "phandle"s, saving some space and clutter. Signed-off-by: Phil Elwell BCM270X_DT: Add overlay for enc28j60 on SPI2 Works on SPI2 for compute module BCM270X_DT: Add midi-uart0 overlay MIDI requires 31.25kbaud, a baudrate unsupported by Linux. The midi-uart0 overlay configures uart0 (ttyAMA0) to use a fake clock so that requesting 38.4kbaud actually gets 31.25kbaud. Signed-off-by: Phil Elwell BCM270X_DT: Add i2c-sensor overlay The i2c-sensor overlay is a container for various pressure and temperature sensors, currently bmp085 and bmp280. The standalone bmp085_i2c-sensor overlay is now deprecated. Signed-off-by: Phil Elwell BCM270X_DT: overlays/*-overlay.dtb -> overlays/*.dtbo (#1752) We now create overlays as .dtbo files. build: support for .dtbo files for dtb overlays Kernel 4.4.6+ on RaspberryPi support .dtbo files for overlays, instead of .dtb. Patch the kernel, which has faulty rules to generate .dtbo the way yocto does Signed-off-by: Herve Jourdain Signed-off-by: Khem Raj BCM270X: Drop position requirement for CMA in VC4 overlay. No longer necessary since 2aefcd576195a739a7a256099571c9c4a401005f, and will probably let peeople that want to choose a larger CMA allocation (particularly on pi0/1). Signed-off-by: Eric Anholt BCM270X_DT: RPi Device Tree tidy Use the upstream sdhost node, add thermal-zones, and factor out some common elements. Signed-off-by: Phil Elwell kbuild: Silence unhelpful DTC warnings Signed-off-by: Phil Elwell BCM270X_DT: DT build rules no longer arch-specific Signed-off-by: Phil Elwell kbuild: Silence unavoidable dtc overlay warnings Much effort has been put into finding ways to avoid warnings from dtc about overlays, usually to do with the presence of #address-cells and size-cells, but not exclusively so. Since the issues being warned about are harmless, suppress the warnings to declutter the build output and to avoid alarming users. Signed-off-by: Phil Elwell overlays: Suppress another dtc warning I'm sure the dtc warnings mean well, but overlays don't have enough context for the checkers to give meaningful results. Signed-off-by: Phil Elwell overlays: Use dtbs-list for overlay installation Update the overlay build rules to use the dtbs-list mechanism. Also include the README, and don't set the executable bits. Signed-off-by: Phil Elwell overlays: i2c-sensor: Add tmp117 support Add support for the TMP117 temperature sensor to the i2c-sensor overlay. See: https://github.com/raspberrypi/linux/issues/7077 Signed-off-by: Phil Elwell --- arch/arm/boot/dts/Makefile | 5 + arch/arm/boot/dts/broadcom/Makefile | 24 + .../boot/dts/broadcom/bcm2708-rpi-b-plus.dts | 210 + .../boot/dts/broadcom/bcm2708-rpi-b-rev1.dts | 223 + arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts | 198 + .../arm/boot/dts/broadcom/bcm2708-rpi-bt.dtsi | 42 + arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts | 174 + .../arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi | 23 + .../boot/dts/broadcom/bcm2708-rpi-zero-w.dts | 250 + .../boot/dts/broadcom/bcm2708-rpi-zero.dts | 189 + arch/arm/boot/dts/broadcom/bcm2708-rpi.dtsi | 63 + arch/arm/boot/dts/broadcom/bcm2708.dtsi | 19 + .../arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts | 204 + .../arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts | 215 + arch/arm/boot/dts/broadcom/bcm2709-rpi.dtsi | 8 + arch/arm/boot/dts/broadcom/bcm2709.dtsi | 29 + arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi | 205 + arch/arm/boot/dts/broadcom/bcm270x.dtsi | 265 + .../arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts | 204 + .../dts/broadcom/bcm2710-rpi-3-b-plus.dts | 295 + .../arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts | 293 + .../arm/boot/dts/broadcom/bcm2710-rpi-cm0.dts | 252 + .../arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts | 215 + .../dts/broadcom/bcm2710-rpi-zero-2-w.dts | 257 + .../boot/dts/broadcom/bcm2710-rpi-zero-2.dts | 1 + arch/arm/boot/dts/broadcom/bcm2710.dtsi | 32 + .../arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts | 267 +- .../arm/boot/dts/broadcom/bcm2711-rpi-400.dts | 51 +- .../arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts | 498 ++ .../boot/dts/broadcom/bcm2711-rpi-cm4s.dts | 314 + .../arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi | 570 ++ arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi | 17 + arch/arm/boot/dts/broadcom/bcm2711.dtsi | 11 +- .../arm/boot/dts/broadcom/bcm271x-rpi-bt.dtsi | 42 + .../dts/broadcom/bcm283x-rpi-csi0-2lane.dtsi | 4 + .../dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi | 4 + .../dts/broadcom/bcm283x-rpi-csi1-4lane.dtsi | 4 + .../broadcom/bcm283x-rpi-i2c0mux_0_28.dtsi | 4 + .../broadcom/bcm283x-rpi-i2c0mux_0_44.dtsi | 4 + arch/arm/boot/dts/broadcom/bcm283x.dtsi | 8 +- arch/arm/boot/dts/overlays/Makefile | 378 + arch/arm/boot/dts/overlays/README | 6268 +++++++++++++++++ .../arm/boot/dts/overlays/act-led-overlay.dts | 28 + .../dts/overlays/adafruit-st7735r-overlay.dts | 83 + .../boot/dts/overlays/adafruit18-overlay.dts | 55 + .../dts/overlays/adau1977-adc-overlay.dts | 40 + .../dts/overlays/adau7002-simple-overlay.dts | 52 + .../arm/boot/dts/overlays/ads1015-overlay.dts | 98 + .../arm/boot/dts/overlays/ads1115-overlay.dts | 105 + .../arm/boot/dts/overlays/ads7846-overlay.dts | 91 + .../boot/dts/overlays/adv7282m-overlay.dts | 73 + .../boot/dts/overlays/adv728x-m-overlay.dts | 37 + .../overlays/akkordion-iqdacplus-overlay.dts | 49 + .../allo-boss-dac-pcm512x-audio-overlay.dts | 61 + .../overlays/allo-boss2-dac-audio-overlay.dts | 57 + .../dts/overlays/allo-digione-overlay.dts | 44 + .../allo-katana-dac-audio-overlay.dts | 58 + .../allo-piano-dac-pcm512x-audio-overlay.dts | 54 + ...o-piano-dac-plus-pcm512x-audio-overlay.dts | 57 + arch/arm/boot/dts/overlays/anyspi-overlay.dts | 205 + .../boot/dts/overlays/apds9960-overlay.dts | 55 + .../boot/dts/overlays/applepi-dac-overlay.dts | 57 + .../dts/overlays/arducam-64mp-overlay.dts | 97 + arch/arm/boot/dts/overlays/arducam-64mp.dtsi | 34 + .../overlays/arducam-pivariety-overlay.dts | 100 + .../boot/dts/overlays/at86rf233-overlay.dts | 44 + .../overlays/audioinjector-addons-overlay.dts | 60 + .../audioinjector-bare-i2s-overlay.dts | 50 + ...dioinjector-isolated-soundcard-overlay.dts | 55 + .../overlays/audioinjector-ultra-overlay.dts | 71 + .../audioinjector-wm8731-audio-overlay.dts | 39 + .../dts/overlays/audiosense-pi-overlay.dts | 72 + .../boot/dts/overlays/audremap-overlay.dts | 41 + .../dts/overlays/audremap-pi5-overlay.dts | 65 + .../boot/dts/overlays/balena-fin-overlay.dts | 125 + .../boot/dts/overlays/bcm2712d0-overlay.dts | 68 + .../dts/overlays/camera-mux-2port-overlay.dts | 545 ++ .../dts/overlays/camera-mux-4port-overlay.dts | 954 +++ .../arm/boot/dts/overlays/cap1106-overlay.dts | 52 + .../boot/dts/overlays/chipcap2-overlay.dts | 52 + .../boot/dts/overlays/chipdip-dac-overlay.dts | 46 + .../dts/overlays/cirrus-wm5102-overlay.dts | 172 + .../dts/overlays/cm-swap-i2c0-overlay.dts | 27 + arch/arm/boot/dts/overlays/cma-overlay.dts | 36 + .../crystalfontz-cfa050_pi_m-overlay.dts | 133 + .../dts/overlays/cutiepi-panel-overlay.dts | 117 + .../boot/dts/overlays/dacberry400-overlay.dts | 61 + arch/arm/boot/dts/overlays/dht11-overlay.dts | 48 + .../dts/overlays/dionaudio-kiwi-overlay.dts | 39 + .../dts/overlays/dionaudio-loco-overlay.dts | 39 + .../overlays/dionaudio-loco-v2-overlay.dts | 49 + .../boot/dts/overlays/disable-bt-overlay.dts | 59 + .../dts/overlays/disable-bt-pi5-overlay.dts | 17 + .../dts/overlays/disable-emmc2-overlay.dts | 13 + .../dts/overlays/disable-wifi-overlay.dts | 20 + .../dts/overlays/disable-wifi-pi5-overlay.dts | 13 + arch/arm/boot/dts/overlays/dpi18-overlay.dts | 39 + .../boot/dts/overlays/dpi18cpadhi-overlay.dts | 26 + arch/arm/boot/dts/overlays/dpi24-overlay.dts | 39 + arch/arm/boot/dts/overlays/draws-overlay.dts | 204 + .../overlays/dwc-otg-deprecated-overlay.dts | 14 + arch/arm/boot/dts/overlays/dwc2-overlay.dts | 26 + .../boot/dts/overlays/edt-ft5406-overlay.dts | 22 + arch/arm/boot/dts/overlays/edt-ft5406.dtsi | 48 + .../boot/dts/overlays/enc28j60-overlay.dts | 53 + .../dts/overlays/enc28j60-spi2-overlay.dts | 47 + .../arm/boot/dts/overlays/exc3000-overlay.dts | 48 + .../dts/overlays/ezsound-6x8iso-overlay.dts | 117 + arch/arm/boot/dts/overlays/fbtft-overlay.dts | 611 ++ .../boot/dts/overlays/fe-pi-audio-overlay.dts | 70 + .../boot/dts/overlays/fsm-demo-overlay.dts | 104 + arch/arm/boot/dts/overlays/gc9a01-overlay.dts | 151 + .../boot/dts/overlays/ghost-amp-overlay.dts | 145 + arch/arm/boot/dts/overlays/goodix-overlay.dts | 49 + .../googlevoicehat-soundcard-overlay.dts | 49 + .../dts/overlays/gpio-charger-overlay.dts | 42 + .../boot/dts/overlays/gpio-fan-overlay.dts | 89 + .../boot/dts/overlays/gpio-hog-overlay.dts | 27 + .../arm/boot/dts/overlays/gpio-ir-overlay.dts | 49 + .../boot/dts/overlays/gpio-ir-tx-overlay.dts | 36 + .../boot/dts/overlays/gpio-key-overlay.dts | 49 + .../boot/dts/overlays/gpio-led-overlay.dts | 97 + .../overlays/gpio-no-bank0-irq-overlay.dts | 14 + .../boot/dts/overlays/gpio-no-irq-overlay.dts | 14 + .../dts/overlays/gpio-poweroff-overlay.dts | 28 + .../dts/overlays/gpio-shutdown-overlay.dts | 86 + arch/arm/boot/dts/overlays/hat_map.dts | 124 + .../dts/overlays/hd44780-i2c-lcd-overlay.dts | 59 + .../boot/dts/overlays/hd44780-lcd-overlay.dts | 46 + .../hdmi-backlight-hwhack-gpio-overlay.dts | 47 + .../dts/overlays/hifiberry-adc-overlay.dts | 45 + .../dts/overlays/hifiberry-adc8x-overlay.dts | 50 + .../dts/overlays/hifiberry-amp-overlay.dts | 39 + .../dts/overlays/hifiberry-amp100-overlay.dts | 67 + .../dts/overlays/hifiberry-amp3-overlay.dts | 57 + .../overlays/hifiberry-amp4pro-overlay.dts | 63 + .../dts/overlays/hifiberry-dac-overlay.dts | 34 + .../dts/overlays/hifiberry-dac8x-overlay.dts | 56 + .../overlays/hifiberry-dacplus-overlay.dts | 68 + .../hifiberry-dacplus-pro-overlay.dts | 64 + .../hifiberry-dacplus-std-overlay.dts | 65 + .../overlays/hifiberry-dacplusadc-overlay.dts | 72 + .../hifiberry-dacplusadcpro-overlay.dts | 72 + .../overlays/hifiberry-dacplusdsp-overlay.dts | 34 + .../overlays/hifiberry-dacplushd-overlay.dts | 94 + .../dts/overlays/hifiberry-digi-overlay.dts | 41 + .../overlays/hifiberry-digi-pro-overlay.dts | 43 + .../hifiberry-studio-dac8x-overlay.dts | 59 + .../hifiberry-studio-dac8x-pro-overlay.dts | 60 + .../boot/dts/overlays/highperi-overlay.dts | 63 + arch/arm/boot/dts/overlays/hy28a-overlay.dts | 93 + .../boot/dts/overlays/hy28b-2017-overlay.dts | 152 + arch/arm/boot/dts/overlays/hy28b-overlay.dts | 148 + .../boot/dts/overlays/i-sabre-q2m-overlay.dts | 39 + .../boot/dts/overlays/i2c-bcm2708-overlay.dts | 13 + arch/arm/boot/dts/overlays/i2c-buses.dtsi | 67 + .../arm/boot/dts/overlays/i2c-fan-overlay.dts | 77 + .../boot/dts/overlays/i2c-gpio-overlay.dts | 47 + .../arm/boot/dts/overlays/i2c-mux-overlay.dts | 149 + .../dts/overlays/i2c-pwm-pca9685a-overlay.dts | 28 + .../arm/boot/dts/overlays/i2c-rtc-common.dtsi | 382 + .../dts/overlays/i2c-rtc-gpio-overlay.dts | 31 + .../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 6 + .../boot/dts/overlays/i2c-sensor-common.dtsi | 1006 +++ .../boot/dts/overlays/i2c-sensor-overlay.dts | 6 + arch/arm/boot/dts/overlays/i2c0-overlay.dts | 83 + .../boot/dts/overlays/i2c0-pi5-overlay.dts | 34 + arch/arm/boot/dts/overlays/i2c1-overlay.dts | 44 + .../boot/dts/overlays/i2c1-pi5-overlay.dts | 34 + .../boot/dts/overlays/i2c2-pi5-overlay.dts | 21 + arch/arm/boot/dts/overlays/i2c3-overlay.dts | 34 + .../boot/dts/overlays/i2c3-pi5-overlay.dts | 22 + arch/arm/boot/dts/overlays/i2c4-overlay.dts | 34 + arch/arm/boot/dts/overlays/i2c5-overlay.dts | 34 + arch/arm/boot/dts/overlays/i2c6-overlay.dts | 34 + .../arm/boot/dts/overlays/i2s-dac-overlay.dts | 34 + .../dts/overlays/i2s-gpio28-31-overlay.dts | 18 + .../dts/overlays/i2s-master-dac-overlay.dts | 50 + .../dts/overlays/ilitek-ts-i2c-overlay.dts | 62 + .../boot/dts/overlays/ilitek251x-overlay.dts | 49 + arch/arm/boot/dts/overlays/imx219-overlay.dts | 112 + arch/arm/boot/dts/overlays/imx219.dtsi | 27 + arch/arm/boot/dts/overlays/imx258-overlay.dts | 137 + arch/arm/boot/dts/overlays/imx258.dtsi | 27 + arch/arm/boot/dts/overlays/imx283-overlay.dts | 92 + arch/arm/boot/dts/overlays/imx283.dtsi | 26 + arch/arm/boot/dts/overlays/imx290-overlay.dts | 32 + .../boot/dts/overlays/imx290_327-overlay.dtsi | 116 + arch/arm/boot/dts/overlays/imx290_327.dtsi | 24 + arch/arm/boot/dts/overlays/imx296-overlay.dts | 121 + arch/arm/boot/dts/overlays/imx327-overlay.dts | 33 + arch/arm/boot/dts/overlays/imx335-overlay.dts | 112 + arch/arm/boot/dts/overlays/imx335.dtsi | 26 + arch/arm/boot/dts/overlays/imx378-overlay.dts | 17 + arch/arm/boot/dts/overlays/imx415-overlay.dts | 118 + arch/arm/boot/dts/overlays/imx415.dtsi | 27 + arch/arm/boot/dts/overlays/imx462-overlay.dts | 35 + arch/arm/boot/dts/overlays/imx477-overlay.dts | 17 + .../boot/dts/overlays/imx477_378-overlay.dtsi | 99 + arch/arm/boot/dts/overlays/imx477_378.dtsi | 24 + arch/arm/boot/dts/overlays/imx500-overlay.dts | 122 + .../boot/dts/overlays/imx500-pi5-overlay.dts | 127 + arch/arm/boot/dts/overlays/imx500.dtsi | 28 + arch/arm/boot/dts/overlays/imx519-overlay.dts | 99 + arch/arm/boot/dts/overlays/imx519.dtsi | 34 + arch/arm/boot/dts/overlays/imx708-overlay.dts | 111 + arch/arm/boot/dts/overlays/imx708.dtsi | 35 + .../interludeaudio-analog-overlay.dts | 73 + .../interludeaudio-digital-overlay.dts | 49 + .../dts/overlays/iqaudio-codec-overlay.dts | 42 + .../boot/dts/overlays/iqaudio-dac-overlay.dts | 46 + .../dts/overlays/iqaudio-dacplus-overlay.dts | 49 + .../iqaudio-digi-wm8804-audio-overlay.dts | 47 + arch/arm/boot/dts/overlays/iqs550-overlay.dts | 59 + .../arm/boot/dts/overlays/irs1125-overlay.dts | 97 + .../dts/overlays/jedec-spi-nor-overlay.dts | 136 + .../dts/overlays/justboom-both-overlay.dts | 65 + .../dts/overlays/justboom-dac-overlay.dts | 46 + .../dts/overlays/justboom-digi-overlay.dts | 41 + .../arm/boot/dts/overlays/ltc294x-overlay.dts | 86 + .../boot/dts/overlays/max98357a-overlay.dts | 84 + .../boot/dts/overlays/maxtherm-overlay.dts | 186 + .../boot/dts/overlays/mbed-dac-overlay.dts | 64 + .../boot/dts/overlays/mcp23017-overlay.dts | 65 + .../boot/dts/overlays/mcp23s17-overlay.dts | 764 ++ .../dts/overlays/mcp2515-can0-overlay.dts | 73 + .../dts/overlays/mcp2515-can1-overlay.dts | 73 + .../arm/boot/dts/overlays/mcp2515-overlay.dts | 156 + .../boot/dts/overlays/mcp251xfd-overlay.dts | 226 + .../arm/boot/dts/overlays/mcp3008-overlay.dts | 205 + .../arm/boot/dts/overlays/mcp3202-overlay.dts | 205 + .../arm/boot/dts/overlays/mcp342x-overlay.dts | 164 + .../dts/overlays/media-center-overlay.dts | 86 + .../boot/dts/overlays/merus-amp-overlay.dts | 59 + .../boot/dts/overlays/midi-uart0-overlay.dts | 36 + .../dts/overlays/midi-uart0-pi5-overlay.dts | 37 + .../boot/dts/overlays/midi-uart1-overlay.dts | 43 + .../dts/overlays/midi-uart1-pi5-overlay.dts | 37 + .../boot/dts/overlays/midi-uart2-overlay.dts | 37 + .../dts/overlays/midi-uart2-pi5-overlay.dts | 37 + .../boot/dts/overlays/midi-uart3-overlay.dts | 38 + .../dts/overlays/midi-uart3-pi5-overlay.dts | 37 + .../boot/dts/overlays/midi-uart4-overlay.dts | 38 + .../dts/overlays/midi-uart4-pi5-overlay.dts | 37 + .../boot/dts/overlays/midi-uart5-overlay.dts | 38 + .../boot/dts/overlays/minipitft13-overlay.dts | 70 + .../boot/dts/overlays/miniuart-bt-overlay.dts | 83 + .../dts/overlays/mipi-dbi-spi-overlay.dts | 175 + .../arm/boot/dts/overlays/mira220-overlay.dts | 87 + arch/arm/boot/dts/overlays/mira220.dtsi | 27 + .../boot/dts/overlays/mlx90640-overlay.dts | 22 + arch/arm/boot/dts/overlays/mmc-overlay.dts | 46 + .../arm/boot/dts/overlays/mz61581-overlay.dts | 117 + .../arm/boot/dts/overlays/nospi10-overlay.dts | 13 + arch/arm/boot/dts/overlays/ov2311-overlay.dts | 83 + arch/arm/boot/dts/overlays/ov2311.dtsi | 26 + arch/arm/boot/dts/overlays/ov5647-overlay.dts | 100 + arch/arm/boot/dts/overlays/ov5647.dtsi | 25 + .../arm/boot/dts/overlays/ov64a40-overlay.dts | 97 + arch/arm/boot/dts/overlays/ov64a40.dtsi | 34 + arch/arm/boot/dts/overlays/ov7251-overlay.dts | 83 + arch/arm/boot/dts/overlays/ov7251.dtsi | 28 + arch/arm/boot/dts/overlays/ov9281-overlay.dts | 109 + arch/arm/boot/dts/overlays/ov9281.dtsi | 27 + arch/arm/boot/dts/overlays/overlay_map.dts | 557 ++ .../arm/boot/dts/overlays/papirus-overlay.dts | 84 + .../arm/boot/dts/overlays/pca953x-overlay.dts | 59 + .../arm/boot/dts/overlays/pcf857x-overlay.dts | 34 + .../dts/overlays/pcie-32bit-dma-overlay.dts | 38 + .../overlays/pcie-32bit-dma-pi5-overlay.dts | 27 + .../overlays/pciex1-compat-pi5-overlay.dts | 60 + arch/arm/boot/dts/overlays/pibell-overlay.dts | 81 + .../dts/overlays/pifacedigital-overlay.dts | 144 + .../arm/boot/dts/overlays/pifi-40-overlay.dts | 50 + .../boot/dts/overlays/pifi-dac-hd-overlay.dts | 49 + .../dts/overlays/pifi-dac-zero-overlay.dts | 49 + .../dts/overlays/pifi-mini-210-overlay.dts | 42 + arch/arm/boot/dts/overlays/piglow-overlay.dts | 97 + arch/arm/boot/dts/overlays/pimidi-overlay.dts | 53 + .../overlays/pineboards-hat-ai-overlay.dts | 18 + .../pineboards-hatdrive-poe-plus-overlay.dts | 19 + .../boot/dts/overlays/piscreen-overlay.dts | 110 + .../boot/dts/overlays/piscreen2r-overlay.dts | 106 + .../dts/overlays/pisound-micro-overlay.dts | 133 + .../arm/boot/dts/overlays/pisound-overlay.dts | 118 + .../boot/dts/overlays/pisound-pi5-overlay.dts | 28 + .../arm/boot/dts/overlays/pitft22-overlay.dts | 71 + .../overlays/pitft28-capacitive-overlay.dts | 93 + .../overlays/pitft28-resistive-overlay.dts | 126 + .../overlays/pitft35-resistive-overlay.dts | 127 + .../boot/dts/overlays/pivision-overlay.dts | 155 + .../boot/dts/overlays/pps-gpio-overlay.dts | 39 + .../arm/boot/dts/overlays/pps-rp1-overlay.dts | 103 + .../boot/dts/overlays/proto-codec-overlay.dts | 39 + .../boot/dts/overlays/pwm-2chan-overlay.dts | 48 + .../dts/overlays/pwm-gpio-fan-overlay.dts | 170 + .../boot/dts/overlays/pwm-gpio-overlay.dts | 38 + .../boot/dts/overlays/pwm-ir-tx-overlay.dts | 40 + arch/arm/boot/dts/overlays/pwm-overlay.dts | 44 + .../arm/boot/dts/overlays/pwm-pio-overlay.dts | 39 + arch/arm/boot/dts/overlays/pwm1-overlay.dts | 59 + .../arm/boot/dts/overlays/qca7000-overlay.dts | 55 + .../dts/overlays/qca7000-uart0-overlay.dts | 46 + .../arm/boot/dts/overlays/ramoops-overlay.dts | 25 + .../boot/dts/overlays/ramoops-pi4-overlay.dts | 25 + .../boot/dts/overlays/rootmaster-overlay.dts | 77 + .../dts/overlays/rotary-encoder-overlay.dts | 59 + .../dts/overlays/rpi-backlight-overlay.dts | 21 + .../dts/overlays/rpi-codeczero-overlay.dts | 9 + .../boot/dts/overlays/rpi-dacplus-overlay.dts | 17 + .../boot/dts/overlays/rpi-dacpro-overlay.dts | 17 + .../dts/overlays/rpi-digiampplus-overlay.dts | 17 + .../boot/dts/overlays/rpi-ft5406-overlay.dts | 25 + .../boot/dts/overlays/rpi-fw-uart-overlay.dts | 41 + .../arm/boot/dts/overlays/rpi-poe-overlay.dts | 154 + .../dts/overlays/rpi-poe-plus-overlay.dts | 49 + .../dts/overlays/rpi-power-hat-b-overlay.dts | 60 + .../dts/overlays/rpi-power-hat-t-overlay.dts | 60 + .../dts/overlays/rpi-rp2040-gpio-bridge.dtsi | 21 + .../boot/dts/overlays/rpi-sense-overlay.dts | 69 + .../dts/overlays/rpi-sense-v2-overlay.dts | 69 + arch/arm/boot/dts/overlays/rpi-tv-overlay.dts | 34 + .../rra-digidac1-wm8741-audio-overlay.dts | 49 + .../boot/dts/overlays/sainsmart18-overlay.dts | 52 + .../dts/overlays/sc16is750-i2c-overlay.dts | 58 + .../dts/overlays/sc16is752-i2c-overlay.dts | 58 + .../dts/overlays/sc16is75x-spi-overlay.dts | 174 + arch/arm/boot/dts/overlays/sdhost-overlay.dts | 38 + arch/arm/boot/dts/overlays/sdio-overlay.dts | 77 + .../boot/dts/overlays/sdio-pi5-overlay.dts | 24 + .../overlays/seeed-can-fd-hat-v1-overlay.dts | 138 + .../overlays/seeed-can-fd-hat-v2-overlay.dts | 112 + .../boot/dts/overlays/sh1106-spi-overlay.dts | 84 + .../boot/dts/overlays/si446x-spi0-overlay.dts | 53 + .../arm/boot/dts/overlays/smi-dev-overlay.dts | 20 + .../boot/dts/overlays/smi-nand-overlay.dts | 66 + arch/arm/boot/dts/overlays/smi-overlay.dts | 37 + .../dts/overlays/spi-gpio35-39-overlay.dts | 31 + .../dts/overlays/spi-gpio40-45-overlay.dts | 36 + .../arm/boot/dts/overlays/spi-rtc-overlay.dts | 75 + .../boot/dts/overlays/spi0-0cs-overlay.dts | 39 + .../overlays/spi0-1cs-inverted-overlay.dts | 59 + .../boot/dts/overlays/spi0-1cs-overlay.dts | 42 + .../boot/dts/overlays/spi0-2cs-overlay.dts | 37 + .../boot/dts/overlays/spi1-1cs-overlay.dts | 57 + .../boot/dts/overlays/spi1-2cs-overlay.dts | 69 + .../boot/dts/overlays/spi1-3cs-overlay.dts | 81 + .../boot/dts/overlays/spi2-1cs-overlay.dts | 57 + .../dts/overlays/spi2-1cs-pi5-overlay.dts | 33 + .../boot/dts/overlays/spi2-2cs-overlay.dts | 69 + .../dts/overlays/spi2-2cs-pi5-overlay.dts | 44 + .../boot/dts/overlays/spi2-3cs-overlay.dts | 81 + .../boot/dts/overlays/spi3-1cs-overlay.dts | 42 + .../dts/overlays/spi3-1cs-pi5-overlay.dts | 33 + .../boot/dts/overlays/spi3-2cs-overlay.dts | 54 + .../dts/overlays/spi3-2cs-pi5-overlay.dts | 44 + .../boot/dts/overlays/spi4-1cs-overlay.dts | 42 + .../boot/dts/overlays/spi4-2cs-overlay.dts | 54 + .../boot/dts/overlays/spi5-1cs-overlay.dts | 42 + .../dts/overlays/spi5-1cs-pi5-overlay.dts | 33 + .../boot/dts/overlays/spi5-2cs-overlay.dts | 54 + .../dts/overlays/spi5-2cs-pi5-overlay.dts | 44 + .../boot/dts/overlays/spi6-1cs-overlay.dts | 42 + .../boot/dts/overlays/spi6-2cs-overlay.dts | 54 + .../arm/boot/dts/overlays/ssd1306-overlay.dts | 36 + .../boot/dts/overlays/ssd1306-spi-overlay.dts | 85 + .../boot/dts/overlays/ssd1327-spi-overlay.dts | 70 + .../boot/dts/overlays/ssd1331-spi-overlay.dts | 83 + .../boot/dts/overlays/ssd1351-spi-overlay.dts | 83 + .../overlays/sunfounder-pipower3-overlay.dts | 34 + .../overlays/sunfounder-pironman5-overlay.dts | 55 + .../dts/overlays/superaudioboard-overlay.dts | 73 + arch/arm/boot/dts/overlays/sx150x-overlay.dts | 1706 +++++ .../dts/overlays/tc358743-audio-overlay.dts | 52 + .../boot/dts/overlays/tc358743-overlay.dts | 28 + .../dts/overlays/tc358743-pi5-overlay.dts | 10 + arch/arm/boot/dts/overlays/tc358743.dtsi | 101 + .../boot/dts/overlays/tinylcd35-overlay.dts | 209 + .../boot/dts/overlays/tpm-slb9670-overlay.dts | 44 + .../boot/dts/overlays/tpm-slb9673-overlay.dts | 51 + arch/arm/boot/dts/overlays/uart0-overlay.dts | 32 + .../boot/dts/overlays/uart0-pi5-overlay.dts | 25 + arch/arm/boot/dts/overlays/uart1-overlay.dts | 38 + .../boot/dts/overlays/uart1-pi5-overlay.dts | 25 + arch/arm/boot/dts/overlays/uart2-overlay.dts | 38 + .../boot/dts/overlays/uart2-pi5-overlay.dts | 25 + arch/arm/boot/dts/overlays/uart3-overlay.dts | 38 + .../boot/dts/overlays/uart3-pi5-overlay.dts | 25 + arch/arm/boot/dts/overlays/uart4-overlay.dts | 38 + .../boot/dts/overlays/uart4-pi5-overlay.dts | 25 + arch/arm/boot/dts/overlays/uart5-overlay.dts | 38 + arch/arm/boot/dts/overlays/udrc-overlay.dts | 124 + .../dts/overlays/ugreen-dabboard-overlay.dts | 49 + .../boot/dts/overlays/upstream-overlay.dts | 101 + .../dts/overlays/upstream-pi4-overlay.dts | 137 + .../dts/overlays/vc4-fkms-v3d-overlay.dts | 43 + .../dts/overlays/vc4-fkms-v3d-pi4-overlay.dts | 47 + .../overlays/vc4-kms-dpi-generic-overlay.dts | 83 + .../dts/overlays/vc4-kms-dpi-hyperpixel.dtsi | 94 + .../vc4-kms-dpi-hyperpixel2r-overlay.dts | 114 + .../vc4-kms-dpi-hyperpixel4-overlay.dts | 57 + .../vc4-kms-dpi-hyperpixel4sq-overlay.dts | 36 + .../overlays/vc4-kms-dpi-panel-overlay.dts | 73 + arch/arm/boot/dts/overlays/vc4-kms-dpi.dtsi | 111 + .../overlays/vc4-kms-dsi-7inch-overlay.dts | 121 + .../overlays/vc4-kms-dsi-generic-overlay.dts | 106 + .../vc4-kms-dsi-ili79600-10-1inch-overlay.dts | 126 + .../vc4-kms-dsi-ili9881-5inch-overlay.dts | 14 + .../vc4-kms-dsi-ili9881-7inch-overlay.dts | 133 + .../vc4-kms-dsi-lt070me05000-overlay.dts | 71 + .../vc4-kms-dsi-lt070me05000-v2-overlay.dts | 64 + .../vc4-kms-dsi-waveshare-800x480-overlay.dts | 116 + .../vc4-kms-dsi-waveshare-panel-overlay.dts | 146 + ...vc4-kms-dsi-waveshare-panel-v2-overlay.dts | 111 + .../overlays/vc4-kms-kippah-7inch-overlay.dts | 26 + .../boot/dts/overlays/vc4-kms-v3d-overlay.dts | 121 + .../dts/overlays/vc4-kms-v3d-pi4-overlay.dts | 197 + .../dts/overlays/vc4-kms-v3d-pi5-overlay.dts | 142 + .../dts/overlays/vc4-kms-vga666-overlay.dts | 107 + arch/arm/boot/dts/overlays/vd55g1-overlay.dts | 22 + .../dts/overlays/vd55g1_vd65g4-overlay.dtsi | 108 + arch/arm/boot/dts/overlays/vd56g3-overlay.dts | 22 + .../dts/overlays/vd56g3_vd66gy-overlay.dtsi | 106 + arch/arm/boot/dts/overlays/vd65g4-overlay.dts | 22 + arch/arm/boot/dts/overlays/vd66gy-overlay.dts | 22 + .../dts/overlays/vec-gpio-pi5-overlay.dts | 48 + arch/arm/boot/dts/overlays/vga666-overlay.dts | 30 + arch/arm/boot/dts/overlays/vl805-overlay.dts | 18 + .../arm/boot/dts/overlays/w1-gpio-overlay.dts | 40 + .../boot/dts/overlays/w1-gpio-pi5-overlay.dts | 12 + .../dts/overlays/w1-gpio-pullup-overlay.dts | 42 + .../overlays/w1-gpio-pullup-pi5-overlay.dts | 12 + arch/arm/boot/dts/overlays/w5500-overlay.dts | 63 + .../overlays/watterott-display-overlay.dts | 150 + .../waveshare-can-fd-hat-mode-a-overlay.dts | 140 + .../waveshare-can-fd-hat-mode-b-overlay.dts | 103 + .../arm/boot/dts/overlays/wifimac-overlay.dts | 21 + .../arm/boot/dts/overlays/wittypi-overlay.dts | 44 + .../dts/overlays/wm8960-soundcard-overlay.dts | 82 + .../boot/dts/overlays/ws2812-pio-overlay.dts | 46 + arch/arm64/boot/dts/Makefile | 2 + arch/arm64/boot/dts/broadcom/Makefile | 25 +- .../boot/dts/broadcom/bcm2710-rpi-2-b.dts | 1 + .../dts/broadcom/bcm2710-rpi-3-b-plus.dts | 1 + .../boot/dts/broadcom/bcm2710-rpi-3-b.dts | 1 + .../boot/dts/broadcom/bcm2710-rpi-cm0.dts | 1 + .../boot/dts/broadcom/bcm2710-rpi-cm3.dts | 1 + .../dts/broadcom/bcm2710-rpi-zero-2-w.dts | 1 + .../boot/dts/broadcom/bcm2710-rpi-zero-2.dts | 1 + .../boot/dts/broadcom/bcm2711-rpi-cm4.dts | 1 + .../boot/dts/broadcom/bcm2711-rpi-cm4s.dts | 1 + .../boot/dts/broadcom/bcm2712-d-rpi-5-b.dts | 8 + arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi | 482 ++ .../dts/broadcom/bcm2712-rpi-5-b-base.dtsi | 254 - .../boot/dts/broadcom/bcm2712-rpi-5-b.dts | 777 +- .../boot/dts/broadcom/bcm2712-rpi-500.dts | 142 + .../boot/dts/broadcom/bcm2712-rpi-cm4io.dtsi | 28 + .../dts/broadcom/bcm2712-rpi-cm5-cm4io.dts | 5 + .../dts/broadcom/bcm2712-rpi-cm5-cm5io.dts | 5 + .../boot/dts/broadcom/bcm2712-rpi-cm5.dtsi | 739 ++ .../boot/dts/broadcom/bcm2712-rpi-cm5io.dtsi | 14 + .../dts/broadcom/bcm2712-rpi-cm5l-cm4io.dts | 5 + .../dts/broadcom/bcm2712-rpi-cm5l-cm5io.dts | 5 + .../boot/dts/broadcom/bcm2712-rpi-cm5l.dtsi | 21 + arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi | 495 ++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 56 +- .../boot/dts/broadcom/bcm2712d0-rpi-5-b.dts | 107 + arch/arm64/boot/dts/broadcom/rp1.dtsi | 1343 ++++ arch/arm64/boot/dts/overlays | 1 + include/dt-bindings/clock/rp1.h | 60 + include/dt-bindings/gpio/gpio-fsm.h | 21 + scripts/Makefile.dtbinst | 9 +- scripts/Makefile.dtbs | 26 +- 473 files changed, 48083 insertions(+), 379 deletions(-) create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-b-plus.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-b-rev1.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-bt.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-zero-w.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi-zero.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2708-rpi.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm2708.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2709-rpi.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm2709.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm270x.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-cm0.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2710.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts create mode 100644 arch/arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm271x-rpi-bt.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm283x-rpi-csi0-2lane.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-4lane.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_28.dtsi create mode 100644 arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_44.dtsi create mode 100644 arch/arm/boot/dts/overlays/Makefile create mode 100644 arch/arm/boot/dts/overlays/README create mode 100644 arch/arm/boot/dts/overlays/act-led-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/adafruit-st7735r-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/adafruit18-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/ads1115-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/ads7846-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/adv7282m-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/adv728x-m-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/allo-digione-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts create mode 100755 arch/arm/boot/dts/overlays/anyspi-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/apds9960-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/applepi-dac-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/arducam-64mp-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/arducam-64mp.dtsi create mode 100644 arch/arm/boot/dts/overlays/arducam-pivariety-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/at86rf233-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/audioinjector-bare-i2s-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/audremap-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/audremap-pi5-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/balena-fin-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/bcm2712d0-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/camera-mux-2port-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/camera-mux-4port-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/cap1106-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/chipcap2-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/cirrus-wm5102-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/cm-swap-i2c0-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/cma-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/crystalfontz-cfa050_pi_m-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/cutiepi-panel-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dacberry400-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dht11-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dionaudio-kiwi-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/disable-bt-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/disable-bt-pi5-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/disable-emmc2-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/disable-wifi-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/disable-wifi-pi5-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dpi18-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dpi18cpadhi-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dpi24-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/draws-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dwc-otg-deprecated-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dwc2-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/edt-ft5406.dtsi create mode 100644 arch/arm/boot/dts/overlays/enc28j60-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/exc3000-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/ezsound-6x8iso-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/fbtft-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/fsm-demo-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/gc9a01-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/ghost-amp-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/goodix-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/gpio-charger-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/gpio-fan-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/gpio-hog-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/gpio-key-overlay.dts create mode 100755 arch/arm/boot/dts/overlays/gpio-led-overlay.dts create mode 100755 arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hat_map.dts create mode 100644 arch/arm/boot/dts/overlays/hd44780-i2c-lcd-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-adc-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-adc8x-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp3-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp4pro-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dac8x-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplus-pro-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplus-std-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-studio-dac8x-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-studio-dac8x-pro-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/highperi-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hy28a-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hy28b-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c-buses.dtsi create mode 100644 arch/arm/boot/dts/overlays/i2c-fan-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c-mux-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-common.dtsi create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts create mode 100755 arch/arm/boot/dts/overlays/i2c-sensor-common.dtsi create mode 100755 arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c0-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c0-pi5-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c1-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c1-pi5-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c2-pi5-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c3-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c3-pi5-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c4-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c5-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c6-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2s-dac-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts create mode 100644 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arch/arm/boot/dts/overlays/w1-gpio-pullup-pi5-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/w5500-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/watterott-display-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/waveshare-can-fd-hat-mode-a-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/waveshare-can-fd-hat-mode-b-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/wifimac-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/wittypi-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/ws2812-pio-overlay.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm0.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-zero-2.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4s.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi delete mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-base.dtsi create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-500.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm4io.dtsi create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5io.dtsi create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5l-cm4io.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5l-cm5io.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5l.dtsi create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts create mode 100644 arch/arm64/boot/dts/broadcom/rp1.dtsi create mode 120000 arch/arm64/boot/dts/overlays create mode 100644 include/dt-bindings/clock/rp1.h create mode 100644 include/dt-bindings/gpio/gpio-fsm.h diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index efe38eb2530164..a2a407fb5b281c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -39,3 +39,8 @@ subdir-y += unisoc subdir-y += vt8500 subdir-y += xen subdir-y += xilinx + +targets += dtbs dtbs_install +targets += $(dtb-y) + +subdir-y += overlays diff --git a/arch/arm/boot/dts/broadcom/Makefile b/arch/arm/boot/dts/broadcom/Makefile index 2552e11b5e3121..47f461a9b27a7f 100644 --- a/arch/arm/boot/dts/broadcom/Makefile +++ b/arch/arm/boot/dts/broadcom/Makefile @@ -37,6 +37,30 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ bcm2711-rpi-cm4-io.dtb \ bcm2835-rpi-zero.dtb \ bcm2835-rpi-zero-w.dtb + +dtb-$(CONFIG_ARCH_BCM2835) += \ + bcm2708-rpi-b.dtb \ + bcm2708-rpi-b-rev1.dtb \ + bcm2708-rpi-b-plus.dtb \ + bcm2708-rpi-cm.dtb \ + bcm2708-rpi-zero.dtb \ + bcm2708-rpi-zero-w.dtb \ + bcm2710-rpi-zero-2.dtb \ + bcm2710-rpi-zero-2-w.dtb \ + bcm2709-rpi-2-b.dtb \ + bcm2710-rpi-2-b.dtb \ + bcm2710-rpi-3-b.dtb \ + bcm2710-rpi-3-b-plus.dtb \ + bcm2709-rpi-cm2.dtb \ + bcm2710-rpi-cm0.dtb \ + bcm2710-rpi-cm3.dtb \ + bcm2711-rpi-cm4.dtb \ + bcm2711-rpi-cm4s.dtb + +ifeq ($(CONFIG_ARCH_BCM2835),y) + DTC_FLAGS += -@ -Wno-gpios_property +endif + dtb-$(CONFIG_ARCH_BCMBCA) += \ bcm6846-genexis-xg6846b.dtb \ bcm947622.dtb \ diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-plus.dts b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-plus.dts new file mode 100644 index 00000000000000..ee72fdac666368 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-plus.dts @@ -0,0 +1,210 @@ +/dts-v1/; + +#include "bcm2708.dtsi" +#include "bcm2708-rpi.dtsi" +#include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; + model = "Raspberry Pi Model B+"; +}; + +&gpio { + /* + * Taken from Raspberry-Pi-B-Plus-V1.2-Schematics.pdf + * RPI-BPLUS sheet 1 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "LAN_RUN", /* GPIO31 */ + "CAM_GPIO1", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "PWR_LOW_N", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "USB_LIMIT", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", /* GPIO40 */ + "CAM_GPIO0", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "ETH_CLK", /* GPIO44 */ + "PWM1_OUT", /* GPIO45 */ + "HDMI_HPD_N", + "STATUS_LED", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins = <40 45>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&leds { + led_pwr: led-pwr { + label = "PWR"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "input"; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_arm: &i2c1 { +}; + +i2c_vc: &i2c0 { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-rev1.dts b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-rev1.dts new file mode 100644 index 00000000000000..9301e345aea222 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-rev1.dts @@ -0,0 +1,223 @@ +/dts-v1/; + +#include "bcm2708.dtsi" +#include "bcm2708-rpi.dtsi" +#include "bcm283x-rpi-smsc9512.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,model-b", "brcm,bcm2835"; + model = "Raspberry Pi Model B"; +}; + +&gpio { + /* + * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf + * RPI00021 sheet 02 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "CAM_GPIO1", + "LAN_RUN", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "NC", /* GPIO12 */ + "NC", /* GPIO13 */ + /* Serial port */ + "TXD0", + "RXD0", + "STATUS_LED_N", + "GPIO17", + "GPIO18", + "NC", /* GPIO19 */ + "NC", /* GPIO20 */ + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "NC", /* GPIO26 */ + "CAM_GPIO0", + /* Binary number representing build/revision */ + "CONFIG0", + "CONFIG1", + "CONFIG2", + "CONFIG3", + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", + "NC", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "PWM1_OUT", + "HDMI_HPD_P", + "SD_CARD_DET", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <28 29 30 31>; + brcm,function = <6>; /* alt2 */ + }; + + audio_pins: audio_pins { + brcm,pins = <40 45>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +/delete-node/ &i2c0mux; + +i2c0: &i2c0if { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + clock-frequency = <100000>; +}; + +i2c_csi_dsi: &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +/ { + aliases { + i2c0 = &i2c0; + }; + + /* Provide an i2c0mux label to avoid undefined symbols in overlays */ + i2c0mux: i2c0mux { + }; + + __overrides__ { + i2c0 = <&i2c0>, "status"; + }; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 27 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_arm: &i2c0 { +}; + +i2c_vc: &i2c1 { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + i2c = <&i2c0>,"status"; + i2c_arm = <&i2c0>,"status"; + i2c_vc = <&i2c1>,"status"; + i2c_baudrate = <&i2c0>,"clock-frequency:0"; + i2c_arm_baudrate = <&i2c0>,"clock-frequency:0"; + i2c_vc_baudrate = <&i2c1>,"clock-frequency:0"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts new file mode 100644 index 00000000000000..b8459fd0f49703 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts @@ -0,0 +1,198 @@ +/dts-v1/; + +#include "bcm2708.dtsi" +#include "bcm2708-rpi.dtsi" +#include "bcm283x-rpi-smsc9512.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,model-b", "brcm,bcm2835"; + model = "Raspberry Pi Model B"; +}; + +&gpio { + /* + * Taken from Raspberry-Pi-Rev-2.0-Model-AB-Schematics.pdf + * RPI00022 sheet 02 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "CAM_GPIO1", + "LAN_RUN", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "NC", /* GPIO12 */ + "NC", /* GPIO13 */ + /* Serial port */ + "TXD0", + "RXD0", + "STATUS_LED_N", + "GPIO17", + "GPIO18", + "NC", /* GPIO19 */ + "NC", /* GPIO20 */ + "CAM_GPIO0", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "NC", /* GPIO26 */ + "GPIO27", + "GPIO28", + "GPIO29", + "GPIO30", + "GPIO31", + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", + "NC", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "PWM1_OUT", + "HDMI_HPD_P", + "SD_CARD_DET", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <28 29 30 31>; + brcm,function = <6>; /* alt2 */ + }; + + audio_pins: audio_pins { + brcm,pins = <40 45>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 21 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_arm: &i2c1 { +}; + +i2c_vc: &i2c0 { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-bt.dtsi b/arch/arm/boot/dts/broadcom/bcm2708-rpi-bt.dtsi new file mode 100644 index 00000000000000..87a6c00bd0562f --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-bt.dtsi @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0 + +&uart0 { + bt: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <3000000>; + shutdown-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>; + local-bd-address = [ 00 00 00 00 00 00 ]; + fallback-bd-address; // Don't override a valid address + status = "okay"; + }; +}; + +&uart1 { + minibt: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <230400>; + shutdown-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>; + local-bd-address = [ 00 00 00 00 00 00 ]; + fallback-bd-address; // Don't override a valid address + status = "disabled"; + }; +}; + +/ { + chosen { + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0 cgroup_disable=memory"; + }; + + aliases { + bluetooth = &bt; + }; + + __overrides__ { + bdaddr = <&bt>,"local-bd-address[", + <&bt>,"fallback-bd-address?=0", + <&minibt>,"local-bd-address[", + <&minibt>,"fallback-bd-address?=0"; + krnbt = <&bt>,"status"; + krnbt_baudrate = <&bt>,"max-speed:0", <&minibt>,"max-speed:0"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts b/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts new file mode 100644 index 00000000000000..fde85c8c7dca22 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts @@ -0,0 +1,174 @@ +/dts-v1/; + +#include "bcm2708-rpi-cm.dtsi" +#include "bcm283x-rpi-csi0-2lane.dtsi" +#include "bcm283x-rpi-csi1-4lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" + +/ { + compatible = "raspberrypi,compute-module", "brcm,bcm2835"; + model = "Raspberry Pi Compute Module"; +}; + +&cam1_reg { + gpio = <&gpio 3 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +cam0_reg: &cam0_regulator { + gpio = <&gpio 31 GPIO_ACTIVE_HIGH>; +}; + +i2c_csi_dsi0: &i2c0 { +}; + +&uart0 { + status = "okay"; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "GPIO0", + "GPIO1", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "GPIO28", + "GPIO29", + "GPIO30", + "GPIO31", + "GPIO32", + "GPIO33", + "GPIO34", + "GPIO35", + "GPIO36", + "GPIO37", + "GPIO38", + "GPIO39", + "GPIO40", + "GPIO41", + "GPIO42", + "GPIO43", + "GPIO44", + "GPIO45", + "HDMI_HPD_N", + /* Also used as ACT LED */ + "EMMC_EN_N", + /* Used by eMMC */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins; + brcm,function; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi b/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi new file mode 100644 index 00000000000000..8d3e42bfe4f08e --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi @@ -0,0 +1,23 @@ +#include "bcm2708.dtsi" +#include "bcm2708-rpi.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +&led_act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +i2c_arm: &i2c1 { +}; + +i2c_vc: &i2c0 { +}; + +/ { + __overrides__ { + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero-w.dts b/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero-w.dts new file mode 100644 index 00000000000000..f6d4e2c73df986 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero-w.dts @@ -0,0 +1,250 @@ +/dts-v1/; + +#include "bcm2708.dtsi" +#include "bcm2708-rpi.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm2708-rpi-bt.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; + model = "Raspberry Pi Zero W"; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + mmc1 = &mmcnr; + }; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + "CAM_GPIO1", /* GPIO40 */ + "WL_ON", /* GPIO41 */ + "NC", /* GPIO42 */ + "WIFI_CLK", /* GPIO43 */ + "CAM_GPIO0", /* GPIO44 */ + "BT_ON", /* GPIO45 */ + "HDMI_HPD_N", + "STATUS_LED_N", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + sdio_pins: sdio_pins { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = <7>; /* ALT3 = SD1 */ + brcm,pull = <0 2 2 2 2 2>; + }; + + bt_pins: bt_pins { + brcm,pins = <43>; + brcm,function = <4>; /* alt0:GPCLK2 */ + brcm,pull = <0>; /* none */ + }; + + uart0_pins: uart0_pins { + brcm,pins = <30 31 32 33>; + brcm,function = <7>; /* alt3=UART0 */ + brcm,pull = <2 0 0 2>; /* up none none up */ + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33 30 31>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2 2 0>; + }; + + audio_pins: audio_pins { + brcm,pins = <>; + brcm,function = <>; + }; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 47 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "actpwr"; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 44 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_arm: &i2c1 {}; +i2c_vc: &i2c0 {}; +i2c_csi_dsi0: &i2c0 {}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero.dts b/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero.dts new file mode 100644 index 00000000000000..1721be8dbe20a6 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero.dts @@ -0,0 +1,189 @@ +/dts-v1/; + +#include "bcm2708.dtsi" +#include "bcm2708-rpi.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,model-zero", "brcm,bcm2835"; + model = "Raspberry Pi Zero"; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "NC", /* GPIO31 */ + "CAM_GPIO1", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "NC", /* GPIO40 */ + "CAM_GPIO0", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "NC", /* GPIO45 */ + "HDMI_HPD_N", + "STATUS_LED_N", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins = <>; + brcm,function = <>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 47 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "actpwr"; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_arm: &i2c1 {}; +i2c_vc: &i2c0 {}; +i2c_csi_dsi0: &i2c0 {}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2708-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm2708-rpi.dtsi new file mode 100644 index 00000000000000..f4aedb5c532b51 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi.dtsi @@ -0,0 +1,63 @@ +/* Downstream modifications common to bcm2835, bcm2836, bcm2837 */ + +#define i2c0 i2c0mux +#include "bcm2835-rpi.dtsi" +#undef i2c0 +#include "bcm270x-rpi.dtsi" + +/ { + memory@0 { + device_type = "memory"; + reg = <0x0 0x0>; + }; + + aliases { + i2c2 = &i2c2; + }; + + __overrides__ { + hdmi = <&hdmi>,"status"; + i2c2_iknowwhatimdoing = <&i2c2>,"status"; + i2c2_baudrate = <&i2c2>,"clock-frequency:0"; + nvmem_cust_rw = <&nvmem_cust>,"rw?"; + sd = <&sdhost>,"status"; + sd_poll_once = <&sdhost>,"non-removable?"; + }; +}; + +&soc { + nvmem { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + nvmem_otp: nvmem_otp { + compatible = "raspberrypi,rpi-otp"; + firmware = <&firmware>; + reg = <0 192>; + status = "okay"; + }; + + nvmem_cust: nvmem_cust { + compatible = "raspberrypi,rpi-otp"; + firmware = <&firmware>; + reg = <1 8>; + status = "okay"; + }; + }; +}; + +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + status = "okay"; +}; + +&hdmi { + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "disabled"; +}; + +&i2c2 { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2708.dtsi b/arch/arm/boot/dts/broadcom/bcm2708.dtsi new file mode 100644 index 00000000000000..fdc7f2423bbe62 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2708.dtsi @@ -0,0 +1,19 @@ +#define i2c0 i2c0if +#include "bcm2835.dtsi" +#undef i2c0 +#include "bcm270x.dtsi" + +/ { + __overrides__ { + arm_freq; + }; +}; + +&soc { + dma-ranges = <0x80000000 0x00000000 0x20000000>, + <0x7e000000 0x20000000 0x02000000>; +}; + +&vc4 { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts b/arch/arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts new file mode 100644 index 00000000000000..7796e545da43fb --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts @@ -0,0 +1,204 @@ +/dts-v1/; + +#include "bcm2709.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; + model = "Raspberry Pi 2 Model B"; +}; + +&gpio { + /* + * Taken from rpi_SCH_2b_1p2_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "LAN_RUN", + "CAM_GPIO1", + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "PWR_LOW_N", + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "USB_LIMIT", + "NC", /* GPIO39 */ + "PWM0_OUT", + "CAM_GPIO0", + "SMPS_SCL", + "SMPS_SDA", + "ETH_CLK", + "PWM1_OUT", + "HDMI_HPD_N", + "STATUS_LED", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins = <40 45>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&leds { + led_pwr: led-pwr { + label = "PWR"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "input"; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts b/arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts new file mode 100644 index 00000000000000..36d00aa889a39a --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts @@ -0,0 +1,215 @@ +/dts-v1/; + +#include "bcm2709.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-csi0-2lane.dtsi" +#include "bcm283x-rpi-csi1-4lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,2-compute-module", "brcm,bcm2836"; + model = "Raspberry Pi Compute Module 2"; +}; + +&cam1_reg { + gpio = <&gpio 2 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +cam0_reg: &cam0_regulator { + gpio = <&gpio 30 GPIO_ACTIVE_HIGH>; +}; + +i2c_csi_dsi0: &i2c0 { +}; + +&uart0 { + status = "okay"; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "GPIO0", + "GPIO1", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "GPIO28", + "GPIO29", + "GPIO30", + "GPIO31", + "GPIO32", + "GPIO33", + "GPIO34", + "GPIO35", + "GPIO36", + "GPIO37", + "GPIO38", + "GPIO39", + "GPIO40", + "GPIO41", + "GPIO42", + "GPIO43", + "GPIO44", + "GPIO45", + "SMPS_SCL", + "SMPS_SDA", + /* Used by eMMC */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins; + brcm,function; + }; +}; + +&firmware { + expgpio: expgpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "HDMI_HPD_N", + "EMMC_EN_N", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC"; + status = "okay"; + }; + + virtgpio: virtgpio { + compatible = "brcm,bcm2835-virtgpio"; + gpio-controller; + #gpio-cells = <2>; + status = "okay"; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&virtgpio 0 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&hdmi { + hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2709-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm2709-rpi.dtsi new file mode 100644 index 00000000000000..7335e7fbcb7144 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2709-rpi.dtsi @@ -0,0 +1,8 @@ +#include "bcm2708-rpi.dtsi" + +&vchiq { + compatible = "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq"; +}; + +i2c_arm: &i2c1 {}; +i2c_vc: &i2c0 {}; diff --git a/arch/arm/boot/dts/broadcom/bcm2709.dtsi b/arch/arm/boot/dts/broadcom/bcm2709.dtsi new file mode 100644 index 00000000000000..868f65f922ff4d --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2709.dtsi @@ -0,0 +1,29 @@ +#define i2c0 i2c0if +#include "bcm2836.dtsi" +#undef i2c0 +#include "bcm270x.dtsi" + +/ { + soc { + ranges = <0x7e000000 0x3f000000 0x01000000>, + <0x40000000 0x40000000 0x00040000>; + + dma-ranges = <0xc0000000 0x00000000 0x3f000000>, + <0x7e000000 0x3f000000 0x01000000>; + }; + + __overrides__ { + arm_freq = <&v7_cpu0>, "clock-frequency:0", + <&v7_cpu1>, "clock-frequency:0", + <&v7_cpu2>, "clock-frequency:0", + <&v7_cpu3>, "clock-frequency:0"; + }; +}; + +&system_timer { + status = "disabled"; +}; + +&vc4 { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi new file mode 100644 index 00000000000000..d434c858343d8a --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi @@ -0,0 +1,205 @@ +/* Downstream modifications to bcm2835-rpi.dtsi */ + +/ { + aliases: aliases { + aux = &aux; + sound = &sound; + soc = &soc; + dma = &dma; + intc = &intc; + watchdog = &watchdog; + random = &random; + mailbox = &mailbox; + gpio = &gpio; + uart0 = &uart0; + uart1 = &uart1; + sdhost = &sdhost; + mmc = &mmc; + mmc1 = &mmc; + mmc0 = &sdhost; + i2s = &i2s; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c10 = &i2c_csi_dsi; + i2c = &i2c_arm; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + usb = &usb; + leds = &leds; + fb = &fb; + thermal = &thermal; + axiperf = &axiperf; + }; + + /* Define these notional regulators for use by overlays */ + vdd_3v3_reg: fixedregulator_3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3v3"; + }; + + vdd_5v0_reg: fixedregulator_5v0 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "5v0"; + }; + + soc { + gpiomem { + compatible = "brcm,bcm2835-gpiomem"; + reg = <0x7e200000 0x1000>; + }; + + fb: fb { + compatible = "brcm,bcm2708-fb"; + firmware = <&firmware>; + status = "okay"; + }; + + /* External sound card */ + sound: sound { + status = "disabled"; + }; + }; + + __overrides__ { + cache_line_size; + + uart0 = <&uart0>,"status"; + uart1 = <&uart1>,"status"; + i2s = <&i2s>,"status"; + spi = <&spi0>,"status"; + i2c0 = <&i2c0if>,"status",<&i2c0mux>,"status"; + i2c1 = <&i2c1>,"status"; + i2c = <&i2c1>,"status"; + i2c_arm = <&i2c1>,"status"; + i2c_vc = <&i2c0if>,"status",<&i2c0mux>,"status"; + i2c0_baudrate = <&i2c0if>,"clock-frequency:0"; + i2c1_baudrate = <&i2c1>,"clock-frequency:0"; + i2c_baudrate = <&i2c1>,"clock-frequency:0"; + i2c_arm_baudrate = <&i2c1>,"clock-frequency:0"; + i2c_vc_baudrate = <&i2c0if>,"clock-frequency:0"; + + watchdog = <&watchdog>,"early-watchdog?"; + random = <&random>,"status"; + sd_overclock = <&sdhost>,"brcm,overclock-50:0"; + sd_force_pio = <&sdhost>,"brcm,force-pio?"; + sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; + sd_debug = <&sdhost>,"brcm,debug"; + sdio_overclock = <&mmc>,"brcm,overclock-50:0", + <&mmcnr>,"brcm,overclock-50:0"; + axiperf = <&axiperf>,"status"; + drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4; + drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4; + drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4; + + cam1_sync = <&csi1>, "sync-gpios:0=", <&gpio>, + <&csi1>, "sync-gpios:4", + <&csi1>, "sync-gpios:8=", ; + cam1_sync_inverted = <&csi1>, "sync-gpios:0=", <&gpio>, + <&csi1>, "sync-gpios:4", + <&csi1>, "sync-gpios:8=", ; + cam0_sync = <&csi0>, "sync-gpios:0=", <&gpio>, + <&csi0>, "sync-gpios:4", + <&csi0>, "sync-gpios:8=", ; + cam0_sync_inverted = <&csi0>, "sync-gpios:0=", <&gpio>, + <&csi0>, "sync-gpios:4", + <&csi0>, "sync-gpios:8=", ; + + cam0_reg = <&cam0_reg>,"status"; + cam0_reg_gpio = <&cam0_reg>,"gpio:4", + <&cam0_reg>,"gpio:0=", <&gpio>; + cam1_reg = <&cam1_reg>,"status"; + cam1_reg_gpio = <&cam1_reg>,"gpio:4", + <&cam1_reg>,"gpio:0=", <&gpio>; + + strict_gpiod = <&chosen>, "bootargs=pinctrl_bcm2835.persist_gpio_outputs=n"; + }; +}; + +&uart0 { + skip-init; +}; + +&uart1 { + skip-init; +}; + +&txp { + status = "disabled"; +}; + +&i2c0if { + status = "disabled"; +}; + +&i2c0mux { + pinctrl-names = "i2c0", "i2c_csi_dsi"; + /delete-property/ clock-frequency; + status = "disabled"; +}; + +&i2c1 { + status = "disabled"; +}; + +i2s_clk_producer: &i2s {}; +i2s_clk_consumer: &i2s {}; + +&clocks { + firmware = <&firmware>; +}; + +&sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&emmc_gpio48>; + bus-width = <4>; +}; + +&cpu_thermal { + // Add some labels + thermal_trips: trips { + cpu-crit { + // Raise upstream limit of 90C + temperature = <110000>; + }; + }; + cooling_maps: cooling-maps { + }; +}; + +&vec { + clocks = <&firmware_clocks 15>; + status = "disabled"; +}; + +&firmware { + vcio: vcio { + compatible = "raspberrypi,vcio"; + }; +}; + +&vc4 { + raspberrypi,firmware = <&firmware>; +}; + +#ifndef BCM2711 + +&hdmi { + reg-names = "hdmi", + "hd"; + clocks = <&firmware_clocks 9>, + <&firmware_clocks 13>; + dmas = <&dma (17|(1<<27)|(1<<24))>; +}; + +&v3d { + clocks = <&firmware_clocks 5>; +}; + +#endif diff --git a/arch/arm/boot/dts/broadcom/bcm270x.dtsi b/arch/arm/boot/dts/broadcom/bcm270x.dtsi new file mode 100644 index 00000000000000..ccc203e3131fa7 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm270x.dtsi @@ -0,0 +1,265 @@ +/* Downstream bcm283x.dtsi diff */ +#include + +/ { + chosen: chosen { + // Disable audio by default + bootargs = "coherent_pool=1M snd_bcm2835.enable_headphones=0 cgroup_disable=memory"; + stdout-path = "serial0:115200n8"; + }; + + soc: soc { + watchdog: watchdog@7e100000 { + /* Add label */ + }; + + random: rng@7e104000 { + /* Add label */ + }; + + spi0: spi@7e204000 { + /* Add label */ + }; + +#ifndef BCM2711 + pixelvalve0: pixelvalve@7e206000 { + /* Add label */ + status = "disabled"; + }; + + pixelvalve1: pixelvalve@7e207000 { + /* Add label */ + status = "disabled"; + }; +#endif + + /delete-node/ mmc@7e300000; + + sdhci: mmc: mmc@7e300000 { + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci"; + reg = <0x7e300000 0x100>; + interrupts = <2 30>; + clocks = <&clocks BCM2835_CLOCK_EMMC>; + dmas = <&dma 11>; + dma-names = "rx-tx"; + brcm,overclock-50 = <0>; + status = "disabled"; + }; + + /* A clone of mmc but with non-removable set */ + mmcnr: mmcnr@7e300000 { + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci"; + reg = <0x7e300000 0x100>; + interrupts = <2 30>; + clocks = <&clocks BCM2835_CLOCK_EMMC>; + dmas = <&dma 11>; + dma-names = "rx-tx"; + brcm,overclock-50 = <0>; + non-removable; + status = "disabled"; + }; + + hvs: hvs@7e400000 { + /* Add label */ + status = "disabled"; + }; + + firmwarekms: firmwarekms@7e600000 { + compatible = "raspberrypi,rpi-firmware-kms"; + /* SMI interrupt reg */ + reg = <0x7e600000 0x100>; + interrupts = <2 16>; + brcm,firmware = <&firmware>; + status = "disabled"; + }; + + smi: smi@7e600000 { + compatible = "brcm,bcm2835-smi"; + reg = <0x7e600000 0x100>; + interrupts = <2 16>; + clocks = <&clocks BCM2835_CLOCK_SMI>; + assigned-clocks = <&clocks BCM2835_CLOCK_SMI>; + assigned-clock-rates = <125000000>; + dmas = <&dma 4>; + dma-names = "rx-tx"; + status = "disabled"; + }; + +#ifndef BCM2711 + pixelvalve2: pixelvalve@7e807000 { + /* Add label */ + status = "disabled"; + }; +#endif + + hdmi@7e902000 { /* hdmi */ + status = "disabled"; + }; + + usb@7e980000 { /* usb */ + compatible = "brcm,bcm2708-usb"; + reg = <0x7e980000 0x10000>, + <0x7e006000 0x1000>; + interrupt-names = "usb", + "soft"; + interrupts = <1 9>, + <2 0>; + }; + +#ifndef BCM2711 + v3d@7ec00000 { /* vd3 */ + compatible = "brcm,vc4-v3d"; + power-domains = <&power RPI_POWER_DOMAIN_V3D>; + status = "disabled"; + }; +#endif + + axiperf: axiperf { + compatible = "brcm,bcm2835-axiperf"; + reg = <0x7e009800 0x100>, + <0x7ee08000 0x100>; + firmware = <&firmware>; + status = "disabled"; + }; + + i2c0mux: i2c0mux { + compatible = "i2c-mux-pinctrl"; + #address-cells = <1>; + #size-cells = <0>; + + i2c-parent = <&i2c0if>; + + status = "disabled"; + + i2c0: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c_csi_dsi: i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + + cam1_reg: cam1_regulator { + compatible = "regulator-fixed"; + regulator-name = "cam1-reg"; + enable-active-high; + /* Needs to be enabled, as removing a regulator is very unsafe */ + status = "okay"; + }; + + cam1_clk: cam1_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + status = "disabled"; + }; + + cam0_regulator: cam0_regulator { + compatible = "regulator-fixed"; + regulator-name = "cam0-reg"; + enable-active-high; + status = "disabled"; + }; + + cam0_clk: cam0_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + status = "disabled"; + }; + + cam_dummy_reg: cam_dummy_reg { + compatible = "regulator-fixed"; + regulator-name = "cam-dummy-reg"; + status = "okay"; + }; + + __overrides__ { + cam0-pwdn-ctrl; + cam0-pwdn; + cam0-led-ctrl; + cam0-led; + }; +}; + +&gpio { + interrupts = <2 17>, <2 18>; + + dpi_18bit_cpadhi_gpio0: dpi_18bit_cpadhi_gpio0 { + brcm,pins = <0 1 2 3 4 5 6 7 8 9 + 12 13 14 15 16 17 + 20 21 22 23 24 25>; + brcm,function = ; + brcm,pull = <0>; /* no pull */ + }; + dpi_18bit_cpadhi_gpio2: dpi_18bit_cpadhi_gpio2 { + brcm,pins = <2 3 4 5 6 7 8 9 + 12 13 14 15 16 17 + 20 21 22 23 24 25>; + brcm,function = ; + }; + dpi_18bit_gpio0: dpi_18bit_gpio0 { + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 + 12 13 14 15 16 17 18 19 + 20 21>; + brcm,function = ; + }; + dpi_18bit_gpio2: dpi_18bit_gpio2 { + brcm,pins = <2 3 4 5 6 7 8 9 10 11 + 12 13 14 15 16 17 18 19 + 20 21>; + brcm,function = ; + }; + dpi_16bit_gpio0: dpi_16bit_gpio0 { + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 + 12 13 14 15 16 17 18 19>; + brcm,function = ; + }; + dpi_16bit_gpio2: dpi_16bit_gpio2 { + brcm,pins = <2 3 4 5 6 7 8 9 10 11 + 12 13 14 15 16 17 18 19>; + brcm,function = ; + }; + dpi_16bit_cpadhi_gpio0: dpi_16bit_cpadhi_gpio0 { + brcm,pins = <0 1 2 3 4 5 6 7 8 + 12 13 14 15 16 17 + 20 21 22 23 24>; + brcm,function = ; + }; + dpi_16bit_cpadhi_gpio2: dpi_16bit_cpadhi_gpio2 { + brcm,pins = <2 3 4 5 6 7 8 + 12 13 14 15 16 17 + 20 21 22 23 24>; + brcm,function = ; + }; +}; + +&uart0 { + compatible = "arm,pl011-axi"; + /* Enable CTS bug workaround */ + cts-event-workaround; +}; + +&i2s { + #sound-dai-cells = <0>; + dmas = <&dma 2>, <&dma 3>; + dma-names = "tx", "rx"; +}; + +&sdhost { + dmas = <&dma (13|(1<<29))>; + dma-names = "rx-tx"; + bus-width = <4>; + brcm,overclock-50 = <0>; + brcm,pio-limit = <1>; + firmware = <&firmware>; +}; + +&spi0 { + dmas = <&dma 6>, <&dma 7>; + dma-names = "tx", "rx"; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts new file mode 100644 index 00000000000000..ce48eb6073f0cd --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts @@ -0,0 +1,204 @@ +/dts-v1/; + +#include "bcm2710.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,2-model-b-rev2", "brcm,bcm2837"; + model = "Raspberry Pi 2 Model B rev 1.2"; +}; + +&gpio { + /* + * Taken from rpi_SCH_2b_1p2_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "LAN_RUN", + "CAM_GPIO1", + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "PWR_LOW_N", + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "USB_LIMIT", + "NC", /* GPIO39 */ + "PWM0_OUT", + "CAM_GPIO0", + "SMPS_SCL", + "SMPS_SDA", + "ETH_CLK", + "PWM1_OUT", + "HDMI_HPD_N", + "STATUS_LED", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins = <40 45>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&leds { + led_pwr: led-pwr { + label = "PWR"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "input"; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts new file mode 100644 index 00000000000000..8973985e99028c --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts @@ -0,0 +1,295 @@ +/dts-v1/; + +#include "bcm2710.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-lan7515.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_44.dtsi" +#include "bcm271x-rpi-bt.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837"; + model = "Raspberry Pi 3 Model B+"; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + mmc1 = &mmcnr; + }; +}; + +&gpio { + /* + * Taken from rpi_SCH_3bplus_1p0_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "HDMI_HPD_N", + "STATUS_LED_G", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + "PWM0_OUT", + "PWM1_OUT", + "ETH_CLK", + "WIFI_CLK", + "SDA0", + "SCL0", + "SMPS_SCL", + "SMPS_SDA", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + sdio_pins: sdio_pins { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = <7>; // alt3 = SD1 + brcm,pull = <0 2 2 2 2 2>; + }; + + bt_pins: bt_pins { + brcm,pins = <43>; + brcm,function = <4>; /* alt0:GPCLK2 */ + brcm,pull = <0>; + }; + + uart0_pins: uart0_pins { + brcm,pins = <32 33>; + brcm,function = <7>; /* alt3=UART0 */ + brcm,pull = <0 2>; + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33 30 31>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2 2 0>; + }; + + audio_pins: audio_pins { + brcm,pins = <40 41>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&firmware { + expgpio: expgpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "BT_ON", + "WL_ON", + "PWR_LED_R", + "LAN_RUN", + "NC", + "CAM_GPIO0", + "CAM_GPIO1", + "NC"; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&leds { + led_pwr: led-pwr { + label = "PWR"; + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "default-on"; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +ð_phy { + microchip,eee-enabled; + microchip,tx-lpi-timer = <600>; /* non-aggressive*/ + microchip,downshift-after = <2>; +}; + +&cam1_reg { + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + + eee = <ð_phy>,"microchip,eee-enabled?"; + tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0"; + eth_led0 = <ð_phy>,"microchip,led-modes:0"; + eth_led1 = <ð_phy>,"microchip,led-modes:4"; + eth_downshift_after = <ð_phy>,"microchip,downshift-after:0"; + eth_max_speed = <ð_phy>,"max-speed:0"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts new file mode 100644 index 00000000000000..35e6e99000834a --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts @@ -0,0 +1,293 @@ +/dts-v1/; + +#include "bcm2710.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_44.dtsi" +#include "bcm271x-rpi-bt.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; + model = "Raspberry Pi 3 Model B"; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + mmc1 = &mmcnr; + }; +}; + +&gpio { + /* + * Taken from rpi_SCH_3b_1p2_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "NC", /* GPIO 28 */ + "LAN_RUN_BOOT", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + "PWM0_OUT", + "PWM1_OUT", + "ETH_CLK", + "WIFI_CLK", + "SDA0", + "SCL0", + "SMPS_SCL", + "SMPS_SDA", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + sdio_pins: sdio_pins { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = <7>; // alt3 = SD1 + brcm,pull = <0 2 2 2 2 2>; + }; + + bt_pins: bt_pins { + brcm,pins = <43>; + brcm,function = <4>; /* alt0:GPCLK2 */ + brcm,pull = <0>; + }; + + uart0_pins: uart0_pins { + brcm,pins = <32 33>; + brcm,function = <7>; /* alt3=UART0 */ + brcm,pull = <0 2>; + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2>; + }; + + audio_pins: audio_pins { + brcm,pins = <40 41>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&firmware { + expgpio: expgpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "BT_ON", + "WL_ON", + "STATUS_LED", + "LAN_RUN", + "HDMI_HPD_N", + "CAM_GPIO0", + "CAM_GPIO1", + "PWR_LOW_N"; + status = "okay"; + }; + + virtgpio: virtgpio { + compatible = "brcm,bcm2835-virtgpio"; + gpio-controller; + #gpio-cells = <2>; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +&bt { + max-speed = <921600>; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&virtgpio 0 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&leds { + led_pwr: led-pwr { + label = "PWR"; + gpios = <&expgpio 7 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "input"; + }; +}; + +&hdmi { + hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm0.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm0.dts new file mode 100644 index 00000000000000..b575de6b6ce58f --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm0.dts @@ -0,0 +1,252 @@ +/dts-v1/; + +#include "bcm2710.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_44.dtsi" +#include "bcm2708-rpi-bt.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,0-compute-module", "brcm,bcm2837"; + model = "Raspberry Pi Compute Module 0"; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + mmc1 = &mmcnr; + }; +}; + +&gpio { + /* + * These names are (mostly) from the schematic. + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "HDMI_HPD_N", + "STATUS_LED_N", + /* Used by BT module */ + "BT_CTS", + "BT_RTS", + "BT_TXD", + "BT_RXD", + /* Used by Wifi */ + "WIFI_SD_CLK", + "WIFI_SD_CMD", + "WIFI_SD_D0", + "WIFI_SD_D1", + "WIFI_SD_D2", + "WIFI_SD_D3", + "CAM_GPIO", /* GPIO40 */ + "WL_ON", /* GPIO41 */ + "BT_ON", /* GPIO42 */ + "EMMC_REENABLE_N", /* GPIO43 */ + "SDA0", /* GPIO44 */ + "SCL0", /* GPIO45 */ + "INT_SDA", /* GPIO46 */ + "INT_SCL", /* GPIO47 */ + /* Used by SD Card */ + "SD_CLK", + "SD_CMD", + "SD_D0", + "SD_D1", + "SD_D2", + "SD_D3"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + sdio_pins: sdio_pins { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = <7>; // alt3 = SD1 + brcm,pull = <0 2 2 2 2 2>; + }; + + bt_pins: bt_pins { + brcm,pins = <43>; + brcm,function = <4>; /* alt0:GPCLK2 */ + brcm,pull = <0>; + }; + + uart0_pins: uart0_pins { + brcm,pins = <30 31 32 33>; + brcm,function = <7>; /* alt3=UART0 */ + brcm,pull = <2 0 0 2>; /* up none none up */ + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33 30 31>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2 2 0>; + }; + + audio_pins: audio_pins { + brcm,pins = <>; + brcm,function = <>; + }; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "actpwr"; +}; + +&hdmi { + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&bt { + shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +}; + +&minibt { + shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +}; + +&cam1_reg { + gpio = <&gpio 40 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts new file mode 100644 index 00000000000000..0d6e9e61f87751 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts @@ -0,0 +1,215 @@ +/dts-v1/; + +#include "bcm2710.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-csi0-2lane.dtsi" +#include "bcm283x-rpi-csi1-4lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,3-compute-module", "brcm,bcm2837"; + model = "Raspberry Pi Compute Module 3"; +}; + +&cam1_reg { + gpio = <&gpio 3 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +cam0_reg: &cam0_regulator { + gpio = <&gpio 31 GPIO_ACTIVE_HIGH>; +}; + +i2c_csi_dsi0: &i2c0 { +}; + +&uart0 { + status = "okay"; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "GPIO0", + "GPIO1", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "GPIO28", + "GPIO29", + "GPIO30", + "GPIO31", + "GPIO32", + "GPIO33", + "GPIO34", + "GPIO35", + "GPIO36", + "GPIO37", + "GPIO38", + "GPIO39", + "GPIO40", + "GPIO41", + "GPIO42", + "GPIO43", + "GPIO44", + "GPIO45", + "SMPS_SCL", + "SMPS_SDA", + /* Used by eMMC */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins; + brcm,function; + }; +}; + +&firmware { + expgpio: expgpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "HDMI_HPD_N", + "EMMC_EN_N", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC"; + status = "okay"; + }; + + virtgpio: virtgpio { + compatible = "brcm,bcm2835-virtgpio"; + gpio-controller; + #gpio-cells = <2>; + status = "okay"; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&virtgpio 0 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&hdmi { + hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts new file mode 100644 index 00000000000000..16971e50229f0a --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts @@ -0,0 +1,257 @@ +/dts-v1/; + +#include "bcm2710.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_44.dtsi" +#include "bcm2708-rpi-bt.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,model-zero-2-w", "brcm,bcm2837"; + model = "Raspberry Pi Zero 2 W"; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + mmc1 = &mmcnr; + }; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "HDMI_HPD_N", + "STATUS_LED_N", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + "CAM_GPIO1", /* GPIO40 */ + "WL_ON", /* GPIO41 */ + "BT_ON", /* GPIO42 */ + "WIFI_CLK", /* GPIO43 */ + "SDA0", /* GPIO44 */ + "SCL0", /* GPIO45 */ + "SMPS_SCL", /* GPIO46 */ + "SMPS_SDA", /* GPIO47 */ + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + sdio_pins: sdio_pins { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = <7>; // alt3 = SD1 + brcm,pull = <0 2 2 2 2 2>; + }; + + bt_pins: bt_pins { + brcm,pins = <43>; + brcm,function = <4>; /* alt0:GPCLK2 */ + brcm,pull = <0>; + }; + + uart0_pins: uart0_pins { + brcm,pins = <30 31 32 33>; + brcm,function = <7>; /* alt3=UART0 */ + brcm,pull = <2 0 0 2>; /* up none none up */ + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33 30 31>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2 2 0>; + }; + + audio_pins: audio_pins { + brcm,pins = <>; + brcm,function = <>; + }; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "actpwr"; +}; + +&hdmi { + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&bt { + shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +}; + +&minibt { + shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +}; + +&cam1_reg { + gpio = <&gpio 40 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2.dts b/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2.dts new file mode 100644 index 00000000000000..daa12bd30d6b6e --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2.dts @@ -0,0 +1 @@ +#include "bcm2710-rpi-zero-2-w.dts" diff --git a/arch/arm/boot/dts/broadcom/bcm2710.dtsi b/arch/arm/boot/dts/broadcom/bcm2710.dtsi new file mode 100644 index 00000000000000..bdcdbb51fab834 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2710.dtsi @@ -0,0 +1,32 @@ +#define i2c0 i2c0if +#include "bcm2837.dtsi" +#undef i2c0 +#include "bcm270x.dtsi" + +/ { + compatible = "brcm,bcm2837", "brcm,bcm2836"; + + arm-pmu { + compatible = "arm,cortex-a53-pmu", "arm,cortex-a7-pmu"; + }; + + soc { + dma-ranges = <0xc0000000 0x00000000 0x3f000000>, + <0x7e000000 0x3f000000 0x01000000>; + }; + + __overrides__ { + arm_freq = <&cpu0>, "clock-frequency:0", + <&cpu1>, "clock-frequency:0", + <&cpu2>, "clock-frequency:0", + <&cpu3>, "clock-frequency:0"; + }; +}; + +&system_timer { + status = "disabled"; +}; + +&vc4 { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts index 353bb50ce5425c..e376a5bf891307 100644 --- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts +++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts @@ -1,11 +1,19 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; +#define BCM2711 +#define i2c0 i2c0if #include "bcm2711.dtsi" #include "bcm2711-rpi.dtsi" +/delete-node/&i2c0mux; #include "bcm283x-rpi-led-deprecated.dtsi" -#include "bcm283x-rpi-usb-peripheral.dtsi" #include "bcm283x-rpi-wifi-bt.dtsi" #include +#undef i2c0 +#include "bcm270x.dtsi" +#define i2c0 i2c0mux +#undef i2c0 + +/delete-node/ &cam1_reg; / { compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; @@ -68,7 +76,7 @@ "VDD_SD_IO_SEL", "CAM_GPIO", /* 5 */ "SD_PWR_ON", - ""; + "SD_OC_N"; }; &gpio { @@ -82,21 +90,21 @@ */ gpio-line-names = "ID_SDA", /* 0 */ "ID_SCL", - "SDA1", - "SCL1", - "GPIO_GCLK", + "GPIO2", + "GPIO3", + "GPIO4", "GPIO5", /* 5 */ "GPIO6", - "SPI_CE1_N", - "SPI_CE0_N", - "SPI_MISO", - "SPI_MOSI", /* 10 */ - "SPI_SCLK", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", /* 10 */ + "GPIO11", "GPIO12", "GPIO13", /* Serial port */ - "TXD1", - "RXD1", /* 15 */ + "GPIO14", + "GPIO15", /* 15 */ "GPIO16", "GPIO17", "GPIO18", @@ -214,7 +222,7 @@ led@0 { reg = <0>; color = ; - function = LED_FUNCTION_LAN; + function = "lan";//LED_FUNCTION_LAN; default-state = "keep"; }; @@ -222,7 +230,7 @@ led@1 { reg = <1>; color = ; - function = LED_FUNCTION_LAN; + function = "lan";//LED_FUNCTION_LAN; default-state = "keep"; }; }; @@ -270,3 +278,234 @@ &wifi_pwrseq { reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; }; + +// ============================================= +// Downstream rpi- changes + +#include "bcm271x-rpi-bt.dtsi" + +/ { + soc { + /delete-node/ pixelvalve@7e807000; + /delete-node/ hdmi@7e902000; + }; +}; + +&phy1 { + /delete-node/ leds; +}; + +#include "bcm2711-rpi-ds.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_44.dtsi" + +/ { + /delete-node/ wifi-pwrseq; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; +}; + +&uart0 { + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&uart1_pins>; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&gpio { + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "RGMII_MDIO", + "RGMIO_MDC", + /* Used by BT module */ + "CTS0", /* 30 */ + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", /* 35 */ + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + /* Shared with SPI flash */ + "PWM0_MISO", /* 40 */ + "PWM1_MOSI", + "STATUS_LED_G_CLK", + "SPIFLASH_CE_N", + "SDA0", + "SCL0", /* 45 */ + "RGMII_RXCLK", + "RGMII_RXCTL", + "RGMII_RXD0", + "RGMII_RXD1", + "RGMII_RXD2", /* 50 */ + "RGMII_RXD3", + "RGMII_TXCLK", + "RGMII_TXCTL", + "RGMII_TXD0", + "RGMII_TXD1", /* 55 */ + "RGMII_TXD2", + "RGMII_TXD3"; + + bt_pins: bt_pins { + brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0 + // to fool pinctrl + brcm,function = <0>; + brcm,pull = <2>; + }; + + uart0_pins: uart0_pins { + brcm,pins = <32 33>; + brcm,function = ; + brcm,pull = <0 2>; + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33 30 31>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2 2 0>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +// ============================================= +// Board specific stuff here + +&sdhost { + status = "disabled"; +}; + +&phy1 { + led-modes = <0x00 0x08>; /* link/activity link */ +}; + +&gpio { + audio_pins: audio_pins { + brcm,pins = <40 41>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&led_act { + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&led_pwr { + default-state = "off"; +}; + +&pwm1 { + status = "disabled"; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + + eth_led0 = <&phy1>,"led-modes:0"; + eth_led1 = <&phy1>,"led-modes:4"; + eth_max_speed = <&phy1>,"max-speed:0"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts index ca9be91b4f3654..cd0bc647f7fcc0 100644 --- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts +++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts @@ -1,5 +1,4 @@ // SPDX-License-Identifier: GPL-2.0 -/dts-v1/; #include "bcm2711-rpi-4-b.dts" / { @@ -37,8 +36,54 @@ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; }; -/delete-node/ &led_act; - &pm { /delete-property/ system-power-controller; }; + +// ============================================= +// Downstream rpi- changes + +/ { + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&audio_pins { + brcm,pins = <>; + brcm,function = <>; +}; + +// Declare the LED but leave it disabled, in case a user wants to map it +// to a GPIO on the header +&led_act { + default-state = "off"; + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +&led_pwr { + default-state = "off"; +}; + +&cam1_reg { + /delete-property/ gpio; +}; + +cam0_reg: &cam_dummy_reg { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4", + <&led_act>,"status=okay"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + eth_max_speed = <&phy1>,"max-speed:0"; + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts new file mode 100644 index 00000000000000..14cdca845300c4 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts @@ -0,0 +1,498 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; +#define BCM2711 +#define i2c0 i2c0if +#include "bcm2711.dtsi" +#include "bcm2711-rpi.dtsi" +/delete-node/&i2c0mux; +#include "bcm283x-rpi-led-deprecated.dtsi" +#include "bcm283x-rpi-wifi-bt.dtsi" +#undef i2c0 +#include "bcm270x.dtsi" +#define i2c0 i2c0mux +#undef i2c0 + +/ { + compatible = "raspberrypi,4-compute-module", "brcm,bcm2711"; + model = "Raspberry Pi Compute Module 4"; + + chosen { + /* 8250 auxiliary UART instead of pl011 */ + stdout-path = "serial1:115200n8"; + }; + + sd_io_1v8_reg: sd_io_1v8_reg { + compatible = "regulator-gpio"; + regulator-name = "vdd-sd-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-settling-time-us = <5000>; + gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; + states = <1800000 0x1>, + <3300000 0x0>; + status = "okay"; + }; + + sd_vcc_reg: sd_vcc_reg { + compatible = "regulator-fixed"; + regulator-name = "vcc-sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>; + }; +}; + +&bt { + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; +}; + +&ddc0 { + status = "okay"; +}; + +&ddc1 { + status = "okay"; +}; + +&expgpio { + gpio-line-names = "BT_ON", + "WL_ON", + "PWR_LED_OFF", + "ANT1", + "VDD_SD_IO_SEL", + "CAM_GPIO", + "SD_PWR_ON", + "ANT2"; + + ant1: ant1 { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + }; + + ant2: ant2 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + }; +}; + +&gpio { + /* + * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "SDA1", + "SCL1", + "GPIO_GCLK", + "GPIO5", + "GPIO6", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "GPIO12", + "GPIO13", + /* Serial port */ + "TXD1", + "RXD1", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "RGMII_MDIO", + "RGMIO_MDC", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + /* Shared with SPI flash */ + "PWM0_MISO", + "PWM1_MOSI", + "STATUS_LED_G_CLK", + "SPIFLASH_CE_N", + "SDA0", + "SCL0", + "RGMII_RXCLK", + "RGMII_RXCTL", + "RGMII_RXD0", + "RGMII_RXD1", + "RGMII_RXD2", + "RGMII_RXD3", + "RGMII_TXCLK", + "RGMII_TXCTL", + "RGMII_TXD0", + "RGMII_TXD1", + "RGMII_TXD2", + "RGMII_TXD3"; +}; + +&hdmi0 { + status = "okay"; +}; + +&hdmi1 { + status = "okay"; +}; + +&led_act { + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +}; + +&leds { + led_pwr: led-pwr { + label = "PWR"; + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; + default-state = "keep"; + linux,default-trigger = "default-on"; + }; +}; + +&pixelvalve0 { + status = "okay"; +}; + +&pixelvalve1 { + status = "okay"; +}; + +&pixelvalve2 { + status = "okay"; +}; + +&pixelvalve4 { + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; + status = "okay"; +}; + +/* EMMC2 is used to drive the EMMC card */ +&emmc2 { + bus-width = <8>; + vqmmc-supply = <&sd_io_1v8_reg>; + vmmc-supply = <&sd_vcc_reg>; + broken-cd; + status = "okay"; +}; + +&genet { + phy-handle = <&phy1>; + phy-mode = "rgmii-rxid"; + status = "okay"; +}; + +&genet_mdio { + phy1: ethernet-phy@0 { + /* No PHY interrupt */ + reg = <0x0>; + }; +}; + +&pcie0 { + pci@0,0 { + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + reg = <0 0 0 0 0>; + }; +}; + +/* uart0 communicates with the BT module */ +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; + uart-has-rtscts; +}; + +/* uart1 is mapped to the pin header */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_gpio14>; + status = "okay"; +}; + +&vc4 { + status = "okay"; +}; + +&vec { + status = "disabled"; +}; + +&wifi_pwrseq { + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; +}; + +// ============================================= +// Downstream rpi- changes + +#include "bcm271x-rpi-bt.dtsi" + +/ { + soc { + /delete-node/ pixelvalve@7e807000; + /delete-node/ hdmi@7e902000; + }; +}; + +#include "bcm2711-rpi-ds.dtsi" +#include "bcm283x-rpi-csi0-2lane.dtsi" +#include "bcm283x-rpi-csi1-4lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_44.dtsi" + +/ { + /delete-node/ wifi-pwrseq; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; +}; + +&uart0 { + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&uart1_pins>; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&gpio { + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "RGMII_MDIO", + "RGMIO_MDC", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + /* Shared with SPI flash */ + "PWM0_MISO", + "PWM1_MOSI", + "STATUS_LED_G_CLK", + "SPIFLASH_CE_N", + "SDA0", + "SCL0", + "RGMII_RXCLK", + "RGMII_RXCTL", + "RGMII_RXD0", + "RGMII_RXD1", + "RGMII_RXD2", + "RGMII_RXD3", + "RGMII_TXCLK", + "RGMII_TXCTL", + "RGMII_TXD0", + "RGMII_TXD1", + "RGMII_TXD2", + "RGMII_TXD3"; + + bt_pins: bt_pins { + brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0 + // to fool pinctrl + brcm,function = <0>; + brcm,pull = <2>; + }; + + uart0_pins: uart0_pins { + brcm,pins = <32 33>; + brcm,function = ; + brcm,pull = <0 2>; + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33 30 31>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2 2 0>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +// ============================================= +// Board specific stuff here + +&sdhost { + status = "disabled"; +}; + +&phy1 { + led-modes = <0x00 0x08>; /* link/activity link */ +}; + +&gpio { + audio_pins: audio_pins { + brcm,pins = <>; + brcm,function = <>; + }; +}; + +&led_act { + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&led_pwr { + default-state = "off"; +}; + +&pwm1 { + status = "disabled"; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +cam0_reg: &cam1_reg { + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + + eth_led0 = <&phy1>,"led-modes:0"; + eth_led1 = <&phy1>,"led-modes:4"; + eth_max_speed = <&phy1>,"max-speed:0"; + + ant1 = <&ant1>,"output-high?=on", + <&ant1>, "output-low?=off", + <&ant2>, "output-high?=off", + <&ant2>, "output-low?=on"; + ant2 = <&ant1>,"output-high?=off", + <&ant1>, "output-low?=on", + <&ant2>, "output-high?=on", + <&ant2>, "output-low?=off"; + noant = <&ant1>,"output-high?=off", + <&ant1>, "output-low?=on", + <&ant2>, "output-high?=off", + <&ant2>, "output-low?=on"; + noanthogs = <&ant1>,"status=disabled", + <&ant2>, "status=disabled"; + + pcie_tperst_clk_ms = <&pcie0>,"brcm,tperst-clk-ms:0"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts new file mode 100644 index 00000000000000..47a5f5ee140cf8 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts @@ -0,0 +1,314 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; +#define BCM2711 +#define i2c0 i2c0if +#include "bcm2711.dtsi" +#include "bcm2711-rpi.dtsi" +/delete-node/&i2c0mux; +#include "bcm283x-rpi-led-deprecated.dtsi" +#undef i2c0 +#include "bcm270x.dtsi" +#define i2c0 i2c0mux +#undef i2c0 + +/ { + compatible = "raspberrypi,4-compute-module-s", "brcm,bcm2711"; + model = "Raspberry Pi Compute Module 4S"; +}; + +&ddc0 { + status = "okay"; +}; + +&gpio { + /* + * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "GPIO28", + "GPIO29", + "GPIO30", + "GPIO31", + "GPIO32", + "GPIO33", + "GPIO34", + "GPIO35", + "GPIO36", + "GPIO37", + "GPIO38", + "GPIO39", + "PWM0_MISO", + "PWM1_MOSI", + "GPIO42", + "GPIO43", + "GPIO44", + "GPIO45", + "-", // GPIO46 + "-", // GPIO47 + "-", // GPIO48 + "EMMC_DISABLE_N", // GPIO49 + "-", // GPIO50 + "-", // GPIO51 + "-", // GPIO52 + "-", // GPIO53 + "-", // GPIO54 + "-", // GPIO55 + "-", // GPIO56 + "GPIO_SEL"; // GPIO57 +}; + +&hdmi0 { + status = "okay"; +}; + +&led_act { + gpios = <&virtgpio 0 GPIO_ACTIVE_HIGH>; +}; + +&pixelvalve0 { + status = "okay"; +}; + +&pixelvalve1 { + status = "okay"; +}; + +&pixelvalve2 { + status = "okay"; +}; + +&pixelvalve4 { + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; + status = "okay"; +}; + +/* EMMC2 is used to drive the EMMC card */ +&emmc2 { + bus-width = <8>; + broken-cd; + status = "okay"; +}; + +&pcie0 { + status = "disabled"; +}; + +&vchiq { + interrupts = ; +}; + +&vc4 { + status = "okay"; +}; + +&vec { + status = "disabled"; +}; + +// ============================================= +// Downstream rpi- changes + +#include "bcm2711-rpi-ds.dtsi" + +/ { + soc { + /delete-node/ pixelvalve@7e807000; + /delete-node/ hdmi@7e902000; + }; +}; + +#include "bcm283x-rpi-csi0-2lane.dtsi" +#include "bcm283x-rpi-csi1-4lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" + +/ { + chosen { + bootargs = "coherent_pool=1M snd_bcm2835.enable_headphones=0 cgroup_disable=memory numa_policy=interleave"; + }; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + /delete-property/ i2c20; + /delete-property/ i2c21; + }; + + /delete-node/ wifi-pwrseq; +}; + +&firmware { + virtgpio: virtgpio { + compatible = "brcm,bcm2835-virtgpio"; + gpio-controller; + #gpio-cells = <2>; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&gpio { + uart0_pins: uart0_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +// ============================================= +// Board specific stuff here + +/* Enable USB in OTG-aware mode */ +&usb { + compatible = "brcm,bcm2835-usb"; + dr_mode = "otg"; + g-np-tx-fifo-size = <32>; + g-rx-fifo-size = <558>; + g-tx-fifo-size = <512 512 512 512 512 256 256>; + status = "okay"; +}; + +&sdhost { + status = "disabled"; +}; + +&gpio { + audio_pins: audio_pins { + brcm,pins = <>; + brcm,function = <>; + }; + + enable_eeprom_hog: enable_eeprom_hog { + gpio-hog; + gpios = <57 GPIO_ACTIVE_HIGH>; + output-low; + status = "disabled"; + }; +}; + +/* Permanently disable HDMI1 */ +&hdmi1 { + compatible = "disabled"; +}; + +/* Permanently disable DDC1 */ +&ddc1 { + compatible = "disabled"; +}; + +&led_act { + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&pwm1 { + status = "disabled"; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 3 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +cam0_reg: &cam0_regulator { + gpio = <&gpio 31 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + enable_eeprom = <&enable_eeprom_hog>,"status"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi b/arch/arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi new file mode 100644 index 00000000000000..361be6f3f0131d --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi @@ -0,0 +1,570 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "bcm270x-rpi.dtsi" + +/ { + chosen { + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0 cgroup_disable=memory numa_policy=interleave nvme.max_host_mem_size_mb=0"; + }; + + __overrides__ { + arm_freq; + eee = <&chosen>,"bootargs{on='',off='genet.eee=N'}"; + hdmi = <&hdmi0>,"status", + <&hdmi1>,"status"; + nvmem_cust_rw = <&nvmem_cust>,"rw?"; + nvmem_priv_rw = <&nvmem_priv>,"rw?"; + pcie = <&pcie0>,"status"; + sd = <&emmc2>,"status"; + + sd_poll_once = <&emmc2>, "non-removable?"; + spi_dma4 = <&spi0>, "dmas:0=", <&dma40>, + <&spi0>, "dmas:8=", <&dma40>; + i2s_dma4 = <&i2s>, "dmas:0=", <&dma40>, + <&i2s>, "dmas:8=", <&dma40>; + }; + + scb: scb-bus@fc000000 { + /* Add a label */ + }; + + soc: soc { + /* Add a label */ + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + uart2 = &uart2; + uart3 = &uart3; + uart4 = &uart4; + uart5 = &uart5; + serial0 = &uart1; + serial1 = &uart0; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + mmc0 = &emmc2; + mmc1 = &mmcnr; + mmc2 = &sdhost; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c20 = &ddc0; + i2c21 = &ddc1; + spi3 = &spi3; + spi4 = &spi4; + spi5 = &spi5; + spi6 = &spi6; + /delete-property/ intc; + }; + + /* + * Add a node with a dma-ranges value that exists only to be found + * by of_dma_get_max_cpu_address, and hence limit the DMA zone. + */ + zone_dma { + #address-cells = <1>; + #size-cells = <1>; + dma-ranges = <0x0 0x0 0x0 0x40000000>; + }; +}; + +&vc4 { + raspberrypi,firmware = <&firmware>; +}; + +&cma { + /* Limit cma to the lower 768MB to allow room for HIGHMEM on 32-bit */ + alloc-ranges = <0x0 0x00000000 0x30000000>; +}; + +&soc { + /* Add the physical <-> DMA mapping for the I/O space */ + dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>, + <0x7c000000 0x0 0xfc000000 0x03800000>; + nvmem { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + nvmem_otp: nvmem_otp { + compatible = "raspberrypi,rpi-otp"; + firmware = <&firmware>; + reg = <0 166>; + status = "okay"; + }; + + nvmem_cust: nvmem_cust { + compatible = "raspberrypi,rpi-otp"; + firmware = <&firmware>; + reg = <1 8>; + status = "okay"; + }; + + nvmem_priv: nvmem_priv { + compatible = "raspberrypi,rpi-otp"; + firmware = <&firmware>; + reg = <3 8>; + status = "okay"; + }; + }; +}; + +&scb { + #size-cells = <2>; + + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>, + <0x0 0x40000000 0x0 0xff800000 0x0 0x00800000>, + <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>, + <0x0 0x00000000 0x0 0x00000000 0x0 0xfc000000>; + dma-ranges = <0x4 0x7c000000 0x0 0xfc000000 0x0 0x03800000>, + <0x0 0x00000000 0x0 0x00000000 0x4 0x00000000>; + + dma40: dma@7e007b00 { + compatible = "brcm,bcm2711-dma"; + reg = <0x0 0x7e007b00 0x0 0x400>; + interrupts = + , /* dma4 11 */ + , /* dma4 12 */ + , /* dma4 13 */ + ; /* dma4 14 */ + interrupt-names = "dma11", + "dma12", + "dma13", + "dma14"; + #dma-cells = <1>; + brcm,dma-channel-mask = <0x7800>; + }; + + xhci: xhci@7e9c0000 { + compatible = "generic-xhci"; + status = "disabled"; + reg = <0x0 0x7e9c0000 0x0 0x100000>; + interrupts = ; + power-domains = <&power RPI_POWER_DOMAIN_USB>; + }; +}; + +&hevc_dec { + reg = <0x0 0x7eb00000 0x0 0x10000>, /* HEVC */ + <0x0 0x7eb10000 0x0 0x1000>; /* INTC */ +}; + +&pcie0 { + reg = <0x0 0x7d500000 0x0 0x9310>; + ranges = <0x02000000 0x0 0xc0000000 0x6 0x00000000 + 0x0 0x40000000>; +}; + +&genet { + reg = <0x0 0x7d580000 0x0 0x10000>; +}; + +&dma40 { + /* The VPU firmware uses DMA channel 11 for VCHIQ */ + brcm,dma-channel-mask = <0x7000>; +}; + +&vchiq { + compatible = "brcm,bcm2711-vchiq"; +}; + +&firmwarekms { + compatible = "raspberrypi,rpi-firmware-kms-2711"; + interrupts = ; +}; + +&smi { + interrupts = ; +}; + +&mmc { + interrupts = ; +}; + +&mmcnr { + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&csi0 { + interrupts = ; +}; + +&csi1 { + interrupts = ; +}; + +&random { + compatible = "brcm,bcm2711-rng200"; + status = "okay"; +}; + +&usb { + /* Enable the FIQ support */ + reg = <0x7e980000 0x10000>, + <0x7e00b200 0x200>; + interrupts = , + ; + status = "disabled"; +}; + +&gpio { + interrupts = , + ; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = ; + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = ; + }; + + spi3_pins: spi3_pins { + brcm,pins = <1 2 3>; + brcm,function = ; + }; + + spi3_cs_pins: spi3_cs_pins { + brcm,pins = <0 24>; + brcm,function = ; + }; + + spi4_pins: spi4_pins { + brcm,pins = <5 6 7>; + brcm,function = ; + }; + + spi4_cs_pins: spi4_cs_pins { + brcm,pins = <4 25>; + brcm,function = ; + }; + + spi5_pins: spi5_pins { + brcm,pins = <13 14 15>; + brcm,function = ; + }; + + spi5_cs_pins: spi5_cs_pins { + brcm,pins = <12 26>; + brcm,function = ; + }; + + spi6_pins: spi6_pins { + brcm,pins = <19 20 21>; + brcm,function = ; + }; + + spi6_cs_pins: spi6_cs_pins { + brcm,pins = <18 27>; + brcm,function = ; + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = ; + brcm,pull = ; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = ; + brcm,pull = ; + }; + + i2c3_pins: i2c3 { + brcm,pins = <4 5>; + brcm,function = ; + brcm,pull = ; + }; + + i2c4_pins: i2c4 { + brcm,pins = <8 9>; + brcm,function = ; + brcm,pull = ; + }; + + i2c5_pins: i2c5 { + brcm,pins = <12 13>; + brcm,function = ; + brcm,pull = ; + }; + + i2c6_pins: i2c6 { + brcm,pins = <22 23>; + brcm,function = ; + brcm,pull = ; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = ; + }; + + sdio_pins: sdio_pins { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = ; // alt3 = SD1 + brcm,pull = <0 2 2 2 2 2>; + }; + + uart2_pins: uart2_pins { + brcm,pins = <0 1>; + brcm,function = ; + brcm,pull = <0 2>; + }; + + uart3_pins: uart3_pins { + brcm,pins = <4 5>; + brcm,function = ; + brcm,pull = <0 2>; + }; + + uart4_pins: uart4_pins { + brcm,pins = <8 9>; + brcm,function = ; + brcm,pull = <0 2>; + }; + + uart5_pins: uart5_pins { + brcm,pins = <12 13>; + brcm,function = ; + brcm,pull = <0 2>; + }; +}; + +&emmc2 { + mmc-ddr-3_3v; +}; + +&vc4 { + status = "disabled"; +}; + +&pixelvalve0 { + status = "disabled"; +}; + +&pixelvalve1 { + status = "disabled"; +}; + +&pixelvalve2 { + status = "disabled"; +}; + +&pixelvalve3 { + status = "disabled"; +}; + +&pixelvalve4 { + status = "disabled"; +}; + +&hdmi0 { + reg = <0x7ef00700 0x300>, + <0x7ef00300 0x200>, + <0x7ef00f00 0x80>, + <0x7ef00f80 0x80>, + <0x7ef01b00 0x200>, + <0x7ef01f00 0x400>, + <0x7ef00200 0x80>, + <0x7ef04300 0x100>, + <0x7ef20000 0x100>, + <0x7ef00100 0x30>; + reg-names = "hdmi", + "dvp", + "phy", + "rm", + "packet", + "metadata", + "csc", + "cec", + "hd", + "intr2"; + clocks = <&firmware_clocks 13>, + <&firmware_clocks 14>, + <&dvp 0>, + <&clk_27MHz>; + dmas = <&dma40 (10|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; + status = "disabled"; +}; + +&ddc0 { + status = "disabled"; +}; + +&hdmi1 { + reg = <0x7ef05700 0x300>, + <0x7ef05300 0x200>, + <0x7ef05f00 0x80>, + <0x7ef05f80 0x80>, + <0x7ef06b00 0x200>, + <0x7ef06f00 0x400>, + <0x7ef00280 0x80>, + <0x7ef09300 0x100>, + <0x7ef20000 0x100>, + <0x7ef00100 0x30>; + reg-names = "hdmi", + "dvp", + "phy", + "rm", + "packet", + "metadata", + "csc", + "cec", + "hd", + "intr2"; + clocks = <&firmware_clocks 13>, + <&firmware_clocks 14>, + <&dvp 1>, + <&clk_27MHz>; + dmas = <&dma40 (17|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; + status = "disabled"; +}; + +&ddc1 { + status = "disabled"; +}; + +&dvp { + status = "disabled"; +}; + +&vec { + clocks = <&firmware_clocks 15>; +}; + +&aon_intr { + interrupts = ; + status = "disabled"; +}; + +&system_timer { + status = "disabled"; +}; + +&i2c0 { + /delete-property/ compatible; + /delete-property/ interrupts; +}; + +&i2c0if { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + interrupts = ; +}; + +i2c_arm: &i2c1 {}; +i2c_vc: &i2c0 {}; + +&i2c3 { + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; +}; + +&i2c4 { + pinctrl-0 = <&i2c4_pins>; + pinctrl-names = "default"; +}; + +&i2c5 { + pinctrl-0 = <&i2c5_pins>; + pinctrl-names = "default"; +}; + +&i2c6 { + pinctrl-0 = <&i2c6_pins>; + pinctrl-names = "default"; +}; + +&spi3 { + pinctrl-0 = <&spi3_pins &spi3_cs_pins>; + pinctrl-names = "default"; +}; + +&spi4 { + pinctrl-0 = <&spi4_pins &spi4_cs_pins>; + pinctrl-names = "default"; +}; + +&spi5 { + pinctrl-0 = <&spi5_pins &spi5_cs_pins>; + pinctrl-names = "default"; +}; + +&spi6 { + pinctrl-0 = <&spi6_pins &spi6_cs_pins>; + pinctrl-names = "default"; +}; + +&uart0 { + compatible = "arm,pl011-axi"; +}; + +&uart2 { + compatible = "arm,pl011-axi"; + pinctrl-0 = <&uart2_pins>; + pinctrl-names = "default"; +}; + +&uart3 { + compatible = "arm,pl011-axi"; + pinctrl-0 = <&uart3_pins>; + pinctrl-names = "default"; +}; + +&uart4 { + compatible = "arm,pl011-axi"; + pinctrl-0 = <&uart4_pins>; + pinctrl-names = "default"; +}; + +&uart5 { + compatible = "arm,pl011-axi"; + pinctrl-0 = <&uart5_pins>; + pinctrl-names = "default"; +}; + +&axiperf { + compatible = "brcm,bcm2711-axiperf"; +}; + +/delete-node/ &v3d; + +/ { + v3dbus: v3dbus { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <2>; + ranges = <0x7c500000 0x0 0xfc500000 0x0 0x03300000>, + <0x40000000 0x0 0xff800000 0x0 0x00800000>; + dma-ranges = <0x00000000 0x0 0x00000000 0x4 0x00000000>; + + v3d: v3d@7ec04000 { + compatible = "brcm,2711-v3d"; + reg = + <0x7ec00000 0x0 0x4000>, + <0x7ec04000 0x0 0x4000>; + reg-names = "hub", "core0"; + + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; + resets = <&pm BCM2835_RESET_V3D>; + clocks = <&firmware_clocks 5>; + clocks-names = "v3d"; + interrupts = ; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi index 1eb6406449d198..60b75679a4066d 100644 --- a/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi @@ -15,6 +15,7 @@ ethernet0 = &genet; pcie0 = &pcie0; blconfig = &blconfig; + blpubkey = &blpubkey; }; i2c0mux: i2c-mux0 { @@ -99,6 +100,18 @@ no-map; status = "disabled"; }; + /* + * RPi4 will copy the binary public key blob (if present) from the bootloader + * into memory for use by the OS. + */ + blpubkey: nvram@1 { + compatible = "raspberrypi,bootloader-public-key", "nvmem-rmem"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x0 0x0>; + no-map; + status = "disabled"; + }; }; &v3d { @@ -108,3 +121,7 @@ &vchiq { interrupts = ; }; + +&hevc_dec { + clocks = <&firmware_clocks 11>; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm2711.dtsi b/arch/arm/boot/dts/broadcom/bcm2711.dtsi index 9986472f61c445..b57b549aa5ec6f 100644 --- a/arch/arm/boot/dts/broadcom/bcm2711.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm2711.dtsi @@ -277,7 +277,7 @@ reg = <0x7e20c800 0x28>; clocks = <&clocks BCM2835_CLOCK_PWM>; assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; - assigned-clock-rates = <10000000>; + assigned-clock-rates = <50000000>; #pwm-cells = <3>; status = "disabled"; }; @@ -612,6 +612,15 @@ resets = <&pm BCM2835_RESET_V3D>; interrupts = ; }; + + hevc_dec: codec@7eb10000 { + compatible = "brcm,bcm2711-hevc-dec", "raspberrypi,hevc-dec"; + reg = <0x0 0x7eb00000 0x10000>, /* HEVC */ + <0x0 0x7eb10000 0x1000>; /* INTC */ + reg-names = "hevc", + "intc"; + interrupts = ; + }; }; }; diff --git a/arch/arm/boot/dts/broadcom/bcm271x-rpi-bt.dtsi b/arch/arm/boot/dts/broadcom/bcm271x-rpi-bt.dtsi new file mode 100644 index 00000000000000..c77e280ccd163e --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm271x-rpi-bt.dtsi @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0 + +&uart0 { + bt: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <3000000>; + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; + local-bd-address = [ 00 00 00 00 00 00 ]; + fallback-bd-address; // Don't override a valid address + status = "okay"; + }; +}; + +&uart1 { + minibt: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <230400>; + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; + local-bd-address = [ 00 00 00 00 00 00 ]; + fallback-bd-address; // Don't override a valid address + status = "disabled"; + }; +}; + +/ { + chosen { + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0 cgroup_disable=memory"; + }; + + aliases { + bluetooth = &bt; + }; + + __overrides__ { + bdaddr = <&bt>,"local-bd-address[", + <&bt>,"fallback-bd-address?=0", + <&minibt>,"local-bd-address[", + <&minibt>,"fallback-bd-address?=0"; + krnbt = <&bt>,"status"; + krnbt_baudrate = <&bt>,"max-speed:0", <&minibt>,"max-speed:0"; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi0-2lane.dtsi b/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi0-2lane.dtsi new file mode 100644 index 00000000000000..6e4ce8622b4774 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi0-2lane.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0-only +&csi0 { + brcm,num-data-lanes = <2>; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi b/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi new file mode 100644 index 00000000000000..6938f4daacdc20 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0-only +&csi1 { + brcm,num-data-lanes = <2>; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-4lane.dtsi b/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-4lane.dtsi new file mode 100644 index 00000000000000..b37037437beed2 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-4lane.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0-only +&csi1 { + brcm,num-data-lanes = <4>; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_28.dtsi b/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_28.dtsi new file mode 100644 index 00000000000000..38f0074bce3ff9 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_28.dtsi @@ -0,0 +1,4 @@ +&i2c0mux { + pinctrl-0 = <&i2c0_gpio0>; + pinctrl-1 = <&i2c0_gpio28>; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_44.dtsi b/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_44.dtsi new file mode 100644 index 00000000000000..119946d878dbf2 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_44.dtsi @@ -0,0 +1,4 @@ +&i2c0mux { + pinctrl-0 = <&i2c0_gpio0>; + pinctrl-1 = <&i2c0_gpio44>; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm283x.dtsi b/arch/arm/boot/dts/broadcom/bcm283x.dtsi index 69b0919f1324ab..562c4e9d08cc0a 100644 --- a/arch/arm/boot/dts/broadcom/bcm283x.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm283x.dtsi @@ -363,7 +363,7 @@ #size-cells = <0>; #clock-cells = <1>; - clocks = <&clocks BCM2835_PLLA_DSI0>, + clocks = <&clocks BCM2835_PLLD_DSI0>, <&clocks BCM2835_CLOCK_DSI0E>, <&clocks BCM2835_CLOCK_DSI0P>; clock-names = "phy", "escape", "pixel"; @@ -415,7 +415,7 @@ reg = <0x7e20c000 0x28>; clocks = <&clocks BCM2835_CLOCK_PWM>; assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; - assigned-clock-rates = <10000000>; + assigned-clock-rates = <50000000>; #pwm-cells = <3>; status = "disabled"; }; @@ -502,6 +502,10 @@ }; clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + /* The oscillator is the root of the clock tree. */ clk_osc: clk-osc { compatible = "fixed-clock"; diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile new file mode 100644 index 00000000000000..398c8d65de1940 --- /dev/null +++ b/arch/arm/boot/dts/overlays/Makefile @@ -0,0 +1,378 @@ +# Overlays for the Raspberry Pi platform + +dtb-$(CONFIG_ARCH_BCM2835) += overlay_map.dtb hat_map.dtb + +dtbo-$(CONFIG_ARCH_BCM2835) += \ + act-led.dtbo \ + adafruit-st7735r.dtbo \ + adafruit18.dtbo \ + adau1977-adc.dtbo \ + adau7002-simple.dtbo \ + ads1015.dtbo \ + ads1115.dtbo \ + ads7846.dtbo \ + adv7282m.dtbo \ + adv728x-m.dtbo \ + akkordion-iqdacplus.dtbo \ + allo-boss-dac-pcm512x-audio.dtbo \ + allo-boss2-dac-audio.dtbo \ + allo-digione.dtbo \ + allo-katana-dac-audio.dtbo \ + allo-piano-dac-pcm512x-audio.dtbo \ + allo-piano-dac-plus-pcm512x-audio.dtbo \ + anyspi.dtbo \ + apds9960.dtbo \ + applepi-dac.dtbo \ + arducam-64mp.dtbo \ + arducam-pivariety.dtbo \ + at86rf233.dtbo \ + audioinjector-addons.dtbo \ + audioinjector-bare-i2s.dtbo \ + audioinjector-isolated-soundcard.dtbo \ + audioinjector-ultra.dtbo \ + audioinjector-wm8731-audio.dtbo \ + audiosense-pi.dtbo \ + audremap.dtbo \ + audremap-pi5.dtbo \ + balena-fin.dtbo \ + bcm2712d0.dtbo \ + camera-mux-2port.dtbo \ + camera-mux-4port.dtbo \ + cap1106.dtbo \ + chipcap2.dtbo \ + chipdip-dac.dtbo \ + cirrus-wm5102.dtbo \ + cm-swap-i2c0.dtbo \ + cma.dtbo \ + crystalfontz-cfa050_pi_m.dtbo \ + cutiepi-panel.dtbo \ + dacberry400.dtbo \ + dht11.dtbo \ + dionaudio-kiwi.dtbo \ + dionaudio-loco.dtbo \ + dionaudio-loco-v2.dtbo \ + disable-bt.dtbo \ + disable-bt-pi5.dtbo \ + disable-emmc2.dtbo \ + disable-wifi.dtbo \ + disable-wifi-pi5.dtbo \ + dpi18.dtbo \ + dpi18cpadhi.dtbo \ + dpi24.dtbo \ + draws.dtbo \ + dwc-otg-deprecated.dtbo \ + dwc2.dtbo \ + edt-ft5406.dtbo \ + enc28j60.dtbo \ + enc28j60-spi2.dtbo \ + exc3000.dtbo \ + ezsound-6x8iso.dtbo \ + fbtft.dtbo \ + fe-pi-audio.dtbo \ + fsm-demo.dtbo \ + gc9a01.dtbo \ + ghost-amp.dtbo \ + goodix.dtbo \ + googlevoicehat-soundcard.dtbo \ + gpio-charger.dtbo \ + gpio-fan.dtbo \ + gpio-hog.dtbo \ + gpio-ir.dtbo \ + gpio-ir-tx.dtbo \ + gpio-key.dtbo \ + gpio-led.dtbo \ + gpio-no-bank0-irq.dtbo \ + gpio-no-irq.dtbo \ + gpio-poweroff.dtbo \ + gpio-shutdown.dtbo \ + hd44780-i2c-lcd.dtbo \ + hd44780-lcd.dtbo \ + hdmi-backlight-hwhack-gpio.dtbo \ + hifiberry-adc.dtbo \ + hifiberry-adc8x.dtbo \ + hifiberry-amp.dtbo \ + hifiberry-amp100.dtbo \ + hifiberry-amp3.dtbo \ + hifiberry-amp4pro.dtbo \ + hifiberry-dac.dtbo \ + hifiberry-dac8x.dtbo \ + hifiberry-dacplus.dtbo \ + hifiberry-dacplus-pro.dtbo \ + hifiberry-dacplus-std.dtbo \ + hifiberry-dacplusadc.dtbo \ + hifiberry-dacplusadcpro.dtbo \ + hifiberry-dacplusdsp.dtbo \ + hifiberry-dacplushd.dtbo \ + hifiberry-digi.dtbo \ + hifiberry-digi-pro.dtbo \ + hifiberry-studio-dac8x.dtbo \ + hifiberry-studio-dac8x-pro.dtbo \ + highperi.dtbo \ + hy28a.dtbo \ + hy28b.dtbo \ + hy28b-2017.dtbo \ + i-sabre-q2m.dtbo \ + i2c-bcm2708.dtbo \ + i2c-fan.dtbo \ + i2c-gpio.dtbo \ + i2c-mux.dtbo \ + i2c-pwm-pca9685a.dtbo \ + i2c-rtc.dtbo \ + i2c-rtc-gpio.dtbo \ + i2c-sensor.dtbo \ + i2c0.dtbo \ + i2c0-pi5.dtbo \ + i2c1.dtbo \ + i2c1-pi5.dtbo \ + i2c2-pi5.dtbo \ + i2c3.dtbo \ + i2c3-pi5.dtbo \ + i2c4.dtbo \ + i2c5.dtbo \ + i2c6.dtbo \ + i2s-dac.dtbo \ + i2s-gpio28-31.dtbo \ + i2s-master-dac.dtbo \ + ilitek-ts-i2c.dtbo \ + ilitek251x.dtbo \ + imx219.dtbo \ + imx258.dtbo \ + imx283.dtbo \ + imx290.dtbo \ + imx296.dtbo \ + imx327.dtbo \ + imx335.dtbo \ + imx378.dtbo \ + imx415.dtbo \ + imx462.dtbo \ + imx477.dtbo \ + imx500.dtbo \ + imx500-pi5.dtbo \ + imx519.dtbo \ + imx708.dtbo \ + interludeaudio-analog.dtbo \ + interludeaudio-digital.dtbo \ + iqaudio-codec.dtbo \ + iqaudio-dac.dtbo \ + iqaudio-dacplus.dtbo \ + iqaudio-digi-wm8804-audio.dtbo \ + iqs550.dtbo \ + irs1125.dtbo \ + jedec-spi-nor.dtbo \ + justboom-both.dtbo \ + justboom-dac.dtbo \ + justboom-digi.dtbo \ + ltc294x.dtbo \ + max98357a.dtbo \ + maxtherm.dtbo \ + mbed-dac.dtbo \ + mcp23017.dtbo \ + mcp23s17.dtbo \ + mcp2515.dtbo \ + mcp2515-can0.dtbo \ + mcp2515-can1.dtbo \ + mcp251xfd.dtbo \ + mcp3008.dtbo \ + mcp3202.dtbo \ + mcp342x.dtbo \ + media-center.dtbo \ + merus-amp.dtbo \ + midi-uart0.dtbo \ + midi-uart0-pi5.dtbo \ + midi-uart1.dtbo \ + midi-uart1-pi5.dtbo \ + midi-uart2.dtbo \ + midi-uart2-pi5.dtbo \ + midi-uart3.dtbo \ + midi-uart3-pi5.dtbo \ + midi-uart4.dtbo \ + midi-uart4-pi5.dtbo \ + midi-uart5.dtbo \ + minipitft13.dtbo \ + miniuart-bt.dtbo \ + mipi-dbi-spi.dtbo \ + mira220.dtbo \ + mlx90640.dtbo \ + mmc.dtbo \ + mz61581.dtbo \ + nospi10.dtbo \ + ov2311.dtbo \ + ov5647.dtbo \ + ov64a40.dtbo \ + ov7251.dtbo \ + ov9281.dtbo \ + papirus.dtbo \ + pca953x.dtbo \ + pcf857x.dtbo \ + pcie-32bit-dma.dtbo \ + pcie-32bit-dma-pi5.dtbo \ + pciex1-compat-pi5.dtbo \ + pibell.dtbo \ + pifacedigital.dtbo \ + pifi-40.dtbo \ + pifi-dac-hd.dtbo \ + pifi-dac-zero.dtbo \ + pifi-mini-210.dtbo \ + piglow.dtbo \ + pimidi.dtbo \ + pineboards-hat-ai.dtbo \ + pineboards-hatdrive-poe-plus.dtbo \ + piscreen.dtbo \ + piscreen2r.dtbo \ + pisound.dtbo \ + pisound-micro.dtbo \ + pisound-pi5.dtbo \ + pitft22.dtbo \ + pitft28-capacitive.dtbo \ + pitft28-resistive.dtbo \ + pitft35-resistive.dtbo \ + pivision.dtbo \ + pps-gpio.dtbo \ + pps-rp1.dtbo \ + proto-codec.dtbo \ + pwm.dtbo \ + pwm-2chan.dtbo \ + pwm-gpio.dtbo \ + pwm-gpio-fan.dtbo \ + pwm-ir-tx.dtbo \ + pwm-pio.dtbo \ + pwm1.dtbo \ + qca7000.dtbo \ + qca7000-uart0.dtbo \ + ramoops.dtbo \ + ramoops-pi4.dtbo \ + rootmaster.dtbo \ + rotary-encoder.dtbo \ + rpi-backlight.dtbo \ + rpi-codeczero.dtbo \ + rpi-dacplus.dtbo \ + rpi-dacpro.dtbo \ + rpi-digiampplus.dtbo \ + rpi-ft5406.dtbo \ + rpi-fw-uart.dtbo \ + rpi-poe.dtbo \ + rpi-poe-plus.dtbo \ + rpi-power-hat-b.dtbo \ + rpi-power-hat-t.dtbo \ + rpi-sense.dtbo \ + rpi-sense-v2.dtbo \ + rpi-tv.dtbo \ + rra-digidac1-wm8741-audio.dtbo \ + sainsmart18.dtbo \ + sc16is750-i2c.dtbo \ + sc16is752-i2c.dtbo \ + sc16is75x-spi.dtbo \ + sdhost.dtbo \ + sdio.dtbo \ + sdio-pi5.dtbo \ + seeed-can-fd-hat-v1.dtbo \ + seeed-can-fd-hat-v2.dtbo \ + sh1106-spi.dtbo \ + si446x-spi0.dtbo \ + smi.dtbo \ + smi-dev.dtbo \ + smi-nand.dtbo \ + spi-gpio35-39.dtbo \ + spi-gpio40-45.dtbo \ + spi-rtc.dtbo \ + spi0-0cs.dtbo \ + spi0-1cs.dtbo \ + spi0-1cs-inverted.dtbo \ + spi0-2cs.dtbo \ + spi1-1cs.dtbo \ + spi1-2cs.dtbo \ + spi1-3cs.dtbo \ + spi2-1cs.dtbo \ + spi2-1cs-pi5.dtbo \ + spi2-2cs.dtbo \ + spi2-2cs-pi5.dtbo \ + spi2-3cs.dtbo \ + spi3-1cs.dtbo \ + spi3-1cs-pi5.dtbo \ + spi3-2cs.dtbo \ + spi3-2cs-pi5.dtbo \ + spi4-1cs.dtbo \ + spi4-2cs.dtbo \ + spi5-1cs.dtbo \ + spi5-1cs-pi5.dtbo \ + spi5-2cs.dtbo \ + spi5-2cs-pi5.dtbo \ + spi6-1cs.dtbo \ + spi6-2cs.dtbo \ + ssd1306.dtbo \ + ssd1306-spi.dtbo \ + ssd1327-spi.dtbo \ + ssd1331-spi.dtbo \ + ssd1351-spi.dtbo \ + sunfounder-pipower3.dtbo \ + sunfounder-pironman5.dtbo \ + superaudioboard.dtbo \ + sx150x.dtbo \ + tc358743.dtbo \ + tc358743-audio.dtbo \ + tc358743-pi5.dtbo \ + tinylcd35.dtbo \ + tpm-slb9670.dtbo \ + tpm-slb9673.dtbo \ + uart0.dtbo \ + uart0-pi5.dtbo \ + uart1.dtbo \ + uart1-pi5.dtbo \ + uart2.dtbo \ + uart2-pi5.dtbo \ + uart3.dtbo \ + uart3-pi5.dtbo \ + uart4.dtbo \ + uart4-pi5.dtbo \ + uart5.dtbo \ + udrc.dtbo \ + ugreen-dabboard.dtbo \ + upstream.dtbo \ + upstream-pi4.dtbo \ + vc4-fkms-v3d.dtbo \ + vc4-fkms-v3d-pi4.dtbo \ + vc4-kms-dpi-generic.dtbo \ + vc4-kms-dpi-hyperpixel2r.dtbo \ + vc4-kms-dpi-hyperpixel4.dtbo \ + vc4-kms-dpi-hyperpixel4sq.dtbo \ + vc4-kms-dpi-panel.dtbo \ + vc4-kms-dsi-7inch.dtbo \ + vc4-kms-dsi-generic.dtbo \ + vc4-kms-dsi-ili79600-10-1inch.dtbo \ + vc4-kms-dsi-ili9881-5inch.dtbo \ + vc4-kms-dsi-ili9881-7inch.dtbo \ + vc4-kms-dsi-lt070me05000.dtbo \ + vc4-kms-dsi-lt070me05000-v2.dtbo \ + vc4-kms-dsi-waveshare-800x480.dtbo \ + vc4-kms-dsi-waveshare-panel.dtbo \ + vc4-kms-dsi-waveshare-panel-v2.dtbo \ + vc4-kms-kippah-7inch.dtbo \ + vc4-kms-v3d.dtbo \ + vc4-kms-v3d-pi4.dtbo \ + vc4-kms-v3d-pi5.dtbo \ + vc4-kms-vga666.dtbo \ + vd55g1.dtbo \ + vd56g3.dtbo \ + vd65g4.dtbo \ + vd66gy.dtbo \ + vec-gpio-pi5.dtbo \ + vga666.dtbo \ + vl805.dtbo \ + w1-gpio.dtbo \ + w1-gpio-pi5.dtbo \ + w1-gpio-pullup.dtbo \ + w1-gpio-pullup-pi5.dtbo \ + w5500.dtbo \ + watterott-display.dtbo \ + waveshare-can-fd-hat-mode-a.dtbo \ + waveshare-can-fd-hat-mode-b.dtbo \ + wifimac.dtbo \ + wittypi.dtbo \ + wm8960-soundcard.dtbo \ + ws2812-pio.dtbo + +targets += dtbs dtbs_install +targets += $(dtbo-y) + +always-y := $(dtbo-y) +clean-files := *.dtbo diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README new file mode 100644 index 00000000000000..18e0a02b3c52d1 --- /dev/null +++ b/arch/arm/boot/dts/overlays/README @@ -0,0 +1,6268 @@ +Introduction +============ + +This directory contains Device Tree overlays. Device Tree makes it possible +to support many hardware configurations with a single kernel and without the +need to explicitly load or blacklist kernel modules. Note that this isn't a +"pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices +are still configured by the board support code, but the intention is to +eventually reach that goal. + +On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By +default, the Raspberry Pi kernel boots with device tree enabled. You can +completely disable DT usage (for now) by adding: + + device_tree= + +to your config.txt, which should cause your Pi to revert to the old way of +doing things after a reboot. + +In /boot you will find a .dtb for each base platform. This describes the +hardware that is part of the Raspberry Pi board. The loader (start.elf and its +siblings) selects the .dtb file appropriate for the platform by name, and reads +it into memory. At this point, all of the optional interfaces (i2c, i2s, spi) +are disabled, but they can be enabled using Device Tree parameters: + + dtparam=i2c=on,i2s=on,spi=on + +However, this shouldn't be necessary in many use cases because loading an +overlay that requires one of those interfaces will cause it to be enabled +automatically, and it is advisable to only enable interfaces if they are +needed. + +Configuring additional, optional hardware is done using Device Tree overlays +(see below). + +GPIO numbering uses the hardware pin numbering scheme (aka BCM scheme) and +not the physical pin numbers. + +raspi-config +============ + +The Advanced Options section of the raspi-config utility can enable and disable +Device Tree use, as well as toggling the I2C and SPI interfaces. Note that it +is possible to both enable an interface and blacklist the driver, if for some +reason you should want to defer the loading. + +Modules +======= + +As well as describing the hardware, Device Tree also gives enough information +to allow suitable driver modules to be located and loaded, with the corollary +that unneeded modules are not loaded. As a result it should be possible to +remove lines from /etc/modules, and /etc/modprobe.d/raspi-blacklist.conf can +have its contents deleted (or commented out). + +Using Overlays +============== + +Overlays are loaded using the "dtoverlay" config.txt setting. As an example, +consider I2C Real Time Clock drivers. In the pre-DT world these would be loaded +by writing a magic string comprising a device identifier and an I2C address to +a special file in /sys/bus/i2c/devices, having first loaded the driver for +the I2C interface and the RTC device - something like this: + + modprobe i2c-bcm2835 + modprobe rtc-ds1307 + echo ds1307 0x68 > /sys/bus/i2c/devices/i2c-1/new_device + +With DT enabled, this becomes a line in config.txt: + + dtoverlay=i2c-rtc,ds1307 + +This causes the file /boot/overlays/i2c-rtc.dtbo to be loaded and a "node" +describing the DS1307 I2C device to be added to the Device Tree for the Pi. By +default it usees address 0x68, but this can be modified with an additional DT +parameter: + + dtoverlay=i2c-rtc,ds1307,addr=0x68 + +Parameters usually have default values, although certain parameters are +mandatory. See the list of overlays below for a description of the parameters +and their defaults. + +Making new Overlays based on existing Overlays +============================================== + +Recent overlays have been designed in a more general way, so that they can be +adapted to hardware by changing their parameters. When you have additional +hardware with more than one device of a kind, you end up using the same overlay +multiple times with other parameters, e.g. + + # 2 CAN FD interfaces on spi but with different pins + dtoverlay=mcp251xfd,spi0-0,interrupt=25 + dtoverlay=mcp251xfd,spi0-1,interrupt=24 + + # a realtime clock on i2c + dtoverlay=i2c-rtc,pcf85063 + +While this approach does work, it requires knowledge about the hardware design. +It is more feasible to simplify things for the end user by providing a single +overlay as it is done the traditional way. + +A new overlay can be generated by using ovmerge utility. +https://github.com/raspberrypi/utils/blob/master/ovmerge/ovmerge + +To generate an overlay for the above configuration we pass the configuration +to ovmerge and add the -c flag. + + ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 \ + mcp251xfd-overlay.dts,spi0-1,interrupt=24 \ + i2c-rtc-overlay.dts,pcf85063 \ + >> merged-overlay.dts + +The -c option writes the command above as a comment into the overlay as +a marker that this overlay is generated and how it was generated. +After compiling the overlay it can be loaded in a single line. + + dtoverlay=merged + +It does the same as the original configuration but without parameters. + +The Overlay and Parameter Reference +=================================== + +N.B. When editing this file, please preserve the indentation levels to make it +simple to parse programmatically. NO HARD TABS. + + +Name: +Info: Configures the base Raspberry Pi hardware +Load: +Params: + act_led_trigger Choose which activity the LED tracks. + Use "heartbeat" for a nice load indicator. + (default "mmc") + + act_led_activelow Set to "on" to invert the sense of the LED + (default "off") + N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led + overlay. + + act_led_gpio Set which GPIO to use for the activity LED + (in case you want to connect it to an external + device) + (default "16" on a non-Plus board, "47" on a + Plus or Pi 2) + N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led + overlay. + + ant1 Select antenna 1 (default). CM4/5 only. + + ant2 Select antenna 2. CM4/5 only. + + noant Disable both antennas. CM4/5 only. + + noanthogs Disable the GPIO hogs on the antenna controls + so they can be controlled at runtime. Note that + using this parameter without suitable OS + support will result in attenuated WiFi and + Bluetooth signals. CM4/5 only. + + audio Set to "on" to enable the onboard ALSA audio + interface (default "off") + + axiperf Set to "on" to enable the AXI bus performance + monitors. + See /sys/kernel/debug/raspberrypi_axi_monitor + for the results. + + bdaddr Set an alternative Bluetooth address (BDADDR). + The value should be a 6-byte hexadecimal value, + with or without colon separators, written least- + significant-byte first. For example, + bdaddr=06:05:04:03:02:01 + will set the BDADDR to 01:02:03:04:05:06. + + button_debounce Set the debounce delay (in ms) on the power/ + shutdown button (default 50ms) + + cam0_reg Controls CAM 0 regulator. + Disabled by default on CM1 & 3. + Enabled by default on all other boards. + + cam0_reg_gpio Set GPIO for CAM 0 regulator. + NB override switches to the normal GPIO driver, + even if the original was on the GPIO expander. + + cam1_reg Controls CAM 1 regulator. + Disabled by default on CM1 & 3. + Enabled by default on all other boards. + + cam1_reg_gpio Set GPIO for CAM 1 regulator. + NB override switches to the normal GPIO driver, + even if the original was on the GPIO expander. + + cam0_sync Enable a GPIO to reflect frame sync from CSI0, + going high on frame start, and low on frame end. + + cam0_sync_inverted Enable a GPIO to reflect frame sync from CSI0 + going low on frame start, and high on frame end. + + cam1_sync Enable a GPIO to reflect frame sync from CSI1, + going high on frame start, and low on frame end. + + cam1_sync_inverted Enable a GPIO to reflect frame sync from CSI1 + going low on frame start, and high on frame end. + + cooling_fan Enables the Pi 5 cooling fan (enabled + automatically by the firmware) + + drm_fb0_rp1_dpi Assign /dev/fb0 to the RP1 DPI output + + drm_fb0_rp1_dsi0 Assign /dev/fb0 to the RP1 DSI0 output + + drm_fb0_rp1_dsi1 Assign /dev/fb0 to the RP1 DSI1 output + + drm_fb0_vc4 Assign /dev/fb0 to the vc4 outputs + + drm_fb1_rp1_dpi Assign /dev/fb1 to the RP1 DPI output + + drm_fb1_rp1_dsi0 Assign /dev/fb1 to the RP1 DSI0 output + + drm_fb1_rp1_dsi1 Assign /dev/fb1 to the RP1 DSI1 output + + drm_fb1_vc4 Assign /dev/fb1 to the vc4 outputs + + drm_fb2_rp1_dpi Assign /dev/fb2 to the RP1 DPI output + + drm_fb2_rp1_dsi0 Assign /dev/fb2 to the RP1 DSI0 output + + drm_fb2_rp1_dsi1 Assign /dev/fb2 to the RP1 DSI1 output + + drm_fb2_vc4 Assign /dev/fb2 to the vc4 outputs + + eee Enable Energy Efficient Ethernet support for + compatible devices (default "on"). See also + "tx_lpi_timer". Pi3B+ only. + + enable_eeprom Set to "on" to enable the onboard bootloader + EEPROM by driving GPIO 57 low + (default "off"). CM4S only. + + eth_downshift_after Set the number of auto-negotiation failures + after which the 1000Mbps modes are disabled. + Legal values are 2, 3, 4, 5 and 0, where + 0 means never downshift (default 2). Pi3B+ only. + + eth_led0 Set mode of LED0 - amber on Pi3B+ (default "1"), + green on Pi4/5 (default "0"). + The legal values are: + + Pi3B+ + + 0=link/activity 1=link1000/activity + 2=link100/activity 3=link10/activity + 4=link100/1000/activity 5=link10/1000/activity + 6=link10/100/activity 14=off 15=on + + Pi4/5 + + 0=Speed/Activity 1=Speed + 2=Flash activity 3=FDX + 4=Off 5=On + 6=Alt 7=Speed/Flash + 8=Link 9=Activity + + eth_led1 Set mode of LED1 - green on Pi3B+ (default "6"), + amber on Pi4/5 (default "8"). See eth_led0 for + legal values. + + eth_max_speed Set the maximum speed a link is allowed + to negotiate. Legal values are 10, 100 and + 1000 (default set by the platform). Pi3B+, + Pi4, Pi400, CM4, Pi5, Pi500, and CM5 only. + + fan_temp0 Temperature threshold (in millicelcius) for + 1st cooling level (default 50000). Pi5 only. + fan_temp0_hyst Temperature hysteresis (in millicelcius) for + 1st cooling level (default 5000). Pi5 only. + fan_temp0_speed Fan PWM setting for 1st cooling level (0-255, + default 75). Pi5 only. + fan_temp1 Temperature threshold (in millicelcius) for + 2nd cooling level (default 60000). Pi5 only. + fan_temp1_hyst Temperature hysteresis (in millicelcius) for + 2nd cooling level (default 5000). Pi5 only. + fan_temp1_speed Fan PWM setting for 2nd cooling level (0-255, + default 125). Pi5 only. + fan_temp2 Temperature threshold (in millicelcius) for + 3rd cooling level (default 67500). Pi5 only. + fan_temp2_hyst Temperature hysteresis (in millicelcius) for + 3rd cooling level (default 5000). Pi5 only. + fan_temp2_speed Fan PWM setting for 3rd cooling level (0-255, + default 175). Pi5 only. + fan_temp3 Temperature threshold (in millicelcius) for + 4th cooling level (default 75000). Pi5 only. + fan_temp3_hyst Temperature hysteresis (in millicelcius) for + 4th cooling level (default 5000). Pi5 only. + fan_temp3_speed Fan PWM setting for 4th cooling level (0-255, + default 250). Pi5 only. + + hdmi Set to "off" to disable the HDMI interface + (default "on") + + i2c An alias for i2c_arm + + i2c_arm Set to "on" to enable the ARM's i2c interface + (default "off") + + i2c_arm_baudrate Set the baudrate of the ARM's i2c interface + (default "100000") + + i2c_baudrate An alias for i2c_arm_baudrate + + i2c_csi_dsi Set to "on" to enable the i2c_csi_dsi interface + The I2C bus and GPIOs are platform specific: + B rev 1: + i2c-1 on 2 & 3 + B rev 2, B+, CM, Zero, Zero W, 2B, CM2, CM3, + CM4S: + i2c-0 on 28 & 29 + 3B, 3B+, Zero 2W, 4B, 400, CM4: + i2c-0 on 44 & 45 + 5, 500: + i2c-11/i2c-4 on 40 & 41 + CM5 on CM5IO: + i2c-0 on 0 & 1 + CM5 on CM4IO: + i2c-10/i2c-6 on 38 & 39 + + i2c_csi_dsi0 Set to "on" to enable the i2c_csi_dsi0 interface + The I2C bus and GPIOs are platform specific: + B rev 1 & 2, B+, CM, Zero, Zero W, 2B, CM2, + CM3, CM4S, 3B, 3B+, Zero 2W, 4B, 400, CM4, + CM5 on CM4IO: + i2c-0 on 0 & 1 + 5, 500, CM5 on CM5IO: + i2c-10/i2c-6 on 38 & 39 + + i2c_csi_dsi1 A Pi 5 family-specific alias for i2c_csi_dsi. + + i2c_vc Set to "on" to enable the i2c interface + usually reserved for the VideoCore processor + (default "off") + + i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface + (default "100000") + + i2s Set to "on" to enable the i2s interface + (default "off") + + i2s_dma4 Use to enable 40-bit DMA on the i2s interface + (the assigned value doesn't matter) + (2711 only) + + krnbt Set to "off" to disable autoprobing of Bluetooth + driver without need of hciattach/btattach + (default "on") + + krnbt_baudrate Set the baudrate of the PL011 UART when used + with krnbt=on + + nvme Alias for "pciex1" (2712 only) + + nvmem_cust_rw Allow read/write access to customer otp + + nvmem_mac_rw Allow read/write access to mac addresses otp + + nvmem_priv_rw Allow read/write access to customer private otp + + pcie Set to "off" to disable the PCIe interface + (default "on") + (2711 only, but not applicable on CM4S) + N.B. USB-A ports on 4B are subsequently disabled + + pcie_tperst_clk_ms Add N milliseconds between PCIe reference clock + activation and PERST# deassertion + (CM4 and 2712, default "0") + + pciex1 Set to "on" to enable the external PCIe link + (2712 only, default "off") + + pciex1_gen Sets the PCIe "GEN"/speed for the external PCIe + link (2712 only, default "2") + + pciex1_no_l0s Set to "on" to disable ASPM L0s on the external + PCIe link for devices that have broken + implementations (2712 only, default "off") + + pciex1_tperst_clk_ms Alias for pcie_tperst_clk_ms + (2712 only, default "0") + + pwr_led_trigger + pwr_led_activelow + pwr_led_gpio + As for act_led_*, but using the PWR LED. + Not available on Model A/B boards. + + random Set to "on" to enable the hardware random + number generator (default "on") + + rtc Set to "off" to disable the onboard Real Time + Clock (2712 only, default "on") + + rtc_bbat_vchg Set the RTC backup battery charging voltage in + microvolts. If set to 0 or not specified, the + trickle charger is disabled. + (2712 only, default "0") + + sd Set to "off" to disable the SD card (or eMMC on + non-lite SKU of CM4/5). + (default "on") + + sd_cqe Modify Command Queuing behaviour on the main SD + interface. Legal values are: + 0: disable CQ + 1: allow CQ for known-good SD A2 cards, and all + eMMC cards + 2: allow CQ for all SD A2 cards that aren't + known-bad, and all eMMC cards. + (2712 only, default "1") + + sd_overclock Clock (in MHz) to use when the MMC framework + requests 50MHz + + sd_poll_once Looks for a card once after booting. Useful + for network booting scenarios to avoid the + overhead of continuous polling. N.B. Using + this option restricts the system to using a + single card per boot (or none at all). + (default off) + + sd_force_pio Disable DMA support for SD driver (default off) + + sd_pio_limit Number of blocks above which to use DMA for + SD card (default 1) + + sd_debug Enable debug output from SD driver (default off) + + sdio_overclock Clock (in MHz) to use when the MMC framework + requests 50MHz for the SDIO/WLAN interface. + + spi Set to "on" to enable the spi interfaces + (default "off") + + spi_dma4 Use to enable 40-bit DMA on spi interfaces + (the assigned value doesn't matter) + (2711 only) + + strict_gpiod Return GPIOs to inputs when they are released. + If using the gpiod utilities, it is necessary + to keep a gpioset running (e.g. with + --mode=wait) in order for an output value to + persist. + + suspend Make the power button trigger a suspend rather + than a power-off (2712 only, default "off") + + tx_lpi_timer Set the delay in microseconds between going idle + and entering the low power state (default 600). + Requires EEE to be enabled - see "eee". + + uart0 Set to "off" to disable uart0 (default "on") + + uart0_console Move the kernel boot console to UART0 on pins + 6, 8 and 10 of the 40-way header (2712 only, + default "off") + + uart0_dma Enable DMA usage on UART0 (2712 only, default + "off") + + uart1 Set to "on" or "off" to enable or disable uart1 + (default varies) + + watchdog Set to "off" to disable the hardware watchdog + (default "on") + + wifiaddr Set an alternative WiFi MAC address. + The value should be a 6-byte hexadecimal value, + with or without colon separators, written in the + natural (big-endian) order. + + N.B. It is recommended to only enable those interfaces that are needed. + Leaving all interfaces enabled can lead to unwanted behaviour (i2c_vc + interfering with Pi Camera, I2S and SPI hogging GPIO pins, etc.) + Note also that i2c, i2c_arm and i2c_vc are aliases for the physical + interfaces i2c0 and i2c1. Use of the numeric variants is still possible + but deprecated because the ARM/VC assignments differ between board + revisions. The same board-specific mapping applies to i2c_baudrate, + and the other i2c baudrate parameters. + + +Name: act-led +Info: Pi 3B, 3B+, 3A+ and 4B use a GPIO expander to drive the LEDs which can + only be accessed from the VPU. There is a special driver for this with a + separate DT node, which has the unfortunate consequence of breaking the + act_led_gpio and act_led_activelow dtparams. + This overlay changes the GPIO controller back to the standard one and + restores the dtparams. +Load: dtoverlay=act-led,= +Params: activelow Set to "on" to invert the sense of the LED + (default "off") + + gpio Set which GPIO to use for the activity LED + (in case you want to connect it to an external + device) + REQUIRED + + +Name: adafruit-st7735r +Info: Overlay for the SPI-connected Adafruit 1.8" 160x128 or 128x128 displays, + based on the ST7735R chip. + This overlay uses the newer DRM/KMS "Tiny" driver. +Load: dtoverlay=adafruit-st7735r,= +Params: 128x128 Select the 128x128 driver (default 160x128) + rotate Display rotation {0,90,180,270} (default 90) + speed SPI bus speed in Hz (default 4000000) + dc_pin GPIO pin for D/C (default 24) + reset_pin GPIO pin for RESET (default 25) + led_pin GPIO used to control backlight (default 18) + + +Name: adafruit18 +Info: Overlay for the SPI-connected Adafruit 1.8" display (based on the + ST7735R chip). It includes support for the "green tab" version. + This overlay uses the older fbtft driver. +Load: dtoverlay=adafruit18,= +Params: green Use the adafruit18_green variant. + rotate Display rotation {0,90,180,270} + speed SPI bus speed in Hz (default 4000000) + fps Display frame rate in Hz + bgr Enable BGR mode (default off) + debug Debug output level {0-7} + dc_pin GPIO pin for D/C (default 24) + reset_pin GPIO pin for RESET (default 25) + led_pin GPIO used to control backlight (default 18) + + +Name: adau1977-adc +Info: Overlay for activation of ADAU1977 ADC codec over I2C for control + and I2S for data. +Load: dtoverlay=adau1977-adc +Params: + + +Name: adau7002-simple +Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter. +Load: dtoverlay=adau7002-simple,= +Params: card-name Override the default, "adau7002", card name. + + +Name: ads1015 +Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C +Load: dtoverlay=ads1015,= +Params: addr I2C bus address of device. Set based on how the + addr pin is wired. (default=0x48 assumes addr + is pulled to GND) + cha_enable Enable virtual channel a. (default=true) + cha_cfg Set the configuration for virtual channel a. + (default=4 configures this channel for the + voltage at A0 with respect to GND) + cha_datarate Set the datarate (samples/sec) for this channel. + (default=4 sets 1600 sps) + cha_gain Set the gain of the Programmable Gain + Amplifier for this channel. (default=2 sets the + full scale of the channel to 2.048 Volts) + + Channel (ch) parameters can be set for each enabled channel. + A maximum of 4 channels can be enabled (letters a thru d). + For more information refer to the device datasheet at: + http://www.ti.com/lit/ds/symlink/ads1015.pdf + + +Name: ads1115 +Info: Texas Instruments ADS1115 ADC +Load: dtoverlay=ads1115,[=] +Params: addr I2C bus address of device. Set based on how the + addr pin is wired. (default=0x48 assumes addr + is pulled to GND) + i2c-bus Supports all the standard I2C bus selection + parameters - see "dtoverlay -h i2c-bus" + cha_enable Enable virtual channel a. + cha_cfg Set the configuration for virtual channel a. + (default=4 configures this channel for the + voltage at A0 with respect to GND) + cha_datarate Set the datarate (samples/sec) for this channel. + (default=7 sets 860 sps) + cha_gain Set the gain of the Programmable Gain + Amplifier for this channel. (Default 1 sets the + full scale of the channel to 4.096 Volts) + + Channel parameters can be set for each enabled channel. + A maximum of 4 channels can be enabled (letters a thru d). + For more information refer to the device datasheet at: + http://www.ti.com/lit/ds/symlink/ads1115.pdf + + +Name: ads7846 +Info: ADS7846 Touch controller +Load: dtoverlay=ads7846,= +Params: cs SPI bus Chip Select (default 1) + speed SPI bus speed (default 2MHz, max 3.25MHz) + penirq GPIO used for PENIRQ. REQUIRED + penirq_pull Set GPIO pull (default 0=none, 2=pullup) + swapxy Swap x and y axis + xmin Minimum value on the X axis (default 0) + ymin Minimum value on the Y axis (default 0) + xmax Maximum value on the X axis (default 4095) + ymax Maximum value on the Y axis (default 4095) + pmin Minimum reported pressure value (default 0) + pmax Maximum reported pressure value (default 65535) + xohms Touchpanel sensitivity (X-plate resistance) + (default 400) + invx Invert x axis + invy Invert y axis + + penirq is required and usually xohms (60-100) has to be set as well. + Apart from that, pmax (255) and swapxy are also common. + The rest of the calibration can be done with xinput-calibrator. + See: github.com/notro/fbtft/wiki/FBTFT-on-Raspian + Device Tree binding document: + www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt + + +Name: adv7282m +Info: Analog Devices ADV7282M analogue video to CSI2 bridge. + Uses Unicam1, which is the standard camera connector on most Pi + variants. +Load: dtoverlay=adv7282m,= +Params: addr Overrides the I2C address (default 0x21) + media-controller Configure use of Media Controller API for + configuring the sensor (default off) + + +Name: adv728x-m +Info: Analog Devices ADV728[0|1|2]-M analogue video to CSI2 bridges. + This is a wrapper for adv7282m, and defaults to ADV7282M. +Load: dtoverlay=adv728x-m,= +Params: addr Overrides the I2C address (default 0x21) + adv7280m Select ADV7280-M. + adv7281m Select ADV7281-M. + adv7281ma Select ADV7281-MA. + media-controller Configure use of Media Controller API for + configuring the sensor (default off) + + +Name: akkordion-iqdacplus +Info: Configures the Digital Dreamtime Akkordion Music Player (based on the + OEM IQAudIO DAC+ or DAC Zero module). +Load: dtoverlay=akkordion-iqdacplus,= +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec + Digital volume control. Enable with + dtoverlay=akkordion-iqdacplus,24db_digital_gain + (The default behaviour is that the Digital + volume control is limited to a maximum of + 0dB. ie. it can attenuate but not provide + gain. For most users, this will be desired + as it will prevent clipping. By appending + the 24db_digital_gain parameter, the Digital + volume control will allow up to 24dB of + gain. If this parameter is enabled, it is the + responsibility of the user to ensure that + the Digital volume control is set to a value + that does not result in clipping/distortion!) + + +Name: allo-boss-dac-pcm512x-audio +Info: Configures the Allo Boss DAC audio cards. +Load: dtoverlay=allo-boss-dac-pcm512x-audio, +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec + Digital volume control. Enable with + "dtoverlay=allo-boss-dac-pcm512x-audio, + 24db_digital_gain" + (The default behaviour is that the Digital + volume control is limited to a maximum of + 0dB. ie. it can attenuate but not provide + gain. For most users, this will be desired + as it will prevent clipping. By appending + the 24db_digital_gain parameter, the Digital + volume control will allow up to 24dB of + gain. If this parameter is enabled, it is the + responsibility of the user to ensure that + the Digital volume control is set to a value + that does not result in clipping/distortion!) + slave Force Boss DAC into slave mode, using Pi a + master for bit clock and frame clock. Enable + with "dtoverlay=allo-boss-dac-pcm512x-audio, + slave" + + +Name: allo-boss2-dac-audio +Info: Configures the Allo Boss2 DAC audio card +Load: dtoverlay=allo-boss2-dac-audio +Params: + + +Name: allo-digione +Info: Configures the Allo Digione audio card +Load: dtoverlay=allo-digione +Params: + + +Name: allo-katana-dac-audio +Info: Configures the Allo Katana DAC audio card +Load: dtoverlay=allo-katana-dac-audio +Params: + + +Name: allo-piano-dac-pcm512x-audio +Info: Configures the Allo Piano DAC (2.0/2.1) audio cards. + (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo. + The subwoofer outputs on the Piano 2.1 are not currently supported!) +Load: dtoverlay=allo-piano-dac-pcm512x-audio, +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec + Digital volume control. + (The default behaviour is that the Digital + volume control is limited to a maximum of + 0dB. ie. it can attenuate but not provide + gain. For most users, this will be desired + as it will prevent clipping. By appending + the 24db_digital_gain parameter, the Digital + volume control will allow up to 24dB of + gain. If this parameter is enabled, it is the + responsibility of the user to ensure that + the Digital volume control is set to a value + that does not result in clipping/distortion!) + + +Name: allo-piano-dac-plus-pcm512x-audio +Info: Configures the Allo Piano DAC (2.1) audio cards. +Load: dtoverlay=allo-piano-dac-plus-pcm512x-audio, +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec + Digital volume control. + (The default behaviour is that the Digital + volume control is limited to a maximum of + 0dB. ie. it can attenuate but not provide + gain. For most users, this will be desired + as it will prevent clipping. By appending + the 24db_digital_gain parameter, the Digital + volume control will allow up to 24dB of + gain. If this parameter is enabled, it is the + responsibility of the user to ensure that + the Digital volume control is set to a value + that does not result in clipping/distortion!) + glb_mclk This option is only with Kali board. If enabled, + MCLK for Kali is used and PLL is disabled for + better voice quality. (default Off) + + +Name: anyspi +Info: Universal device tree overlay for SPI devices + + Just specify the SPI address and device name ("compatible" property). + This overlay lacks any device-specific parameter support! + + For devices on spi1 or spi2, the interfaces should be enabled + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays. + + Examples: + 1. SPI NOR flash on spi0.1, maximum SPI clock frequency 45MHz: + dtoverlay=anyspi:spi0-1,dev="jedec,spi-nor",speed=45000000 + 2. MCP3204 ADC on spi1.2, maximum SPI clock frequency 500kHz: + dtoverlay=anyspi:spi1-2,dev="microchip,mcp3204" +Load: dtoverlay=anyspi,= +Params: spi- Configure device at spi, cs + (boolean, required) + dev Set device name to search compatible module + (string, required) + speed Set SPI clock frequency in Hz + (integer, optional, default 500000) + + +Name: apds9960 +Info: Configures the AVAGO APDS9960 digital proximity, ambient light, RGB and + gesture sensor +Load: dtoverlay=apds9960,= +Params: gpiopin GPIO used for INT (default 4) + noints Disable the interrupt GPIO line. + + +Name: applepi-dac +Info: Configures the Orchard Audio ApplePi-DAC audio card +Load: dtoverlay=applepi-dac +Params: + + +Name: arducam-64mp +Info: Arducam 64MP camera module. + Uses Unicam 1, which is the standard camera connector on most Pi + variants. +Load: dtoverlay=arducam-64mp,= +Params: rotation Mounting rotation of the camera sensor (0 or + 180, default 0) + orientation Sensor orientation (0 = front, 1 = rear, + 2 = external, default external) + media-controller Configure use of Media Controller API for + configuring the sensor (default on) + cam0 Adopt the default configuration for CAM0 on a + Compute Module (CSI0, i2c_vc, and cam0_reg). + vcm Select lens driver state. Default is enabled, + but vcm=off will disable. + + +Name: arducam-pivariety +Info: Arducam Pivariety camera module. + Uses Unicam 1, which is the standard camera connector on most Pi + variants. +Load: dtoverlay=arducam-pivariety,= +Params: rotation Mounting rotation of the camera sensor (0 or + 180, default 0) + orientation Sensor orientation (0 = front, 1 = rear, + 2 = external, default external) + media-controller Configure use of Media Controller API for + configuring the sensor (default on) + cam0 Adopt the default configuration for CAM0 on a + Compute Module (CSI0, i2c_vc, and cam0_reg). + + +Name: at86rf233 +Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver, + connected to spi0.0 +Load: dtoverlay=at86rf233,= +Params: interrupt GPIO used for INT (default 23) + reset GPIO used for Reset (default 24) + sleep GPIO used for Sleep (default 25) + speed SPI bus speed in Hz (default 3000000) + trim Fine tuning of the internal capacitance + arrays (0=+0pF, 15=+4.5pF, default 15) + + +Name: audioinjector-addons +Info: Configures the audioinjector.net audio add on soundcards +Load: dtoverlay=audioinjector-addons,= +Params: non-stop-clocks Keeps the clocks running even when the stream + is paused or stopped (default off) + + +Name: audioinjector-bare-i2s +Info: Configures the audioinjector.net audio bare i2s soundcard +Load: dtoverlay=audioinjector-bare-i2s +Params: + + +Name: audioinjector-isolated-soundcard +Info: Configures the audioinjector.net isolated soundcard +Load: dtoverlay=audioinjector-isolated-soundcard +Params: + + +Name: audioinjector-ultra +Info: Configures the audioinjector.net ultra soundcard +Load: dtoverlay=audioinjector-ultra +Params: + + +Name: audioinjector-wm8731-audio +Info: Configures the audioinjector.net audio add on soundcard +Load: dtoverlay=audioinjector-wm8731-audio +Params: + + +Name: audiosense-pi +Info: Configures the audiosense-pi add on soundcard + For more information refer to + https://gitlab.com/kakar0t/audiosense-pi +Load: dtoverlay=audiosense-pi +Params: + + +Name: audremap +Info: Switches PWM sound output to GPIOs on the 40-pin header +Load: dtoverlay=audremap,= +Params: swap_lr Reverse the channel allocation, which will also + swap the audio jack outputs (default off) + enable_jack Don't switch off the audio jack output. Does + nothing on BCM2711 (default off) + pins_12_13 Select GPIOs 12 & 13 (default) + pins_18_19 Select GPIOs 18 & 19 + pins_40_41 Select GPIOs 40 & 41 (not available on CM4, used + for other purposes) + pins_40_45 Select GPIOs 40 & 45 (don't use on BCM2711 - the + pins are on different controllers) + pins_none Effectively disable audio, useful if the pins + are needed for something else. + + +Name: audremap-pi5 +Info: On Raspberry Pi 5 / 500 /CM5, enable digital audio output + and route it to GPIOs 12 & 13 on the 40-pin header +Load: dtoverlay=audremap-pi5,= +Params: swap_lr Reverse the channel allocation (default off) + pins_12_13 Select GPIOs 12 & 13 (default) + pins_18_19 Not available; this will not enable audio out + pins_40_41 Not available; this will not enable audio out + pins_40_45 Not available; this will not enable audio out + + +Name: balena-fin +Info: Overlay that enables WLAN, Bluetooth and the GPIO expander on the + balenaFin carrier board for the Raspberry Pi Compute Module 3/3+ Lite. +Load: dtoverlay=balena-fin +Params: + + +Name: bcm2712d0 +Info: Overlay encapsulating the BCM2712 C0->D0 differences +Load: dtoverlay=bcm2712d0 +Params: + + +Name: bmp085_i2c-sensor +Info: This overlay is now deprecated - see i2c-sensor +Load: + + +Name: camera-mux-2port +Info: Configures a 2 port camera multiplexer + Note that currently ALL IMX290 modules share a common clock, therefore + all modules will need to have the same clock frequency. +Load: dtoverlay=camera-mux-2port,= +Params: cam0-arducam-64mp Select Arducam64MP for camera on port 0 + cam0-imx219 Select IMX219 for camera on port 0 + cam0-imx258 Select IMX258 for camera on port 0 + cam0-imx290 Select IMX290 for camera on port 0 + cam0-imx477 Select IMX477 for camera on port 0 + cam0-imx519 Select IMX519 for camera on port 0 + cam0-imx708 Select IMX708 for camera on port 0 + cam0-ov2311 Select OV2311 for camera on port 0 + cam0-ov5647 Select OV5647 for camera on port 0 + cam0-ov64a40 Select OV64A40 for camera on port 0 + cam0-ov7251 Select OV7251 for camera on port 0 + cam0-ov9281 Select OV9281 for camera on port 0 + cam0-imx290-clk-freq Set clock frequency for an IMX290 on port 0 + cam1-arducam-64mp Select Arducam64MP for camera on port 1 + cam1-imx219 Select IMX219 for camera on port 1 + cam1-imx258 Select IMX258 for camera on port 1 + cam1-imx290 Select IMX290 for camera on port 1 + cam1-imx477 Select IMX477 for camera on port 1 + cam1-imx519 Select IMX519 for camera on port 1 + cam1-imx708 Select IMX708 for camera on port 1 + cam1-ov2311 Select OV2311 for camera on port 1 + cam1-ov5647 Select OV5647 for camera on port 1 + cam1-ov64a40 Select OV64A40 for camera on port 1 + cam1-ov7251 Select OV7251 for camera on port 1 + cam1-ov9281 Select OV9281 for camera on port 1 + cam1-imx290-clk-freq Set clock frequency for an IMX290 on port 1 + cam0-sync-source Set camera on port 0 as vsync source + cam0-sync-sink Set camera on port 0 as vsync sink + cam1-sync-source Set camera on port 1 as vsync source + cam1-sync-sink Set camera on port 1 as vsync sink + + cam0 Connect the mux to CAM0 port (default is CAM1) + + +Name: camera-mux-4port +Info: Configures a 4 port camera multiplexer + Note that currently ALL IMX290 modules share a common clock, therefore + all modules will need to have the same clock frequency. +Load: dtoverlay=camera-mux-4port,= +Params: cam0-arducam-64mp Select Arducam64MP for camera on port 0 + cam0-imx219 Select IMX219 for camera on port 0 + cam0-imx258 Select IMX258 for camera on port 0 + cam0-imx290 Select IMX290 for camera on port 0 + cam0-imx477 Select IMX477 for camera on port 0 + cam0-imx519 Select IMX519 for camera on port 0 + cam0-imx708 Select IMX708 for camera on port 0 + cam0-ov2311 Select OV2311 for camera on port 0 + cam0-ov5647 Select OV5647 for camera on port 0 + cam0-ov64a40 Select OV64A40 for camera on port 0 + cam0-ov7251 Select OV7251 for camera on port 0 + cam0-ov9281 Select OV9281 for camera on port 0 + cam0-imx290-clk-freq Set clock frequency for an IMX290 on port 0 + cam1-arducam-64mp Select Arducam64MP for camera on port 1 + cam1-imx219 Select IMX219 for camera on port 1 + cam1-imx258 Select IMX258 for camera on port 1 + cam1-imx290 Select IMX290 for camera on port 1 + cam1-imx477 Select IMX477 for camera on port 1 + cam1-imx519 Select IMX519 for camera on port 1 + cam1-imx708 Select IMX708 for camera on port 1 + cam1-ov2311 Select OV2311 for camera on port 1 + cam1-ov5647 Select OV5647 for camera on port 1 + cam1-ov64a40 Select OV64A40 for camera on port 1 + cam1-ov7251 Select OV7251 for camera on port 1 + cam1-ov9281 Select OV9281 for camera on port 1 + cam1-imx290-clk-freq Set clock frequency for an IMX290 on port 1 + cam2-arducam-64mp Select Arducam64MP for camera on port 2 + cam2-imx219 Select IMX219 for camera on port 2 + cam2-imx258 Select IMX258 for camera on port 2 + cam2-imx290 Select IMX290 for camera on port 2 + cam2-imx477 Select IMX477 for camera on port 2 + cam2-imx519 Select IMX519 for camera on port 2 + cam2-imx708 Select IMX708 for camera on port 2 + cam2-ov2311 Select OV2311 for camera on port 2 + cam2-ov5647 Select OV5647 for camera on port 2 + cam2-ov64a40 Select OV64A40 for camera on port 2 + cam2-ov7251 Select OV7251 for camera on port 2 + cam2-ov9281 Select OV9281 for camera on port 2 + cam2-imx290-clk-freq Set clock frequency for an IMX290 on port 2 + cam3-arducam-64mp Select Arducam64MP for camera on port 3 + cam3-imx219 Select IMX219 for camera on port 3 + cam3-imx258 Select IMX258 for camera on port 3 + cam3-imx290 Select IMX290 for camera on port 3 + cam3-imx477 Select IMX477 for camera on port 3 + cam3-imx519 Select IMX519 for camera on port 3 + cam3-imx708 Select IMX708 for camera on port 3 + cam3-ov2311 Select OV2311 for camera on port 3 + cam3-ov5647 Select OV5647 for camera on port 3 + cam3-ov64a40 Select OV64A40 for camera on port 3 + cam3-ov7251 Select OV7251 for camera on port 3 + cam3-ov9281 Select OV9281 for camera on port 3 + cam3-imx290-clk-freq Set clock frequency for an IMX290 on port 3 + cam0-sync-source Set camera on port 0 as vsync source + cam0-sync-sink Set camera on port 0 as vsync sink + cam1-sync-source Set camera on port 1 as vsync source + cam1-sync-sink Set camera on port 1 as vsync sink + cam2-sync-source Set camera on port 2 as vsync source + cam2-sync-sink Set camera on port 2 as vsync sink + cam3-sync-source Set camera on port 3 as vsync source + cam3-sync-sink Set camera on port 3 as vsync sink + + cam0 Connect the mux to CAM0 port (default is CAM1) + + +Name: cap1106 +Info: Enables the ability to use the cap1106 touch sensor as a keyboard +Load: dtoverlay=cap1106,= +Params: int_pin GPIO pin for interrupt signal (default 23) + + +Name: chipcap2 +Info: Enables the Chipcap 2 humidity and temperature sensor. This device + provides low and high humidity alarms and requires a 3V3 dedicated + regulator to operate. +Load: dtoverlay=chipcap2,= +Params: ready_pin GPIO pin for ready signal (default 4) + + low_pin GPIO pin for low humidity signal (default 5) + + high_pin GPIO pin for high humidity signal (default 6) + + reg_pin GPIO pin to control the dedicated regulator + that powers the device (default 26) + + +Name: chipdip-dac +Info: Configures Chip Dip audio cards. +Load: dtoverlay=chipdip-dac +Params: + + +Name: cirrus-wm5102 +Info: Configures the Cirrus Logic Audio Card +Load: dtoverlay=cirrus-wm5102 +Params: + + +Name: cm-swap-i2c0 +Info: Largely for Compute Modules 1&3 where the original instructions for + adding a camera used GPIOs 0&1 for CAM1 and 28&29 for CAM0, whilst all + other platforms use 28&29 (or 44&45) for CAM1. + The default assignment through using this overlay is for + i2c0 to use 28&29, and i2c10 (aka i2c_csi_dsi) to use 28&29, but the + overrides allow this to be changed. +Load: dtoverlay=cm-swap-i2c0,= +Params: i2c0-gpio0 Use GPIOs 0&1 for i2c0 + i2c0-gpio28 Use GPIOs 28&29 for i2c0 (default) + i2c0-gpio44 Use GPIOs 44&45 for i2c0 + i2c10-gpio0 Use GPIOs 0&1 for i2c0 (default) + i2c10-gpio28 Use GPIOs 28&29 for i2c0 + i2c10-gpio44 Use GPIOs 44&45 for i2c0 + + +Name: cma +Info: Set custom CMA sizes, only use if you know what you are doing, might + clash with other overlays like vc4-fkms-v3d and vc4-kms-v3d. +Load: dtoverlay=cma,= +Params: cma-512 CMA is 512MB (needs 1GB) + cma-448 CMA is 448MB (needs 1GB) + cma-384 CMA is 384MB (needs 1GB) + cma-320 CMA is 320MB (needs 1GB) + cma-256 CMA is 256MB (needs 1GB) + cma-192 CMA is 192MB (needs 1GB) + cma-128 CMA is 128MB + cma-96 CMA is 96MB + cma-64 CMA is 64MB + cma-size CMA size in bytes, 4MB aligned + cma-default Use upstream's default value + + +Name: crystalfontz-cfa050_pi_m +Info: Configures the Crystalfontz CFA050-PI-M series of Raspberry Pi CM4 + and CM5 based modules using the CFA7201280A0_050Tx 7" TFT LCD displays, + with or without capacitive touch screen. + Requires use of vc4-kms-v3d. +Load: dtoverlay=crystalfontz-cfa050_pi_m,= +Params: captouch Enable capacitive touch display + cm5 Enable support for the Raspberry Pi CM5 + + +Name: cutiepi-panel +Info: 8" TFT LCD display and touch panel used by cutiepi.io +Load: dtoverlay=cutiepi-panel +Params: + + +Name: dacberry400 +Info: Configures the dacberry400 add on soundcard +Load: dtoverlay=dacberry400 +Params: + + +Name: dht11 +Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors + Also sometimes found with the part number(s) AM230x. +Load: dtoverlay=dht11,= +Params: gpiopin GPIO connected to the sensor's DATA output. + (default 4) + + +Name: dionaudio-kiwi +Info: Configures the Dion Audio KIWI STREAMER +Load: dtoverlay=dionaudio-kiwi +Params: + + +Name: dionaudio-loco +Info: Configures the Dion Audio LOCO DAC-AMP +Load: dtoverlay=dionaudio-loco +Params: + + +Name: dionaudio-loco-v2 +Info: Configures the Dion Audio LOCO-V2 DAC-AMP +Load: dtoverlay=dionaudio-loco-v2,= +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec + Digital volume control. Enable with + "dtoverlay=hifiberry-dacplus,24db_digital_gain" + (The default behaviour is that the Digital + volume control is limited to a maximum of + 0dB. ie. it can attenuate but not provide + gain. For most users, this will be desired + as it will prevent clipping. By appending + the 24dB_digital_gain parameter, the Digital + volume control will allow up to 24dB of + gain. If this parameter is enabled, it is the + responsibility of the user to ensure that + the Digital volume control is set to a value + that does not result in clipping/distortion!) + + +Name: disable-bt +Info: Disable onboard Bluetooth on Bluetooth-capable Raspberry Pis. On Pis + prior to Pi 5 this restores UART0/ttyAMA0 over GPIOs 14 & 15. +Load: dtoverlay=disable-bt +Params: + + +Name: disable-bt-pi5 +Info: See disable-bt + + +Name: disable-emmc2 +Info: Disable EMMC2 controller on BCM2711. + The allows the onboard EMMC storage on Compute Module 4 to be disabled + e.g. if a fault has occurred. +Load: dtoverlay=disable-emmc2 +Params: + + +Name: disable-wifi +Info: Disable onboard WLAN on WiFi-capable Raspberry Pis. +Load: dtoverlay=disable-wifi +Params: + + +Name: disable-wifi-pi5 +Info: See disable-wifi + + +Name: dpi18 +Info: Overlay for a generic 18-bit DPI display + This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output + 2-3 seconds after the kernel has started. +Load: dtoverlay=dpi18 +Params: + + +Name: dpi18cpadhi +Info: Overlay for a generic 18-bit DPI display (in 'mode 6' connection scheme) + This uses GPIOs 0-9,12-17,20-25 (so no I2C, uart etc.), and activates + the output 3-3 seconds after the kernel has started. +Load: dtoverlay=dpi18cpadhi +Params: + + +Name: dpi24 +Info: Overlay for a generic 24-bit DPI display + This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output + 2-3 seconds after the kernel has started. +Load: dtoverlay=dpi24 +Params: + + +Name: draws +Info: Configures the NW Digital Radio DRAWS Hat + + The board includes an ADC to measure various board values and also + provides two analog user inputs on the expansion header. The ADC + can be configured for various sample rates and gain values to adjust + the input range. Tables describing the two parameters follow. + + ADC Gain Values: + 0 = +/- 6.144V + 1 = +/- 4.096V + 2 = +/- 2.048V + 3 = +/- 1.024V + 4 = +/- 0.512V + 5 = +/- 0.256V + 6 = +/- 0.256V + 7 = +/- 0.256V + + ADC Datarate Values: + 0 = 128sps + 1 = 250sps + 2 = 490sps + 3 = 920sps + 4 = 1600sps (default) + 5 = 2400sps + 6 = 3300sps + 7 = 3300sps +Load: dtoverlay=draws,= +Params: draws_adc_ch4_gain Sets the full scale resolution of the ADCs + input voltage sensor (default 1) + + draws_adc_ch4_datarate Sets the datarate of the ADCs input voltage + sensor + + draws_adc_ch5_gain Sets the full scale resolution of the ADCs + 5V rail voltage sensor (default 1) + + draws_adc_ch5_datarate Sets the datarate of the ADCs 4V rail voltage + sensor + + draws_adc_ch6_gain Sets the full scale resolution of the ADCs + AIN2 input (default 2) + + draws_adc_ch6_datarate Sets the datarate of the ADCs AIN2 input + + draws_adc_ch7_gain Sets the full scale resolution of the ADCs + AIN3 input (default 2) + + draws_adc_ch7_datarate Sets the datarate of the ADCs AIN3 input + + alsaname Name of the ALSA audio device (default "draws") + + +Name: dwc-otg +Info: The dwc-otg has been deprecated. +Load: + + +Name: dwc-otg-deprecated +Info: The dwc-otg has been deprecated. +Load: + + +Name: dwc2 +Info: Selects the dwc2 USB controller driver +Load: dtoverlay=dwc2,= +Params: dr_mode Dual role mode: "host", "peripheral" or "otg" + + g-rx-fifo-size Size of rx fifo size in gadget mode + + g-np-tx-fifo-size Size of non-periodic tx fifo size in gadget + mode + + +[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ] + + +Name: edt-ft5406 +Info: Overlay for the EDT FT5406 touchscreen. + This works with the Raspberry Pi 7" touchscreen when not being polled + by the firmware. + By default the overlay uses the i2c_csi_dsi I2C interface, but this + can be overridden + You MUST use either "disable_touchscreen=1" or "ignore_lcd=1" in + config.txt to stop the firmware polling the touchscreen. +Load: dtoverlay=edt-ft5406,= +Params: sizex Touchscreen size x (default 800) + sizey Touchscreen size y (default 480) + invx Touchscreen inverted x axis + invy Touchscreen inverted y axis + swapxy Touchscreen swapped x y axis + addr Sets the address for the touch controller. Note + that the device must be configured to use the + specified address. + i2c-bus Supports all the standard I2C bus selection + parameters - see "dtoverlay -h i2c-bus" + + +Name: enc28j60 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI0 +Load: dtoverlay=enc28j60,= +Params: int_pin GPIO used for INT (default 25) + + speed SPI bus speed (default 12000000) + + +Name: enc28j60-spi2 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI2 +Load: dtoverlay=enc28j60-spi2,= +Params: int_pin GPIO used for INT (default 39) + + speed SPI bus speed (default 12000000) + + +Name: exc3000 +Info: Enables I2C connected EETI EXC3000 multiple touch controller using + GPIO 4 (pin 7 on GPIO header) for interrupt. +Load: dtoverlay=exc3000,= +Params: interrupt GPIO used for interrupt (default 4) + sizex Touchscreen size x (default 4096) + sizey Touchscreen size y (default 4096) + invx Touchscreen inverted x axis + invy Touchscreen inverted y axis + swapxy Touchscreen swapped x y axis + + +Name: ezsound-6x8iso +Info: Overlay for the ezsound 6x8 isolated soundcard. +Load: dtoverlay=ezsound-6x8iso +Params: + + +Name: fbtft +Info: Overlay for SPI-connected displays using the fbtft drivers. + + This overlay seeks to replace the functionality provided by fbtft_device + which is now gone from the kernel. + + Most displays from fbtft_device have been ported over. + Example: + dtoverlay=fbtft,spi0-0,rpi-display,reset_pin=23,dc_pin=24,led_pin=18,rotate=270 + + It is also possible to specify the controller (this will use the default + init sequence in the driver). + Example: + dtoverlay=fbtft,spi0-0,ili9341,bgr,reset_pin=23,dc_pin=24,led_pin=18,rotate=270 + + For devices on spi1 or spi2, the interfaces should be enabled + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays. + + The following features of fbtft_device have not been ported over: + - parallel bus is not supported + - the init property which overrides the controller initialization + sequence is not supported as a parameter due to memory limitations in + the bootloader responsible for applying the overlay. + + See https://github.com/notro/fbtft/wiki/FBTFT-RPI-overlays for how to + create an overlay. + +Load: dtoverlay=fbtft,= +Params: + spi- Configure device at spi, cs + (boolean, required) + speed SPI bus speed in Hz (default 32000000) + cpha Shifted clock phase (CPHA) mode + cpol Inverse clock polarity (CPOL) mode + + adafruit18 Adafruit 1.8 + adafruit22 Adafruit 2.2 (old) + adafruit22a Adafruit 2.2 + adafruit28 Adafruit 2.8 + adafruit13m Adafruit 1.3 OLED + admatec_c-berry28 C-Berry28 + dogs102 EA DOGS102 + er_tftm050_2 ER-TFTM070-2 + er_tftm070_5 ER-TFTM070-5 + ew24ha0 EW24HA0 + ew24ha0_9bit EW24HA0 in 9-bit mode + freetronicsoled128 Freetronics OLED128 + hy28a HY28A + hy28b HY28B + itdb28_spi ITDB02-2.8 with SPI interface circuit + mi0283qt-2 Watterott MI0283QT-2 + mi0283qt-9a Watterott MI0283QT-9A + nokia3310 Nokia 3310 + nokia3310a Nokia 3310a + nokia5110 Nokia 5110 + piscreen PiScreen + pitft Adafruit PiTFT 2.8 + pioled ILSoft OLED + rpi-display Watterott rpi-display + sainsmart18 Sainsmart 1.8 + sainsmart32_spi Sainsmart 3.2 with SPI interfce circuit + tinylcd35 TinyLCD 3.5 + tm022hdh26 Tianma TM022HDH26 + tontec35_9481 Tontect 3.5 with ILI9481 controller + tontec35_9486 Tontect 3.5 with ILI9486 controller + waveshare32b Waveshare 3.2 + waveshare22 Waveshare 2.2 + + bd663474 BD663474 display controller + hx8340bn HX8340BN display controller + hx8347d HX8347D display controller + hx8353d HX8353D display controller + hx8357d HX8357D display controller + ili9163 ILI9163 display controller + ili9320 ILI9320 display controller + ili9325 ILI9325 display controller + ili9340 ILI9340 display controller + ili9341 ILI9341 display controller + ili9481 ILI9481 display controller + ili9486 ILI9486 display controller + pcd8544 PCD8544 display controller + ra8875 RA8875 display controller + s6d02a1 S6D02A1 display controller + s6d1121 S6D1121 display controller + seps525 SEPS525 display controller + sh1106 SH1106 display controller + ssd1289 SSD1289 display controller + ssd1305 SSD1305 display controller + ssd1306 SSD1306 display controller + ssd1325 SSD1325 display controller + ssd1331 SSD1331 display controller + ssd1351 SSD1351 display controller + st7735r ST7735R display controller + st7789v ST7789V display controller + tls8204 TLS8204 display controller + uc1611 UC1611 display controller + uc1701 UC1701 display controller + upd161704 UPD161704 display controller + + width Display width in pixels + height Display height in pixels + regwidth Display controller register width (default is + driver specific) + buswidth Display bus interface width (default 8) + debug Debug output level {0-7} + rotate Display rotation {0, 90, 180, 270} (counter + clockwise). Not supported by all drivers. + bgr Enable BGR mode (default off). Use if Red and + Blue are swapped. Not supported by all drivers. + fps Frames per second (default 30). In effect this + states how long the driver will wait after video + memory has been changed until display update + transfer is started. + txbuflen Length of the FBTFT transmit buffer + (default 4096) + startbyte Sets the Start byte used by fb_ili9320, + fb_ili9325 and fb_hx8347d. Common value is 0x70. + gamma String representation of Gamma Curve(s). Driver + specific. Not supported by all drivers. + reset_pin GPIO pin for RESET + dc_pin GPIO pin for D/C + led_pin GPIO pin for LED backlight + + +Name: fe-pi-audio +Info: Configures the Fe-Pi Audio Sound Card +Load: dtoverlay=fe-pi-audio +Params: + + +Name: fsm-demo +Info: A demonstration of the gpio-fsm driver. The GPIOs are chosen to work + nicely with a "traffic-light" display of red, amber and green LEDs on + GPIOs 7, 8 and 25 respectively. +Load: dtoverlay=fsm-demo,= +Params: fsm_debug Enable debug logging (default off) + + +Name: gc9a01 +Info: Enables GalaxyCore's GC9A01 single chip driver based displays on + SPI0 as fb1, using GPIOs DC=25, RST=27 and BL=18 (physical + GPIO header pins 22, 13 and 12 respectively) in addition to the + SPI0 pins DIN=10, CLK=11 and CS=8 (physical GPIO header pins 19, + 23 and 24 respectively). +Load: dtoverlay=gc9a01,= +Params: speed Display SPI bus speed + + rotate Display rotation {0,90,180,270} + + width Width of the display + + height Height of the display + + fps Delay between frame updates + + debug Debug output level {0-7} + + +Name: ghost-amp +Info: An overlay for the Ghost amplifier. +Load: dtoverlay=ghost-amp,= +Params: fsm_debug Enable debug logging of the GPIO FSM (default + off) + + +Name: goodix +Info: Enables I2C connected Goodix gt9271 multiple touch controller using + GPIOs 4 and 17 (pins 7 and 11 on GPIO header) for interrupt and reset. +Load: dtoverlay=goodix,= +Params: addr I2C address (default 0x14) + interrupt GPIO used for interrupt (default 4) + reset GPIO used for reset (default 17) + i2c-path Override I2C path to allow for i2c-gpio buses + + +Name: googlevoicehat-soundcard +Info: Configures the Google voiceHAT soundcard +Load: dtoverlay=googlevoicehat-soundcard +Params: + + +Name: gpio-charger +Info: This is a generic overlay for detecting charger with GPIO. +Load: dtoverlay=gpio-charger,= +Params: gpio GPIO pin to trigger on (default 4) + active_low When this is 1 (active low), a falling + edge generates a charging event and a + rising edge generates a discharging event. + When this is 0 (active high), this is + reversed. The default is 0 (active high) + gpio_pull Desired pull-up/down state (off, down, up) + Default is "down". + type Set a charger type for the pin. (Default: mains) + + +Name: gpio-fan +Info: Configure a GPIO pin to control a cooling fan. +Load: dtoverlay=gpio-fan,= +Params: gpiopin GPIO used to control the fan (default 12) + temp Temperature at which the fan switches on, in + millicelcius (default 55000) + hyst Temperature delta (in millicelcius) below + temp at which the fan will drop to minrpm + (default 10000) + + +Name: gpio-hog +Info: Activate a "hog" for a GPIO - request that the kernel configures it as + an output, driven low or high as indicated by the presence or absence + of the active_low parameter. Note that a hogged GPIO is not available + to other drivers or for gpioset/gpioget. +Load: dtoverlay=gpio-hog,= +Params: gpio GPIO pin to hog (default 26) + active_low If set, the hog drives the GPIO low (defaults + to off - the GPIO is driven high) + + +Name: gpio-ir +Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core- + based gpio_ir_recv driver maps received keys directly to a + /dev/input/event* device, all decoding is done by the kernel - LIRC is + not required! The key mapping and other decoding parameters can be + configured by "ir-keytable" tool. +Load: dtoverlay=gpio-ir,= +Params: gpio_pin Input pin number. Default is 18. + + gpio_pull Desired pull-up/down state (off, down, up) + Default is "up". + + invert "1" = invert the input (active-low signalling). + "0" = non-inverted input (active-high + signalling). Default is "1". + + rc-map-name Default rc keymap (can also be changed by + ir-keytable), defaults to "rc-rc6-mce" + + +Name: gpio-ir-tx +Info: Use GPIO pin as bit-banged infrared transmitter output. + This is an alternative to "pwm-ir-tx". gpio-ir-tx doesn't require + a PWM so it can be used together with onboard analog audio. +Load: dtoverlay=gpio-ir-tx,= +Params: gpio_pin Output GPIO (default 18) + + invert "1" = invert the output (make it active-low). + Default is "0" (active-high). + + +Name: gpio-key +Info: This is a generic overlay for activating GPIO keypresses using + the gpio-keys library and this dtoverlay. Multiple keys can be + set up using multiple calls to the overlay for configuring + additional buttons or joysticks. You can see available keycodes + at https://github.com/torvalds/linux/blob/v4.12/include/uapi/ + linux/input-event-codes.h#L64 +Load: dtoverlay=gpio-key,= +Params: gpio GPIO pin to trigger on (default 3) + active_low When this is 1 (active low), a falling + edge generates a key down event and a + rising edge generates a key up event. + When this is 0 (active high), this is + reversed. The default is 1 (active low) + gpio_pull Desired pull-up/down state (off, down, up) + Default is "up". Note that the default pin + (GPIO3) has an external pullup + label Set a label for the key + keycode Set the key code for the button + autorepeat Set the key to autorepeat + + + +Name: gpio-led +Info: This is a generic overlay for activating LEDs (or any other component) + by a GPIO pin. Multiple LEDs can be set up using multiple calls to the + overlay. While there are many existing methods to activate LEDs on the + RPi, this method offers some advantages: + 1) Does not require any userspace programs. + 2) LEDs can be connected to the kernel's led-trigger framework, + and drive the LED based on triggers such as cpu load, heartbeat, + kernel panic, key input, timers and others. + 3) LED can be tied to the input state of another GPIO pin. + 4) The LED is setup early during the kernel boot process (useful + for cpu/heartbeat/panic triggers). + + Typical electrical connection is: + RPI-GPIO.19 -> LED -> 300ohm resister -> RPI-GND + The GPIO pin number can be changed with the 'gpio=' parameter. + + To control an LED from userspace, write a 0 or 1 value: + echo 1 > /sys/class/leds/myled1/brightness + The 'myled1' name can be changed with the 'label=' parameter. + + To connect the LED to a kernel trigger from userspace: + echo cpu > /sys/class/leds/myled1/trigger + echo heartbeat > /sys/class/leds/myled1/trigger + echo none > /sys/class/leds/myled1/trigger + To connect the LED to GPIO.26 pin (physical pin 37): + echo gpio > /sys/class/leds/myled1/trigger + echo 26 > /sys/class/leds/myled1/gpio + Available triggers: + cat /sys/class/leds/myled1/trigger + + More information about the Linux kernel LED/Trigger system: + https://www.kernel.org/doc/Documentation/leds/leds-class.rst + https://www.kernel.org/doc/Documentation/leds/ledtrig-oneshot.rst +Load: dtoverlay=gpio-led,= +Params: gpio GPIO pin connected to the LED (default 19) + label The label for this LED. It will appear under + /sys/class/leds/