ESP32C6: Generic RV32 audit in ThreadX

[alieissa-commits]

Goal: Verify that ThreadX’s existing 32-bit RISC-V CPU code is truly generic and doesn't contain hidden CPU-specific assumptions.

Deliver:

• An audit of the generic RV32 GNU context, interrupt, timer, and stack-frame assumptions against the ESP32-C6 CPU.
• Generic RV32 fixes only where the problem applies beyond the ESP32-C6.
• Regression tests for every generic port change.

Exit criterion: the generic port continues to build and pass its existing QEMU and other example tests, with new regression coverage for changed behavior.