STM32H7B3I-DK PLL3 VCO output exceeds 560MHz limit

[sirius506]

STM32H7B3I-BK BSP LCD driver sets PLL3 VCO output to 800MHz.
I know it works, but Data sheet says maximum value is 560MHz.

STM32CubeH7/Drivers/BSP/STM32H7B3I-DK/stm32h7b3i_discovery_lcd.c

Lines 437 to 450 in 91d4c89

	/* RK043FN48H LCD clock configuration */
	/* LCD clock configuration */
	/* PLL3_VCO Input = HSE_VALUE/PLL3M = 4 Mhz */
	/* PLL3_VCO Output = PLL3_VCO Input * PLL3N = 800 Mhz */
	/* PLLLCDCLK = PLL3_VCO Output/PLL3R = 800/83 = 9.63 Mhz */
	/* LTDC clock frequency = PLLLCDCLK = 9.63 Mhz */
	PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
	PeriphClkInitStruct.PLL3.PLL3M = 6;
	PeriphClkInitStruct.PLL3.PLL3N = 200;
	PeriphClkInitStruct.PLL3.PLL3P = 10;
	PeriphClkInitStruct.PLL3.PLL3Q = 10;
	PeriphClkInitStruct.PLL3.PLL3R = 83;
	PeriphClkInitStruct.PLL3.PLL3VCOSEL = 0;
	PeriphClkInitStruct.PLL3.PLL3FRACN = 0;

[TOUNSTM]

Hello @sirius506,

Sorry for the delayed response. Could you please send me the document in which you find this information?

With regards,

[sirius506]

Please refer STM32H7B3I datasheet Table 55 on page 112. It says PLL VCO output max freq is 560MHz.

You can also try to set above listed PLL3 settings on the CubeMX clock config screen, then you'll see it responds with error indication (DIVN3 = 200 is too big).

[TOUNSTM]

ST Internal Reference: 177140

[ALABSTM]

Hi @sirius506,

Issue fixed in the frame of release 1.13.0. Thank you for your patience and thank you again for having reported.

With regards,