From fb23281b9b17127b18e9deadfcd33fd94afc0236 Mon Sep 17 00:00:00 2001 From: Caio DaSilva Date: Sat, 30 May 2026 13:32:57 -0400 Subject: [PATCH 1/4] handling resetting latching faults --- Core/Inc/can_messages_rx.h | 250 +++++++++-------- Core/Inc/u_can.h | 2 +- Core/Inc/u_statemachine.h | 1 + Core/Src/can_messages_rx.c | 525 ++++++++++++++++++++---------------- Core/Src/u_inbox.c | 4 +- Core/Src/u_statemachine.c | 14 +- Drivers/Odyssey-Definitions | 2 +- 7 files changed, 454 insertions(+), 344 deletions(-) diff --git a/Core/Inc/can_messages_rx.h b/Core/Inc/can_messages_rx.h index 8d274c1..7d66480 100644 --- a/Core/Inc/can_messages_rx.h +++ b/Core/Inc/can_messages_rx.h @@ -14,6 +14,12 @@ #include "fdcan.h" #include "bitstream.h" +typedef struct { + uint8_t button_id; +} wheel_buttons_t; + +void receive_wheel_buttons(const can_msg_t *message, wheel_buttons_t *wheel_buttons); + typedef struct { float temp; float humidity; @@ -129,46 +135,82 @@ typedef struct { void receive_back_msb_orientation(const can_msg_t *message, back_msb_orientation_t *back_msb_orientation); typedef struct { - float current_target_ac; -} ac_current_command_t; + uint8_t pwm_duty; +} shepherd_bms_fan_percent_t; -void receive_ac_current_command(const can_msg_t *message, ac_current_command_t *ac_current_command); +void receive_shepherd_bms_fan_percent(const can_msg_t *message, shepherd_bms_fan_percent_t *shepherd_bms_fan_percent); typedef struct { - float brake_ac_current; -} brake_current_command_t; + uint8_t state; +} dashboard_efuse_state_t; -void receive_brake_current_command(const can_msg_t *message, brake_current_command_t *brake_current_command); +void receive_dashboard_efuse_state(const can_msg_t *message, dashboard_efuse_state_t *dashboard_efuse_state); typedef struct { - float max_current_ac_target; -} max_ac_current_command_t; + uint8_t state; +} brake_efuse_state_t; -void receive_max_ac_current_command(const can_msg_t *message, max_ac_current_command_t *max_ac_current_command); +void receive_brake_efuse_state(const can_msg_t *message, brake_efuse_state_t *brake_efuse_state); typedef struct { - float max_ac_brake_current_target; -} max_ac_brake_current_command_t; + uint8_t state; +} shutdown_efuse_state_t; -void receive_max_ac_brake_current_command(const can_msg_t *message, max_ac_brake_current_command_t *max_ac_brake_current_command); +void receive_shutdown_efuse_state(const can_msg_t *message, shutdown_efuse_state_t *shutdown_efuse_state); typedef struct { - float max_dc_current_target; -} max_dc_current_command_t; + uint8_t state; +} lv_efuse_state_t; -void receive_max_dc_current_command(const can_msg_t *message, max_dc_current_command_t *max_dc_current_command); +void receive_lv_efuse_state(const can_msg_t *message, lv_efuse_state_t *lv_efuse_state); typedef struct { - float max_dc_brake_current_target; -} max_dc_brake_current_command_t; + uint8_t state; +} radfan_efuse_state_t; -void receive_max_dc_brake_current_command(const can_msg_t *message, max_dc_brake_current_command_t *max_dc_brake_current_command); +void receive_radfan_efuse_state(const can_msg_t *message, radfan_efuse_state_t *radfan_efuse_state); typedef struct { - uint8_t drive_enable; -} drive_enable_command_t; + uint8_t state; +} fanbatt_efuse_state_t; -void receive_drive_enable_command(const can_msg_t *message, drive_enable_command_t *drive_enable_command); +void receive_fanbatt_efuse_state(const can_msg_t *message, fanbatt_efuse_state_t *fanbatt_efuse_state); + +typedef struct { + uint8_t state; +} pumpone_efuse_state_t; + +void receive_pumpone_efuse_state(const can_msg_t *message, pumpone_efuse_state_t *pumpone_efuse_state); + +typedef struct { + uint8_t state; +} pumptwo_efuse_state_t; + +void receive_pumptwo_efuse_state(const can_msg_t *message, pumptwo_efuse_state_t *pumptwo_efuse_state); + +typedef struct { + uint8_t state; +} battbox_efuse_state_t; + +void receive_battbox_efuse_state(const can_msg_t *message, battbox_efuse_state_t *battbox_efuse_state); + +typedef struct { + uint8_t state; +} mc_efuse_state_t; + +void receive_mc_efuse_state(const can_msg_t *message, mc_efuse_state_t *mc_efuse_state); + +typedef struct { + uint8_t state; +} spare_efuse_state_t; + +void receive_spare_efuse_state(const can_msg_t *message, spare_efuse_state_t *spare_efuse_state); + +typedef struct { + uint8_t command; +} rtds_command_message_t; + +void receive_rtds_command_message(const can_msg_t *message, rtds_command_message_t *rtds_command_message); typedef struct { uint16_t ADC; @@ -294,7 +336,6 @@ void receive_spare_efuse(const can_msg_t *message, spare_efuse_t *spare_efuse); typedef struct { bool bms_gpio; bool bots_gpio; - bool spare_gpio; bool bspd_gpio; bool hv_c; bool hvd_gpio; @@ -373,7 +414,6 @@ typedef struct { bool CAN_INCOMING_FAULT; bool BMS_CAN_MONITOR_FAULT; bool LIGHTNING_CAN_MONITOR_FAULT; - bool SHUTDOWN_FAULT; bool ONBOARD_TEMP_FAULT; bool IMU_ACCEL_FAULT; bool IMU_GYRO_FAULT; @@ -385,6 +425,8 @@ typedef struct { bool ONBOARD_PEDAL_DIFFERENCE_FAULT; bool RTDS_FAULT; bool LV_LOW_VOLTAGE_FAULT; + bool PRECHARGE_FLOATING_FAULT; + bool LATCHING_ACTIVE_FAULT; } faults_t; void receive_faults(const can_msg_t *message, faults_t *faults); @@ -485,87 +527,16 @@ typedef struct { bool ACCEL_SC; bool ACCEL_DIFF; bool BSPD_PREF; + bool BMS_NOT_PRECHARGED_YET; } drive_lock_states_t; void receive_drive_lock_states(const can_msg_t *message, drive_lock_states_t *drive_lock_states); typedef struct { - uint8_t pwm_duty; -} shepherd_bms_fan_percent_t; - -void receive_shepherd_bms_fan_percent(const can_msg_t *message, shepherd_bms_fan_percent_t *shepherd_bms_fan_percent); - -typedef struct { - uint8_t state; -} dashboard_efuse_state_t; - -void receive_dashboard_efuse_state(const can_msg_t *message, dashboard_efuse_state_t *dashboard_efuse_state); - -typedef struct { - uint8_t state; -} brake_efuse_state_t; - -void receive_brake_efuse_state(const can_msg_t *message, brake_efuse_state_t *brake_efuse_state); - -typedef struct { - uint8_t state; -} shutdown_efuse_state_t; - -void receive_shutdown_efuse_state(const can_msg_t *message, shutdown_efuse_state_t *shutdown_efuse_state); - -typedef struct { - uint8_t state; -} lv_efuse_state_t; - -void receive_lv_efuse_state(const can_msg_t *message, lv_efuse_state_t *lv_efuse_state); - -typedef struct { - uint8_t state; -} radfan_efuse_state_t; - -void receive_radfan_efuse_state(const can_msg_t *message, radfan_efuse_state_t *radfan_efuse_state); - -typedef struct { - uint8_t state; -} fanbatt_efuse_state_t; - -void receive_fanbatt_efuse_state(const can_msg_t *message, fanbatt_efuse_state_t *fanbatt_efuse_state); - -typedef struct { - uint8_t state; -} pumpone_efuse_state_t; - -void receive_pumpone_efuse_state(const can_msg_t *message, pumpone_efuse_state_t *pumpone_efuse_state); - -typedef struct { - uint8_t state; -} pumptwo_efuse_state_t; - -void receive_pumptwo_efuse_state(const can_msg_t *message, pumptwo_efuse_state_t *pumptwo_efuse_state); - -typedef struct { - uint8_t state; -} battbox_efuse_state_t; - -void receive_battbox_efuse_state(const can_msg_t *message, battbox_efuse_state_t *battbox_efuse_state); - -typedef struct { - uint8_t state; -} mc_efuse_state_t; - -void receive_mc_efuse_state(const can_msg_t *message, mc_efuse_state_t *mc_efuse_state); - -typedef struct { - uint8_t state; -} spare_efuse_state_t; - -void receive_spare_efuse_state(const can_msg_t *message, spare_efuse_state_t *spare_efuse_state); - -typedef struct { - uint8_t command; -} rtds_command_message_t; + bool reset_latching; +} reset_latching_fault_t; -void receive_rtds_command_message(const can_msg_t *message, rtds_command_message_t *rtds_command_message); +void receive_reset_latching_fault(const can_msg_t *message, reset_latching_fault_t *reset_latching_fault); typedef struct { uint16_t R_iso_corrected; @@ -585,12 +556,6 @@ typedef struct { void receive_imd_general_information(const can_msg_t *message, imd_general_information_t *imd_general_information); -typedef struct { - uint8_t button_id; -} wheel_buttons_t; - -void receive_wheel_buttons(const can_msg_t *message, wheel_buttons_t *wheel_buttons); - typedef struct { float charge_volts; float charge_current; @@ -844,7 +809,7 @@ typedef struct { void receive_onboard_therm_temperatures(const can_msg_t *message, onboard_therm_temperatures_t *onboard_therm_temperatures); typedef struct { - bool precharge_status; + uint8_t precharge_status; } precharge_status_t; void receive_precharge_status(const can_msg_t *message, precharge_status_t *precharge_status); @@ -852,11 +817,9 @@ void receive_precharge_status(const can_msg_t *message, precharge_status_t *prec typedef struct { float batt_voltage; float ts_voltage; - float shunt_temp; - float pack_current; -} hv_plate_data_t; +} hv_plate_voltages_t; -void receive_hv_plate_data(const can_msg_t *message, hv_plate_data_t *hv_plate_data); +void receive_hv_plate_voltages(const can_msg_t *message, hv_plate_voltages_t *hv_plate_voltages); typedef struct { uint8_t chip_id; @@ -921,7 +884,11 @@ typedef struct { void receive_pack_soc_status(const can_msg_t *message, pack_soc_status_t *pack_soc_status); typedef struct { - bool shutdown; + bool shutdown_state; + bool shutdown_ts_minus_sense; + bool shutdown_ts_plus_sense; + bool shutdown_acc_sense; + bool shutdown_tsip_sense; } shutdown_as_read_by_bms_t; void receive_shutdown_as_read_by_bms(const can_msg_t *message, shutdown_as_read_by_bms_t *shutdown_as_read_by_bms); @@ -940,6 +907,69 @@ typedef struct { void receive_bms_critically_faulted(const can_msg_t *message, bms_critically_faulted_t *bms_critically_faulted); +typedef struct { + float pack_current; + float shunt_temp; +} pack_current_and_shunt_temp_t; + +void receive_pack_current_and_shunt_temp(const can_msg_t *message, pack_current_and_shunt_temp_t *pack_current_and_shunt_temp); + +typedef struct { + float batt_volts; + float ts_volts; +} hv_plate_voltages_adbms_t; + +void receive_hv_plate_voltages_adbms(const can_msg_t *message, hv_plate_voltages_adbms_t *hv_plate_voltages_adbms); + +typedef struct { + float pack_current; + float shunt_temp; +} pack_current_and_shunt_temp_adbms_t; + +void receive_pack_current_and_shunt_temp_adbms(const can_msg_t *message, pack_current_and_shunt_temp_adbms_t *pack_current_and_shunt_temp_adbms); + +typedef struct { + float current_target_ac; +} ac_current_command_t; + +void receive_ac_current_command(const can_msg_t *message, ac_current_command_t *ac_current_command); + +typedef struct { + float brake_ac_current; +} brake_current_command_t; + +void receive_brake_current_command(const can_msg_t *message, brake_current_command_t *brake_current_command); + +typedef struct { + float max_current_ac_target; +} max_ac_current_command_t; + +void receive_max_ac_current_command(const can_msg_t *message, max_ac_current_command_t *max_ac_current_command); + +typedef struct { + float max_ac_brake_current_target; +} max_ac_brake_current_command_t; + +void receive_max_ac_brake_current_command(const can_msg_t *message, max_ac_brake_current_command_t *max_ac_brake_current_command); + +typedef struct { + float max_dc_current_target; +} max_dc_current_command_t; + +void receive_max_dc_current_command(const can_msg_t *message, max_dc_current_command_t *max_dc_current_command); + +typedef struct { + float max_dc_brake_current_target; +} max_dc_brake_current_command_t; + +void receive_max_dc_brake_current_command(const can_msg_t *message, max_dc_brake_current_command_t *max_dc_brake_current_command); + +typedef struct { + uint8_t drive_enable; +} drive_enable_command_t; + +void receive_drive_enable_command(const can_msg_t *message, drive_enable_command_t *drive_enable_command); + void receive_can(const can_msg_t *msg); diff --git a/Core/Inc/u_can.h b/Core/Inc/u_can.h index 146d92e..0bbc5f9 100644 --- a/Core/Inc/u_can.h +++ b/Core/Inc/u_can.h @@ -21,6 +21,6 @@ extern can_t can2; #define MAGNOMETER_MSG_ID 0xAAD #define IMD_GENERAL_MSG_ID 0x37 #define BMS_LIGHTNING_OKAY_MSG_ID 0x01E - +#define RESET_LATCHING_MSG_ID 0x510 #endif /* u_can.h */ \ No newline at end of file diff --git a/Core/Inc/u_statemachine.h b/Core/Inc/u_statemachine.h index 818bf38..e632ec4 100644 --- a/Core/Inc/u_statemachine.h +++ b/Core/Inc/u_statemachine.h @@ -21,6 +21,7 @@ Lightning_Board_Light_Status statemachine_getState(); void statemachine_handleIMDMessage(can_msg_t* message); // Handles the IMD status message. void statemachine_handleBMSMessage(can_msg_t* message); // Handles the BMS status message. +void statemachine_handleResetLatchMessage(can_msg_t *message); // Handles the RESET LATCHING FAULTS message int statemachine_init(void); // Start the lightning timeout timer. #endif /* u_statemachine.h */ diff --git a/Core/Src/can_messages_rx.c b/Core/Src/can_messages_rx.c index f9a5275..31b9117 100644 --- a/Core/Src/can_messages_rx.c +++ b/Core/Src/can_messages_rx.c @@ -1,5 +1,13 @@ #include "can_messages_rx.h" +void receive_wheel_buttons(const can_msg_t *message, wheel_buttons_t *wheel_buttons) { + + uint8_t data = message->data[0]; + uint64_t button_id_mask = (1ULL << 8) - 1ULL; + uint64_t button_id_raw = (data >> 0) & button_id_mask; + wheel_buttons->button_id = (uint8_t)button_id_raw; +} + void receive_front_msb_env(const can_msg_t *message, front_msb_env_t *front_msb_env) { uint32_t data_bigendian; @@ -298,90 +306,108 @@ void receive_back_msb_orientation(const can_msg_t *message, back_msb_orientation back_msb_orientation->z_fdeg = (float)z_fdeg_raw; } -void receive_ac_current_command(const can_msg_t *message, ac_current_command_t *ac_current_command) { +void receive_shepherd_bms_fan_percent(const can_msg_t *message, shepherd_bms_fan_percent_t *shepherd_bms_fan_percent) { - uint16_t data_bigendian; - memcpy(&data_bigendian, message->data, 2); - uint16_t data = __builtin_bswap16(data_bigendian); - uint64_t current_target_ac_mask = (1ULL << 16) - 1ULL; - uint64_t current_target_ac_bits = (data >> 0) & current_target_ac_mask; - int64_t current_target_ac_raw = (current_target_ac_bits & (1ULL << (16 - 1))) - ? (int64_t)(current_target_ac_bits | ~current_target_ac_mask) - : (int64_t)current_target_ac_bits; - ac_current_command->current_target_ac = (float)(current_target_ac_raw / 10); + uint8_t data = message->data[0]; + uint64_t pwm_duty_mask = (1ULL << 8) - 1ULL; + uint64_t pwm_duty_raw = (data >> 0) & pwm_duty_mask; + shepherd_bms_fan_percent->pwm_duty = (uint8_t)pwm_duty_raw; } -void receive_brake_current_command(const can_msg_t *message, brake_current_command_t *brake_current_command) { +void receive_dashboard_efuse_state(const can_msg_t *message, dashboard_efuse_state_t *dashboard_efuse_state) { - uint64_t data_bigendian; - memcpy(&data_bigendian, message->data, 8); - uint64_t data = __builtin_bswap64(data_bigendian); - uint64_t brake_ac_current_mask = (1ULL << 16) - 1ULL; - uint64_t brake_ac_current_bits = (data >> 48) & brake_ac_current_mask; - int64_t brake_ac_current_raw = (brake_ac_current_bits & (1ULL << (16 - 1))) - ? (int64_t)(brake_ac_current_bits | ~brake_ac_current_mask) - : (int64_t)brake_ac_current_bits; - brake_current_command->brake_ac_current = (float)(brake_ac_current_raw / 10); + uint8_t data = message->data[0]; + uint64_t state_mask = (1ULL << 8) - 1ULL; + uint64_t state_raw = (data >> 0) & state_mask; + dashboard_efuse_state->state = (uint8_t)state_raw; } -void receive_max_ac_current_command(const can_msg_t *message, max_ac_current_command_t *max_ac_current_command) { +void receive_brake_efuse_state(const can_msg_t *message, brake_efuse_state_t *brake_efuse_state) { - uint64_t data_bigendian; - memcpy(&data_bigendian, message->data, 8); - uint64_t data = __builtin_bswap64(data_bigendian); - uint64_t max_current_ac_target_mask = (1ULL << 16) - 1ULL; - uint64_t max_current_ac_target_bits = (data >> 48) & max_current_ac_target_mask; - int64_t max_current_ac_target_raw = (max_current_ac_target_bits & (1ULL << (16 - 1))) - ? (int64_t)(max_current_ac_target_bits | ~max_current_ac_target_mask) - : (int64_t)max_current_ac_target_bits; - max_ac_current_command->max_current_ac_target = (float)(max_current_ac_target_raw / 10); + uint8_t data = message->data[0]; + uint64_t state_mask = (1ULL << 8) - 1ULL; + uint64_t state_raw = (data >> 0) & state_mask; + brake_efuse_state->state = (uint8_t)state_raw; } -void receive_max_ac_brake_current_command(const can_msg_t *message, max_ac_brake_current_command_t *max_ac_brake_current_command) { +void receive_shutdown_efuse_state(const can_msg_t *message, shutdown_efuse_state_t *shutdown_efuse_state) { - uint64_t data_bigendian; - memcpy(&data_bigendian, message->data, 8); - uint64_t data = __builtin_bswap64(data_bigendian); - uint64_t max_ac_brake_current_target_mask = (1ULL << 16) - 1ULL; - uint64_t max_ac_brake_current_target_bits = (data >> 48) & max_ac_brake_current_target_mask; - int64_t max_ac_brake_current_target_raw = (max_ac_brake_current_target_bits & (1ULL << (16 - 1))) - ? (int64_t)(max_ac_brake_current_target_bits | ~max_ac_brake_current_target_mask) - : (int64_t)max_ac_brake_current_target_bits; - max_ac_brake_current_command->max_ac_brake_current_target = (float)(max_ac_brake_current_target_raw / 10); + uint8_t data = message->data[0]; + uint64_t state_mask = (1ULL << 8) - 1ULL; + uint64_t state_raw = (data >> 0) & state_mask; + shutdown_efuse_state->state = (uint8_t)state_raw; } -void receive_max_dc_current_command(const can_msg_t *message, max_dc_current_command_t *max_dc_current_command) { +void receive_lv_efuse_state(const can_msg_t *message, lv_efuse_state_t *lv_efuse_state) { - uint16_t data_bigendian; - memcpy(&data_bigendian, message->data, 2); - uint16_t data = __builtin_bswap16(data_bigendian); - uint64_t max_dc_current_target_mask = (1ULL << 16) - 1ULL; - uint64_t max_dc_current_target_bits = (data >> 0) & max_dc_current_target_mask; - int64_t max_dc_current_target_raw = (max_dc_current_target_bits & (1ULL << (16 - 1))) - ? (int64_t)(max_dc_current_target_bits | ~max_dc_current_target_mask) - : (int64_t)max_dc_current_target_bits; - max_dc_current_command->max_dc_current_target = (float)(max_dc_current_target_raw / 10); + uint8_t data = message->data[0]; + uint64_t state_mask = (1ULL << 8) - 1ULL; + uint64_t state_raw = (data >> 0) & state_mask; + lv_efuse_state->state = (uint8_t)state_raw; } -void receive_max_dc_brake_current_command(const can_msg_t *message, max_dc_brake_current_command_t *max_dc_brake_current_command) { +void receive_radfan_efuse_state(const can_msg_t *message, radfan_efuse_state_t *radfan_efuse_state) { - uint16_t data_bigendian; - memcpy(&data_bigendian, message->data, 2); - uint16_t data = __builtin_bswap16(data_bigendian); - uint64_t max_dc_brake_current_target_mask = (1ULL << 16) - 1ULL; - uint64_t max_dc_brake_current_target_bits = (data >> 0) & max_dc_brake_current_target_mask; - int64_t max_dc_brake_current_target_raw = (max_dc_brake_current_target_bits & (1ULL << (16 - 1))) - ? (int64_t)(max_dc_brake_current_target_bits | ~max_dc_brake_current_target_mask) - : (int64_t)max_dc_brake_current_target_bits; - max_dc_brake_current_command->max_dc_brake_current_target = (float)(max_dc_brake_current_target_raw / 10); + uint8_t data = message->data[0]; + uint64_t state_mask = (1ULL << 8) - 1ULL; + uint64_t state_raw = (data >> 0) & state_mask; + radfan_efuse_state->state = (uint8_t)state_raw; } -void receive_drive_enable_command(const can_msg_t *message, drive_enable_command_t *drive_enable_command) { +void receive_fanbatt_efuse_state(const can_msg_t *message, fanbatt_efuse_state_t *fanbatt_efuse_state) { uint8_t data = message->data[0]; - uint64_t drive_enable_mask = (1ULL << 8) - 1ULL; - uint64_t drive_enable_raw = (data >> 0) & drive_enable_mask; - drive_enable_command->drive_enable = (uint8_t)drive_enable_raw; + uint64_t state_mask = (1ULL << 8) - 1ULL; + uint64_t state_raw = (data >> 0) & state_mask; + fanbatt_efuse_state->state = (uint8_t)state_raw; +} + +void receive_pumpone_efuse_state(const can_msg_t *message, pumpone_efuse_state_t *pumpone_efuse_state) { + + uint8_t data = message->data[0]; + uint64_t state_mask = (1ULL << 8) - 1ULL; + uint64_t state_raw = (data >> 0) & state_mask; + pumpone_efuse_state->state = (uint8_t)state_raw; +} + +void receive_pumptwo_efuse_state(const can_msg_t *message, pumptwo_efuse_state_t *pumptwo_efuse_state) { + + uint8_t data = message->data[0]; + uint64_t state_mask = (1ULL << 8) - 1ULL; + uint64_t state_raw = (data >> 0) & state_mask; + pumptwo_efuse_state->state = (uint8_t)state_raw; +} + +void receive_battbox_efuse_state(const can_msg_t *message, battbox_efuse_state_t *battbox_efuse_state) { + + uint8_t data = message->data[0]; + uint64_t state_mask = (1ULL << 8) - 1ULL; + uint64_t state_raw = (data >> 0) & state_mask; + battbox_efuse_state->state = (uint8_t)state_raw; +} + +void receive_mc_efuse_state(const can_msg_t *message, mc_efuse_state_t *mc_efuse_state) { + + uint8_t data = message->data[0]; + uint64_t state_mask = (1ULL << 8) - 1ULL; + uint64_t state_raw = (data >> 0) & state_mask; + mc_efuse_state->state = (uint8_t)state_raw; +} + +void receive_spare_efuse_state(const can_msg_t *message, spare_efuse_state_t *spare_efuse_state) { + + uint8_t data = message->data[0]; + uint64_t state_mask = (1ULL << 8) - 1ULL; + uint64_t state_raw = (data >> 0) & state_mask; + spare_efuse_state->state = (uint8_t)state_raw; +} + +void receive_rtds_command_message(const can_msg_t *message, rtds_command_message_t *rtds_command_message) { + + uint8_t data = message->data[0]; + uint64_t command_mask = (1ULL << 8) - 1ULL; + uint64_t command_raw = (data >> 0) & command_mask; + rtds_command_message->command = (uint8_t)command_raw; } void receive_dashboard_efuse(const can_msg_t *message, dashboard_efuse_t *dashboard_efuse) { @@ -670,29 +696,26 @@ void receive_shutdown_pins(const can_msg_t *message, shutdown_pins_t *shutdown_p uint64_t bots_gpio_mask = (1ULL << 1) - 1ULL; uint64_t bots_gpio_raw = (data >> 14) & bots_gpio_mask; shutdown_pins->bots_gpio = (bool)bots_gpio_raw; - uint64_t spare_gpio_mask = (1ULL << 1) - 1ULL; - uint64_t spare_gpio_raw = (data >> 13) & spare_gpio_mask; - shutdown_pins->spare_gpio = (bool)spare_gpio_raw; uint64_t bspd_gpio_mask = (1ULL << 1) - 1ULL; - uint64_t bspd_gpio_raw = (data >> 12) & bspd_gpio_mask; + uint64_t bspd_gpio_raw = (data >> 13) & bspd_gpio_mask; shutdown_pins->bspd_gpio = (bool)bspd_gpio_raw; uint64_t hv_c_mask = (1ULL << 1) - 1ULL; - uint64_t hv_c_raw = (data >> 11) & hv_c_mask; + uint64_t hv_c_raw = (data >> 12) & hv_c_mask; shutdown_pins->hv_c = (bool)hv_c_raw; uint64_t hvd_gpio_mask = (1ULL << 1) - 1ULL; - uint64_t hvd_gpio_raw = (data >> 10) & hvd_gpio_mask; + uint64_t hvd_gpio_raw = (data >> 11) & hvd_gpio_mask; shutdown_pins->hvd_gpio = (bool)hvd_gpio_raw; uint64_t imd_gpio_mask = (1ULL << 1) - 1ULL; - uint64_t imd_gpio_raw = (data >> 9) & imd_gpio_mask; + uint64_t imd_gpio_raw = (data >> 10) & imd_gpio_mask; shutdown_pins->imd_gpio = (bool)imd_gpio_raw; uint64_t ckpt_gpio_mask = (1ULL << 1) - 1ULL; - uint64_t ckpt_gpio_raw = (data >> 8) & ckpt_gpio_mask; + uint64_t ckpt_gpio_raw = (data >> 9) & ckpt_gpio_mask; shutdown_pins->ckpt_gpio = (bool)ckpt_gpio_raw; uint64_t inertia_sw_gpio_mask = (1ULL << 1) - 1ULL; - uint64_t inertia_sw_gpio_raw = (data >> 7) & inertia_sw_gpio_mask; + uint64_t inertia_sw_gpio_raw = (data >> 8) & inertia_sw_gpio_mask; shutdown_pins->inertia_sw_gpio = (bool)inertia_sw_gpio_raw; uint64_t tsms_gpio_mask = (1ULL << 1) - 1ULL; - uint64_t tsms_gpio_raw = (data >> 6) & tsms_gpio_mask; + uint64_t tsms_gpio_raw = (data >> 7) & tsms_gpio_mask; shutdown_pins->tsms_gpio = (bool)tsms_gpio_raw; } @@ -856,57 +879,60 @@ void receive_imu_gyro(const can_msg_t *message, imu_gyro_t *imu_gyro) { void receive_faults(const can_msg_t *message, faults_t *faults) { - uint16_t data_bigendian; - memcpy(&data_bigendian, message->data, 2); - uint16_t data = __builtin_bswap16(data_bigendian); + uint32_t data_bigendian; + memcpy(&data_bigendian, message->data, 4); + uint32_t data = __builtin_bswap32(data_bigendian); uint64_t CAN_OUTGOING_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t CAN_OUTGOING_FAULT_raw = (data >> 15) & CAN_OUTGOING_FAULT_mask; + uint64_t CAN_OUTGOING_FAULT_raw = (data >> 31) & CAN_OUTGOING_FAULT_mask; faults->CAN_OUTGOING_FAULT = (bool)CAN_OUTGOING_FAULT_raw; uint64_t CAN_INCOMING_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t CAN_INCOMING_FAULT_raw = (data >> 14) & CAN_INCOMING_FAULT_mask; + uint64_t CAN_INCOMING_FAULT_raw = (data >> 30) & CAN_INCOMING_FAULT_mask; faults->CAN_INCOMING_FAULT = (bool)CAN_INCOMING_FAULT_raw; uint64_t BMS_CAN_MONITOR_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t BMS_CAN_MONITOR_FAULT_raw = (data >> 13) & BMS_CAN_MONITOR_FAULT_mask; + uint64_t BMS_CAN_MONITOR_FAULT_raw = (data >> 29) & BMS_CAN_MONITOR_FAULT_mask; faults->BMS_CAN_MONITOR_FAULT = (bool)BMS_CAN_MONITOR_FAULT_raw; uint64_t LIGHTNING_CAN_MONITOR_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t LIGHTNING_CAN_MONITOR_FAULT_raw = (data >> 12) & LIGHTNING_CAN_MONITOR_FAULT_mask; + uint64_t LIGHTNING_CAN_MONITOR_FAULT_raw = (data >> 28) & LIGHTNING_CAN_MONITOR_FAULT_mask; faults->LIGHTNING_CAN_MONITOR_FAULT = (bool)LIGHTNING_CAN_MONITOR_FAULT_raw; - uint64_t SHUTDOWN_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t SHUTDOWN_FAULT_raw = (data >> 11) & SHUTDOWN_FAULT_mask; - faults->SHUTDOWN_FAULT = (bool)SHUTDOWN_FAULT_raw; uint64_t ONBOARD_TEMP_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t ONBOARD_TEMP_FAULT_raw = (data >> 10) & ONBOARD_TEMP_FAULT_mask; + uint64_t ONBOARD_TEMP_FAULT_raw = (data >> 27) & ONBOARD_TEMP_FAULT_mask; faults->ONBOARD_TEMP_FAULT = (bool)ONBOARD_TEMP_FAULT_raw; uint64_t IMU_ACCEL_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t IMU_ACCEL_FAULT_raw = (data >> 9) & IMU_ACCEL_FAULT_mask; + uint64_t IMU_ACCEL_FAULT_raw = (data >> 26) & IMU_ACCEL_FAULT_mask; faults->IMU_ACCEL_FAULT = (bool)IMU_ACCEL_FAULT_raw; uint64_t IMU_GYRO_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t IMU_GYRO_FAULT_raw = (data >> 8) & IMU_GYRO_FAULT_mask; + uint64_t IMU_GYRO_FAULT_raw = (data >> 25) & IMU_GYRO_FAULT_mask; faults->IMU_GYRO_FAULT = (bool)IMU_GYRO_FAULT_raw; uint64_t BSPD_PREFAULT_mask = (1ULL << 1) - 1ULL; - uint64_t BSPD_PREFAULT_raw = (data >> 7) & BSPD_PREFAULT_mask; + uint64_t BSPD_PREFAULT_raw = (data >> 24) & BSPD_PREFAULT_mask; faults->BSPD_PREFAULT = (bool)BSPD_PREFAULT_raw; uint64_t ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_raw = (data >> 6) & ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_mask; + uint64_t ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_raw = (data >> 23) & ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_mask; faults->ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT = (bool)ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_raw; uint64_t ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_raw = (data >> 5) & ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_mask; + uint64_t ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_raw = (data >> 22) & ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_mask; faults->ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT = (bool)ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_raw; uint64_t ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_raw = (data >> 4) & ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_mask; + uint64_t ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_raw = (data >> 21) & ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_mask; faults->ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT = (bool)ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_raw; uint64_t ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_raw = (data >> 3) & ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_mask; + uint64_t ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_raw = (data >> 20) & ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_mask; faults->ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT = (bool)ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_raw; uint64_t ONBOARD_PEDAL_DIFFERENCE_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t ONBOARD_PEDAL_DIFFERENCE_FAULT_raw = (data >> 2) & ONBOARD_PEDAL_DIFFERENCE_FAULT_mask; + uint64_t ONBOARD_PEDAL_DIFFERENCE_FAULT_raw = (data >> 19) & ONBOARD_PEDAL_DIFFERENCE_FAULT_mask; faults->ONBOARD_PEDAL_DIFFERENCE_FAULT = (bool)ONBOARD_PEDAL_DIFFERENCE_FAULT_raw; uint64_t RTDS_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t RTDS_FAULT_raw = (data >> 1) & RTDS_FAULT_mask; + uint64_t RTDS_FAULT_raw = (data >> 18) & RTDS_FAULT_mask; faults->RTDS_FAULT = (bool)RTDS_FAULT_raw; uint64_t LV_LOW_VOLTAGE_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t LV_LOW_VOLTAGE_FAULT_raw = (data >> 0) & LV_LOW_VOLTAGE_FAULT_mask; + uint64_t LV_LOW_VOLTAGE_FAULT_raw = (data >> 17) & LV_LOW_VOLTAGE_FAULT_mask; faults->LV_LOW_VOLTAGE_FAULT = (bool)LV_LOW_VOLTAGE_FAULT_raw; + uint64_t PRECHARGE_FLOATING_FAULT_mask = (1ULL << 1) - 1ULL; + uint64_t PRECHARGE_FLOATING_FAULT_raw = (data >> 16) & PRECHARGE_FLOATING_FAULT_mask; + faults->PRECHARGE_FLOATING_FAULT = (bool)PRECHARGE_FLOATING_FAULT_raw; + uint64_t LATCHING_ACTIVE_FAULT_mask = (1ULL << 1) - 1ULL; + uint64_t LATCHING_ACTIVE_FAULT_raw = (data >> 15) & LATCHING_ACTIVE_FAULT_mask; + faults->LATCHING_ACTIVE_FAULT = (bool)LATCHING_ACTIVE_FAULT_raw; } void receive_lv_voltage(const can_msg_t *message, lv_voltage_t *lv_voltage) { @@ -1113,110 +1139,17 @@ void receive_drive_lock_states(const can_msg_t *message, drive_lock_states_t *dr uint64_t BSPD_PREF_mask = (1ULL << 1) - 1ULL; uint64_t BSPD_PREF_raw = (data >> 2) & BSPD_PREF_mask; drive_lock_states->BSPD_PREF = (bool)BSPD_PREF_raw; + uint64_t BMS_NOT_PRECHARGED_YET_mask = (1ULL << 1) - 1ULL; + uint64_t BMS_NOT_PRECHARGED_YET_raw = (data >> 1) & BMS_NOT_PRECHARGED_YET_mask; + drive_lock_states->BMS_NOT_PRECHARGED_YET = (bool)BMS_NOT_PRECHARGED_YET_raw; } -void receive_shepherd_bms_fan_percent(const can_msg_t *message, shepherd_bms_fan_percent_t *shepherd_bms_fan_percent) { - - uint8_t data = message->data[0]; - uint64_t pwm_duty_mask = (1ULL << 8) - 1ULL; - uint64_t pwm_duty_raw = (data >> 0) & pwm_duty_mask; - shepherd_bms_fan_percent->pwm_duty = (uint8_t)pwm_duty_raw; -} - -void receive_dashboard_efuse_state(const can_msg_t *message, dashboard_efuse_state_t *dashboard_efuse_state) { - - uint8_t data = message->data[0]; - uint64_t state_mask = (1ULL << 8) - 1ULL; - uint64_t state_raw = (data >> 0) & state_mask; - dashboard_efuse_state->state = (uint8_t)state_raw; -} - -void receive_brake_efuse_state(const can_msg_t *message, brake_efuse_state_t *brake_efuse_state) { - - uint8_t data = message->data[0]; - uint64_t state_mask = (1ULL << 8) - 1ULL; - uint64_t state_raw = (data >> 0) & state_mask; - brake_efuse_state->state = (uint8_t)state_raw; -} - -void receive_shutdown_efuse_state(const can_msg_t *message, shutdown_efuse_state_t *shutdown_efuse_state) { - - uint8_t data = message->data[0]; - uint64_t state_mask = (1ULL << 8) - 1ULL; - uint64_t state_raw = (data >> 0) & state_mask; - shutdown_efuse_state->state = (uint8_t)state_raw; -} - -void receive_lv_efuse_state(const can_msg_t *message, lv_efuse_state_t *lv_efuse_state) { - - uint8_t data = message->data[0]; - uint64_t state_mask = (1ULL << 8) - 1ULL; - uint64_t state_raw = (data >> 0) & state_mask; - lv_efuse_state->state = (uint8_t)state_raw; -} - -void receive_radfan_efuse_state(const can_msg_t *message, radfan_efuse_state_t *radfan_efuse_state) { - - uint8_t data = message->data[0]; - uint64_t state_mask = (1ULL << 8) - 1ULL; - uint64_t state_raw = (data >> 0) & state_mask; - radfan_efuse_state->state = (uint8_t)state_raw; -} - -void receive_fanbatt_efuse_state(const can_msg_t *message, fanbatt_efuse_state_t *fanbatt_efuse_state) { - - uint8_t data = message->data[0]; - uint64_t state_mask = (1ULL << 8) - 1ULL; - uint64_t state_raw = (data >> 0) & state_mask; - fanbatt_efuse_state->state = (uint8_t)state_raw; -} - -void receive_pumpone_efuse_state(const can_msg_t *message, pumpone_efuse_state_t *pumpone_efuse_state) { - - uint8_t data = message->data[0]; - uint64_t state_mask = (1ULL << 8) - 1ULL; - uint64_t state_raw = (data >> 0) & state_mask; - pumpone_efuse_state->state = (uint8_t)state_raw; -} - -void receive_pumptwo_efuse_state(const can_msg_t *message, pumptwo_efuse_state_t *pumptwo_efuse_state) { - - uint8_t data = message->data[0]; - uint64_t state_mask = (1ULL << 8) - 1ULL; - uint64_t state_raw = (data >> 0) & state_mask; - pumptwo_efuse_state->state = (uint8_t)state_raw; -} - -void receive_battbox_efuse_state(const can_msg_t *message, battbox_efuse_state_t *battbox_efuse_state) { +void receive_reset_latching_fault(const can_msg_t *message, reset_latching_fault_t *reset_latching_fault) { uint8_t data = message->data[0]; - uint64_t state_mask = (1ULL << 8) - 1ULL; - uint64_t state_raw = (data >> 0) & state_mask; - battbox_efuse_state->state = (uint8_t)state_raw; -} - -void receive_mc_efuse_state(const can_msg_t *message, mc_efuse_state_t *mc_efuse_state) { - - uint8_t data = message->data[0]; - uint64_t state_mask = (1ULL << 8) - 1ULL; - uint64_t state_raw = (data >> 0) & state_mask; - mc_efuse_state->state = (uint8_t)state_raw; -} - -void receive_spare_efuse_state(const can_msg_t *message, spare_efuse_state_t *spare_efuse_state) { - - uint8_t data = message->data[0]; - uint64_t state_mask = (1ULL << 8) - 1ULL; - uint64_t state_raw = (data >> 0) & state_mask; - spare_efuse_state->state = (uint8_t)state_raw; -} - -void receive_rtds_command_message(const can_msg_t *message, rtds_command_message_t *rtds_command_message) { - - uint8_t data = message->data[0]; - uint64_t command_mask = (1ULL << 8) - 1ULL; - uint64_t command_raw = (data >> 0) & command_mask; - rtds_command_message->command = (uint8_t)command_raw; + uint64_t reset_latching_mask = (1ULL << 1) - 1ULL; + uint64_t reset_latching_raw = (data >> 7) & reset_latching_mask; + reset_latching_fault->reset_latching = (bool)reset_latching_raw; } void receive_imd_general_information(const can_msg_t *message, imd_general_information_t *imd_general_information) { @@ -1327,14 +1260,6 @@ void receive_imd_general_information(const can_msg_t *message, imd_general_infor -} - -void receive_wheel_buttons(const can_msg_t *message, wheel_buttons_t *wheel_buttons) { - - uint8_t data = message->data[0]; - uint64_t button_id_mask = (1ULL << 8) - 1ULL; - uint64_t button_id_raw = (data >> 0) & button_id_mask; - wheel_buttons->button_id = (uint8_t)button_id_raw; } void receive_bms_charge_message_send(const can_msg_t *message, bms_charge_message_send_t *bms_charge_message_send) { @@ -1934,40 +1859,28 @@ void receive_onboard_therm_temperatures(const can_msg_t *message, onboard_therm_ void receive_precharge_status(const can_msg_t *message, precharge_status_t *precharge_status) { uint8_t data = message->data[0]; - uint64_t precharge_status_mask = (1ULL << 1) - 1ULL; - uint64_t precharge_status_raw = (data >> 7) & precharge_status_mask; - precharge_status->precharge_status = (bool)precharge_status_raw; + uint64_t precharge_status_mask = (1ULL << 8) - 1ULL; + uint64_t precharge_status_raw = (data >> 0) & precharge_status_mask; + precharge_status->precharge_status = (uint8_t)precharge_status_raw; } -void receive_hv_plate_data(const can_msg_t *message, hv_plate_data_t *hv_plate_data) { +void receive_hv_plate_voltages(const can_msg_t *message, hv_plate_voltages_t *hv_plate_voltages) { uint64_t data_bigendian; memcpy(&data_bigendian, message->data, 8); uint64_t data = __builtin_bswap64(data_bigendian); - uint64_t batt_voltage_mask = (1ULL << 16) - 1ULL; - uint64_t batt_voltage_bits = (data >> 48) & batt_voltage_mask; - int64_t batt_voltage_raw = (batt_voltage_bits & (1ULL << (16 - 1))) + uint64_t batt_voltage_mask = (1ULL << 32) - 1ULL; + uint64_t batt_voltage_bits = (data >> 32) & batt_voltage_mask; + int64_t batt_voltage_raw = (batt_voltage_bits & (1ULL << (32 - 1))) ? (int64_t)(batt_voltage_bits | ~batt_voltage_mask) : (int64_t)batt_voltage_bits; - hv_plate_data->batt_voltage = (float)(batt_voltage_raw / 100); - uint64_t ts_voltage_mask = (1ULL << 16) - 1ULL; - uint64_t ts_voltage_bits = (data >> 32) & ts_voltage_mask; - int64_t ts_voltage_raw = (ts_voltage_bits & (1ULL << (16 - 1))) + hv_plate_voltages->batt_voltage = (float)(batt_voltage_raw / 100); + uint64_t ts_voltage_mask = (1ULL << 32) - 1ULL; + uint64_t ts_voltage_bits = (data >> 0) & ts_voltage_mask; + int64_t ts_voltage_raw = (ts_voltage_bits & (1ULL << (32 - 1))) ? (int64_t)(ts_voltage_bits | ~ts_voltage_mask) : (int64_t)ts_voltage_bits; - hv_plate_data->ts_voltage = (float)(ts_voltage_raw / 100); - uint64_t shunt_temp_mask = (1ULL << 16) - 1ULL; - uint64_t shunt_temp_bits = (data >> 16) & shunt_temp_mask; - int64_t shunt_temp_raw = (shunt_temp_bits & (1ULL << (16 - 1))) - ? (int64_t)(shunt_temp_bits | ~shunt_temp_mask) - : (int64_t)shunt_temp_bits; - hv_plate_data->shunt_temp = (float)(shunt_temp_raw / 100); - uint64_t pack_current_mask = (1ULL << 16) - 1ULL; - uint64_t pack_current_bits = (data >> 0) & pack_current_mask; - int64_t pack_current_raw = (pack_current_bits & (1ULL << (16 - 1))) - ? (int64_t)(pack_current_bits | ~pack_current_mask) - : (int64_t)pack_current_bits; - hv_plate_data->pack_current = (float)(pack_current_raw / 100); + hv_plate_voltages->ts_voltage = (float)(ts_voltage_raw / 100); } void receive_segment_pec_errors(const can_msg_t *message, segment_pec_errors_t *segment_pec_errors) { @@ -2116,9 +2029,21 @@ void receive_pack_soc_status(const can_msg_t *message, pack_soc_status_t *pack_s void receive_shutdown_as_read_by_bms(const can_msg_t *message, shutdown_as_read_by_bms_t *shutdown_as_read_by_bms) { uint8_t data = message->data[0]; - uint64_t shutdown_mask = (1ULL << 8) - 1ULL; - uint64_t shutdown_raw = (data >> 0) & shutdown_mask; - shutdown_as_read_by_bms->shutdown = (bool)shutdown_raw; + uint64_t shutdown_state_mask = (1ULL << 1) - 1ULL; + uint64_t shutdown_state_raw = (data >> 7) & shutdown_state_mask; + shutdown_as_read_by_bms->shutdown_state = (bool)shutdown_state_raw; + uint64_t shutdown_ts_minus_sense_mask = (1ULL << 1) - 1ULL; + uint64_t shutdown_ts_minus_sense_raw = (data >> 6) & shutdown_ts_minus_sense_mask; + shutdown_as_read_by_bms->shutdown_ts_minus_sense = (bool)shutdown_ts_minus_sense_raw; + uint64_t shutdown_ts_plus_sense_mask = (1ULL << 1) - 1ULL; + uint64_t shutdown_ts_plus_sense_raw = (data >> 5) & shutdown_ts_plus_sense_mask; + shutdown_as_read_by_bms->shutdown_ts_plus_sense = (bool)shutdown_ts_plus_sense_raw; + uint64_t shutdown_acc_sense_mask = (1ULL << 1) - 1ULL; + uint64_t shutdown_acc_sense_raw = (data >> 4) & shutdown_acc_sense_mask; + shutdown_as_read_by_bms->shutdown_acc_sense = (bool)shutdown_acc_sense_raw; + uint64_t shutdown_tsip_sense_mask = (1ULL << 1) - 1ULL; + uint64_t shutdown_tsip_sense_raw = (data >> 3) & shutdown_tsip_sense_mask; + shutdown_as_read_by_bms->shutdown_tsip_sense = (bool)shutdown_tsip_sense_raw; } void receive_hv_plate_isospi_communication_status(const can_msg_t *message, hv_plate_isospi_communication_status_t *hv_plate_isospi_communication_status) { @@ -2145,3 +2070,143 @@ void receive_bms_critically_faulted(const can_msg_t *message, bms_critically_fau bms_critically_faulted->critically_faulted = (bool)critically_faulted_raw; } +void receive_pack_current_and_shunt_temp(const can_msg_t *message, pack_current_and_shunt_temp_t *pack_current_and_shunt_temp) { + + uint64_t data_bigendian; + memcpy(&data_bigendian, message->data, 8); + uint64_t data = __builtin_bswap64(data_bigendian); + uint64_t pack_current_mask = (1ULL << 32) - 1ULL; + uint64_t pack_current_bits = (data >> 32) & pack_current_mask; + int64_t pack_current_raw = (pack_current_bits & (1ULL << (32 - 1))) + ? (int64_t)(pack_current_bits | ~pack_current_mask) + : (int64_t)pack_current_bits; + pack_current_and_shunt_temp->pack_current = (float)(pack_current_raw / 100); + uint64_t shunt_temp_mask = (1ULL << 32) - 1ULL; + uint64_t shunt_temp_raw = (data >> 0) & shunt_temp_mask; + pack_current_and_shunt_temp->shunt_temp = (float)(shunt_temp_raw / 100); +} + +void receive_hv_plate_voltages_adbms(const can_msg_t *message, hv_plate_voltages_adbms_t *hv_plate_voltages_adbms) { + + uint64_t data_bigendian; + memcpy(&data_bigendian, message->data, 8); + uint64_t data = __builtin_bswap64(data_bigendian); + uint64_t batt_volts_mask = (1ULL << 32) - 1ULL; + uint64_t batt_volts_bits = (data >> 32) & batt_volts_mask; + int64_t batt_volts_raw = (batt_volts_bits & (1ULL << (32 - 1))) + ? (int64_t)(batt_volts_bits | ~batt_volts_mask) + : (int64_t)batt_volts_bits; + hv_plate_voltages_adbms->batt_volts = (float)(batt_volts_raw / 100); + uint64_t ts_volts_mask = (1ULL << 32) - 1ULL; + uint64_t ts_volts_bits = (data >> 0) & ts_volts_mask; + int64_t ts_volts_raw = (ts_volts_bits & (1ULL << (32 - 1))) + ? (int64_t)(ts_volts_bits | ~ts_volts_mask) + : (int64_t)ts_volts_bits; + hv_plate_voltages_adbms->ts_volts = (float)(ts_volts_raw / 100); +} + +void receive_pack_current_and_shunt_temp_adbms(const can_msg_t *message, pack_current_and_shunt_temp_adbms_t *pack_current_and_shunt_temp_adbms) { + + uint64_t data_bigendian; + memcpy(&data_bigendian, message->data, 8); + uint64_t data = __builtin_bswap64(data_bigendian); + uint64_t pack_current_mask = (1ULL << 32) - 1ULL; + uint64_t pack_current_bits = (data >> 32) & pack_current_mask; + int64_t pack_current_raw = (pack_current_bits & (1ULL << (32 - 1))) + ? (int64_t)(pack_current_bits | ~pack_current_mask) + : (int64_t)pack_current_bits; + pack_current_and_shunt_temp_adbms->pack_current = (float)(pack_current_raw / 100); + uint64_t shunt_temp_mask = (1ULL << 32) - 1ULL; + uint64_t shunt_temp_bits = (data >> 0) & shunt_temp_mask; + int64_t shunt_temp_raw = (shunt_temp_bits & (1ULL << (32 - 1))) + ? (int64_t)(shunt_temp_bits | ~shunt_temp_mask) + : (int64_t)shunt_temp_bits; + pack_current_and_shunt_temp_adbms->shunt_temp = (float)(shunt_temp_raw / 100); +} + +void receive_ac_current_command(const can_msg_t *message, ac_current_command_t *ac_current_command) { + + uint16_t data_bigendian; + memcpy(&data_bigendian, message->data, 2); + uint16_t data = __builtin_bswap16(data_bigendian); + uint64_t current_target_ac_mask = (1ULL << 16) - 1ULL; + uint64_t current_target_ac_bits = (data >> 0) & current_target_ac_mask; + int64_t current_target_ac_raw = (current_target_ac_bits & (1ULL << (16 - 1))) + ? (int64_t)(current_target_ac_bits | ~current_target_ac_mask) + : (int64_t)current_target_ac_bits; + ac_current_command->current_target_ac = (float)(current_target_ac_raw / 10); +} + +void receive_brake_current_command(const can_msg_t *message, brake_current_command_t *brake_current_command) { + + uint64_t data_bigendian; + memcpy(&data_bigendian, message->data, 8); + uint64_t data = __builtin_bswap64(data_bigendian); + uint64_t brake_ac_current_mask = (1ULL << 16) - 1ULL; + uint64_t brake_ac_current_bits = (data >> 48) & brake_ac_current_mask; + int64_t brake_ac_current_raw = (brake_ac_current_bits & (1ULL << (16 - 1))) + ? (int64_t)(brake_ac_current_bits | ~brake_ac_current_mask) + : (int64_t)brake_ac_current_bits; + brake_current_command->brake_ac_current = (float)(brake_ac_current_raw / 10); +} + +void receive_max_ac_current_command(const can_msg_t *message, max_ac_current_command_t *max_ac_current_command) { + + uint64_t data_bigendian; + memcpy(&data_bigendian, message->data, 8); + uint64_t data = __builtin_bswap64(data_bigendian); + uint64_t max_current_ac_target_mask = (1ULL << 16) - 1ULL; + uint64_t max_current_ac_target_bits = (data >> 48) & max_current_ac_target_mask; + int64_t max_current_ac_target_raw = (max_current_ac_target_bits & (1ULL << (16 - 1))) + ? (int64_t)(max_current_ac_target_bits | ~max_current_ac_target_mask) + : (int64_t)max_current_ac_target_bits; + max_ac_current_command->max_current_ac_target = (float)(max_current_ac_target_raw / 10); +} + +void receive_max_ac_brake_current_command(const can_msg_t *message, max_ac_brake_current_command_t *max_ac_brake_current_command) { + + uint64_t data_bigendian; + memcpy(&data_bigendian, message->data, 8); + uint64_t data = __builtin_bswap64(data_bigendian); + uint64_t max_ac_brake_current_target_mask = (1ULL << 16) - 1ULL; + uint64_t max_ac_brake_current_target_bits = (data >> 48) & max_ac_brake_current_target_mask; + int64_t max_ac_brake_current_target_raw = (max_ac_brake_current_target_bits & (1ULL << (16 - 1))) + ? (int64_t)(max_ac_brake_current_target_bits | ~max_ac_brake_current_target_mask) + : (int64_t)max_ac_brake_current_target_bits; + max_ac_brake_current_command->max_ac_brake_current_target = (float)(max_ac_brake_current_target_raw / 10); +} + +void receive_max_dc_current_command(const can_msg_t *message, max_dc_current_command_t *max_dc_current_command) { + + uint16_t data_bigendian; + memcpy(&data_bigendian, message->data, 2); + uint16_t data = __builtin_bswap16(data_bigendian); + uint64_t max_dc_current_target_mask = (1ULL << 16) - 1ULL; + uint64_t max_dc_current_target_bits = (data >> 0) & max_dc_current_target_mask; + int64_t max_dc_current_target_raw = (max_dc_current_target_bits & (1ULL << (16 - 1))) + ? (int64_t)(max_dc_current_target_bits | ~max_dc_current_target_mask) + : (int64_t)max_dc_current_target_bits; + max_dc_current_command->max_dc_current_target = (float)(max_dc_current_target_raw / 10); +} + +void receive_max_dc_brake_current_command(const can_msg_t *message, max_dc_brake_current_command_t *max_dc_brake_current_command) { + + uint16_t data_bigendian; + memcpy(&data_bigendian, message->data, 2); + uint16_t data = __builtin_bswap16(data_bigendian); + uint64_t max_dc_brake_current_target_mask = (1ULL << 16) - 1ULL; + uint64_t max_dc_brake_current_target_bits = (data >> 0) & max_dc_brake_current_target_mask; + int64_t max_dc_brake_current_target_raw = (max_dc_brake_current_target_bits & (1ULL << (16 - 1))) + ? (int64_t)(max_dc_brake_current_target_bits | ~max_dc_brake_current_target_mask) + : (int64_t)max_dc_brake_current_target_bits; + max_dc_brake_current_command->max_dc_brake_current_target = (float)(max_dc_brake_current_target_raw / 10); +} + +void receive_drive_enable_command(const can_msg_t *message, drive_enable_command_t *drive_enable_command) { + + uint8_t data = message->data[0]; + uint64_t drive_enable_mask = (1ULL << 8) - 1ULL; + uint64_t drive_enable_raw = (data >> 0) & drive_enable_mask; + drive_enable_command->drive_enable = (uint8_t)drive_enable_raw; +} + diff --git a/Core/Src/u_inbox.c b/Core/Src/u_inbox.c index c48ed7a..e2467e9 100644 --- a/Core/Src/u_inbox.c +++ b/Core/Src/u_inbox.c @@ -9,9 +9,11 @@ void inbox_can(can_msg_t *message) { statemachine_handleIMDMessage(message); break; case BMS_LIGHTNING_OKAY_MSG_ID: - PRINTLN_INFO("can - receieved the bms lightning message"); statemachine_handleBMSMessage(message); break; + case RESET_LATCHING_MSG_ID: + statemachine_handleResetLatchMessage(message); + break; default: PRINTLN_WARNING("Unknown Inbox Message. ID: 0x%X", message->id); break; diff --git a/Core/Src/u_statemachine.c b/Core/Src/u_statemachine.c index d0caa28..6a14c8d 100644 --- a/Core/Src/u_statemachine.c +++ b/Core/Src/u_statemachine.c @@ -34,6 +34,7 @@ static _Atomic bool has_imd_made_contact = false; /* "Okay" Statuses. */ static _Atomic bool bms_error; // Is the BMS okay? false = bms is okay, true = bms is NOT okay. static _Atomic bool imd_error; // Is the IMD okay? false = imd is okay, true = imd is NOT okay. +static _Atomic bool fault_latched; // Is a latched fault active? false = faults are still latchde, true = no latching fault / they were reset // These values are updated via CAN messages that are sent from the BMS and IMD. // As explained in the "first contact trackers" section, these bools are not used by the statemachine until at least one "okay" message has been received from each board. @@ -93,6 +94,16 @@ void statemachine_handleIMDMessage(can_msg_t* message) { /* Update `has_imd_made_contact`, since we have made contact if this has been called. */ has_imd_made_contact = true; + fault_latched = true; +} + +void statemachine_handleResetLatchMessage(can_msg_t *message) { + reset_latching_fault_t data = { 0 }; + receive_reset_latching_fault(message, &data); + PRINTLN_INFO("Latching Fault Reset=%d", data.reset_latching); + if (data.reset_latching) { + fault_latched = false; + } } /* Handles the BMS status message. */ @@ -102,6 +113,7 @@ void statemachine_handleBMSMessage(can_msg_t* message) { PRINTLN_INFO("bms critically faulted=%d", data.critically_faulted); bms_error = data.critically_faulted; has_bms_made_contact = true; + fault_latched = true; } Lightning_Board_Light_Status statemachine_getState() { @@ -112,7 +124,7 @@ Lightning_Board_Light_Status statemachine_getState() { } /* If either the BMS or IMD has an error, return LIGHT_RED. */ - if(bms_error || imd_error) { + if(fault_latched || bms_error || imd_error) { return LIGHT_RED; } diff --git a/Drivers/Odyssey-Definitions b/Drivers/Odyssey-Definitions index 9b517cc..5adc3d2 160000 --- a/Drivers/Odyssey-Definitions +++ b/Drivers/Odyssey-Definitions @@ -1 +1 @@ -Subproject commit 9b517cc993bb3ecac305dba7c1d2b2365db8840a +Subproject commit 5adc3d2a6bf74e4338f25331a6c73990c442f3a8 From acea5707f4ecd2a7e6376352072b739f3418d2aa Mon Sep 17 00:00:00 2001 From: Caio DaSilva Date: Sat, 30 May 2026 13:33:21 -0400 Subject: [PATCH 2/4] fix --- Core/Src/u_statemachine.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Core/Src/u_statemachine.c b/Core/Src/u_statemachine.c index 6a14c8d..334e55a 100644 --- a/Core/Src/u_statemachine.c +++ b/Core/Src/u_statemachine.c @@ -34,7 +34,7 @@ static _Atomic bool has_imd_made_contact = false; /* "Okay" Statuses. */ static _Atomic bool bms_error; // Is the BMS okay? false = bms is okay, true = bms is NOT okay. static _Atomic bool imd_error; // Is the IMD okay? false = imd is okay, true = imd is NOT okay. -static _Atomic bool fault_latched; // Is a latched fault active? false = faults are still latchde, true = no latching fault / they were reset +static _Atomic bool fault_latched = false; // Is a latched fault active? false = faults are still latchde, true = no latching fault / they were reset // These values are updated via CAN messages that are sent from the BMS and IMD. // As explained in the "first contact trackers" section, these bools are not used by the statemachine until at least one "okay" message has been received from each board. From 7852257ebcb8b85cba831d3c7d54653cf9f885fc Mon Sep 17 00:00:00 2001 From: Caio DaSilva Date: Wed, 10 Jun 2026 21:37:41 -0400 Subject: [PATCH 3/4] fix can filter --- .mxproject | 2 +- Core/Src/main.c | 2 +- Core/Src/u_can.c | 14 +++++++++++--- Core/Src/u_threads.c | 2 +- Lightning.ioc | 2 +- 5 files changed, 15 insertions(+), 7 deletions(-) diff --git a/.mxproject b/.mxproject index 6e2bbe0..1e9aa59 100644 --- a/.mxproject +++ b/.mxproject @@ -1,5 +1,5 @@ [PreviousLibFiles] -LibFiles=Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_tim.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_tim_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_cortex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_cortex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_dcache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_dcache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_rcc.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_rcc_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_bus.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_rcc.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_crs.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_system.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_utils.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_flash.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_flash_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_gpio.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_gpio_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_gpio.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_dma.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_dma_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_dma.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_dmamux.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_pwr.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_pwr_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_pwr.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_def.h;Drivers/STM32H5xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_exti.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_exti.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_fdcan.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_icache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_icache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_iwdg.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_iwdg.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_uart.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_usart.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_lpuart.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_uart_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_spi.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_spi.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_spi_ex.h;Middlewares/ST/threadx/common/inc/tx_api.h;Middlewares/ST/threadx/common/inc/tx_block_pool.h;Middlewares/ST/threadx/common/inc/tx_byte_pool.h;Middlewares/ST/threadx/common/inc/tx_event_flags.h;Middlewares/ST/threadx/common/inc/tx_initialize.h;Middlewares/ST/threadx/common/inc/tx_mutex.h;Middlewares/ST/threadx/common/inc/tx_queue.h;Middlewares/ST/threadx/common/inc/tx_semaphore.h;Middlewares/ST/threadx/common/inc/tx_thread.h;Middlewares/ST/threadx/common/inc/tx_timer.h;Middlewares/ST/threadx/common/inc/tx_trace.h;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_tim.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_tim_ex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_cortex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_dcache.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_rcc.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_rcc_ex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_flash.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_flash_ex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_gpio.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_dma.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_dma_ex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_pwr.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_pwr_ex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_exti.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_fdcan.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_icache.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_iwdg.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_uart.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_uart_ex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_spi.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_spi_ex.c;Middlewares/ST/netxduo/common/src/nx_arp_announce_send.c;Middlewares/ST/netxduo/common/src/nx_arp_dynamic_entries_invalidate.c;Middlewares/ST/netxduo/common/src/nx_arp_dynamic_entry_delete.c;Middlewares/ST/netxduo/common/src/nx_arp_dynamic_entry_set.c;Middlewares/ST/netxduo/common/src/nx_arp_enable.c;Middlewares/ST/netxduo/common/src/nx_arp_entry_allocate.c;Middlewares/ST/netxduo/common/src/nx_arp_entry_delete.c;Middlewares/ST/netxduo/common/src/nx_arp_gratuitous_send.c;Middlewares/ST/netxduo/common/src/nx_arp_hardware_address_find.c;Middlewares/ST/netxduo/common/src/nx_arp_info_get.c;Middlewares/ST/netxduo/common/src/nx_arp_initialize.c;Middlewares/ST/netxduo/common/src/nx_arp_interface_entries_delete.c;Middlewares/ST/netxduo/common/src/nx_arp_ip_address_find.c;Middlewares/ST/netxduo/common/src/nx_arp_packet_deferred_receive.c;Middlewares/ST/netxduo/common/src/nx_arp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_arp_packet_send.c;Middlewares/ST/netxduo/common/src/nx_arp_periodic_update.c;Middlewares/ST/netxduo/common/src/nx_arp_probe_send.c;Middlewares/ST/netxduo/common/src/nx_arp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_arp_queue_send.c;Middlewares/ST/netxduo/common/src/nx_arp_static_entries_delete.c;Middlewares/ST/netxduo/common/src/nx_arp_static_entry_create.c;Middlewares/ST/netxduo/common/src/nx_arp_static_entry_delete.c;Middlewares/ST/netxduo/common/src/nx_arp_static_entry_delete_internal.c;Middlewares/ST/netxduo/common/src/nx_icmp_cleanup.c;Middlewares/ST/netxduo/common/src/nx_icmp_enable.c;Middlewares/ST/netxduo/common/src/nx_icmp_info_get.c;Middlewares/ST/netxduo/common/src/nx_icmp_interface_ping.c;Middlewares/ST/netxduo/common/src/nx_icmp_interface_ping6.c;Middlewares/ST/netxduo/common/src/nx_icmp_packet_process.c;Middlewares/ST/netxduo/common/src/nx_icmp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_icmp_ping.c;Middlewares/ST/netxduo/common/src/nx_icmp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_icmpv4_packet_process.c;Middlewares/ST/netxduo/common/src/nx_icmpv4_process_echo_reply.c;Middlewares/ST/netxduo/common/src/nx_icmpv4_process_echo_request.c;Middlewares/ST/netxduo/common/src/nx_icmpv4_send_error_message.c;Middlewares/ST/netxduo/common/src/nx_igmp_enable.c;Middlewares/ST/netxduo/common/src/nx_igmp_info_get.c;Middlewares/ST/netxduo/common/src/nx_igmp_interface_report_send.c;Middlewares/ST/netxduo/common/src/nx_igmp_loopback_disable.c;Middlewares/ST/netxduo/common/src/nx_igmp_loopback_enable.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_check.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_interface_join_internal.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_interface_leave_internal.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_join.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_leave.c;Middlewares/ST/netxduo/common/src/nx_igmp_packet_process.c;Middlewares/ST/netxduo/common/src/nx_igmp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_igmp_periodic_processing.c;Middlewares/ST/netxduo/common/src/nx_igmp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_invalidate_destination_entry.c;Middlewares/ST/netxduo/common/src/nx_ip_address_change_notify.c;Middlewares/ST/netxduo/common/src/nx_ip_address_get.c;Middlewares/ST/netxduo/common/src/nx_ip_address_set.c;Middlewares/ST/netxduo/common/src/nx_ip_auxiliary_packet_pool_set.c;Middlewares/ST/netxduo/common/src/nx_ip_checksum_compute.c;Middlewares/ST/netxduo/common/src/nx_ip_create.c;Middlewares/ST/netxduo/common/src/nx_ip_deferred_link_status_process.c;Middlewares/ST/netxduo/common/src/nx_ip_delete.c;Middlewares/ST/netxduo/common/src/nx_ip_delete_queue_clear.c;Middlewares/ST/netxduo/common/src/nx_ip_dispatch_process.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_deferred_enable.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_deferred_processing.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_deferred_receive.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_direct_command.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_interface_direct_command.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_link_status_event.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_packet_send.c;Middlewares/ST/netxduo/common/src/nx_ip_fast_periodic_timer_entry.c;Middlewares/ST/netxduo/common/src/nx_ip_forward_packet_process.c;Middlewares/ST/netxduo/common/src/nx_ip_forwarding_disable.c;Middlewares/ST/netxduo/common/src/nx_ip_forwarding_enable.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_assembly.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_disable.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_enable.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_forward_packet.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_packet.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_timeout_check.c;Middlewares/ST/netxduo/common/src/nx_ip_gateway_address_clear.c;Middlewares/ST/netxduo/common/src/nx_ip_gateway_address_get.c;Middlewares/ST/netxduo/common/src/nx_ip_gateway_address_set.c;Middlewares/ST/netxduo/common/src/nx_ip_header_add.c;Middlewares/ST/netxduo/common/src/nx_ip_info_get.c;Middlewares/ST/netxduo/common/src/nx_ip_initialize.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_address_get.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_address_mapping_configure.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_address_set.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_attach.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_capability_get.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_capability_set.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_detach.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_info_get.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_mtu_set.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_physical_address_get.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_physical_address_set.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_status_check.c;Middlewares/ST/netxduo/common/src/nx_ip_link_status_change_notify_set.c;Middlewares/ST/netxduo/common/src/nx_ip_max_payload_size_find.c;Middlewares/ST/netxduo/common/src/nx_ip_packet_checksum_compute.c;Middlewares/ST/netxduo/common/src/nx_ip_packet_deferred_receive.c;Middlewares/ST/netxduo/common/src/nx_ip_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_ip_packet_send.c;Middlewares/ST/netxduo/common/src/nx_ip_periodic_timer_entry.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_cleanup.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_disable.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_enable.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_filter_set.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_processing.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nx_ip_route_find.c;Middlewares/ST/netxduo/common/src/nx_ip_static_route_add.c;Middlewares/ST/netxduo/common/src/nx_ip_static_route_delete.c;Middlewares/ST/netxduo/common/src/nx_ip_status_check.c;Middlewares/ST/netxduo/common/src/nx_ip_thread_entry.c;Middlewares/ST/netxduo/common/src/nx_ipv4_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nx_ipv4_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nx_ipv4_option_process.c;Middlewares/ST/netxduo/common/src/nx_ipv4_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_md5.c;Middlewares/ST/netxduo/common/src/nx_packet_allocate.c;Middlewares/ST/netxduo/common/src/nx_packet_copy.c;Middlewares/ST/netxduo/common/src/nx_packet_data_adjust.c;Middlewares/ST/netxduo/common/src/nx_packet_data_append.c;Middlewares/ST/netxduo/common/src/nx_packet_data_extract_offset.c;Middlewares/ST/netxduo/common/src/nx_packet_data_retrieve.c;Middlewares/ST/netxduo/common/src/nx_packet_debug_info_get.c;Middlewares/ST/netxduo/common/src/nx_packet_length_get.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_cleanup.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_create.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_delete.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_info_get.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_initialize.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_low_watermark_set.c;Middlewares/ST/netxduo/common/src/nx_packet_release.c;Middlewares/ST/netxduo/common/src/nx_packet_transmit_release.c;Middlewares/ST/netxduo/common/src/nx_rarp_disable.c;Middlewares/ST/netxduo/common/src/nx_rarp_enable.c;Middlewares/ST/netxduo/common/src/nx_rarp_info_get.c;Middlewares/ST/netxduo/common/src/nx_rarp_packet_deferred_receive.c;Middlewares/ST/netxduo/common/src/nx_rarp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_rarp_packet_send.c;Middlewares/ST/netxduo/common/src/nx_rarp_periodic_update.c;Middlewares/ST/netxduo/common/src/nx_rarp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_system_initialize.c;Middlewares/ST/netxduo/common/src/nx_tcp_cleanup_deferred.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_bind_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_socket_bind.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_socket_port_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_socket_unbind.c;Middlewares/ST/netxduo/common/src/nx_tcp_connect_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_deferred_cleanup_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_disconnect_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_enable.c;Middlewares/ST/netxduo/common/src/nx_tcp_fast_periodic_processing.c;Middlewares/ST/netxduo/common/src/nx_tcp_free_port_find.c;Middlewares/ST/netxduo/common/src/nx_tcp_info_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_initialize.c;Middlewares/ST/netxduo/common/src/nx_tcp_mss_option_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_no_connection_reset.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_process.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_ack.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_control.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_fin.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_probe.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_rst.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_syn.c;Middlewares/ST/netxduo/common/src/nx_tcp_periodic_processing.c;Middlewares/ST/netxduo/common/src/nx_tcp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_tcp_receive_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_accept.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_listen.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_relisten.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_unaccept.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_unlisten.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_block_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_connection_reset.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_create.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_delete.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_disconnect.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_disconnect_complete_notify.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_establish_notify.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_mss_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_mss_peer_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_mss_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_packet_process.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_queue_depth_notify_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_receive.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_receive_queue_flush.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_retransmit.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_send.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_send_internal.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_ack_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_closing.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_data_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_established.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_fin_wait1.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_fin_wait2.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_last_ack.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_syn_received.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_syn_sent.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_transmit_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_wait.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_thread_resume.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_thread_suspend.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_timed_wait_callback.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_transmit_configure.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_transmit_queue_flush.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_window_update_notify_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_transmit_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_window_scaling_option_get.c;Middlewares/ST/netxduo/common/src/nx_udp_bind_cleanup.c;Middlewares/ST/netxduo/common/src/nx_udp_enable.c;Middlewares/ST/netxduo/common/src/nx_udp_free_port_find.c;Middlewares/ST/netxduo/common/src/nx_udp_info_get.c;Middlewares/ST/netxduo/common/src/nx_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nx_udp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_udp_receive_cleanup.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_bind.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_checksum_disable.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_checksum_enable.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_create.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_delete.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_port_get.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_receive.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_unbind.c;Middlewares/ST/netxduo/common/src/nx_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nx_utility.c;Middlewares/ST/netxduo/common/src/nxd_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxd_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxd_icmp_source_ping.c;Middlewares/ST/netxduo/common/src/nxd_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxd_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxd_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxd_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxd_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxd_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxd_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxd_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nxde_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxde_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxde_icmp_source_ping.c;Middlewares/ST/netxduo/common/src/nxde_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxde_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxde_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxde_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxde_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxde_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxde_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxde_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nxe_arp_dynamic_entries_invalidate.c;Middlewares/ST/netxduo/common/src/nxe_arp_dynamic_entry_set.c;Middlewares/ST/netxduo/common/src/nxe_arp_enable.c;Middlewares/ST/netxduo/common/src/nxe_arp_entry_delete.c;Middlewares/ST/netxduo/common/src/nxe_arp_gratuitous_send.c;Middlewares/ST/netxduo/common/src/nxe_arp_hardware_address_find.c;Middlewares/ST/netxduo/common/src/nxe_arp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_arp_ip_address_find.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entries_delete.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entry_create.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entry_delete.c;Middlewares/ST/netxduo/common/src/nxe_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxe_icmp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxe_igmp_enable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_igmp_loopback_disable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_loopback_enable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_join.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_leave.c;Middlewares/ST/netxduo/common/src/nxe_ip_address_change_notify.c;Middlewares/ST/netxduo/common/src/nxe_ip_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_auxiliary_packet_pool_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_create.c;Middlewares/ST/netxduo/common/src/nxe_ip_delete.c;Middlewares/ST/netxduo/common/src/nxe_ip_driver_direct_command.c;Middlewares/ST/netxduo/common/src/nxe_ip_driver_interface_direct_command.c;Middlewares/ST/netxduo/common/src/nxe_ip_forwarding_disable.c;Middlewares/ST/netxduo/common/src/nxe_ip_forwarding_enable.c;Middlewares/ST/netxduo/common/src/nxe_ip_fragment_disable.c;Middlewares/ST/netxduo/common/src/nxe_ip_fragment_enable.c;Middlewares/ST/netxduo/common/src/nxe_ip_gateway_address_clear.c;Middlewares/ST/netxduo/common/src/nxe_ip_gateway_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_gateway_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_info_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_address_mapping_configure.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_attach.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_capability_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_capability_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_detach.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_info_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_mtu_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_physical_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_physical_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_status_check.c;Middlewares/ST/netxduo/common/src/nxe_ip_link_status_change_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_max_payload_size_find.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_disable.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_enable.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_filter_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_receive.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_static_route_add.c;Middlewares/ST/netxduo/common/src/nxe_ip_static_route_delete.c;Middlewares/ST/netxduo/common/src/nxe_ip_status_check.c;Middlewares/ST/netxduo/common/src/nxe_ipv4_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxe_ipv4_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxe_packet_allocate.c;Middlewares/ST/netxduo/common/src/nxe_packet_copy.c;Middlewares/ST/netxduo/common/src/nxe_packet_data_append.c;Middlewares/ST/netxduo/common/src/nxe_packet_data_extract_offset.c;Middlewares/ST/netxduo/common/src/nxe_packet_data_retrieve.c;Middlewares/ST/netxduo/common/src/nxe_packet_length_get.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_create.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_delete.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_info_get.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_low_watermark_set.c;Middlewares/ST/netxduo/common/src/nxe_packet_release.c;Middlewares/ST/netxduo/common/src/nxe_packet_transmit_release.c;Middlewares/ST/netxduo/common/src/nxe_rarp_disable.c;Middlewares/ST/netxduo/common/src/nxe_rarp_enable.c;Middlewares/ST/netxduo/common/src/nxe_rarp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_bind.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_port_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_unbind.c;Middlewares/ST/netxduo/common/src/nxe_tcp_enable.c;Middlewares/ST/netxduo/common/src/nxe_tcp_free_port_find.c;Middlewares/ST/netxduo/common/src/nxe_tcp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_accept.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_listen.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_relisten.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_unaccept.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_unlisten.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_create.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_delete.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_disconnect.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_disconnect_complete_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_establish_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_peer_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_queue_depth_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_send.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_state_wait.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_timed_wait_callback.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_transmit_configure.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_window_update_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_udp_enable.c;Middlewares/ST/netxduo/common/src/nxe_udp_free_port_find.c;Middlewares/ST/netxduo/common/src/nxe_udp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_bind.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_checksum_disable.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_checksum_enable.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_create.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_delete.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_port_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_receive.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_unbind.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nxe_packet_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nx_packet_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nxe_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nx_icmp_ping6.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_DAD_clear_NDCache_entry.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_DAD_failure.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_dest_table_add.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_dest_table_find.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_destination_table_periodic_update.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_packet_process.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_perform_DAD.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_echo_reply.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_echo_request.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_na.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_ns.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_packet_too_big.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_ra.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_redirect.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_error_message.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_ns.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_queued_packets.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_rs.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_validate_neighbor_message.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_validate_options.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_validate_ra.c;Middlewares/ST/netxduo/common/src/nx_ipv6_fragment_process.c;Middlewares/ST/netxduo/common/src/nx_ipv6_header_add.c;Middlewares/ST/netxduo/common/src/nx_ipv6_multicast_join.c;Middlewares/ST/netxduo/common/src/nx_ipv6_multicast_leave.c;Middlewares/ST/netxduo/common/src/nx_ipv6_option_error.c;Middlewares/ST/netxduo/common/src/nx_ipv6_packet_copy.c;Middlewares/ST/netxduo/common/src/nx_ipv6_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_ipv6_packet_send.c;Middlewares/ST/netxduo/common/src/nx_ipv6_prefix_list_add_entry.c;Middlewares/ST/netxduo/common/src/nx_ipv6_prefix_list_delete.c;Middlewares/ST/netxduo/common/src/nx_ipv6_prefix_list_delete_entry.c;Middlewares/ST/netxduo/common/src/nx_ipv6_process_fragment_option.c;Middlewares/ST/netxduo/common/src/nx_ipv6_process_hop_by_hop_option.c;Middlewares/ST/netxduo/common/src/nx_ipv6_process_routing_option.c;Middlewares/ST/netxduo/common/src/nx_ipv6_util.c;Middlewares/ST/netxduo/common/src/nx_link.c;Middlewares/ST/netxduo/common/src/nxd_icmpv6_ra_flag_callback_set.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_address_change_notify.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_address_delete.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_address_get.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_address_set.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_add.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_add_internal.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_delete.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_entry_get.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_get.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_number_of_entries_get.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_table_init.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_destination_table_find_next_hop.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_disable.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_enable.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_find_default_router_from_address.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_find_max_prefix_length.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_interface_find.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_prefix_router_timer_tick.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_raw_packet_send_internal.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_router_lookup.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_router_solicitation_check.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_search_onlink.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_stateless_address_autoconfig_disable.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_stateless_address_autoconfig_enable.c;Middlewares/ST/netxduo/common/src/nxde_icmpv6_ra_flag_callback_set.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_address_change_notify.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_address_delete.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_address_get.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_address_set.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_add.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_delete.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_entry_get.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_get.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_number_of_entries_get.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_disable.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_enable.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_stateless_address_autoconfig_disable.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_stateless_address_autoconfig_enable.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_entry_delete.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_entry_set.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_hardware_address_find.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_invalidate.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_ip_address_find.c;Middlewares/ST/netxduo/common/src/nx_http_proxy_client.c;Middlewares/ST/threadx/common/src/tx_initialize_high_level.c;Middlewares/ST/threadx/common/src/tx_initialize_kernel_enter.c;Middlewares/ST/threadx/common/src/tx_initialize_kernel_setup.c;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_context_restore.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_context_save.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_interrupt_control.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_interrupt_disable.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_interrupt_restore.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_schedule.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_stack_build.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_system_return.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_timer_interrupt.S;Middlewares/ST/threadx/common/src/tx_thread_stack_error_handler.c;Middlewares/ST/threadx/common/src/tx_thread_stack_error_notify.c;Middlewares/ST/threadx/common/src/tx_thread_system_resume.c;Middlewares/ST/threadx/common/src/tx_block_allocate.c;Middlewares/ST/threadx/common/src/tx_block_pool_cleanup.c;Middlewares/ST/threadx/common/src/tx_block_pool_create.c;Middlewares/ST/threadx/common/src/tx_block_pool_delete.c;Middlewares/ST/threadx/common/src/tx_block_pool_info_get.c;Middlewares/ST/threadx/common/src/tx_block_pool_initialize.c;Middlewares/ST/threadx/common/src/tx_block_pool_prioritize.c;Middlewares/ST/threadx/common/src/tx_block_release.c;Middlewares/ST/threadx/common/src/tx_byte_allocate.c;Middlewares/ST/threadx/common/src/tx_byte_pool_cleanup.c;Middlewares/ST/threadx/common/src/tx_byte_pool_create.c;Middlewares/ST/threadx/common/src/tx_byte_pool_delete.c;Middlewares/ST/threadx/common/src/tx_byte_pool_info_get.c;Middlewares/ST/threadx/common/src/tx_byte_pool_initialize.c;Middlewares/ST/threadx/common/src/tx_byte_pool_prioritize.c;Middlewares/ST/threadx/common/src/tx_byte_pool_search.c;Middlewares/ST/threadx/common/src/tx_byte_release.c;Middlewares/ST/threadx/common/src/tx_event_flags_cleanup.c;Middlewares/ST/threadx/common/src/tx_event_flags_create.c;Middlewares/ST/threadx/common/src/tx_event_flags_delete.c;Middlewares/ST/threadx/common/src/tx_event_flags_get.c;Middlewares/ST/threadx/common/src/tx_event_flags_info_get.c;Middlewares/ST/threadx/common/src/tx_event_flags_initialize.c;Middlewares/ST/threadx/common/src/tx_event_flags_set.c;Middlewares/ST/threadx/common/src/tx_event_flags_set_notify.c;Middlewares/ST/threadx/common/src/tx_mutex_cleanup.c;Middlewares/ST/threadx/common/src/tx_mutex_create.c;Middlewares/ST/threadx/common/src/tx_mutex_delete.c;Middlewares/ST/threadx/common/src/tx_mutex_get.c;Middlewares/ST/threadx/common/src/tx_mutex_info_get.c;Middlewares/ST/threadx/common/src/tx_mutex_initialize.c;Middlewares/ST/threadx/common/src/tx_mutex_prioritize.c;Middlewares/ST/threadx/common/src/tx_mutex_priority_change.c;Middlewares/ST/threadx/common/src/tx_mutex_put.c;Middlewares/ST/threadx/common/src/tx_queue_cleanup.c;Middlewares/ST/threadx/common/src/tx_queue_create.c;Middlewares/ST/threadx/common/src/tx_queue_delete.c;Middlewares/ST/threadx/common/src/tx_queue_flush.c;Middlewares/ST/threadx/common/src/tx_queue_front_send.c;Middlewares/ST/threadx/common/src/tx_queue_info_get.c;Middlewares/ST/threadx/common/src/tx_queue_initialize.c;Middlewares/ST/threadx/common/src/tx_queue_prioritize.c;Middlewares/ST/threadx/common/src/tx_queue_receive.c;Middlewares/ST/threadx/common/src/tx_queue_send.c;Middlewares/ST/threadx/common/src/tx_queue_send_notify.c;Middlewares/ST/threadx/common/src/tx_semaphore_ceiling_put.c;Middlewares/ST/threadx/common/src/tx_semaphore_cleanup.c;Middlewares/ST/threadx/common/src/tx_semaphore_create.c;Middlewares/ST/threadx/common/src/tx_semaphore_delete.c;Middlewares/ST/threadx/common/src/tx_semaphore_get.c;Middlewares/ST/threadx/common/src/tx_semaphore_info_get.c;Middlewares/ST/threadx/common/src/tx_semaphore_initialize.c;Middlewares/ST/threadx/common/src/tx_semaphore_prioritize.c;Middlewares/ST/threadx/common/src/tx_semaphore_put.c;Middlewares/ST/threadx/common/src/tx_semaphore_put_notify.c;Middlewares/ST/threadx/common/src/tx_thread_create.c;Middlewares/ST/threadx/common/src/tx_thread_delete.c;Middlewares/ST/threadx/common/src/tx_thread_entry_exit_notify.c;Middlewares/ST/threadx/common/src/tx_thread_identify.c;Middlewares/ST/threadx/common/src/tx_thread_info_get.c;Middlewares/ST/threadx/common/src/tx_thread_initialize.c;Middlewares/ST/threadx/common/src/tx_thread_preemption_change.c;Middlewares/ST/threadx/common/src/tx_thread_priority_change.c;Middlewares/ST/threadx/common/src/tx_thread_relinquish.c;Middlewares/ST/threadx/common/src/tx_thread_reset.c;Middlewares/ST/threadx/common/src/tx_thread_resume.c;Middlewares/ST/threadx/common/src/tx_thread_shell_entry.c;Middlewares/ST/threadx/common/src/tx_thread_sleep.c;Middlewares/ST/threadx/common/src/tx_thread_stack_analyze.c;Middlewares/ST/threadx/common/src/tx_thread_suspend.c;Middlewares/ST/threadx/common/src/tx_thread_system_preempt_check.c;Middlewares/ST/threadx/common/src/tx_thread_system_suspend.c;Middlewares/ST/threadx/common/src/tx_thread_terminate.c;Middlewares/ST/threadx/common/src/tx_thread_time_slice.c;Middlewares/ST/threadx/common/src/tx_thread_time_slice_change.c;Middlewares/ST/threadx/common/src/tx_thread_timeout.c;Middlewares/ST/threadx/common/src/tx_thread_wait_abort.c;Middlewares/ST/threadx/common/src/tx_time_get.c;Middlewares/ST/threadx/common/src/tx_time_set.c;Middlewares/ST/threadx/common/src/txe_block_allocate.c;Middlewares/ST/threadx/common/src/txe_block_pool_create.c;Middlewares/ST/threadx/common/src/txe_block_pool_delete.c;Middlewares/ST/threadx/common/src/txe_block_pool_info_get.c;Middlewares/ST/threadx/common/src/txe_block_pool_prioritize.c;Middlewares/ST/threadx/common/src/txe_block_release.c;Middlewares/ST/threadx/common/src/txe_byte_allocate.c;Middlewares/ST/threadx/common/src/txe_byte_pool_create.c;Middlewares/ST/threadx/common/src/txe_byte_pool_delete.c;Middlewares/ST/threadx/common/src/txe_byte_pool_info_get.c;Middlewares/ST/threadx/common/src/txe_byte_pool_prioritize.c;Middlewares/ST/threadx/common/src/txe_byte_release.c;Middlewares/ST/threadx/common/src/txe_event_flags_create.c;Middlewares/ST/threadx/common/src/txe_event_flags_delete.c;Middlewares/ST/threadx/common/src/txe_event_flags_get.c;Middlewares/ST/threadx/common/src/txe_event_flags_info_get.c;Middlewares/ST/threadx/common/src/txe_event_flags_set.c;Middlewares/ST/threadx/common/src/txe_event_flags_set_notify.c;Middlewares/ST/threadx/common/src/txe_mutex_create.c;Middlewares/ST/threadx/common/src/txe_mutex_delete.c;Middlewares/ST/threadx/common/src/txe_mutex_get.c;Middlewares/ST/threadx/common/src/txe_mutex_info_get.c;Middlewares/ST/threadx/common/src/txe_mutex_prioritize.c;Middlewares/ST/threadx/common/src/txe_mutex_put.c;Middlewares/ST/threadx/common/src/txe_queue_create.c;Middlewares/ST/threadx/common/src/txe_queue_delete.c;Middlewares/ST/threadx/common/src/txe_queue_flush.c;Middlewares/ST/threadx/common/src/txe_queue_front_send.c;Middlewares/ST/threadx/common/src/txe_queue_info_get.c;Middlewares/ST/threadx/common/src/txe_queue_prioritize.c;Middlewares/ST/threadx/common/src/txe_queue_receive.c;Middlewares/ST/threadx/common/src/txe_queue_send.c;Middlewares/ST/threadx/common/src/txe_queue_send_notify.c;Middlewares/ST/threadx/common/src/txe_semaphore_ceiling_put.c;Middlewares/ST/threadx/common/src/txe_semaphore_create.c;Middlewares/ST/threadx/common/src/txe_semaphore_delete.c;Middlewares/ST/threadx/common/src/txe_semaphore_get.c;Middlewares/ST/threadx/common/src/txe_semaphore_info_get.c;Middlewares/ST/threadx/common/src/txe_semaphore_prioritize.c;Middlewares/ST/threadx/common/src/txe_semaphore_put.c;Middlewares/ST/threadx/common/src/txe_semaphore_put_notify.c;Middlewares/ST/threadx/common/src/txe_thread_create.c;Middlewares/ST/threadx/common/src/txe_thread_delete.c;Middlewares/ST/threadx/common/src/txe_thread_entry_exit_notify.c;Middlewares/ST/threadx/common/src/txe_thread_info_get.c;Middlewares/ST/threadx/common/src/txe_thread_preemption_change.c;Middlewares/ST/threadx/common/src/txe_thread_priority_change.c;Middlewares/ST/threadx/common/src/txe_thread_relinquish.c;Middlewares/ST/threadx/common/src/txe_thread_reset.c;Middlewares/ST/threadx/common/src/txe_thread_resume.c;Middlewares/ST/threadx/common/src/txe_thread_suspend.c;Middlewares/ST/threadx/common/src/txe_thread_terminate.c;Middlewares/ST/threadx/common/src/txe_thread_time_slice_change.c;Middlewares/ST/threadx/common/src/txe_thread_wait_abort.c;Middlewares/ST/threadx/common/src/tx_timer_activate.c;Middlewares/ST/threadx/common/src/tx_timer_change.c;Middlewares/ST/threadx/common/src/tx_timer_create.c;Middlewares/ST/threadx/common/src/tx_timer_deactivate.c;Middlewares/ST/threadx/common/src/tx_timer_delete.c;Middlewares/ST/threadx/common/src/tx_timer_expiration_process.c;Middlewares/ST/threadx/common/src/tx_timer_info_get.c;Middlewares/ST/threadx/common/src/tx_timer_initialize.c;Middlewares/ST/threadx/common/src/tx_timer_system_activate.c;Middlewares/ST/threadx/common/src/tx_timer_system_deactivate.c;Middlewares/ST/threadx/common/src/tx_timer_thread_entry.c;Middlewares/ST/threadx/common/src/txe_timer_activate.c;Middlewares/ST/threadx/common/src/txe_timer_change.c;Middlewares/ST/threadx/common/src/txe_timer_create.c;Middlewares/ST/threadx/common/src/txe_timer_deactivate.c;Middlewares/ST/threadx/common/src/txe_timer_delete.c;Middlewares/ST/threadx/common/src/txe_timer_info_get.c;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_tim.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_tim_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_cortex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_cortex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_dcache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_dcache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_rcc.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_rcc_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_bus.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_rcc.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_crs.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_system.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_utils.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_flash.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_flash_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_gpio.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_gpio_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_gpio.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_dma.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_dma_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_dma.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_dmamux.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_pwr.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_pwr_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_pwr.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_def.h;Drivers/STM32H5xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_exti.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_exti.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_fdcan.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_icache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_icache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_iwdg.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_iwdg.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_uart.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_usart.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_lpuart.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_uart_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_spi.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_spi.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_spi_ex.h;Middlewares/ST/threadx/common/inc/tx_api.h;Middlewares/ST/threadx/common/inc/tx_block_pool.h;Middlewares/ST/threadx/common/inc/tx_byte_pool.h;Middlewares/ST/threadx/common/inc/tx_event_flags.h;Middlewares/ST/threadx/common/inc/tx_initialize.h;Middlewares/ST/threadx/common/inc/tx_mutex.h;Middlewares/ST/threadx/common/inc/tx_queue.h;Middlewares/ST/threadx/common/inc/tx_semaphore.h;Middlewares/ST/threadx/common/inc/tx_thread.h;Middlewares/ST/threadx/common/inc/tx_timer.h;Middlewares/ST/threadx/common/inc/tx_trace.h;Drivers/CMSIS/Device/ST/STM32H5xx/Include/stm32h563xx.h;Drivers/CMSIS/Device/ST/STM32H5xx/Include/stm32h5xx.h;Drivers/CMSIS/Device/ST/STM32H5xx/Include/system_stm32h5xx.h;Drivers/CMSIS/Device/ST/STM32H5xx/Include/system_stm32h5xx.h;Drivers/CMSIS/Device/ST/STM32H5xx/Source/Templates/system_stm32h5xx.c;Middlewares/ST/netxduo/common/inc/nx_packet.h;Middlewares/ST/netxduo/common/inc/nx_arp.h;Middlewares/ST/netxduo/common/inc/nx_ip.h;Middlewares/ST/netxduo/common/inc/nx_link.h;Middlewares/ST/netxduo/common/inc/nx_tcp.h;Middlewares/ST/netxduo/common/inc/nx_system.h;Middlewares/ST/netxduo/common/inc/nx_api.h;Middlewares/ST/netxduo/common/inc/nx_user_sample.h;Middlewares/ST/netxduo/common/inc/nx_md5.h;Middlewares/ST/netxduo/common/inc/nx_rarp.h;Middlewares/ST/netxduo/common/inc/nx_http_proxy_client.h;Middlewares/ST/netxduo/common/inc/nx_icmpv6.h;Middlewares/ST/netxduo/common/inc/nx_icmpv4.h;Middlewares/ST/netxduo/common/inc/nx_nd_cache.h;Middlewares/ST/netxduo/common/inc/nx_igmp.h;Middlewares/ST/netxduo/common/inc/nx_icmp.h;Middlewares/ST/netxduo/common/inc/nx_udp.h;Middlewares/ST/netxduo/common/inc/nx_mld.h;Middlewares/ST/netxduo/common/inc/nx_ipv4.h;Middlewares/ST/netxduo/common/inc/nx_ipv6.h;Middlewares/ST/netxduo/ports/cortex_m33/gnu/inc/nx_port.h;Middlewares/ST/threadx/ports/cortex_m33/gnu/inc/tx_port.h;Middlewares/ST/threadx/ports/cortex_m33/gnu/inc/tx_secure_interface.h;Middlewares/ST/netxduo/common/inc/nx_packet.h;Middlewares/ST/netxduo/common/inc/nx_arp.h;Middlewares/ST/netxduo/common/inc/nx_ip.h;Middlewares/ST/netxduo/common/inc/nx_link.h;Middlewares/ST/netxduo/common/inc/nx_tcp.h;Middlewares/ST/netxduo/common/inc/nx_system.h;Middlewares/ST/netxduo/common/inc/nx_api.h;Middlewares/ST/netxduo/common/inc/nx_user_sample.h;Middlewares/ST/netxduo/common/inc/nx_md5.h;Middlewares/ST/netxduo/common/inc/nx_rarp.h;Middlewares/ST/netxduo/common/inc/nx_http_proxy_client.h;Middlewares/ST/netxduo/common/inc/nx_icmpv6.h;Middlewares/ST/netxduo/common/inc/nx_icmpv4.h;Middlewares/ST/netxduo/common/inc/nx_nd_cache.h;Middlewares/ST/netxduo/common/inc/nx_igmp.h;Middlewares/ST/netxduo/common/inc/nx_icmp.h;Middlewares/ST/netxduo/common/inc/nx_udp.h;Middlewares/ST/netxduo/common/inc/nx_mld.h;Middlewares/ST/netxduo/common/inc/nx_ipv4.h;Middlewares/ST/netxduo/common/inc/nx_ipv6.h;Middlewares/ST/netxduo/ports/cortex_m33/gnu/inc/nx_port.h;Middlewares/ST/threadx/ports/cortex_m33/gnu/inc/tx_port.h;Middlewares/ST/threadx/ports/cortex_m33/gnu/inc/tx_secure_interface.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/core_cm35p.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/pmu_armv8.h;Drivers/CMSIS/Include/cachel1_armv7.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm55.h;Drivers/CMSIS/Include/cmsis_armclang_ltm.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_starmc1.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_cm85.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_armv81mml.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/pac_armv81.h; +LibFiles=Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_tim.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_tim_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_cortex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_cortex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_dcache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_dcache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_rcc.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_rcc_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_bus.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_rcc.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_crs.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_system.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_utils.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_flash.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_flash_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_gpio.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_gpio_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_gpio.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_dma.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_dma_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_dma.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_dmamux.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_pwr.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_pwr_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_pwr.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_def.h;Drivers/STM32H5xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_exti.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_exti.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_fdcan.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_icache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_icache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_iwdg.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_iwdg.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_uart.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_usart.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_lpuart.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_uart_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_spi.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_spi.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_spi_ex.h;Middlewares/ST/threadx/common/inc/tx_api.h;Middlewares/ST/threadx/common/inc/tx_block_pool.h;Middlewares/ST/threadx/common/inc/tx_byte_pool.h;Middlewares/ST/threadx/common/inc/tx_event_flags.h;Middlewares/ST/threadx/common/inc/tx_initialize.h;Middlewares/ST/threadx/common/inc/tx_mutex.h;Middlewares/ST/threadx/common/inc/tx_queue.h;Middlewares/ST/threadx/common/inc/tx_semaphore.h;Middlewares/ST/threadx/common/inc/tx_thread.h;Middlewares/ST/threadx/common/inc/tx_timer.h;Middlewares/ST/threadx/common/inc/tx_trace.h;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_tim.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_tim_ex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_cortex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_dcache.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_rcc.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_rcc_ex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_flash.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_flash_ex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_gpio.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_dma.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_dma_ex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_pwr.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_pwr_ex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_exti.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_fdcan.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_icache.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_iwdg.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_uart.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_uart_ex.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_spi.c;Drivers/STM32H5xx_HAL_Driver/Src/stm32h5xx_hal_spi_ex.c;Middlewares/ST/netxduo/common/src/nx_arp_announce_send.c;Middlewares/ST/netxduo/common/src/nx_arp_dynamic_entries_invalidate.c;Middlewares/ST/netxduo/common/src/nx_arp_dynamic_entry_delete.c;Middlewares/ST/netxduo/common/src/nx_arp_dynamic_entry_set.c;Middlewares/ST/netxduo/common/src/nx_arp_enable.c;Middlewares/ST/netxduo/common/src/nx_arp_entry_allocate.c;Middlewares/ST/netxduo/common/src/nx_arp_entry_delete.c;Middlewares/ST/netxduo/common/src/nx_arp_gratuitous_send.c;Middlewares/ST/netxduo/common/src/nx_arp_hardware_address_find.c;Middlewares/ST/netxduo/common/src/nx_arp_info_get.c;Middlewares/ST/netxduo/common/src/nx_arp_initialize.c;Middlewares/ST/netxduo/common/src/nx_arp_interface_entries_delete.c;Middlewares/ST/netxduo/common/src/nx_arp_ip_address_find.c;Middlewares/ST/netxduo/common/src/nx_arp_packet_deferred_receive.c;Middlewares/ST/netxduo/common/src/nx_arp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_arp_packet_send.c;Middlewares/ST/netxduo/common/src/nx_arp_periodic_update.c;Middlewares/ST/netxduo/common/src/nx_arp_probe_send.c;Middlewares/ST/netxduo/common/src/nx_arp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_arp_queue_send.c;Middlewares/ST/netxduo/common/src/nx_arp_static_entries_delete.c;Middlewares/ST/netxduo/common/src/nx_arp_static_entry_create.c;Middlewares/ST/netxduo/common/src/nx_arp_static_entry_delete.c;Middlewares/ST/netxduo/common/src/nx_arp_static_entry_delete_internal.c;Middlewares/ST/netxduo/common/src/nx_icmp_cleanup.c;Middlewares/ST/netxduo/common/src/nx_icmp_enable.c;Middlewares/ST/netxduo/common/src/nx_icmp_info_get.c;Middlewares/ST/netxduo/common/src/nx_icmp_interface_ping.c;Middlewares/ST/netxduo/common/src/nx_icmp_interface_ping6.c;Middlewares/ST/netxduo/common/src/nx_icmp_packet_process.c;Middlewares/ST/netxduo/common/src/nx_icmp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_icmp_ping.c;Middlewares/ST/netxduo/common/src/nx_icmp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_icmpv4_packet_process.c;Middlewares/ST/netxduo/common/src/nx_icmpv4_process_echo_reply.c;Middlewares/ST/netxduo/common/src/nx_icmpv4_process_echo_request.c;Middlewares/ST/netxduo/common/src/nx_icmpv4_send_error_message.c;Middlewares/ST/netxduo/common/src/nx_igmp_enable.c;Middlewares/ST/netxduo/common/src/nx_igmp_info_get.c;Middlewares/ST/netxduo/common/src/nx_igmp_interface_report_send.c;Middlewares/ST/netxduo/common/src/nx_igmp_loopback_disable.c;Middlewares/ST/netxduo/common/src/nx_igmp_loopback_enable.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_check.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_interface_join_internal.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_interface_leave_internal.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_join.c;Middlewares/ST/netxduo/common/src/nx_igmp_multicast_leave.c;Middlewares/ST/netxduo/common/src/nx_igmp_packet_process.c;Middlewares/ST/netxduo/common/src/nx_igmp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_igmp_periodic_processing.c;Middlewares/ST/netxduo/common/src/nx_igmp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_invalidate_destination_entry.c;Middlewares/ST/netxduo/common/src/nx_ip_address_change_notify.c;Middlewares/ST/netxduo/common/src/nx_ip_address_get.c;Middlewares/ST/netxduo/common/src/nx_ip_address_set.c;Middlewares/ST/netxduo/common/src/nx_ip_auxiliary_packet_pool_set.c;Middlewares/ST/netxduo/common/src/nx_ip_checksum_compute.c;Middlewares/ST/netxduo/common/src/nx_ip_create.c;Middlewares/ST/netxduo/common/src/nx_ip_deferred_link_status_process.c;Middlewares/ST/netxduo/common/src/nx_ip_delete.c;Middlewares/ST/netxduo/common/src/nx_ip_delete_queue_clear.c;Middlewares/ST/netxduo/common/src/nx_ip_dispatch_process.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_deferred_enable.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_deferred_processing.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_deferred_receive.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_direct_command.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_interface_direct_command.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_link_status_event.c;Middlewares/ST/netxduo/common/src/nx_ip_driver_packet_send.c;Middlewares/ST/netxduo/common/src/nx_ip_fast_periodic_timer_entry.c;Middlewares/ST/netxduo/common/src/nx_ip_forward_packet_process.c;Middlewares/ST/netxduo/common/src/nx_ip_forwarding_disable.c;Middlewares/ST/netxduo/common/src/nx_ip_forwarding_enable.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_assembly.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_disable.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_enable.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_forward_packet.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_packet.c;Middlewares/ST/netxduo/common/src/nx_ip_fragment_timeout_check.c;Middlewares/ST/netxduo/common/src/nx_ip_gateway_address_clear.c;Middlewares/ST/netxduo/common/src/nx_ip_gateway_address_get.c;Middlewares/ST/netxduo/common/src/nx_ip_gateway_address_set.c;Middlewares/ST/netxduo/common/src/nx_ip_header_add.c;Middlewares/ST/netxduo/common/src/nx_ip_info_get.c;Middlewares/ST/netxduo/common/src/nx_ip_initialize.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_address_get.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_address_mapping_configure.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_address_set.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_attach.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_capability_get.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_capability_set.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_detach.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_info_get.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_mtu_set.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_physical_address_get.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_physical_address_set.c;Middlewares/ST/netxduo/common/src/nx_ip_interface_status_check.c;Middlewares/ST/netxduo/common/src/nx_ip_link_status_change_notify_set.c;Middlewares/ST/netxduo/common/src/nx_ip_max_payload_size_find.c;Middlewares/ST/netxduo/common/src/nx_ip_packet_checksum_compute.c;Middlewares/ST/netxduo/common/src/nx_ip_packet_deferred_receive.c;Middlewares/ST/netxduo/common/src/nx_ip_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_ip_packet_send.c;Middlewares/ST/netxduo/common/src/nx_ip_periodic_timer_entry.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_cleanup.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_disable.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_enable.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_filter_set.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_processing.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nx_ip_raw_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nx_ip_route_find.c;Middlewares/ST/netxduo/common/src/nx_ip_static_route_add.c;Middlewares/ST/netxduo/common/src/nx_ip_static_route_delete.c;Middlewares/ST/netxduo/common/src/nx_ip_status_check.c;Middlewares/ST/netxduo/common/src/nx_ip_thread_entry.c;Middlewares/ST/netxduo/common/src/nx_ipv4_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nx_ipv4_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nx_ipv4_option_process.c;Middlewares/ST/netxduo/common/src/nx_ipv4_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_md5.c;Middlewares/ST/netxduo/common/src/nx_packet_allocate.c;Middlewares/ST/netxduo/common/src/nx_packet_copy.c;Middlewares/ST/netxduo/common/src/nx_packet_data_adjust.c;Middlewares/ST/netxduo/common/src/nx_packet_data_append.c;Middlewares/ST/netxduo/common/src/nx_packet_data_extract_offset.c;Middlewares/ST/netxduo/common/src/nx_packet_data_retrieve.c;Middlewares/ST/netxduo/common/src/nx_packet_debug_info_get.c;Middlewares/ST/netxduo/common/src/nx_packet_length_get.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_cleanup.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_create.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_delete.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_info_get.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_initialize.c;Middlewares/ST/netxduo/common/src/nx_packet_pool_low_watermark_set.c;Middlewares/ST/netxduo/common/src/nx_packet_release.c;Middlewares/ST/netxduo/common/src/nx_packet_transmit_release.c;Middlewares/ST/netxduo/common/src/nx_rarp_disable.c;Middlewares/ST/netxduo/common/src/nx_rarp_enable.c;Middlewares/ST/netxduo/common/src/nx_rarp_info_get.c;Middlewares/ST/netxduo/common/src/nx_rarp_packet_deferred_receive.c;Middlewares/ST/netxduo/common/src/nx_rarp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_rarp_packet_send.c;Middlewares/ST/netxduo/common/src/nx_rarp_periodic_update.c;Middlewares/ST/netxduo/common/src/nx_rarp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_system_initialize.c;Middlewares/ST/netxduo/common/src/nx_tcp_cleanup_deferred.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_bind_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_socket_bind.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_socket_port_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_client_socket_unbind.c;Middlewares/ST/netxduo/common/src/nx_tcp_connect_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_deferred_cleanup_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_disconnect_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_enable.c;Middlewares/ST/netxduo/common/src/nx_tcp_fast_periodic_processing.c;Middlewares/ST/netxduo/common/src/nx_tcp_free_port_find.c;Middlewares/ST/netxduo/common/src/nx_tcp_info_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_initialize.c;Middlewares/ST/netxduo/common/src/nx_tcp_mss_option_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_no_connection_reset.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_process.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_ack.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_control.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_fin.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_probe.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_rst.c;Middlewares/ST/netxduo/common/src/nx_tcp_packet_send_syn.c;Middlewares/ST/netxduo/common/src/nx_tcp_periodic_processing.c;Middlewares/ST/netxduo/common/src/nx_tcp_queue_process.c;Middlewares/ST/netxduo/common/src/nx_tcp_receive_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_accept.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_listen.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_relisten.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_unaccept.c;Middlewares/ST/netxduo/common/src/nx_tcp_server_socket_unlisten.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_block_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_connection_reset.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_create.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_delete.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_disconnect.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_disconnect_complete_notify.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_establish_notify.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_mss_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_mss_peer_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_mss_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_packet_process.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_queue_depth_notify_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_receive.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_receive_queue_flush.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_retransmit.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_send.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_send_internal.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_ack_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_closing.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_data_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_established.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_fin_wait1.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_fin_wait2.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_last_ack.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_syn_received.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_syn_sent.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_transmit_check.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_state_wait.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_thread_resume.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_thread_suspend.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_timed_wait_callback.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_transmit_configure.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_transmit_queue_flush.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_window_update_notify_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_transmit_cleanup.c;Middlewares/ST/netxduo/common/src/nx_tcp_window_scaling_option_get.c;Middlewares/ST/netxduo/common/src/nx_udp_bind_cleanup.c;Middlewares/ST/netxduo/common/src/nx_udp_enable.c;Middlewares/ST/netxduo/common/src/nx_udp_free_port_find.c;Middlewares/ST/netxduo/common/src/nx_udp_info_get.c;Middlewares/ST/netxduo/common/src/nx_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nx_udp_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_udp_receive_cleanup.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_bind.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_checksum_disable.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_checksum_enable.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_create.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_delete.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_port_get.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_receive.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_unbind.c;Middlewares/ST/netxduo/common/src/nx_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nx_utility.c;Middlewares/ST/netxduo/common/src/nxd_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxd_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxd_icmp_source_ping.c;Middlewares/ST/netxduo/common/src/nxd_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxd_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxd_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxd_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxd_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxd_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxd_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxd_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nxde_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxde_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxde_icmp_source_ping.c;Middlewares/ST/netxduo/common/src/nxde_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxde_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxde_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxde_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxde_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxde_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxde_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxde_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nxe_arp_dynamic_entries_invalidate.c;Middlewares/ST/netxduo/common/src/nxe_arp_dynamic_entry_set.c;Middlewares/ST/netxduo/common/src/nxe_arp_enable.c;Middlewares/ST/netxduo/common/src/nxe_arp_entry_delete.c;Middlewares/ST/netxduo/common/src/nxe_arp_gratuitous_send.c;Middlewares/ST/netxduo/common/src/nxe_arp_hardware_address_find.c;Middlewares/ST/netxduo/common/src/nxe_arp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_arp_ip_address_find.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entries_delete.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entry_create.c;Middlewares/ST/netxduo/common/src/nxe_arp_static_entry_delete.c;Middlewares/ST/netxduo/common/src/nxe_icmp_enable.c;Middlewares/ST/netxduo/common/src/nxe_icmp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_icmp_ping.c;Middlewares/ST/netxduo/common/src/nxe_igmp_enable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_igmp_loopback_disable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_loopback_enable.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_join.c;Middlewares/ST/netxduo/common/src/nxe_igmp_multicast_leave.c;Middlewares/ST/netxduo/common/src/nxe_ip_address_change_notify.c;Middlewares/ST/netxduo/common/src/nxe_ip_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_auxiliary_packet_pool_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_create.c;Middlewares/ST/netxduo/common/src/nxe_ip_delete.c;Middlewares/ST/netxduo/common/src/nxe_ip_driver_direct_command.c;Middlewares/ST/netxduo/common/src/nxe_ip_driver_interface_direct_command.c;Middlewares/ST/netxduo/common/src/nxe_ip_forwarding_disable.c;Middlewares/ST/netxduo/common/src/nxe_ip_forwarding_enable.c;Middlewares/ST/netxduo/common/src/nxe_ip_fragment_disable.c;Middlewares/ST/netxduo/common/src/nxe_ip_fragment_enable.c;Middlewares/ST/netxduo/common/src/nxe_ip_gateway_address_clear.c;Middlewares/ST/netxduo/common/src/nxe_ip_gateway_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_gateway_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_info_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_address_mapping_configure.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_attach.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_capability_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_capability_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_detach.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_info_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_mtu_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_physical_address_get.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_physical_address_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_interface_status_check.c;Middlewares/ST/netxduo/common/src/nxe_ip_link_status_change_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_max_payload_size_find.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_disable.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_enable.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_filter_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_receive.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_send.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_packet_source_send.c;Middlewares/ST/netxduo/common/src/nxe_ip_raw_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nxe_ip_static_route_add.c;Middlewares/ST/netxduo/common/src/nxe_ip_static_route_delete.c;Middlewares/ST/netxduo/common/src/nxe_ip_status_check.c;Middlewares/ST/netxduo/common/src/nxe_ipv4_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxe_ipv4_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxe_packet_allocate.c;Middlewares/ST/netxduo/common/src/nxe_packet_copy.c;Middlewares/ST/netxduo/common/src/nxe_packet_data_append.c;Middlewares/ST/netxduo/common/src/nxe_packet_data_extract_offset.c;Middlewares/ST/netxduo/common/src/nxe_packet_data_retrieve.c;Middlewares/ST/netxduo/common/src/nxe_packet_length_get.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_create.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_delete.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_info_get.c;Middlewares/ST/netxduo/common/src/nxe_packet_pool_low_watermark_set.c;Middlewares/ST/netxduo/common/src/nxe_packet_release.c;Middlewares/ST/netxduo/common/src/nxe_packet_transmit_release.c;Middlewares/ST/netxduo/common/src/nxe_rarp_disable.c;Middlewares/ST/netxduo/common/src/nxe_rarp_enable.c;Middlewares/ST/netxduo/common/src/nxe_rarp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_bind.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_connect.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_port_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_client_socket_unbind.c;Middlewares/ST/netxduo/common/src/nxe_tcp_enable.c;Middlewares/ST/netxduo/common/src/nxe_tcp_free_port_find.c;Middlewares/ST/netxduo/common/src/nxe_tcp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_accept.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_listen.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_relisten.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_unaccept.c;Middlewares/ST/netxduo/common/src/nxe_tcp_server_socket_unlisten.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_create.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_delete.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_disconnect.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_disconnect_complete_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_establish_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_peer_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_mss_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_peer_info_get.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_queue_depth_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_receive_queue_max_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_send.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_state_wait.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_timed_wait_callback.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_transmit_configure.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_window_update_notify_set.c;Middlewares/ST/netxduo/common/src/nxe_udp_enable.c;Middlewares/ST/netxduo/common/src/nxe_udp_free_port_find.c;Middlewares/ST/netxduo/common/src/nxe_udp_info_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_packet_info_extract.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_bind.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_bytes_available.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_checksum_disable.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_checksum_enable.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_create.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_delete.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_info_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_port_get.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_receive.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_receive_notify.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_send.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_source_send.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_unbind.c;Middlewares/ST/netxduo/common/src/nxe_udp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nxe_tcp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nxe_packet_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nx_udp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nx_tcp_socket_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nx_packet_vlan_priority_set.c;Middlewares/ST/netxduo/common/src/nxe_udp_source_extract.c;Middlewares/ST/netxduo/common/src/nx_icmp_ping6.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_DAD_clear_NDCache_entry.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_DAD_failure.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_dest_table_add.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_dest_table_find.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_destination_table_periodic_update.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_packet_process.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_perform_DAD.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_echo_reply.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_echo_request.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_na.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_ns.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_packet_too_big.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_ra.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_process_redirect.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_error_message.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_ns.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_queued_packets.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_send_rs.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_validate_neighbor_message.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_validate_options.c;Middlewares/ST/netxduo/common/src/nx_icmpv6_validate_ra.c;Middlewares/ST/netxduo/common/src/nx_ipv6_fragment_process.c;Middlewares/ST/netxduo/common/src/nx_ipv6_header_add.c;Middlewares/ST/netxduo/common/src/nx_ipv6_multicast_join.c;Middlewares/ST/netxduo/common/src/nx_ipv6_multicast_leave.c;Middlewares/ST/netxduo/common/src/nx_ipv6_option_error.c;Middlewares/ST/netxduo/common/src/nx_ipv6_packet_copy.c;Middlewares/ST/netxduo/common/src/nx_ipv6_packet_receive.c;Middlewares/ST/netxduo/common/src/nx_ipv6_packet_send.c;Middlewares/ST/netxduo/common/src/nx_ipv6_prefix_list_add_entry.c;Middlewares/ST/netxduo/common/src/nx_ipv6_prefix_list_delete.c;Middlewares/ST/netxduo/common/src/nx_ipv6_prefix_list_delete_entry.c;Middlewares/ST/netxduo/common/src/nx_ipv6_process_fragment_option.c;Middlewares/ST/netxduo/common/src/nx_ipv6_process_hop_by_hop_option.c;Middlewares/ST/netxduo/common/src/nx_ipv6_process_routing_option.c;Middlewares/ST/netxduo/common/src/nx_ipv6_util.c;Middlewares/ST/netxduo/common/src/nx_link.c;Middlewares/ST/netxduo/common/src/nxd_icmpv6_ra_flag_callback_set.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_address_change_notify.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_address_delete.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_address_get.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_address_set.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_add.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_add_internal.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_delete.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_entry_get.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_get.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_number_of_entries_get.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_default_router_table_init.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_destination_table_find_next_hop.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_disable.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_enable.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_find_default_router_from_address.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_find_max_prefix_length.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_interface_find.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_prefix_router_timer_tick.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_raw_packet_send_internal.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_router_lookup.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_router_solicitation_check.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_search_onlink.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_stateless_address_autoconfig_disable.c;Middlewares/ST/netxduo/common/src/nxd_ipv6_stateless_address_autoconfig_enable.c;Middlewares/ST/netxduo/common/src/nxde_icmpv6_ra_flag_callback_set.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_address_change_notify.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_address_delete.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_address_get.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_address_set.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_add.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_delete.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_entry_get.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_get.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_default_router_number_of_entries_get.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_disable.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_enable.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_multicast_interface_join.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_multicast_interface_leave.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_stateless_address_autoconfig_disable.c;Middlewares/ST/netxduo/common/src/nxde_ipv6_stateless_address_autoconfig_enable.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_entry_delete.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_entry_set.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_hardware_address_find.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_invalidate.c;Middlewares/ST/netxduo/common/src/nxd_nd_cache_ip_address_find.c;Middlewares/ST/netxduo/common/src/nx_http_proxy_client.c;Middlewares/ST/threadx/common/src/tx_initialize_high_level.c;Middlewares/ST/threadx/common/src/tx_initialize_kernel_enter.c;Middlewares/ST/threadx/common/src/tx_initialize_kernel_setup.c;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_context_restore.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_context_save.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_interrupt_control.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_interrupt_disable.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_interrupt_restore.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_schedule.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_stack_build.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_thread_system_return.S;Middlewares/ST/threadx/ports/cortex_m33/gnu/src/tx_timer_interrupt.S;Middlewares/ST/threadx/common/src/tx_thread_stack_error_handler.c;Middlewares/ST/threadx/common/src/tx_thread_stack_error_notify.c;Middlewares/ST/threadx/common/src/tx_thread_system_resume.c;Middlewares/ST/threadx/common/src/tx_block_allocate.c;Middlewares/ST/threadx/common/src/tx_block_pool_cleanup.c;Middlewares/ST/threadx/common/src/tx_block_pool_create.c;Middlewares/ST/threadx/common/src/tx_block_pool_delete.c;Middlewares/ST/threadx/common/src/tx_block_pool_info_get.c;Middlewares/ST/threadx/common/src/tx_block_pool_initialize.c;Middlewares/ST/threadx/common/src/tx_block_pool_prioritize.c;Middlewares/ST/threadx/common/src/tx_block_release.c;Middlewares/ST/threadx/common/src/tx_byte_allocate.c;Middlewares/ST/threadx/common/src/tx_byte_pool_cleanup.c;Middlewares/ST/threadx/common/src/tx_byte_pool_create.c;Middlewares/ST/threadx/common/src/tx_byte_pool_delete.c;Middlewares/ST/threadx/common/src/tx_byte_pool_info_get.c;Middlewares/ST/threadx/common/src/tx_byte_pool_initialize.c;Middlewares/ST/threadx/common/src/tx_byte_pool_prioritize.c;Middlewares/ST/threadx/common/src/tx_byte_pool_search.c;Middlewares/ST/threadx/common/src/tx_byte_release.c;Middlewares/ST/threadx/common/src/tx_event_flags_cleanup.c;Middlewares/ST/threadx/common/src/tx_event_flags_create.c;Middlewares/ST/threadx/common/src/tx_event_flags_delete.c;Middlewares/ST/threadx/common/src/tx_event_flags_get.c;Middlewares/ST/threadx/common/src/tx_event_flags_info_get.c;Middlewares/ST/threadx/common/src/tx_event_flags_initialize.c;Middlewares/ST/threadx/common/src/tx_event_flags_set.c;Middlewares/ST/threadx/common/src/tx_event_flags_set_notify.c;Middlewares/ST/threadx/common/src/tx_mutex_cleanup.c;Middlewares/ST/threadx/common/src/tx_mutex_create.c;Middlewares/ST/threadx/common/src/tx_mutex_delete.c;Middlewares/ST/threadx/common/src/tx_mutex_get.c;Middlewares/ST/threadx/common/src/tx_mutex_info_get.c;Middlewares/ST/threadx/common/src/tx_mutex_initialize.c;Middlewares/ST/threadx/common/src/tx_mutex_prioritize.c;Middlewares/ST/threadx/common/src/tx_mutex_priority_change.c;Middlewares/ST/threadx/common/src/tx_mutex_put.c;Middlewares/ST/threadx/common/src/tx_queue_cleanup.c;Middlewares/ST/threadx/common/src/tx_queue_create.c;Middlewares/ST/threadx/common/src/tx_queue_delete.c;Middlewares/ST/threadx/common/src/tx_queue_flush.c;Middlewares/ST/threadx/common/src/tx_queue_front_send.c;Middlewares/ST/threadx/common/src/tx_queue_info_get.c;Middlewares/ST/threadx/common/src/tx_queue_initialize.c;Middlewares/ST/threadx/common/src/tx_queue_prioritize.c;Middlewares/ST/threadx/common/src/tx_queue_receive.c;Middlewares/ST/threadx/common/src/tx_queue_send.c;Middlewares/ST/threadx/common/src/tx_queue_send_notify.c;Middlewares/ST/threadx/common/src/tx_semaphore_ceiling_put.c;Middlewares/ST/threadx/common/src/tx_semaphore_cleanup.c;Middlewares/ST/threadx/common/src/tx_semaphore_create.c;Middlewares/ST/threadx/common/src/tx_semaphore_delete.c;Middlewares/ST/threadx/common/src/tx_semaphore_get.c;Middlewares/ST/threadx/common/src/tx_semaphore_info_get.c;Middlewares/ST/threadx/common/src/tx_semaphore_initialize.c;Middlewares/ST/threadx/common/src/tx_semaphore_prioritize.c;Middlewares/ST/threadx/common/src/tx_semaphore_put.c;Middlewares/ST/threadx/common/src/tx_semaphore_put_notify.c;Middlewares/ST/threadx/common/src/tx_thread_create.c;Middlewares/ST/threadx/common/src/tx_thread_delete.c;Middlewares/ST/threadx/common/src/tx_thread_entry_exit_notify.c;Middlewares/ST/threadx/common/src/tx_thread_identify.c;Middlewares/ST/threadx/common/src/tx_thread_info_get.c;Middlewares/ST/threadx/common/src/tx_thread_initialize.c;Middlewares/ST/threadx/common/src/tx_thread_preemption_change.c;Middlewares/ST/threadx/common/src/tx_thread_priority_change.c;Middlewares/ST/threadx/common/src/tx_thread_relinquish.c;Middlewares/ST/threadx/common/src/tx_thread_reset.c;Middlewares/ST/threadx/common/src/tx_thread_resume.c;Middlewares/ST/threadx/common/src/tx_thread_shell_entry.c;Middlewares/ST/threadx/common/src/tx_thread_sleep.c;Middlewares/ST/threadx/common/src/tx_thread_stack_analyze.c;Middlewares/ST/threadx/common/src/tx_thread_suspend.c;Middlewares/ST/threadx/common/src/tx_thread_system_preempt_check.c;Middlewares/ST/threadx/common/src/tx_thread_system_suspend.c;Middlewares/ST/threadx/common/src/tx_thread_terminate.c;Middlewares/ST/threadx/common/src/tx_thread_time_slice.c;Middlewares/ST/threadx/common/src/tx_thread_time_slice_change.c;Middlewares/ST/threadx/common/src/tx_thread_timeout.c;Middlewares/ST/threadx/common/src/tx_thread_wait_abort.c;Middlewares/ST/threadx/common/src/tx_time_get.c;Middlewares/ST/threadx/common/src/tx_time_set.c;Middlewares/ST/threadx/common/src/txe_block_allocate.c;Middlewares/ST/threadx/common/src/txe_block_pool_create.c;Middlewares/ST/threadx/common/src/txe_block_pool_delete.c;Middlewares/ST/threadx/common/src/txe_block_pool_info_get.c;Middlewares/ST/threadx/common/src/txe_block_pool_prioritize.c;Middlewares/ST/threadx/common/src/txe_block_release.c;Middlewares/ST/threadx/common/src/txe_byte_allocate.c;Middlewares/ST/threadx/common/src/txe_byte_pool_create.c;Middlewares/ST/threadx/common/src/txe_byte_pool_delete.c;Middlewares/ST/threadx/common/src/txe_byte_pool_info_get.c;Middlewares/ST/threadx/common/src/txe_byte_pool_prioritize.c;Middlewares/ST/threadx/common/src/txe_byte_release.c;Middlewares/ST/threadx/common/src/txe_event_flags_create.c;Middlewares/ST/threadx/common/src/txe_event_flags_delete.c;Middlewares/ST/threadx/common/src/txe_event_flags_get.c;Middlewares/ST/threadx/common/src/txe_event_flags_info_get.c;Middlewares/ST/threadx/common/src/txe_event_flags_set.c;Middlewares/ST/threadx/common/src/txe_event_flags_set_notify.c;Middlewares/ST/threadx/common/src/txe_mutex_create.c;Middlewares/ST/threadx/common/src/txe_mutex_delete.c;Middlewares/ST/threadx/common/src/txe_mutex_get.c;Middlewares/ST/threadx/common/src/txe_mutex_info_get.c;Middlewares/ST/threadx/common/src/txe_mutex_prioritize.c;Middlewares/ST/threadx/common/src/txe_mutex_put.c;Middlewares/ST/threadx/common/src/txe_queue_create.c;Middlewares/ST/threadx/common/src/txe_queue_delete.c;Middlewares/ST/threadx/common/src/txe_queue_flush.c;Middlewares/ST/threadx/common/src/txe_queue_front_send.c;Middlewares/ST/threadx/common/src/txe_queue_info_get.c;Middlewares/ST/threadx/common/src/txe_queue_prioritize.c;Middlewares/ST/threadx/common/src/txe_queue_receive.c;Middlewares/ST/threadx/common/src/txe_queue_send.c;Middlewares/ST/threadx/common/src/txe_queue_send_notify.c;Middlewares/ST/threadx/common/src/txe_semaphore_ceiling_put.c;Middlewares/ST/threadx/common/src/txe_semaphore_create.c;Middlewares/ST/threadx/common/src/txe_semaphore_delete.c;Middlewares/ST/threadx/common/src/txe_semaphore_get.c;Middlewares/ST/threadx/common/src/txe_semaphore_info_get.c;Middlewares/ST/threadx/common/src/txe_semaphore_prioritize.c;Middlewares/ST/threadx/common/src/txe_semaphore_put.c;Middlewares/ST/threadx/common/src/txe_semaphore_put_notify.c;Middlewares/ST/threadx/common/src/txe_thread_create.c;Middlewares/ST/threadx/common/src/txe_thread_delete.c;Middlewares/ST/threadx/common/src/txe_thread_entry_exit_notify.c;Middlewares/ST/threadx/common/src/txe_thread_info_get.c;Middlewares/ST/threadx/common/src/txe_thread_preemption_change.c;Middlewares/ST/threadx/common/src/txe_thread_priority_change.c;Middlewares/ST/threadx/common/src/txe_thread_relinquish.c;Middlewares/ST/threadx/common/src/txe_thread_reset.c;Middlewares/ST/threadx/common/src/txe_thread_resume.c;Middlewares/ST/threadx/common/src/txe_thread_suspend.c;Middlewares/ST/threadx/common/src/txe_thread_terminate.c;Middlewares/ST/threadx/common/src/txe_thread_time_slice_change.c;Middlewares/ST/threadx/common/src/txe_thread_wait_abort.c;Middlewares/ST/threadx/common/src/tx_timer_activate.c;Middlewares/ST/threadx/common/src/tx_timer_change.c;Middlewares/ST/threadx/common/src/tx_timer_create.c;Middlewares/ST/threadx/common/src/tx_timer_deactivate.c;Middlewares/ST/threadx/common/src/tx_timer_delete.c;Middlewares/ST/threadx/common/src/tx_timer_expiration_process.c;Middlewares/ST/threadx/common/src/tx_timer_info_get.c;Middlewares/ST/threadx/common/src/tx_timer_initialize.c;Middlewares/ST/threadx/common/src/tx_timer_system_activate.c;Middlewares/ST/threadx/common/src/tx_timer_system_deactivate.c;Middlewares/ST/threadx/common/src/tx_timer_thread_entry.c;Middlewares/ST/threadx/common/src/txe_timer_activate.c;Middlewares/ST/threadx/common/src/txe_timer_change.c;Middlewares/ST/threadx/common/src/txe_timer_create.c;Middlewares/ST/threadx/common/src/txe_timer_deactivate.c;Middlewares/ST/threadx/common/src/txe_timer_delete.c;Middlewares/ST/threadx/common/src/txe_timer_info_get.c;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_tim.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_tim_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_cortex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_cortex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_dcache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_dcache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_rcc.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_rcc_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_bus.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_rcc.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_crs.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_system.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_utils.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_flash.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_flash_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_gpio.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_gpio_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_gpio.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_dma.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_dma_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_dma.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_dmamux.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_pwr.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_pwr_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_pwr.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_def.h;Drivers/STM32H5xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_exti.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_exti.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_fdcan.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_icache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_icache.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_iwdg.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_iwdg.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_uart.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_usart.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_lpuart.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_uart_ex.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_spi.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_ll_spi.h;Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_spi_ex.h;Middlewares/ST/threadx/common/inc/tx_api.h;Middlewares/ST/threadx/common/inc/tx_block_pool.h;Middlewares/ST/threadx/common/inc/tx_byte_pool.h;Middlewares/ST/threadx/common/inc/tx_event_flags.h;Middlewares/ST/threadx/common/inc/tx_initialize.h;Middlewares/ST/threadx/common/inc/tx_mutex.h;Middlewares/ST/threadx/common/inc/tx_queue.h;Middlewares/ST/threadx/common/inc/tx_semaphore.h;Middlewares/ST/threadx/common/inc/tx_thread.h;Middlewares/ST/threadx/common/inc/tx_timer.h;Middlewares/ST/threadx/common/inc/tx_trace.h;Drivers/CMSIS/Device/ST/STM32H5xx/Include/stm32h563xx.h;Drivers/CMSIS/Device/ST/STM32H5xx/Include/stm32h5xx.h;Drivers/CMSIS/Device/ST/STM32H5xx/Include/system_stm32h5xx.h;Drivers/CMSIS/Device/ST/STM32H5xx/Include/system_stm32h5xx.h;Drivers/CMSIS/Device/ST/STM32H5xx/Source/Templates/system_stm32h5xx.c;Middlewares/ST/netxduo/common/inc/nx_icmpv4.h;Middlewares/ST/netxduo/common/inc/nx_http_proxy_client.h;Middlewares/ST/netxduo/common/inc/nx_ip.h;Middlewares/ST/netxduo/common/inc/nx_ipv6.h;Middlewares/ST/netxduo/common/inc/nx_rarp.h;Middlewares/ST/netxduo/common/inc/nx_tcp.h;Middlewares/ST/netxduo/common/inc/nx_arp.h;Middlewares/ST/netxduo/common/inc/nx_mld.h;Middlewares/ST/netxduo/common/inc/nx_igmp.h;Middlewares/ST/netxduo/common/inc/nx_ipv4.h;Middlewares/ST/netxduo/common/inc/nx_api.h;Middlewares/ST/netxduo/common/inc/nx_icmpv6.h;Middlewares/ST/netxduo/common/inc/nx_nd_cache.h;Middlewares/ST/netxduo/common/inc/nx_user_sample.h;Middlewares/ST/netxduo/common/inc/nx_system.h;Middlewares/ST/netxduo/common/inc/nx_link.h;Middlewares/ST/netxduo/common/inc/nx_udp.h;Middlewares/ST/netxduo/common/inc/nx_md5.h;Middlewares/ST/netxduo/common/inc/nx_icmp.h;Middlewares/ST/netxduo/common/inc/nx_packet.h;Middlewares/ST/netxduo/ports/cortex_m33/gnu/inc/nx_port.h;Middlewares/ST/threadx/ports/cortex_m33/gnu/inc/tx_secure_interface.h;Middlewares/ST/threadx/ports/cortex_m33/gnu/inc/tx_port.h;Middlewares/ST/netxduo/common/inc/nx_icmpv4.h;Middlewares/ST/netxduo/common/inc/nx_http_proxy_client.h;Middlewares/ST/netxduo/common/inc/nx_ip.h;Middlewares/ST/netxduo/common/inc/nx_ipv6.h;Middlewares/ST/netxduo/common/inc/nx_rarp.h;Middlewares/ST/netxduo/common/inc/nx_tcp.h;Middlewares/ST/netxduo/common/inc/nx_arp.h;Middlewares/ST/netxduo/common/inc/nx_mld.h;Middlewares/ST/netxduo/common/inc/nx_igmp.h;Middlewares/ST/netxduo/common/inc/nx_ipv4.h;Middlewares/ST/netxduo/common/inc/nx_api.h;Middlewares/ST/netxduo/common/inc/nx_icmpv6.h;Middlewares/ST/netxduo/common/inc/nx_nd_cache.h;Middlewares/ST/netxduo/common/inc/nx_user_sample.h;Middlewares/ST/netxduo/common/inc/nx_system.h;Middlewares/ST/netxduo/common/inc/nx_link.h;Middlewares/ST/netxduo/common/inc/nx_udp.h;Middlewares/ST/netxduo/common/inc/nx_md5.h;Middlewares/ST/netxduo/common/inc/nx_icmp.h;Middlewares/ST/netxduo/common/inc/nx_packet.h;Middlewares/ST/netxduo/ports/cortex_m33/gnu/inc/nx_port.h;Middlewares/ST/threadx/ports/cortex_m33/gnu/inc/tx_secure_interface.h;Middlewares/ST/threadx/ports/cortex_m33/gnu/inc/tx_port.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/pmu_armv8.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/core_armv81mml.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/pac_armv81.h;Drivers/CMSIS/Include/core_starmc1.h;Drivers/CMSIS/Include/core_cm85.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/cachel1_armv7.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_cm55.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm35p.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/cmsis_armclang_ltm.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/core_armv8mbl.h; [PreviousUsedIarFiles] SourceFiles=..\Core\Src\main.c;..\Core\Src\tx_initialize_low_level.S;..\Core\Src\app_threadx.c;..\AZURE_RTOS\App\app_azure_rtos.c;..\Core\Src\stm32h5xx_it.c;..\Core\Src\stm32h5xx_hal_msp.c;..\Core\Src\stm32h5xx_hal_timebase_tim.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_tim.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_tim_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_cortex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_rcc.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_rcc_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_flash.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_flash_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_gpio.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_dma.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_dma_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_pwr.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_pwr_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_exti.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_eth.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_eth_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_fdcan.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_icache.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_uart.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_uart_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_spi.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_spi_ex.c;..\Middlewares\ST\threadx\common\src\tx_initialize_high_level.c;..\Middlewares\ST\threadx\common\src\tx_initialize_kernel_enter.c;..\Middlewares\ST\threadx\common\src\tx_initialize_kernel_setup.c;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_iar.c;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_context_restore.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_context_save.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_interrupt_control.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_interrupt_disable.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_interrupt_restore.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_schedule.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_stack_build.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_system_return.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_timer_interrupt.s;..\Middlewares\ST\threadx\common\src\tx_thread_stack_error_handler.c;..\Middlewares\ST\threadx\common\src\tx_thread_stack_error_notify.c;..\Middlewares\ST\threadx\common\src\tx_thread_system_resume.c;..\Middlewares\ST\threadx\common\src\tx_block_allocate.c;..\Middlewares\ST\threadx\common\src\tx_block_pool_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_block_pool_create.c;..\Middlewares\ST\threadx\common\src\tx_block_pool_delete.c;..\Middlewares\ST\threadx\common\src\tx_block_pool_info_get.c;..\Middlewares\ST\threadx\common\src\tx_block_pool_initialize.c;..\Middlewares\ST\threadx\common\src\tx_block_pool_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_block_release.c;..\Middlewares\ST\threadx\common\src\tx_byte_allocate.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_create.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_delete.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_info_get.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_initialize.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_search.c;..\Middlewares\ST\threadx\common\src\tx_byte_release.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_create.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_delete.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_get.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_info_get.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_initialize.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_set.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_set_notify.c;..\Middlewares\ST\threadx\common\src\tx_mutex_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_mutex_create.c;..\Middlewares\ST\threadx\common\src\tx_mutex_delete.c;..\Middlewares\ST\threadx\common\src\tx_mutex_get.c;..\Middlewares\ST\threadx\common\src\tx_mutex_info_get.c;..\Middlewares\ST\threadx\common\src\tx_mutex_initialize.c;..\Middlewares\ST\threadx\common\src\tx_mutex_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_mutex_priority_change.c;..\Middlewares\ST\threadx\common\src\tx_mutex_put.c;..\Middlewares\ST\threadx\common\src\tx_queue_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_queue_create.c;..\Middlewares\ST\threadx\common\src\tx_queue_delete.c;..\Middlewares\ST\threadx\common\src\tx_queue_flush.c;..\Middlewares\ST\threadx\common\src\tx_queue_front_send.c;..\Middlewares\ST\threadx\common\src\tx_queue_info_get.c;..\Middlewares\ST\threadx\common\src\tx_queue_initialize.c;..\Middlewares\ST\threadx\common\src\tx_queue_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_queue_receive.c;..\Middlewares\ST\threadx\common\src\tx_queue_send.c;..\Middlewares\ST\threadx\common\src\tx_queue_send_notify.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_ceiling_put.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_create.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_delete.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_get.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_info_get.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_initialize.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_put.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_put_notify.c;..\Middlewares\ST\threadx\common\src\tx_thread_create.c;..\Middlewares\ST\threadx\common\src\tx_thread_delete.c;..\Middlewares\ST\threadx\common\src\tx_thread_entry_exit_notify.c;..\Middlewares\ST\threadx\common\src\tx_thread_identify.c;..\Middlewares\ST\threadx\common\src\tx_thread_info_get.c;..\Middlewares\ST\threadx\common\src\tx_thread_initialize.c;..\Middlewares\ST\threadx\common\src\tx_thread_preemption_change.c;..\Middlewares\ST\threadx\common\src\tx_thread_priority_change.c;..\Middlewares\ST\threadx\common\src\tx_thread_relinquish.c;..\Middlewares\ST\threadx\common\src\tx_thread_reset.c;..\Middlewares\ST\threadx\common\src\tx_thread_resume.c;..\Middlewares\ST\threadx\common\src\tx_thread_shell_entry.c;..\Middlewares\ST\threadx\common\src\tx_thread_sleep.c;..\Middlewares\ST\threadx\common\src\tx_thread_stack_analyze.c;..\Middlewares\ST\threadx\common\src\tx_thread_suspend.c;..\Middlewares\ST\threadx\common\src\tx_thread_system_preempt_check.c;..\Middlewares\ST\threadx\common\src\tx_thread_system_suspend.c;..\Middlewares\ST\threadx\common\src\tx_thread_terminate.c;..\Middlewares\ST\threadx\common\src\tx_thread_time_slice.c;..\Middlewares\ST\threadx\common\src\tx_thread_time_slice_change.c;..\Middlewares\ST\threadx\common\src\tx_thread_timeout.c;..\Middlewares\ST\threadx\common\src\tx_thread_wait_abort.c;..\Middlewares\ST\threadx\common\src\tx_time_get.c;..\Middlewares\ST\threadx\common\src\tx_time_set.c;..\Middlewares\ST\threadx\common\src\txe_block_allocate.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_create.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_delete.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_info_get.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_block_release.c;..\Middlewares\ST\threadx\common\src\txe_byte_allocate.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_create.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_delete.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_info_get.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_byte_release.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_create.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_delete.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_get.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_info_get.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_set.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_set_notify.c;..\Middlewares\ST\threadx\common\src\txe_mutex_create.c;..\Middlewares\ST\threadx\common\src\txe_mutex_delete.c;..\Middlewares\ST\threadx\common\src\txe_mutex_get.c;..\Middlewares\ST\threadx\common\src\txe_mutex_info_get.c;..\Middlewares\ST\threadx\common\src\txe_mutex_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_mutex_put.c;..\Middlewares\ST\threadx\common\src\txe_queue_create.c;..\Middlewares\ST\threadx\common\src\txe_queue_delete.c;..\Middlewares\ST\threadx\common\src\txe_queue_flush.c;..\Middlewares\ST\threadx\common\src\txe_queue_front_send.c;..\Middlewares\ST\threadx\common\src\txe_queue_info_get.c;..\Middlewares\ST\threadx\common\src\txe_queue_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_queue_receive.c;..\Middlewares\ST\threadx\common\src\txe_queue_send.c;..\Middlewares\ST\threadx\common\src\txe_queue_send_notify.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_ceiling_put.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_create.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_delete.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_get.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_info_get.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_put.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_put_notify.c;..\Middlewares\ST\threadx\common\src\txe_thread_create.c;..\Middlewares\ST\threadx\common\src\txe_thread_delete.c;..\Middlewares\ST\threadx\common\src\txe_thread_entry_exit_notify.c;..\Middlewares\ST\threadx\common\src\txe_thread_info_get.c;..\Middlewares\ST\threadx\common\src\txe_thread_preemption_change.c;..\Middlewares\ST\threadx\common\src\txe_thread_priority_change.c;..\Middlewares\ST\threadx\common\src\txe_thread_relinquish.c;..\Middlewares\ST\threadx\common\src\txe_thread_reset.c;..\Middlewares\ST\threadx\common\src\txe_thread_resume.c;..\Middlewares\ST\threadx\common\src\txe_thread_suspend.c;..\Middlewares\ST\threadx\common\src\txe_thread_terminate.c;..\Middlewares\ST\threadx\common\src\txe_thread_time_slice_change.c;..\Middlewares\ST\threadx\common\src\txe_thread_wait_abort.c;..\Middlewares\ST\threadx\common\src\tx_timer_activate.c;..\Middlewares\ST\threadx\common\src\tx_timer_change.c;..\Middlewares\ST\threadx\common\src\tx_timer_create.c;..\Middlewares\ST\threadx\common\src\tx_timer_deactivate.c;..\Middlewares\ST\threadx\common\src\tx_timer_delete.c;..\Middlewares\ST\threadx\common\src\tx_timer_expiration_process.c;..\Middlewares\ST\threadx\common\src\tx_timer_info_get.c;..\Middlewares\ST\threadx\common\src\tx_timer_initialize.c;..\Middlewares\ST\threadx\common\src\tx_timer_system_activate.c;..\Middlewares\ST\threadx\common\src\tx_timer_system_deactivate.c;..\Middlewares\ST\threadx\common\src\tx_timer_thread_entry.c;..\Middlewares\ST\threadx\common\src\txe_timer_activate.c;..\Middlewares\ST\threadx\common\src\txe_timer_change.c;..\Middlewares\ST\threadx\common\src\txe_timer_create.c;..\Middlewares\ST\threadx\common\src\txe_timer_deactivate.c;..\Middlewares\ST\threadx\common\src\txe_timer_delete.c;..\Middlewares\ST\threadx\common\src\txe_timer_info_get.c;..\Drivers\CMSIS\Device\ST\STM32H5xx\Source\Templates\system_stm32h5xx.c;..\Core\Src\system_stm32h5xx.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_tim.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_tim_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_cortex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_rcc.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_rcc_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_flash.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_flash_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_gpio.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_dma.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_dma_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_pwr.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_pwr_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_exti.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_eth.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_eth_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_fdcan.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_icache.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_uart.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_uart_ex.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_spi.c;..\Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_hal_spi_ex.c;..\Middlewares\ST\threadx\common\src\tx_initialize_high_level.c;..\Middlewares\ST\threadx\common\src\tx_initialize_kernel_enter.c;..\Middlewares\ST\threadx\common\src\tx_initialize_kernel_setup.c;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_iar.c;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_context_restore.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_context_save.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_interrupt_control.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_interrupt_disable.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_interrupt_restore.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_schedule.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_stack_build.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_thread_system_return.s;..\Middlewares\ST\threadx\ports\cortex_m33\iar\src\tx_timer_interrupt.s;..\Middlewares\ST\threadx\common\src\tx_thread_stack_error_handler.c;..\Middlewares\ST\threadx\common\src\tx_thread_stack_error_notify.c;..\Middlewares\ST\threadx\common\src\tx_thread_system_resume.c;..\Middlewares\ST\threadx\common\src\tx_block_allocate.c;..\Middlewares\ST\threadx\common\src\tx_block_pool_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_block_pool_create.c;..\Middlewares\ST\threadx\common\src\tx_block_pool_delete.c;..\Middlewares\ST\threadx\common\src\tx_block_pool_info_get.c;..\Middlewares\ST\threadx\common\src\tx_block_pool_initialize.c;..\Middlewares\ST\threadx\common\src\tx_block_pool_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_block_release.c;..\Middlewares\ST\threadx\common\src\tx_byte_allocate.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_create.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_delete.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_info_get.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_initialize.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_byte_pool_search.c;..\Middlewares\ST\threadx\common\src\tx_byte_release.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_create.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_delete.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_get.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_info_get.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_initialize.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_set.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_set_notify.c;..\Middlewares\ST\threadx\common\src\tx_mutex_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_mutex_create.c;..\Middlewares\ST\threadx\common\src\tx_mutex_delete.c;..\Middlewares\ST\threadx\common\src\tx_mutex_get.c;..\Middlewares\ST\threadx\common\src\tx_mutex_info_get.c;..\Middlewares\ST\threadx\common\src\tx_mutex_initialize.c;..\Middlewares\ST\threadx\common\src\tx_mutex_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_mutex_priority_change.c;..\Middlewares\ST\threadx\common\src\tx_mutex_put.c;..\Middlewares\ST\threadx\common\src\tx_queue_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_queue_create.c;..\Middlewares\ST\threadx\common\src\tx_queue_delete.c;..\Middlewares\ST\threadx\common\src\tx_queue_flush.c;..\Middlewares\ST\threadx\common\src\tx_queue_front_send.c;..\Middlewares\ST\threadx\common\src\tx_queue_info_get.c;..\Middlewares\ST\threadx\common\src\tx_queue_initialize.c;..\Middlewares\ST\threadx\common\src\tx_queue_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_queue_receive.c;..\Middlewares\ST\threadx\common\src\tx_queue_send.c;..\Middlewares\ST\threadx\common\src\tx_queue_send_notify.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_ceiling_put.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_create.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_delete.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_get.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_info_get.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_initialize.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_put.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_put_notify.c;..\Middlewares\ST\threadx\common\src\tx_thread_create.c;..\Middlewares\ST\threadx\common\src\tx_thread_delete.c;..\Middlewares\ST\threadx\common\src\tx_thread_entry_exit_notify.c;..\Middlewares\ST\threadx\common\src\tx_thread_identify.c;..\Middlewares\ST\threadx\common\src\tx_thread_info_get.c;..\Middlewares\ST\threadx\common\src\tx_thread_initialize.c;..\Middlewares\ST\threadx\common\src\tx_thread_preemption_change.c;..\Middlewares\ST\threadx\common\src\tx_thread_priority_change.c;..\Middlewares\ST\threadx\common\src\tx_thread_relinquish.c;..\Middlewares\ST\threadx\common\src\tx_thread_reset.c;..\Middlewares\ST\threadx\common\src\tx_thread_resume.c;..\Middlewares\ST\threadx\common\src\tx_thread_shell_entry.c;..\Middlewares\ST\threadx\common\src\tx_thread_sleep.c;..\Middlewares\ST\threadx\common\src\tx_thread_stack_analyze.c;..\Middlewares\ST\threadx\common\src\tx_thread_suspend.c;..\Middlewares\ST\threadx\common\src\tx_thread_system_preempt_check.c;..\Middlewares\ST\threadx\common\src\tx_thread_system_suspend.c;..\Middlewares\ST\threadx\common\src\tx_thread_terminate.c;..\Middlewares\ST\threadx\common\src\tx_thread_time_slice.c;..\Middlewares\ST\threadx\common\src\tx_thread_time_slice_change.c;..\Middlewares\ST\threadx\common\src\tx_thread_timeout.c;..\Middlewares\ST\threadx\common\src\tx_thread_wait_abort.c;..\Middlewares\ST\threadx\common\src\tx_time_get.c;..\Middlewares\ST\threadx\common\src\tx_time_set.c;..\Middlewares\ST\threadx\common\src\txe_block_allocate.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_create.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_delete.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_info_get.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_block_release.c;..\Middlewares\ST\threadx\common\src\txe_byte_allocate.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_create.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_delete.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_info_get.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_byte_release.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_create.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_delete.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_get.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_info_get.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_set.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_set_notify.c;..\Middlewares\ST\threadx\common\src\txe_mutex_create.c;..\Middlewares\ST\threadx\common\src\txe_mutex_delete.c;..\Middlewares\ST\threadx\common\src\txe_mutex_get.c;..\Middlewares\ST\threadx\common\src\txe_mutex_info_get.c;..\Middlewares\ST\threadx\common\src\txe_mutex_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_mutex_put.c;..\Middlewares\ST\threadx\common\src\txe_queue_create.c;..\Middlewares\ST\threadx\common\src\txe_queue_delete.c;..\Middlewares\ST\threadx\common\src\txe_queue_flush.c;..\Middlewares\ST\threadx\common\src\txe_queue_front_send.c;..\Middlewares\ST\threadx\common\src\txe_queue_info_get.c;..\Middlewares\ST\threadx\common\src\txe_queue_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_queue_receive.c;..\Middlewares\ST\threadx\common\src\txe_queue_send.c;..\Middlewares\ST\threadx\common\src\txe_queue_send_notify.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_ceiling_put.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_create.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_delete.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_get.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_info_get.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_put.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_put_notify.c;..\Middlewares\ST\threadx\common\src\txe_thread_create.c;..\Middlewares\ST\threadx\common\src\txe_thread_delete.c;..\Middlewares\ST\threadx\common\src\txe_thread_entry_exit_notify.c;..\Middlewares\ST\threadx\common\src\txe_thread_info_get.c;..\Middlewares\ST\threadx\common\src\txe_thread_preemption_change.c;..\Middlewares\ST\threadx\common\src\txe_thread_priority_change.c;..\Middlewares\ST\threadx\common\src\txe_thread_relinquish.c;..\Middlewares\ST\threadx\common\src\txe_thread_reset.c;..\Middlewares\ST\threadx\common\src\txe_thread_resume.c;..\Middlewares\ST\threadx\common\src\txe_thread_suspend.c;..\Middlewares\ST\threadx\common\src\txe_thread_terminate.c;..\Middlewares\ST\threadx\common\src\txe_thread_time_slice_change.c;..\Middlewares\ST\threadx\common\src\txe_thread_wait_abort.c;..\Middlewares\ST\threadx\common\src\tx_timer_activate.c;..\Middlewares\ST\threadx\common\src\tx_timer_change.c;..\Middlewares\ST\threadx\common\src\tx_timer_create.c;..\Middlewares\ST\threadx\common\src\tx_timer_deactivate.c;..\Middlewares\ST\threadx\common\src\tx_timer_delete.c;..\Middlewares\ST\threadx\common\src\tx_timer_expiration_process.c;..\Middlewares\ST\threadx\common\src\tx_timer_info_get.c;..\Middlewares\ST\threadx\common\src\tx_timer_initialize.c;..\Middlewares\ST\threadx\common\src\tx_timer_system_activate.c;..\Middlewares\ST\threadx\common\src\tx_timer_system_deactivate.c;..\Middlewares\ST\threadx\common\src\tx_timer_thread_entry.c;..\Middlewares\ST\threadx\common\src\txe_timer_activate.c;..\Middlewares\ST\threadx\common\src\txe_timer_change.c;..\Middlewares\ST\threadx\common\src\txe_timer_create.c;..\Middlewares\ST\threadx\common\src\txe_timer_deactivate.c;..\Middlewares\ST\threadx\common\src\txe_timer_delete.c;..\Middlewares\ST\threadx\common\src\txe_timer_info_get.c;..\Drivers\CMSIS\Device\ST\STM32H5xx\Source\Templates\system_stm32h5xx.c;..\Core\Src\system_stm32h5xx.c;;; diff --git a/Core/Src/main.c b/Core/Src/main.c index 6fa2a1a..0f6fa6b 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -357,7 +357,7 @@ static void MX_FDCAN2_Init(void) hfdcan2.Init.DataSyncJumpWidth = 1; hfdcan2.Init.DataTimeSeg1 = 1; hfdcan2.Init.DataTimeSeg2 = 1; - hfdcan2.Init.StdFiltersNbr = 2; + hfdcan2.Init.StdFiltersNbr = 4; hfdcan2.Init.ExtFiltersNbr = 2; hfdcan2.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION; if (HAL_FDCAN_Init(&hfdcan2) != HAL_OK) diff --git a/Core/Src/u_can.c b/Core/Src/u_can.c index 160af23..7d1ec73 100644 --- a/Core/Src/u_can.c +++ b/Core/Src/u_can.c @@ -16,10 +16,18 @@ uint8_t can2_init(FDCAN_HandleTypeDef *hcan) { } /* Add filters for standard IDs */ - uint16_t standard_ids[] = { IMD_GENERAL_MSG_ID, BMS_LIGHTNING_OKAY_MSG_ID }; - status = can_add_filter_standard(&can2, standard_ids); + uint16_t standard_ids1[] = { IMD_GENERAL_MSG_ID, BMS_LIGHTNING_OKAY_MSG_ID }; + status = can_add_filter_standard(&can2, standard_ids1); if(status != HAL_OK) { - PRINTLN_ERROR("Failed to add standard filter to can2 (Status: %d/%s, ID1: %d, ID2: %d).", status, hal_status_toString(status), standard_ids[0], standard_ids[1]); + PRINTLN_ERROR("Failed to add standard filter to can2 (Status: %d/%s, ID1: %d, ID2: %d).", status, hal_status_toString(status), standard_ids1[0], standard_ids1[1]); + return U_ERROR; + } + + /* Add filters for standard IDs */ + uint16_t standard_ids2[] = { RESET_LATCHING_MSG_ID, 0x0 }; + status = can_add_filter_standard(&can2, standard_ids2); + if(status != HAL_OK) { + PRINTLN_ERROR("Failed to add standard filter to can2 (Status: %d/%s, ID1: %d, ID2: %d).", status, hal_status_toString(status), standard_ids2[0], standard_ids2[1]); return U_ERROR; } diff --git a/Core/Src/u_threads.c b/Core/Src/u_threads.c index 6d81ae0..4c8e7f5 100644 --- a/Core/Src/u_threads.c +++ b/Core/Src/u_threads.c @@ -139,7 +139,7 @@ static thread_t _gpio_lights_thread = { .priority = 0, /* Priority */ .threshold = 0, /* Preemption Threshold */ .time_slice = TX_NO_TIME_SLICE, /* Time Slice */ - .auto_start = TX_AUTO_START, /* Auto Start */ + .auto_start = TX_AUTO_START, /* Auto Start */ .sleep = 10, /* Sleep (in ticks) */ .function = gpio_lights_thread /* Thread Function */ }; diff --git a/Lightning.ioc b/Lightning.ioc index fc55028..4fead74 100644 --- a/Lightning.ioc +++ b/Lightning.ioc @@ -14,7 +14,7 @@ FDCAN2.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,Calculat FDCAN2.NominalPrescaler=8 FDCAN2.NominalTimeSeg1=11 FDCAN2.NominalTimeSeg2=4 -FDCAN2.StdFiltersNbr=2 +FDCAN2.StdFiltersNbr=4 File.Version=6 GPIO.groupedBy=Group By Peripherals IWDG.IPParameters=Prescaler From fa33b1a3a1f9f9b2cddfde7f9f0347b81add674f Mon Sep 17 00:00:00 2001 From: Caio DaSilva Date: Thu, 11 Jun 2026 15:18:53 -0400 Subject: [PATCH 4/4] fix can gen --- Core/Inc/can_messages_rx.h | 1 - Core/Src/can_messages_rx.c | 41 +++++++++++++++++-------------------- Core/Src/u_statemachine.c | 1 - Drivers/Odyssey-Definitions | 2 +- 4 files changed, 20 insertions(+), 25 deletions(-) diff --git a/Core/Inc/can_messages_rx.h b/Core/Inc/can_messages_rx.h index 7d66480..e0cff33 100644 --- a/Core/Inc/can_messages_rx.h +++ b/Core/Inc/can_messages_rx.h @@ -426,7 +426,6 @@ typedef struct { bool RTDS_FAULT; bool LV_LOW_VOLTAGE_FAULT; bool PRECHARGE_FLOATING_FAULT; - bool LATCHING_ACTIVE_FAULT; } faults_t; void receive_faults(const can_msg_t *message, faults_t *faults); diff --git a/Core/Src/can_messages_rx.c b/Core/Src/can_messages_rx.c index 31b9117..1e9e4ab 100644 --- a/Core/Src/can_messages_rx.c +++ b/Core/Src/can_messages_rx.c @@ -879,60 +879,57 @@ void receive_imu_gyro(const can_msg_t *message, imu_gyro_t *imu_gyro) { void receive_faults(const can_msg_t *message, faults_t *faults) { - uint32_t data_bigendian; - memcpy(&data_bigendian, message->data, 4); - uint32_t data = __builtin_bswap32(data_bigendian); + uint16_t data_bigendian; + memcpy(&data_bigendian, message->data, 2); + uint16_t data = __builtin_bswap16(data_bigendian); uint64_t CAN_OUTGOING_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t CAN_OUTGOING_FAULT_raw = (data >> 31) & CAN_OUTGOING_FAULT_mask; + uint64_t CAN_OUTGOING_FAULT_raw = (data >> 15) & CAN_OUTGOING_FAULT_mask; faults->CAN_OUTGOING_FAULT = (bool)CAN_OUTGOING_FAULT_raw; uint64_t CAN_INCOMING_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t CAN_INCOMING_FAULT_raw = (data >> 30) & CAN_INCOMING_FAULT_mask; + uint64_t CAN_INCOMING_FAULT_raw = (data >> 14) & CAN_INCOMING_FAULT_mask; faults->CAN_INCOMING_FAULT = (bool)CAN_INCOMING_FAULT_raw; uint64_t BMS_CAN_MONITOR_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t BMS_CAN_MONITOR_FAULT_raw = (data >> 29) & BMS_CAN_MONITOR_FAULT_mask; + uint64_t BMS_CAN_MONITOR_FAULT_raw = (data >> 13) & BMS_CAN_MONITOR_FAULT_mask; faults->BMS_CAN_MONITOR_FAULT = (bool)BMS_CAN_MONITOR_FAULT_raw; uint64_t LIGHTNING_CAN_MONITOR_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t LIGHTNING_CAN_MONITOR_FAULT_raw = (data >> 28) & LIGHTNING_CAN_MONITOR_FAULT_mask; + uint64_t LIGHTNING_CAN_MONITOR_FAULT_raw = (data >> 12) & LIGHTNING_CAN_MONITOR_FAULT_mask; faults->LIGHTNING_CAN_MONITOR_FAULT = (bool)LIGHTNING_CAN_MONITOR_FAULT_raw; uint64_t ONBOARD_TEMP_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t ONBOARD_TEMP_FAULT_raw = (data >> 27) & ONBOARD_TEMP_FAULT_mask; + uint64_t ONBOARD_TEMP_FAULT_raw = (data >> 11) & ONBOARD_TEMP_FAULT_mask; faults->ONBOARD_TEMP_FAULT = (bool)ONBOARD_TEMP_FAULT_raw; uint64_t IMU_ACCEL_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t IMU_ACCEL_FAULT_raw = (data >> 26) & IMU_ACCEL_FAULT_mask; + uint64_t IMU_ACCEL_FAULT_raw = (data >> 10) & IMU_ACCEL_FAULT_mask; faults->IMU_ACCEL_FAULT = (bool)IMU_ACCEL_FAULT_raw; uint64_t IMU_GYRO_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t IMU_GYRO_FAULT_raw = (data >> 25) & IMU_GYRO_FAULT_mask; + uint64_t IMU_GYRO_FAULT_raw = (data >> 9) & IMU_GYRO_FAULT_mask; faults->IMU_GYRO_FAULT = (bool)IMU_GYRO_FAULT_raw; uint64_t BSPD_PREFAULT_mask = (1ULL << 1) - 1ULL; - uint64_t BSPD_PREFAULT_raw = (data >> 24) & BSPD_PREFAULT_mask; + uint64_t BSPD_PREFAULT_raw = (data >> 8) & BSPD_PREFAULT_mask; faults->BSPD_PREFAULT = (bool)BSPD_PREFAULT_raw; uint64_t ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_raw = (data >> 23) & ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_mask; + uint64_t ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_raw = (data >> 7) & ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_mask; faults->ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT = (bool)ONBOARD_BRAKE_OPEN_CIRCUIT_FAULT_raw; uint64_t ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_raw = (data >> 22) & ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_mask; + uint64_t ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_raw = (data >> 6) & ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_mask; faults->ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT = (bool)ONBOARD_ACCEL_OPEN_CIRCUIT_FAULT_raw; uint64_t ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_raw = (data >> 21) & ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_mask; + uint64_t ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_raw = (data >> 5) & ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_mask; faults->ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT = (bool)ONBOARD_BRAKE_SHORT_CIRCUIT_FAULT_raw; uint64_t ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_raw = (data >> 20) & ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_mask; + uint64_t ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_raw = (data >> 4) & ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_mask; faults->ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT = (bool)ONBOARD_ACCEL_SHORT_CIRCUIT_FAULT_raw; uint64_t ONBOARD_PEDAL_DIFFERENCE_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t ONBOARD_PEDAL_DIFFERENCE_FAULT_raw = (data >> 19) & ONBOARD_PEDAL_DIFFERENCE_FAULT_mask; + uint64_t ONBOARD_PEDAL_DIFFERENCE_FAULT_raw = (data >> 3) & ONBOARD_PEDAL_DIFFERENCE_FAULT_mask; faults->ONBOARD_PEDAL_DIFFERENCE_FAULT = (bool)ONBOARD_PEDAL_DIFFERENCE_FAULT_raw; uint64_t RTDS_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t RTDS_FAULT_raw = (data >> 18) & RTDS_FAULT_mask; + uint64_t RTDS_FAULT_raw = (data >> 2) & RTDS_FAULT_mask; faults->RTDS_FAULT = (bool)RTDS_FAULT_raw; uint64_t LV_LOW_VOLTAGE_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t LV_LOW_VOLTAGE_FAULT_raw = (data >> 17) & LV_LOW_VOLTAGE_FAULT_mask; + uint64_t LV_LOW_VOLTAGE_FAULT_raw = (data >> 1) & LV_LOW_VOLTAGE_FAULT_mask; faults->LV_LOW_VOLTAGE_FAULT = (bool)LV_LOW_VOLTAGE_FAULT_raw; uint64_t PRECHARGE_FLOATING_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t PRECHARGE_FLOATING_FAULT_raw = (data >> 16) & PRECHARGE_FLOATING_FAULT_mask; + uint64_t PRECHARGE_FLOATING_FAULT_raw = (data >> 0) & PRECHARGE_FLOATING_FAULT_mask; faults->PRECHARGE_FLOATING_FAULT = (bool)PRECHARGE_FLOATING_FAULT_raw; - uint64_t LATCHING_ACTIVE_FAULT_mask = (1ULL << 1) - 1ULL; - uint64_t LATCHING_ACTIVE_FAULT_raw = (data >> 15) & LATCHING_ACTIVE_FAULT_mask; - faults->LATCHING_ACTIVE_FAULT = (bool)LATCHING_ACTIVE_FAULT_raw; } void receive_lv_voltage(const can_msg_t *message, lv_voltage_t *lv_voltage) { diff --git a/Core/Src/u_statemachine.c b/Core/Src/u_statemachine.c index 334e55a..fb02a26 100644 --- a/Core/Src/u_statemachine.c +++ b/Core/Src/u_statemachine.c @@ -117,7 +117,6 @@ void statemachine_handleBMSMessage(can_msg_t* message) { } Lightning_Board_Light_Status statemachine_getState() { - PRINTLN_INFO("grace_period = %d", grace_period); /* If we haven't made first contact yet from either board, or we are still in our grace period, just return LIGHT_OFF. */ if(!has_bms_made_contact || !has_imd_made_contact || grace_period) { return LIGHT_OFF; diff --git a/Drivers/Odyssey-Definitions b/Drivers/Odyssey-Definitions index 5adc3d2..20dcdc2 160000 --- a/Drivers/Odyssey-Definitions +++ b/Drivers/Odyssey-Definitions @@ -1 +1 @@ -Subproject commit 5adc3d2a6bf74e4338f25331a6c73990c442f3a8 +Subproject commit 20dcdc2d5a618d11cf713bb89f21f4a7192f1417