diff --git a/.mxproject b/.mxproject
index e4ad70a..6e2bbe0 100644
--- a/.mxproject
+++ b/.mxproject
@@ -1,5 +1,5 @@
 [PreviousLibFiles]
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ares\ST\threadx\common\src\tx_byte_pool_search.c;..\Middlewares\ST\threadx\common\src\tx_byte_release.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_create.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_delete.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_get.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_info_get.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_initialize.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_set.c;..\Middlewares\ST\threadx\common\src\tx_event_flags_set_notify.c;..\Middlewares\ST\threadx\common\src\tx_mutex_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_mutex_create.c;..\Middlewares\ST\threadx\common\src\tx_mutex_delete.c;..\Middlewares\ST\threadx\common\src\tx_mutex_get.c;..\Middlewares\ST\threadx\common\src\tx_mutex_info_get.c;..\Middlewares\ST\threadx\common\src\tx_mutex_initialize.c;..\Middlewares\ST\threadx\common\src\tx_mutex_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_mutex_priority_change.c;..\Middlewares\ST\threadx\common\src\tx_mutex_put.c;..\Middlewares\ST\threadx\common\src\tx_queue_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_queue_create.c;..\Middlewares\ST\threadx\common\src\tx_queue_delete.c;..\Middlewares\ST\threadx\common\src\tx_queue_flush.c;..\Middlewares\ST\threadx\common\src\tx_queue_front_send.c;..\Middlewares\ST\threadx\common\src\tx_queue_info_get.c;..\Middlewares\ST\threadx\common\src\tx_queue_initialize.c;..\Middlewares\ST\threadx\common\src\tx_queue_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_queue_receive.c;..\Middlewares\ST\threadx\common\src\tx_queue_send.c;..\Middlewares\ST\threadx\common\src\tx_queue_send_notify.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_ceiling_put.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_cleanup.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_create.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_delete.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_get.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_info_get.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_initialize.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_prioritize.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_put.c;..\Middlewares\ST\threadx\common\src\tx_semaphore_put_notify.c;..\Middlewares\ST\threadx\common\src\tx_thread_create.c;..\Middlewares\ST\threadx\common\src\tx_thread_delete.c;..\Middlewares\ST\threadx\common\src\tx_thread_entry_exit_notify.c;..\Middlewares\ST\threadx\common\src\tx_thread_identify.c;..\Middlewares\ST\threadx\common\src\tx_thread_info_get.c;..\Middlewares\ST\threadx\common\src\tx_thread_initialize.c;..\Middlewares\ST\threadx\common\src\tx_thread_preemption_change.c;..\Middlewares\ST\threadx\common\src\tx_thread_priority_change.c;..\Middlewares\ST\threadx\common\src\tx_thread_relinquish.c;..\Middlewares\ST\threadx\common\src\tx_thread_reset.c;..\Middlewares\ST\threadx\common\src\tx_thread_resume.c;..\Middlewares\ST\threadx\common\src\tx_thread_shell_entry.c;..\Middlewares\ST\threadx\common\src\tx_thread_sleep.c;..\Middlewares\ST\threadx\common\src\tx_thread_stack_analyze.c;..\Middlewares\ST\threadx\common\src\tx_thread_suspend.c;..\Middlewares\ST\threadx\common\src\tx_thread_system_preempt_check.c;..\Middlewares\ST\threadx\common\src\tx_thread_system_suspend.c;..\Middlewares\ST\threadx\common\src\tx_thread_terminate.c;..\Middlewares\ST\threadx\common\src\tx_thread_time_slice.c;..\Middlewares\ST\threadx\common\src\tx_thread_time_slice_change.c;..\Middlewares\ST\threadx\common\src\tx_thread_timeout.c;..\Middlewares\ST\threadx\common\src\tx_thread_wait_abort.c;..\Middlewares\ST\threadx\common\src\tx_time_get.c;..\Middlewares\ST\threadx\common\src\tx_time_set.c;..\Middlewares\ST\threadx\common\src\txe_block_allocate.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_create.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_delete.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_info_get.c;..\Middlewares\ST\threadx\common\src\txe_block_pool_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_block_release.c;..\Middlewares\ST\threadx\common\src\txe_byte_allocate.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_create.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_delete.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_info_get.c;..\Middlewares\ST\threadx\common\src\txe_byte_pool_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_byte_release.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_create.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_delete.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_get.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_info_get.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_set.c;..\Middlewares\ST\threadx\common\src\txe_event_flags_set_notify.c;..\Middlewares\ST\threadx\common\src\txe_mutex_create.c;..\Middlewares\ST\threadx\common\src\txe_mutex_delete.c;..\Middlewares\ST\threadx\common\src\txe_mutex_get.c;..\Middlewares\ST\threadx\common\src\txe_mutex_info_get.c;..\Middlewares\ST\threadx\common\src\txe_mutex_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_mutex_put.c;..\Middlewares\ST\threadx\common\src\txe_queue_create.c;..\Middlewares\ST\threadx\common\src\txe_queue_delete.c;..\Middlewares\ST\threadx\common\src\txe_queue_flush.c;..\Middlewares\ST\threadx\common\src\txe_queue_front_send.c;..\Middlewares\ST\threadx\common\src\txe_queue_info_get.c;..\Middlewares\ST\threadx\common\src\txe_queue_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_queue_receive.c;..\Middlewares\ST\threadx\common\src\txe_queue_send.c;..\Middlewares\ST\threadx\common\src\txe_queue_send_notify.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_ceiling_put.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_create.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_delete.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_get.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_info_get.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_prioritize.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_put.c;..\Middlewares\ST\threadx\common\src\txe_semaphore_put_notify.c;..\Middlewares\ST\threadx\common\src\txe_thread_create.c;..\Middlewares\ST\threadx\common\src\txe_thread_delete.c;..\Middlewares\ST\threadx\common\src\txe_thread_entry_exit_notify.c;..\Middlewares\ST\threadx\common\src\txe_thread_info_get.c;..\Middlewares\ST\threadx\common\src\txe_thread_preemption_change.c;..\Middlewares\ST\threadx\common\src\txe_thread_priority_change.c;..\Middlewares\ST\threadx\common\src\txe_thread_relinquish.c;..\Middlewares\ST\threadx\common\src\txe_thread_reset.c;..\Middlewares\ST\threadx\common\src\txe_thread_resume.c;..\Middlewares\ST\threadx\common\src\txe_thread_suspend.c;..\Middlewares\ST\threadx\common\src\txe_thread_terminate.c;..\Middlewares\ST\threadx\common\src\txe_thread_time_slice_change.c;..\Middlewares\ST\threadx\common\src\txe_thread_wait_abort.c;..\Middlewares\ST\threadx\common\src\tx_timer_activate.c;..\Middlewares\ST\threadx\common\src\tx_timer_change.c;..\Middlewares\ST\threadx\common\src\tx_timer_create.c;..\Middlewares\ST\threadx\common\src\tx_timer_deactivate.c;..\Middlewares\ST\threadx\common\src\tx_timer_delete.c;..\Middlewares\ST\threadx\common\src\tx_timer_expiration_process.c;..\Middlewares\ST\threadx\common\src\tx_timer_info_get.c;..\Middlewares\ST\threadx\common\src\tx_timer_initialize.c;..\Middlewares\ST\threadx\common\src\tx_timer_system_activate.c;..\Middlewares\ST\threadx\common\src\tx_timer_system_deactivate.c;..\Middlewares\ST\threadx\common\src\tx_timer_thread_entry.c;..\Middlewares\ST\threadx\common\src\txe_timer_activate.c;..\Middlewares\ST\threadx\common\src\txe_timer_change.c;..\Middlewares\ST\threadx\common\src\txe_timer_create.c;..\Middlewares\ST\threadx\common\src\txe_timer_deactivate.c;..\Middlewares\ST\threadx\common\src\txe_timer_delete.c;..\Middlewares\ST\threadx\common\src\txe_timer_info_get.c;..\Drivers\CMSIS\Device\ST\STM32H5xx\Source\Templates\system_stm32h5xx.c;..\Core\Src\system_stm32h5xx.c;;;
diff --git a/Core/Src/main.c b/Core/Src/main.c
index d92771a..6fa2a1a 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -278,8 +278,8 @@ void PeriphCommonClock_Config(void)
 
   /** Initializes the peripherals clock
   */
-  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI1|RCC_PERIPHCLK_SPI2
-                              |RCC_PERIPHCLK_SPI3;
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FDCAN|RCC_PERIPHCLK_SPI1
+                              |RCC_PERIPHCLK_SPI2|RCC_PERIPHCLK_SPI3;
   PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_HSE;
   PeriphClkInitStruct.PLL2.PLL2M = 5;
   PeriphClkInitStruct.PLL2.PLL2N = 64;
@@ -289,7 +289,8 @@ void PeriphCommonClock_Config(void)
   PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
   PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
   PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
-  PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVP;
+  PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVP|RCC_PLL2_DIVQ;
+  PeriphClkInitStruct.FdcanClockSelection = RCC_FDCANCLKSOURCE_PLL2Q;
   PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL2P;
   PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL2P;
   PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL2P;
@@ -348,10 +349,10 @@ static void MX_FDCAN2_Init(void)
   hfdcan2.Init.AutoRetransmission = DISABLE;
   hfdcan2.Init.TransmitPause = DISABLE;
   hfdcan2.Init.ProtocolException = DISABLE;
-  hfdcan2.Init.NominalPrescaler = 5;
+  hfdcan2.Init.NominalPrescaler = 8;
   hfdcan2.Init.NominalSyncJumpWidth = 1;
-  hfdcan2.Init.NominalTimeSeg1 = 8;
-  hfdcan2.Init.NominalTimeSeg2 = 1;
+  hfdcan2.Init.NominalTimeSeg1 = 11;
+  hfdcan2.Init.NominalTimeSeg2 = 4;
   hfdcan2.Init.DataPrescaler = 1;
   hfdcan2.Init.DataSyncJumpWidth = 1;
   hfdcan2.Init.DataTimeSeg1 = 1;
diff --git a/Core/Src/stm32h5xx_hal_msp.c b/Core/Src/stm32h5xx_hal_msp.c
index ddd8605..a4d6516 100644
--- a/Core/Src/stm32h5xx_hal_msp.c
+++ b/Core/Src/stm32h5xx_hal_msp.c
@@ -128,22 +128,11 @@ void HAL_DCACHE_MspDeInit(DCACHE_HandleTypeDef* hdcache)
 void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* hfdcan)
 {
   GPIO_InitTypeDef GPIO_InitStruct = {0};
-  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
   if(hfdcan->Instance==FDCAN2)
   {
     /* USER CODE BEGIN FDCAN2_MspInit 0 */
 
     /* USER CODE END FDCAN2_MspInit 0 */
-
-  /** Initializes the peripherals clock
-  */
-    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FDCAN;
-    PeriphClkInitStruct.FdcanClockSelection = RCC_FDCANCLKSOURCE_HSE;
-    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
-    {
-      Error_Handler();
-    }
-
     /* Peripheral clock enable */
     __HAL_RCC_FDCAN_CLK_ENABLE();
 
diff --git a/Lightning.ioc b/Lightning.ioc
index 8e4648d..fc55028 100644
--- a/Lightning.ioc
+++ b/Lightning.ioc
@@ -8,11 +8,12 @@ CAD.provider=
 CORTEX_M33_NS.userName=CORTEX_M33
 FDCAN2.CalculateBaudRateNominal=500000
 FDCAN2.CalculateTimeBitNominal=2000
-FDCAN2.CalculateTimeQuantumNominal=200.0
+FDCAN2.CalculateTimeQuantumNominal=125.0
 FDCAN2.ExtFiltersNbr=2
-FDCAN2.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,NominalPrescaler,NominalTimeSeg1,StdFiltersNbr,ExtFiltersNbr
-FDCAN2.NominalPrescaler=5
-FDCAN2.NominalTimeSeg1=8
+FDCAN2.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,NominalPrescaler,NominalTimeSeg1,StdFiltersNbr,ExtFiltersNbr,NominalTimeSeg2
+FDCAN2.NominalPrescaler=8
+FDCAN2.NominalTimeSeg1=11
+FDCAN2.NominalTimeSeg2=4
 FDCAN2.StdFiltersNbr=2
 File.Version=6
 GPIO.groupedBy=Group By Peripherals
@@ -278,7 +279,8 @@ RCC.DACFreq_Value=32768
 RCC.EPOD_VALUE=25000000
 RCC.ETHFreq_Value=175000000
 RCC.FCLKCortexFreq_Value=175000000
-RCC.FDCANFreq_Value=25000000
+RCC.FDCANClockSelection=RCC_FDCANCLKSOURCE_PLL2Q
+RCC.FDCANFreq_Value=64000000
 RCC.FamilyName=M
 RCC.HCLKFreq_Value=175000000
 RCC.HSE_VALUE=25000000
@@ -289,7 +291,7 @@ RCC.I2C2Freq_Value=175000000
 RCC.I2C3Freq_Value=175000000
 RCC.I2C4Freq_Value=175000000
 RCC.I3C1Freq_Value=175000000
-RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,APB3Freq_Value,CECFreq_Value,CKPERFreq_Value,CRSFreq_Value,CSI_VALUE,CortexFreq_Value,DACFreq_Value,EPOD_VALUE,ETHFreq_Value,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I3C1Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM3Freq_Value,LPTIM4Freq_Value,LPTIM5Freq_Value,LPTIM6Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSIRC_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,OCTOSPIMFreq_Value,PLL2FRACN,PLL2M,PLL2N,PLL2P,PLL2PoutputFreq_Value,PLL2Q,PLL2QoutputFreq_Value,PLL2RoutputFreq_Value,PLL2Source,PLL3FRACN,PLL3PoutputFreq_Value,PLL3QoutputFreq_Value,PLL3RoutputFreq_Value,PLLFRACN,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC1Freq_Value,SDMMC2Freq_Value,SPI1CLockSelection,SPI1Freq_Value,SPI2CLockSelection,SPI2Freq_Value,SPI3CLockSelection,SPI3Freq_Value,SPI4Freq_Value,SPI5Freq_Value,SPI6Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART12Freq_Value,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,UART9Freq_Value,UCPD1outputFreq_Value,USART10Freq_Value,USART11Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOPLL2OutputFreq_Value,VCOPLL3OutputFreq_Value
+RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,APB3Freq_Value,CECFreq_Value,CKPERFreq_Value,CRSFreq_Value,CSI_VALUE,CortexFreq_Value,DACFreq_Value,EPOD_VALUE,ETHFreq_Value,FCLKCortexFreq_Value,FDCANClockSelection,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I3C1Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM3Freq_Value,LPTIM4Freq_Value,LPTIM5Freq_Value,LPTIM6Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSIRC_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,OCTOSPIMFreq_Value,PLL2FRACN,PLL2M,PLL2N,PLL2P,PLL2PoutputFreq_Value,PLL2Q,PLL2QoutputFreq_Value,PLL2RoutputFreq_Value,PLL2Source,PLL3FRACN,PLL3PoutputFreq_Value,PLL3QoutputFreq_Value,PLL3RoutputFreq_Value,PLLFRACN,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC1Freq_Value,SDMMC2Freq_Value,SPI1CLockSelection,SPI1Freq_Value,SPI2CLockSelection,SPI2Freq_Value,SPI3CLockSelection,SPI3Freq_Value,SPI4Freq_Value,SPI5Freq_Value,SPI6Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART12Freq_Value,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,UART9Freq_Value,UCPD1outputFreq_Value,USART10Freq_Value,USART11Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOPLL2OutputFreq_Value,VCOPLL3OutputFreq_Value
 RCC.LPTIM1Freq_Value=175000000
 RCC.LPTIM2Freq_Value=175000000
 RCC.LPTIM3Freq_Value=175000000