diff --git a/Documentation/devicetree/bindings/npu/apple,ane.yaml b/Documentation/devicetree/bindings/npu/apple,ane.yaml new file mode 100644 index 00000000000000..77e9ae8650d668 --- /dev/null +++ b/Documentation/devicetree/bindings/npu/apple,ane.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/npu/apple,ane.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple Neural Engine + +maintainers: + - Christian Tramnitz + +description: | + Apple SoCs contain a Neural Engine accelerator. The accelerator is connected + through three DART IOMMU instances. + +properties: + $nodename: + pattern: '^npu@[0-9a-f]+$' + + compatible: + enum: + - apple,t8103-ane + - apple,t6000-ane + - apple,t8112-ane + - apple,t6020-ane + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + iommus: + minItems: 3 + maxItems: 3 + + power-domains: + minItems: 1 + maxItems: 5 + +allOf: + - if: + properties: + compatible: + enum: + - apple,t8103-ane + - apple,t6000-ane + then: + properties: + power-domains: + minItems: 5 + maxItems: 5 + else: + properties: + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - iommus + - power-domains + +additionalProperties: false diff --git a/MAINTAINERS b/MAINTAINERS index 8014b9f8253edf..8a732a6440fa50 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2597,6 +2597,7 @@ F: Documentation/devicetree/bindings/leds/backlight/apple,dwi-bl.yaml F: Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml F: Documentation/devicetree/bindings/mfd/apple,smc.yaml F: Documentation/devicetree/bindings/net/bluetooth/brcm,bcm4377-bluetooth.yaml +F: Documentation/devicetree/bindings/npu/apple,ane.yaml F: Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml F: Documentation/devicetree/bindings/nvmem/apple,efuses.yaml F: Documentation/devicetree/bindings/nvmem/apple,spmi-nvmem.yaml diff --git a/arch/arm64/boot/dts/apple/t6001.dtsi b/arch/arm64/boot/dts/apple/t6001.dtsi index 73053599d71d81..a80e90b04f52b7 100644 --- a/arch/arm64/boot/dts/apple/t6001.dtsi +++ b/arch/arm64/boot/dts/apple/t6001.dtsi @@ -46,10 +46,12 @@ #include "t600x-die0.dtsi" #include "t600x-dieX.dtsi" #include "t600x-nvme.dtsi" + #include "t600x-ane.dtsi" }; #include "t600x-gpio-pins.dtsi" #include "t600x-pmgr.dtsi" +#include "t600x-ane-pmgr.dtsi" #undef DIE #undef DIE_NO diff --git a/arch/arm64/boot/dts/apple/t6002-j375d.dts b/arch/arm64/boot/dts/apple/t6002-j375d.dts index 885744417f0ab9..8cbd562c621413 100644 --- a/arch/arm64/boot/dts/apple/t6002-j375d.dts +++ b/arch/arm64/boot/dts/apple/t6002-j375d.dts @@ -299,4 +299,24 @@ apple,ppm-kp = <0.355>; }; +#define DIE +#define DIE_NO 0 +#include "t600x-ane-pmgr.dtsi" +&die0 { + #include "t600x-ane.dtsi" +}; + +#undef DIE +#undef DIE_NO + +#define DIE _die1 +#define DIE_NO 1 +#include "t600x-ane-pmgr.dtsi" +&die1 { + #include "t600x-ane.dtsi" +}; + +#undef DIE +#undef DIE_NO + #include "hwmon-fan-dual.dtsi" diff --git a/arch/arm64/boot/dts/apple/t600x-ane-pmgr.dtsi b/arch/arm64/boot/dts/apple/t600x-ane-pmgr.dtsi new file mode 100644 index 00000000000000..052d227c300be5 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t600x-ane-pmgr.dtsi @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT + +&DIE_NODE(pmgr) { + DIE_NODE(ps_ane_base): power-controller@c000 { + compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc000 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = DIE_LABEL(ane_base); + power-domains = <&DIE_NODE(ps_ane_sys_cpu)>; + }; + + DIE_NODE(ps_ane_set1): power-controller@c008 { + compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc008 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = DIE_LABEL(ane_set1); + power-domains = <&DIE_NODE(ps_ane_base)>; + }; + + DIE_NODE(ps_ane_set2): power-controller@c010 { + compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc010 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = DIE_LABEL(ane_set2); + power-domains = <&DIE_NODE(ps_ane_base)>; + }; + + DIE_NODE(ps_ane_set3): power-controller@c018 { + compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc018 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = DIE_LABEL(ane_set3); + power-domains = <&DIE_NODE(ps_ane_base)>; + }; + + DIE_NODE(ps_ane_set4): power-controller@c020 { + compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc020 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = DIE_LABEL(ane_set4); + power-domains = <&DIE_NODE(ps_ane_base)>; + }; + + DIE_NODE(ps_ane_set5): power-controller@c028 { + compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc028 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = DIE_LABEL(ane_set5); + power-domains = <&DIE_NODE(ps_ane_base)>; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t600x-ane.dtsi b/arch/arm64/boot/dts/apple/t600x-ane.dtsi new file mode 100644 index 00000000000000..6af86445ccbf9b --- /dev/null +++ b/arch/arm64/boot/dts/apple/t600x-ane.dtsi @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT + + DIE_NODE(ane_dart0): iommu@285800000 { + compatible = "apple,t6000-dart"; + reg = <0x2 0x85800000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&DIE_NODE(ps_ane_sys)>; + }; + + DIE_NODE(ane_dart1): iommu@285810000 { + compatible = "apple,t6000-dart"; + reg = <0x2 0x85810000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&DIE_NODE(ps_ane_sys)>; + }; + + DIE_NODE(ane_dart2): iommu@285820000 { + compatible = "apple,t6000-dart"; + reg = <0x2 0x85820000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&DIE_NODE(ps_ane_sys)>; + }; + + DIE_NODE(ane): npu@285c04000 { + compatible = "apple,t6000-ane"; + reg = <0x2 0x85c04000 0x0 0x24000>; + interrupt-parent = <&aic>; + interrupts = ; + iommus = <&DIE_NODE(ane_dart0) 0>, <&DIE_NODE(ane_dart1) 0>, + <&DIE_NODE(ane_dart2) 0>; + power-domains = <&DIE_NODE(ps_ane_set1)>, + <&DIE_NODE(ps_ane_set2)>, <&DIE_NODE(ps_ane_set3)>, + <&DIE_NODE(ps_ane_set4)>, <&DIE_NODE(ps_ane_set5)>; + }; diff --git a/arch/arm64/boot/dts/apple/t6021.dtsi b/arch/arm64/boot/dts/apple/t6021.dtsi index bb0e66851f1b59..6ed49827b449dc 100644 --- a/arch/arm64/boot/dts/apple/t6021.dtsi +++ b/arch/arm64/boot/dts/apple/t6021.dtsi @@ -49,6 +49,7 @@ #include "t602x-die0.dtsi" #include "t602x-dieX.dtsi" #include "t602x-nvme.dtsi" + #include "t602x-ane.dtsi" }; #include "t602x-gpio-pins.dtsi" diff --git a/arch/arm64/boot/dts/apple/t6022-jxxxd.dtsi b/arch/arm64/boot/dts/apple/t6022-jxxxd.dtsi index 18683e8b62a4e2..a1cc62aef134cb 100644 --- a/arch/arm64/boot/dts/apple/t6022-jxxxd.dtsi +++ b/arch/arm64/boot/dts/apple/t6022-jxxxd.dtsi @@ -283,3 +283,21 @@ /* 6: DP1 */ }; }; + +#define DIE +#define DIE_NO 0 +&die0 { + #include "t602x-ane.dtsi" +}; + +#undef DIE +#undef DIE_NO + +#define DIE _die1 +#define DIE_NO 1 +&die1 { + #include "t602x-ane.dtsi" +}; + +#undef DIE +#undef DIE_NO diff --git a/arch/arm64/boot/dts/apple/t602x-ane.dtsi b/arch/arm64/boot/dts/apple/t602x-ane.dtsi new file mode 100644 index 00000000000000..631047c6907091 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t602x-ane.dtsi @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT + + DIE_NODE(ane_dart0): iommu@285800000 { + compatible = "apple,t6020-dart", "apple,t8110-dart"; + reg = <0x2 0x85800000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&DIE_NODE(ps_ane_sys)>; + }; + + DIE_NODE(ane_dart1): iommu@285810000 { + compatible = "apple,t6020-dart", "apple,t8110-dart"; + reg = <0x2 0x85810000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&DIE_NODE(ps_ane_sys)>; + }; + + DIE_NODE(ane_dart2): iommu@285820000 { + compatible = "apple,t6020-dart", "apple,t8110-dart"; + reg = <0x2 0x85820000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&DIE_NODE(ps_ane_sys)>; + }; + + DIE_NODE(ane): npu@285c04000 { + compatible = "apple,t6020-ane"; + reg = <0x2 0x85c04000 0x0 0x24000>; + interrupt-parent = <&aic>; + interrupts = ; + iommus = <&DIE_NODE(ane_dart0) 0>, <&DIE_NODE(ane_dart1) 0>, + <&DIE_NODE(ane_dart2) 0>; + power-domains = <&DIE_NODE(ps_ane_set4)>; + }; diff --git a/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi index 05b3e622b7cd66..3413f8d968e751 100644 --- a/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi +++ b/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi @@ -304,6 +304,101 @@ clock-frequency = <900000000>; }; +&pmgr { + ps_ane_base: power-controller@c008 { + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc008 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ane_base"; + power-domains = <&ps_ane_sys_cpu>; + }; + + ps_ane_set1: power-controller@c010 { + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc010 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ane_set1"; + power-domains = <&ps_ane_base>; + }; + + ps_ane_set2: power-controller@c018 { + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc018 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ane_set2"; + power-domains = <&ps_ane_base>; + }; + + ps_ane_set3: power-controller@c020 { + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc020 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ane_set3"; + power-domains = <&ps_ane_base>; + }; + + ps_ane_set4: power-controller@c028 { + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc028 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ane_set4"; + power-domains = <&ps_ane_base>; + }; + + ps_ane_set5: power-controller@c030 { + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc030 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ane_set5"; + power-domains = <&ps_ane_base>; + }; +}; + +&{/soc} { + ane_dart0: iommu@26b800000 { + compatible = "apple,t8103-dart"; + reg = <0x2 0x6b800000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_ane_sys>; + }; + + ane_dart1: iommu@26b810000 { + compatible = "apple,t8103-dart"; + reg = <0x2 0x6b810000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_ane_sys>; + }; + + ane_dart2: iommu@26b820000 { + compatible = "apple,t8103-dart"; + reg = <0x2 0x6b820000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_ane_sys>; + }; + + ane: npu@26bc04000 { + compatible = "apple,t8103-ane"; + reg = <0x2 0x6bc04000 0x0 0x24000>; + interrupt-parent = <&aic>; + interrupts = ; + iommus = <&ane_dart0 0>, <&ane_dart1 0>, <&ane_dart2 0>; + power-domains = <&ps_ane_set1>, <&ps_ane_set2>, + <&ps_ane_set3>, <&ps_ane_set4>, <&ps_ane_set5>; + }; +}; + #include "hwmon-common.dtsi" #include "spi1-nvram.dtsi" diff --git a/arch/arm64/boot/dts/apple/t8112-ane.dtsi b/arch/arm64/boot/dts/apple/t8112-ane.dtsi new file mode 100644 index 00000000000000..e71da60af39cba --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8112-ane.dtsi @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT + +&pmgr { + ps_ane_cpu: power-controller@c008 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc008 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ane_cpu"; + power-domains = <&ps_ane_sys>; + }; +}; + +&{/soc} { + ane_dart0: iommu@26b800000 { + compatible = "apple,t8110-dart"; + reg = <0x2 0x6b800000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_ane_sys>; + }; + + ane_dart1: iommu@26b810000 { + compatible = "apple,t8110-dart"; + reg = <0x2 0x6b810000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_ane_sys>; + }; + + ane_dart2: iommu@26b820000 { + compatible = "apple,t8110-dart"; + reg = <0x2 0x6b820000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_ane_sys>; + }; + + ane: npu@26bc04000 { + compatible = "apple,t8112-ane"; + reg = <0x2 0x6bc04000 0x0 0x24000>; + interrupt-parent = <&aic>; + interrupts = ; + iommus = <&ane_dart0 0>, <&ane_dart1 0>, <&ane_dart2 0>; + power-domains = <&ps_ane_cpu>; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi index ce14fe1d6f49ad..bc6e8b892ef04b 100644 --- a/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi +++ b/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi @@ -285,6 +285,8 @@ clock-frequency = <900000000>; }; +#include "t8112-ane.dtsi" + #include "hwmon-common.dtsi" #include "spi1-nvram.dtsi"